1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2023, Intel Corporation 4 * stmmac EST(802.3 Qbv) handling 5 */ 6 7 #define EST_GMAC4_OFFSET 0x00000c50 8 #define EST_XGMAC_OFFSET 0x00001050 9 10 #define EST_CONTROL 0x00000000 11 #define EST_GMAC5_PTOV GENMASK(31, 24) 12 #define EST_GMAC5_PTOV_SHIFT 24 13 #define EST_GMAC5_PTOV_MUL 6 14 #define EST_XGMAC_PTOV GENMASK(31, 23) 15 #define EST_XGMAC_PTOV_SHIFT 23 16 #define EST_XGMAC_PTOV_MUL 9 17 #define EST_SSWL BIT(1) 18 #define EST_EEST BIT(0) 19 #define EST_DFBS BIT(5) 20 21 #define EST_STATUS 0x00000008 22 #define EST_GMAC5_BTRL GENMASK(11, 8) 23 #define EST_XGMAC_BTRL GENMASK(15, 8) 24 #define EST_SWOL BIT(7) 25 #define EST_SWOL_SHIFT 7 26 #define EST_CGCE BIT(4) 27 #define EST_HLBS BIT(3) 28 #define EST_HLBF BIT(2) 29 #define EST_BTRE BIT(1) 30 #define EST_SWLC BIT(0) 31 32 #define EST_SCH_ERR 0x00000010 33 34 #define EST_FRM_SZ_ERR 0x00000014 35 36 #define EST_FRM_SZ_CAP 0x00000018 37 #define EST_SZ_CAP_HBFS_MASK GENMASK(14, 0) 38 #define EST_SZ_CAP_HBFQ_SHIFT 16 39 #define EST_SZ_CAP_HBFQ_MASK(val) \ 40 ({ \ 41 typeof(val) _val = (val); \ 42 (_val > 4 ? GENMASK(18, 16) : \ 43 _val > 2 ? GENMASK(17, 16) : \ 44 BIT(16)); \ 45 }) 46 47 #define EST_INT_EN 0x00000020 48 #define EST_IECGCE EST_CGCE 49 #define EST_IEHS EST_HLBS 50 #define EST_IEHF EST_HLBF 51 #define EST_IEBE EST_BTRE 52 #define EST_IECC EST_SWLC 53 54 #define EST_GCL_CONTROL 0x00000030 55 #define EST_BTR_LOW 0x0 56 #define EST_BTR_HIGH 0x1 57 #define EST_CTR_LOW 0x2 58 #define EST_CTR_HIGH 0x3 59 #define EST_TER 0x4 60 #define EST_LLR 0x5 61 #define EST_ADDR_SHIFT 8 62 #define EST_GCRR BIT(2) 63 #define EST_SRWO BIT(0) 64 65 #define EST_GCL_DATA 0x00000034 66 67 extern const struct stmmac_est_ops dwmac510_est_ops; 68