1 /******************************************************************************* 2 Copyright (C) 2007-2009 STMicroelectronics Ltd 3 4 This program is free software; you can redistribute it and/or modify it 5 under the terms and conditions of the GNU General Public License, 6 version 2, as published by the Free Software Foundation. 7 8 This program is distributed in the hope it will be useful, but WITHOUT 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 more details. 12 13 The full GNU General Public License is included in this distribution in 14 the file called "COPYING". 15 16 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 17 *******************************************************************************/ 18 19 #ifndef __STMMAC_H__ 20 #define __STMMAC_H__ 21 22 #define STMMAC_RESOURCE_NAME "stmmaceth" 23 #define DRV_MODULE_VERSION "Jan_2016" 24 25 #include <linux/clk.h> 26 #include <linux/stmmac.h> 27 #include <linux/phy.h> 28 #include <linux/pci.h> 29 #include "common.h" 30 #include <linux/ptp_clock_kernel.h> 31 #include <linux/reset.h> 32 33 struct stmmac_resources { 34 void __iomem *addr; 35 const char *mac; 36 int wol_irq; 37 int lpi_irq; 38 int irq; 39 }; 40 41 struct stmmac_tx_info { 42 dma_addr_t buf; 43 bool map_as_page; 44 unsigned len; 45 bool last_segment; 46 bool is_jumbo; 47 }; 48 49 /* Frequently used values are kept adjacent for cache effect */ 50 struct stmmac_tx_queue { 51 u32 queue_index; 52 struct stmmac_priv *priv_data; 53 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 54 struct dma_desc *dma_tx; 55 struct sk_buff **tx_skbuff; 56 struct stmmac_tx_info *tx_skbuff_dma; 57 unsigned int cur_tx; 58 unsigned int dirty_tx; 59 dma_addr_t dma_tx_phy; 60 u32 tx_tail_addr; 61 u32 mss; 62 }; 63 64 struct stmmac_rx_queue { 65 u32 queue_index; 66 struct stmmac_priv *priv_data; 67 struct dma_extended_desc *dma_erx; 68 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 69 struct sk_buff **rx_skbuff; 70 dma_addr_t *rx_skbuff_dma; 71 unsigned int cur_rx; 72 unsigned int dirty_rx; 73 u32 rx_zeroc_thresh; 74 dma_addr_t dma_rx_phy; 75 u32 rx_tail_addr; 76 struct napi_struct napi ____cacheline_aligned_in_smp; 77 }; 78 79 struct stmmac_priv { 80 /* Frequently used values are kept adjacent for cache effect */ 81 u32 tx_count_frames; 82 u32 tx_coal_frames; 83 u32 tx_coal_timer; 84 85 int tx_coalesce; 86 int hwts_tx_en; 87 bool tx_path_in_lpi_mode; 88 struct timer_list txtimer; 89 bool tso; 90 91 unsigned int dma_buf_sz; 92 unsigned int rx_copybreak; 93 u32 rx_riwt; 94 int hwts_rx_en; 95 96 void __iomem *ioaddr; 97 struct net_device *dev; 98 struct device *device; 99 struct mac_device_info *hw; 100 spinlock_t lock; 101 102 /* RX Queue */ 103 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 104 105 /* TX Queue */ 106 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 107 108 bool oldlink; 109 int speed; 110 int oldduplex; 111 unsigned int flow_ctrl; 112 unsigned int pause; 113 struct mii_bus *mii; 114 int mii_irq[PHY_MAX_ADDR]; 115 116 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 117 struct stmmac_safety_stats sstats; 118 struct plat_stmmacenet_data *plat; 119 struct dma_features dma_cap; 120 struct stmmac_counters mmc; 121 int hw_cap_support; 122 int synopsys_id; 123 u32 msg_enable; 124 int wolopts; 125 int wol_irq; 126 int clk_csr; 127 struct timer_list eee_ctrl_timer; 128 int lpi_irq; 129 int eee_enabled; 130 int eee_active; 131 int tx_lpi_timer; 132 unsigned int mode; 133 unsigned int chain_mode; 134 int extend_desc; 135 struct ptp_clock *ptp_clock; 136 struct ptp_clock_info ptp_clock_ops; 137 unsigned int default_addend; 138 u32 adv_ts; 139 int use_riwt; 140 int irq_wake; 141 spinlock_t ptp_lock; 142 void __iomem *mmcaddr; 143 void __iomem *ptpaddr; 144 145 #ifdef CONFIG_DEBUG_FS 146 struct dentry *dbgfs_dir; 147 struct dentry *dbgfs_rings_status; 148 struct dentry *dbgfs_dma_cap; 149 #endif 150 151 unsigned long state; 152 struct workqueue_struct *wq; 153 struct work_struct service_task; 154 }; 155 156 enum stmmac_state { 157 STMMAC_DOWN, 158 STMMAC_RESET_REQUESTED, 159 STMMAC_RESETING, 160 STMMAC_SERVICE_SCHED, 161 }; 162 163 int stmmac_mdio_unregister(struct net_device *ndev); 164 int stmmac_mdio_register(struct net_device *ndev); 165 int stmmac_mdio_reset(struct mii_bus *mii); 166 void stmmac_set_ethtool_ops(struct net_device *netdev); 167 168 void stmmac_ptp_register(struct stmmac_priv *priv); 169 void stmmac_ptp_unregister(struct stmmac_priv *priv); 170 int stmmac_resume(struct device *dev); 171 int stmmac_suspend(struct device *dev); 172 int stmmac_dvr_remove(struct device *dev); 173 int stmmac_dvr_probe(struct device *device, 174 struct plat_stmmacenet_data *plat_dat, 175 struct stmmac_resources *res); 176 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 177 bool stmmac_eee_init(struct stmmac_priv *priv); 178 179 #endif /* __STMMAC_H__ */ 180