1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 14 #include <linux/clk.h> 15 #include <linux/hrtimer.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool/types.h> 25 #include <net/xdp.h> 26 #include <uapi/linux/bpf.h> 27 28 struct stmmac_resources { 29 void __iomem *addr; 30 u8 mac[ETH_ALEN]; 31 int wol_irq; 32 int lpi_irq; 33 int irq; 34 int sfty_irq; 35 int sfty_ce_irq; 36 int sfty_ue_irq; 37 int rx_irq[MTL_MAX_RX_QUEUES]; 38 int tx_irq[MTL_MAX_TX_QUEUES]; 39 }; 40 41 enum stmmac_txbuf_type { 42 STMMAC_TXBUF_T_SKB, 43 STMMAC_TXBUF_T_XDP_TX, 44 STMMAC_TXBUF_T_XDP_NDO, 45 STMMAC_TXBUF_T_XSK_TX, 46 }; 47 48 struct stmmac_tx_info { 49 dma_addr_t buf; 50 bool map_as_page; 51 unsigned len; 52 bool last_segment; 53 bool is_jumbo; 54 enum stmmac_txbuf_type buf_type; 55 struct xsk_tx_metadata_compl xsk_meta; 56 }; 57 58 #define STMMAC_TBS_AVAIL BIT(0) 59 #define STMMAC_TBS_EN BIT(1) 60 61 /* Frequently used values are kept adjacent for cache effect */ 62 struct stmmac_tx_queue { 63 u32 tx_count_frames; 64 int tbs; 65 struct hrtimer txtimer; 66 u32 queue_index; 67 struct stmmac_priv *priv_data; 68 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 69 struct dma_edesc *dma_entx; 70 struct dma_desc *dma_tx; 71 union { 72 struct sk_buff **tx_skbuff; 73 struct xdp_frame **xdpf; 74 }; 75 struct stmmac_tx_info *tx_skbuff_dma; 76 struct xsk_buff_pool *xsk_pool; 77 u32 xsk_frames_done; 78 unsigned int cur_tx; 79 unsigned int dirty_tx; 80 dma_addr_t dma_tx_phy; 81 dma_addr_t tx_tail_addr; 82 u32 mss; 83 }; 84 85 struct stmmac_rx_buffer { 86 union { 87 struct { 88 struct page *page; 89 dma_addr_t addr; 90 __u32 page_offset; 91 }; 92 struct xdp_buff *xdp; 93 }; 94 struct page *sec_page; 95 dma_addr_t sec_addr; 96 }; 97 98 struct stmmac_xdp_buff { 99 struct xdp_buff xdp; 100 struct stmmac_priv *priv; 101 struct dma_desc *desc; 102 struct dma_desc *ndesc; 103 }; 104 105 struct stmmac_metadata_request { 106 struct stmmac_priv *priv; 107 struct dma_desc *tx_desc; 108 bool *set_ic; 109 }; 110 111 struct stmmac_xsk_tx_complete { 112 struct stmmac_priv *priv; 113 struct dma_desc *desc; 114 }; 115 116 struct stmmac_rx_queue { 117 u32 rx_count_frames; 118 u32 queue_index; 119 struct xdp_rxq_info xdp_rxq; 120 struct xsk_buff_pool *xsk_pool; 121 struct page_pool *page_pool; 122 struct stmmac_rx_buffer *buf_pool; 123 struct stmmac_priv *priv_data; 124 struct dma_extended_desc *dma_erx; 125 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 126 unsigned int cur_rx; 127 unsigned int dirty_rx; 128 unsigned int buf_alloc_num; 129 u32 rx_zeroc_thresh; 130 dma_addr_t dma_rx_phy; 131 u32 rx_tail_addr; 132 unsigned int state_saved; 133 struct { 134 struct sk_buff *skb; 135 unsigned int len; 136 unsigned int error; 137 } state; 138 }; 139 140 struct stmmac_channel { 141 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 142 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 143 struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; 144 struct stmmac_priv *priv_data; 145 spinlock_t lock; 146 u32 index; 147 }; 148 149 /* FPE link-partner hand-shaking mPacket type */ 150 enum stmmac_mpacket_type { 151 MPACKET_VERIFY = 0, 152 MPACKET_RESPONSE = 1, 153 }; 154 155 #define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 156 #define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 157 158 struct stmmac_fpe_cfg { 159 /* Serialize access to MAC Merge state between ethtool requests 160 * and link state updates. 161 */ 162 spinlock_t lock; 163 164 u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ 165 166 enum ethtool_mm_verify_status status; 167 struct timer_list verify_timer; 168 bool verify_enabled; 169 int verify_retries; 170 bool pmac_enabled; 171 u32 verify_time; 172 bool tx_enabled; 173 }; 174 175 struct stmmac_tc_entry { 176 bool in_use; 177 bool in_hw; 178 bool is_last; 179 bool is_frag; 180 void *frag_ptr; 181 unsigned int table_pos; 182 u32 handle; 183 u32 prio; 184 struct { 185 u32 match_data; 186 u32 match_en; 187 u8 af:1; 188 u8 rf:1; 189 u8 im:1; 190 u8 nc:1; 191 u8 res1:4; 192 u8 frame_offset; 193 u8 ok_index; 194 u8 dma_ch_no; 195 u32 res2; 196 } __packed val; 197 }; 198 199 #define STMMAC_PPS_MAX 4 200 struct stmmac_pps_cfg { 201 bool available; 202 struct timespec64 start; 203 struct timespec64 period; 204 }; 205 206 struct stmmac_rss { 207 int enable; 208 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 209 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 210 }; 211 212 #define STMMAC_FLOW_ACTION_DROP BIT(0) 213 struct stmmac_flow_entry { 214 unsigned long cookie; 215 unsigned long action; 216 u8 ip_proto; 217 int in_use; 218 int idx; 219 int is_l4; 220 }; 221 222 /* Rx Frame Steering */ 223 enum stmmac_rfs_type { 224 STMMAC_RFS_T_VLAN, 225 STMMAC_RFS_T_LLDP, 226 STMMAC_RFS_T_1588, 227 STMMAC_RFS_T_MAX, 228 }; 229 230 struct stmmac_rfs_entry { 231 unsigned long cookie; 232 u16 etype; 233 int in_use; 234 int type; 235 int tc; 236 }; 237 238 struct stmmac_dma_conf { 239 unsigned int dma_buf_sz; 240 241 /* RX Queue */ 242 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 243 unsigned int dma_rx_size; 244 245 /* TX Queue */ 246 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 247 unsigned int dma_tx_size; 248 }; 249 250 #define EST_GCL 1024 251 struct stmmac_est { 252 int enable; 253 u32 btr_reserve[2]; 254 u32 btr_offset[2]; 255 u32 btr[2]; 256 u32 ctr[2]; 257 u32 ter; 258 u32 gcl_unaligned[EST_GCL]; 259 u32 gcl[EST_GCL]; 260 u32 gcl_size; 261 u32 max_sdu[MTL_MAX_TX_QUEUES]; 262 }; 263 264 struct stmmac_priv { 265 /* Frequently used values are kept adjacent for cache effect */ 266 u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 267 u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 268 u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 269 270 int hwts_tx_en; 271 bool tx_path_in_lpi_mode; 272 bool tso; 273 int sph; 274 int sph_cap; 275 u32 sarc_type; 276 277 unsigned int rx_copybreak; 278 u32 rx_riwt[MTL_MAX_TX_QUEUES]; 279 int hwts_rx_en; 280 281 void __iomem *ioaddr; 282 struct net_device *dev; 283 struct device *device; 284 struct mac_device_info *hw; 285 int (*hwif_quirks)(struct stmmac_priv *priv); 286 struct mutex lock; 287 288 struct stmmac_dma_conf dma_conf; 289 290 /* Generic channel for NAPI */ 291 struct stmmac_channel channel[STMMAC_CH_MAX]; 292 293 int speed; 294 unsigned int flow_ctrl; 295 unsigned int pause; 296 struct mii_bus *mii; 297 298 struct phylink_config phylink_config; 299 struct phylink *phylink; 300 301 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 302 struct stmmac_safety_stats sstats; 303 struct plat_stmmacenet_data *plat; 304 /* Protect est parameters */ 305 struct mutex est_lock; 306 struct stmmac_est *est; 307 struct dma_features dma_cap; 308 struct stmmac_counters mmc; 309 int hw_cap_support; 310 int synopsys_id; 311 u32 msg_enable; 312 int wolopts; 313 int wol_irq; 314 bool wol_irq_disabled; 315 int clk_csr; 316 struct timer_list eee_ctrl_timer; 317 int lpi_irq; 318 int eee_enabled; 319 int eee_active; 320 int tx_lpi_timer; 321 int tx_lpi_enabled; 322 int eee_tw_timer; 323 bool eee_sw_timer_en; 324 unsigned int mode; 325 unsigned int chain_mode; 326 int extend_desc; 327 struct hwtstamp_config tstamp_config; 328 struct ptp_clock *ptp_clock; 329 struct ptp_clock_info ptp_clock_ops; 330 unsigned int default_addend; 331 u32 sub_second_inc; 332 u32 systime_flags; 333 u32 adv_ts; 334 int use_riwt; 335 int irq_wake; 336 rwlock_t ptp_lock; 337 /* Protects auxiliary snapshot registers from concurrent access. */ 338 struct mutex aux_ts_lock; 339 wait_queue_head_t tstamp_busy_wait; 340 341 void __iomem *mmcaddr; 342 void __iomem *ptpaddr; 343 void __iomem *estaddr; 344 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 345 int sfty_irq; 346 int sfty_ce_irq; 347 int sfty_ue_irq; 348 int rx_irq[MTL_MAX_RX_QUEUES]; 349 int tx_irq[MTL_MAX_TX_QUEUES]; 350 /*irq name */ 351 char int_name_mac[IFNAMSIZ + 9]; 352 char int_name_wol[IFNAMSIZ + 9]; 353 char int_name_lpi[IFNAMSIZ + 9]; 354 char int_name_sfty[IFNAMSIZ + 10]; 355 char int_name_sfty_ce[IFNAMSIZ + 10]; 356 char int_name_sfty_ue[IFNAMSIZ + 10]; 357 char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 358 char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 359 360 #ifdef CONFIG_DEBUG_FS 361 struct dentry *dbgfs_dir; 362 #endif 363 364 unsigned long state; 365 struct workqueue_struct *wq; 366 struct work_struct service_task; 367 368 /* Frame Preemption feature (FPE) */ 369 struct stmmac_fpe_cfg fpe_cfg; 370 371 /* TC Handling */ 372 unsigned int tc_entries_max; 373 unsigned int tc_off_max; 374 struct stmmac_tc_entry *tc_entries; 375 unsigned int flow_entries_max; 376 struct stmmac_flow_entry *flow_entries; 377 unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; 378 unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; 379 unsigned int rfs_entries_total; 380 struct stmmac_rfs_entry *rfs_entries; 381 382 /* Pulse Per Second output */ 383 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 384 385 /* Receive Side Scaling */ 386 struct stmmac_rss rss; 387 388 /* XDP BPF Program */ 389 unsigned long *af_xdp_zc_qps; 390 struct bpf_prog *xdp_prog; 391 }; 392 393 enum stmmac_state { 394 STMMAC_DOWN, 395 STMMAC_RESET_REQUESTED, 396 STMMAC_RESETING, 397 STMMAC_SERVICE_SCHED, 398 }; 399 400 int stmmac_mdio_unregister(struct net_device *ndev); 401 int stmmac_mdio_register(struct net_device *ndev); 402 int stmmac_mdio_reset(struct mii_bus *mii); 403 int stmmac_pcs_setup(struct net_device *ndev); 404 void stmmac_pcs_clean(struct net_device *ndev); 405 void stmmac_set_ethtool_ops(struct net_device *netdev); 406 407 int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); 408 void stmmac_ptp_register(struct stmmac_priv *priv); 409 void stmmac_ptp_unregister(struct stmmac_priv *priv); 410 int stmmac_xdp_open(struct net_device *dev); 411 void stmmac_xdp_release(struct net_device *dev); 412 int stmmac_resume(struct device *dev); 413 int stmmac_suspend(struct device *dev); 414 void stmmac_dvr_remove(struct device *dev); 415 int stmmac_dvr_probe(struct device *device, 416 struct plat_stmmacenet_data *plat_dat, 417 struct stmmac_resources *res); 418 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 419 bool stmmac_eee_init(struct stmmac_priv *priv); 420 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 421 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 422 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 423 void stmmac_fpe_apply(struct stmmac_priv *priv); 424 425 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 426 { 427 return !!priv->xdp_prog; 428 } 429 430 static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 431 { 432 if (stmmac_xdp_is_enabled(priv)) 433 return XDP_PACKET_HEADROOM; 434 435 return 0; 436 } 437 438 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); 439 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); 440 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); 441 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); 442 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); 443 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 444 ktime_t current_time, 445 u64 cycle_time); 446 447 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 448 void stmmac_selftest_run(struct net_device *dev, 449 struct ethtool_test *etest, u64 *buf); 450 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 451 int stmmac_selftest_get_count(struct stmmac_priv *priv); 452 #else 453 static inline void stmmac_selftest_run(struct net_device *dev, 454 struct ethtool_test *etest, u64 *buf) 455 { 456 /* Not enabled */ 457 } 458 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 459 u8 *data) 460 { 461 /* Not enabled */ 462 } 463 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 464 { 465 return -EOPNOTSUPP; 466 } 467 #endif /* CONFIG_STMMAC_SELFTESTS */ 468 469 #endif /* __STMMAC_H__ */ 470