1 /******************************************************************************* 2 Copyright (C) 2007-2009 STMicroelectronics Ltd 3 4 This program is free software; you can redistribute it and/or modify it 5 under the terms and conditions of the GNU General Public License, 6 version 2, as published by the Free Software Foundation. 7 8 This program is distributed in the hope it will be useful, but WITHOUT 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 more details. 12 13 The full GNU General Public License is included in this distribution in 14 the file called "COPYING". 15 16 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 17 *******************************************************************************/ 18 19 #ifndef __STMMAC_H__ 20 #define __STMMAC_H__ 21 22 #define STMMAC_RESOURCE_NAME "stmmaceth" 23 #define DRV_MODULE_VERSION "Jan_2016" 24 25 #include <linux/clk.h> 26 #include <linux/stmmac.h> 27 #include <linux/phy.h> 28 #include <linux/pci.h> 29 #include "common.h" 30 #include <linux/ptp_clock_kernel.h> 31 #include <linux/reset.h> 32 33 struct stmmac_resources { 34 void __iomem *addr; 35 const char *mac; 36 int wol_irq; 37 int lpi_irq; 38 int irq; 39 }; 40 41 struct stmmac_tx_info { 42 dma_addr_t buf; 43 bool map_as_page; 44 unsigned len; 45 bool last_segment; 46 bool is_jumbo; 47 }; 48 49 /* Frequently used values are kept adjacent for cache effect */ 50 struct stmmac_tx_queue { 51 u32 queue_index; 52 struct stmmac_priv *priv_data; 53 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 54 struct dma_desc *dma_tx; 55 struct sk_buff **tx_skbuff; 56 struct stmmac_tx_info *tx_skbuff_dma; 57 unsigned int cur_tx; 58 unsigned int dirty_tx; 59 dma_addr_t dma_tx_phy; 60 u32 tx_tail_addr; 61 u32 mss; 62 }; 63 64 struct stmmac_rx_queue { 65 u32 queue_index; 66 struct stmmac_priv *priv_data; 67 struct dma_extended_desc *dma_erx; 68 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 69 struct sk_buff **rx_skbuff; 70 dma_addr_t *rx_skbuff_dma; 71 unsigned int cur_rx; 72 unsigned int dirty_rx; 73 u32 rx_zeroc_thresh; 74 dma_addr_t dma_rx_phy; 75 u32 rx_tail_addr; 76 struct napi_struct napi ____cacheline_aligned_in_smp; 77 }; 78 79 struct stmmac_tc_entry { 80 bool in_use; 81 bool in_hw; 82 bool is_last; 83 bool is_frag; 84 void *frag_ptr; 85 unsigned int table_pos; 86 u32 handle; 87 u32 prio; 88 struct { 89 u32 match_data; 90 u32 match_en; 91 u8 af:1; 92 u8 rf:1; 93 u8 im:1; 94 u8 nc:1; 95 u8 res1:4; 96 u8 frame_offset; 97 u8 ok_index; 98 u8 dma_ch_no; 99 u32 res2; 100 } __packed val; 101 }; 102 103 #define STMMAC_PPS_MAX 4 104 struct stmmac_pps_cfg { 105 bool available; 106 struct timespec64 start; 107 struct timespec64 period; 108 }; 109 110 struct stmmac_priv { 111 /* Frequently used values are kept adjacent for cache effect */ 112 u32 tx_count_frames; 113 u32 tx_coal_frames; 114 u32 tx_coal_timer; 115 bool tx_timer_armed; 116 117 int tx_coalesce; 118 int hwts_tx_en; 119 bool tx_path_in_lpi_mode; 120 struct timer_list txtimer; 121 bool tso; 122 123 unsigned int dma_buf_sz; 124 unsigned int rx_copybreak; 125 u32 rx_riwt; 126 int hwts_rx_en; 127 128 void __iomem *ioaddr; 129 struct net_device *dev; 130 struct device *device; 131 struct mac_device_info *hw; 132 int (*hwif_quirks)(struct stmmac_priv *priv); 133 struct mutex lock; 134 135 /* RX Queue */ 136 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 137 138 /* TX Queue */ 139 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 140 141 bool oldlink; 142 int speed; 143 int oldduplex; 144 unsigned int flow_ctrl; 145 unsigned int pause; 146 struct mii_bus *mii; 147 int mii_irq[PHY_MAX_ADDR]; 148 149 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 150 struct stmmac_safety_stats sstats; 151 struct plat_stmmacenet_data *plat; 152 struct dma_features dma_cap; 153 struct stmmac_counters mmc; 154 int hw_cap_support; 155 int synopsys_id; 156 u32 msg_enable; 157 int wolopts; 158 int wol_irq; 159 int clk_csr; 160 struct timer_list eee_ctrl_timer; 161 int lpi_irq; 162 int eee_enabled; 163 int eee_active; 164 int tx_lpi_timer; 165 unsigned int mode; 166 unsigned int chain_mode; 167 int extend_desc; 168 struct ptp_clock *ptp_clock; 169 struct ptp_clock_info ptp_clock_ops; 170 unsigned int default_addend; 171 u32 sub_second_inc; 172 u32 systime_flags; 173 u32 adv_ts; 174 int use_riwt; 175 int irq_wake; 176 spinlock_t ptp_lock; 177 void __iomem *mmcaddr; 178 void __iomem *ptpaddr; 179 180 #ifdef CONFIG_DEBUG_FS 181 struct dentry *dbgfs_dir; 182 struct dentry *dbgfs_rings_status; 183 struct dentry *dbgfs_dma_cap; 184 #endif 185 186 unsigned long state; 187 struct workqueue_struct *wq; 188 struct work_struct service_task; 189 190 /* TC Handling */ 191 unsigned int tc_entries_max; 192 unsigned int tc_off_max; 193 struct stmmac_tc_entry *tc_entries; 194 195 /* Pulse Per Second output */ 196 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 197 }; 198 199 enum stmmac_state { 200 STMMAC_DOWN, 201 STMMAC_RESET_REQUESTED, 202 STMMAC_RESETING, 203 STMMAC_SERVICE_SCHED, 204 }; 205 206 int stmmac_mdio_unregister(struct net_device *ndev); 207 int stmmac_mdio_register(struct net_device *ndev); 208 int stmmac_mdio_reset(struct mii_bus *mii); 209 void stmmac_set_ethtool_ops(struct net_device *netdev); 210 211 void stmmac_ptp_register(struct stmmac_priv *priv); 212 void stmmac_ptp_unregister(struct stmmac_priv *priv); 213 int stmmac_resume(struct device *dev); 214 int stmmac_suspend(struct device *dev); 215 int stmmac_dvr_remove(struct device *dev); 216 int stmmac_dvr_probe(struct device *device, 217 struct plat_stmmacenet_data *plat_dat, 218 struct stmmac_resources *res); 219 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 220 bool stmmac_eee_init(struct stmmac_priv *priv); 221 222 #endif /* __STMMAC_H__ */ 223