1 /******************************************************************************* 2 Copyright (C) 2007-2009 STMicroelectronics Ltd 3 4 This program is free software; you can redistribute it and/or modify it 5 under the terms and conditions of the GNU General Public License, 6 version 2, as published by the Free Software Foundation. 7 8 This program is distributed in the hope it will be useful, but WITHOUT 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 more details. 12 13 The full GNU General Public License is included in this distribution in 14 the file called "COPYING". 15 16 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 17 *******************************************************************************/ 18 19 #ifndef __STMMAC_H__ 20 #define __STMMAC_H__ 21 22 #define STMMAC_RESOURCE_NAME "stmmaceth" 23 #define DRV_MODULE_VERSION "Jan_2016" 24 25 #include <linux/clk.h> 26 #include <linux/stmmac.h> 27 #include <linux/phy.h> 28 #include <linux/pci.h> 29 #include "common.h" 30 #include <linux/ptp_clock_kernel.h> 31 #include <linux/reset.h> 32 33 struct stmmac_resources { 34 void __iomem *addr; 35 const char *mac; 36 int wol_irq; 37 int lpi_irq; 38 int irq; 39 }; 40 41 struct stmmac_tx_info { 42 dma_addr_t buf; 43 bool map_as_page; 44 unsigned len; 45 bool last_segment; 46 bool is_jumbo; 47 }; 48 49 /* Frequently used values are kept adjacent for cache effect */ 50 struct stmmac_tx_queue { 51 u32 queue_index; 52 struct stmmac_priv *priv_data; 53 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 54 struct dma_desc *dma_tx; 55 struct sk_buff **tx_skbuff; 56 struct stmmac_tx_info *tx_skbuff_dma; 57 unsigned int cur_tx; 58 unsigned int dirty_tx; 59 dma_addr_t dma_tx_phy; 60 u32 tx_tail_addr; 61 u32 mss; 62 }; 63 64 struct stmmac_rx_queue { 65 u32 queue_index; 66 struct stmmac_priv *priv_data; 67 struct dma_extended_desc *dma_erx; 68 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 69 struct sk_buff **rx_skbuff; 70 dma_addr_t *rx_skbuff_dma; 71 unsigned int cur_rx; 72 unsigned int dirty_rx; 73 u32 rx_zeroc_thresh; 74 dma_addr_t dma_rx_phy; 75 u32 rx_tail_addr; 76 struct napi_struct napi ____cacheline_aligned_in_smp; 77 }; 78 79 struct stmmac_tc_entry { 80 bool in_use; 81 bool in_hw; 82 bool is_last; 83 bool is_frag; 84 void *frag_ptr; 85 unsigned int table_pos; 86 u32 handle; 87 u32 prio; 88 struct { 89 u32 match_data; 90 u32 match_en; 91 u8 af:1; 92 u8 rf:1; 93 u8 im:1; 94 u8 nc:1; 95 u8 res1:4; 96 u8 frame_offset; 97 u8 ok_index; 98 u8 dma_ch_no; 99 u32 res2; 100 } __packed val; 101 }; 102 103 struct stmmac_priv { 104 /* Frequently used values are kept adjacent for cache effect */ 105 u32 tx_count_frames; 106 u32 tx_coal_frames; 107 u32 tx_coal_timer; 108 109 int tx_coalesce; 110 int hwts_tx_en; 111 bool tx_path_in_lpi_mode; 112 struct timer_list txtimer; 113 bool tso; 114 115 unsigned int dma_buf_sz; 116 unsigned int rx_copybreak; 117 u32 rx_riwt; 118 int hwts_rx_en; 119 120 void __iomem *ioaddr; 121 struct net_device *dev; 122 struct device *device; 123 struct mac_device_info *hw; 124 spinlock_t lock; 125 126 /* RX Queue */ 127 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 128 129 /* TX Queue */ 130 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 131 132 bool oldlink; 133 int speed; 134 int oldduplex; 135 unsigned int flow_ctrl; 136 unsigned int pause; 137 struct mii_bus *mii; 138 int mii_irq[PHY_MAX_ADDR]; 139 140 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 141 struct stmmac_safety_stats sstats; 142 struct plat_stmmacenet_data *plat; 143 struct dma_features dma_cap; 144 struct stmmac_counters mmc; 145 int hw_cap_support; 146 int synopsys_id; 147 u32 msg_enable; 148 int wolopts; 149 int wol_irq; 150 int clk_csr; 151 struct timer_list eee_ctrl_timer; 152 int lpi_irq; 153 int eee_enabled; 154 int eee_active; 155 int tx_lpi_timer; 156 unsigned int mode; 157 unsigned int chain_mode; 158 int extend_desc; 159 struct ptp_clock *ptp_clock; 160 struct ptp_clock_info ptp_clock_ops; 161 unsigned int default_addend; 162 u32 adv_ts; 163 int use_riwt; 164 int irq_wake; 165 spinlock_t ptp_lock; 166 void __iomem *mmcaddr; 167 void __iomem *ptpaddr; 168 169 #ifdef CONFIG_DEBUG_FS 170 struct dentry *dbgfs_dir; 171 struct dentry *dbgfs_rings_status; 172 struct dentry *dbgfs_dma_cap; 173 #endif 174 175 unsigned long state; 176 struct workqueue_struct *wq; 177 struct work_struct service_task; 178 179 /* TC Handling */ 180 unsigned int tc_entries_max; 181 unsigned int tc_off_max; 182 struct stmmac_tc_entry *tc_entries; 183 }; 184 185 enum stmmac_state { 186 STMMAC_DOWN, 187 STMMAC_RESET_REQUESTED, 188 STMMAC_RESETING, 189 STMMAC_SERVICE_SCHED, 190 }; 191 192 int stmmac_mdio_unregister(struct net_device *ndev); 193 int stmmac_mdio_register(struct net_device *ndev); 194 int stmmac_mdio_reset(struct mii_bus *mii); 195 void stmmac_set_ethtool_ops(struct net_device *netdev); 196 197 void stmmac_ptp_register(struct stmmac_priv *priv); 198 void stmmac_ptp_unregister(struct stmmac_priv *priv); 199 int stmmac_resume(struct device *dev); 200 int stmmac_suspend(struct device *dev); 201 int stmmac_dvr_remove(struct device *dev); 202 int stmmac_dvr_probe(struct device *device, 203 struct plat_stmmacenet_data *plat_dat, 204 struct stmmac_resources *res); 205 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 206 bool stmmac_eee_init(struct stmmac_priv *priv); 207 208 #endif /* __STMMAC_H__ */ 209