1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 #define DRV_MODULE_VERSION "Jan_2016" 14 15 #include <linux/clk.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool.h> 25 26 struct stmmac_resources { 27 void __iomem *addr; 28 const char *mac; 29 int wol_irq; 30 int lpi_irq; 31 int irq; 32 }; 33 34 struct stmmac_tx_info { 35 dma_addr_t buf; 36 bool map_as_page; 37 unsigned len; 38 bool last_segment; 39 bool is_jumbo; 40 }; 41 42 /* Frequently used values are kept adjacent for cache effect */ 43 struct stmmac_tx_queue { 44 u32 tx_count_frames; 45 struct timer_list txtimer; 46 u32 queue_index; 47 struct stmmac_priv *priv_data; 48 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 49 struct dma_desc *dma_tx; 50 struct sk_buff **tx_skbuff; 51 struct stmmac_tx_info *tx_skbuff_dma; 52 unsigned int cur_tx; 53 unsigned int dirty_tx; 54 dma_addr_t dma_tx_phy; 55 u32 tx_tail_addr; 56 u32 mss; 57 }; 58 59 struct stmmac_rx_buffer { 60 struct page *page; 61 struct page *sec_page; 62 dma_addr_t addr; 63 dma_addr_t sec_addr; 64 }; 65 66 struct stmmac_rx_queue { 67 u32 rx_count_frames; 68 u32 queue_index; 69 struct page_pool *page_pool; 70 struct stmmac_rx_buffer *buf_pool; 71 struct stmmac_priv *priv_data; 72 struct dma_extended_desc *dma_erx; 73 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 74 unsigned int cur_rx; 75 unsigned int dirty_rx; 76 u32 rx_zeroc_thresh; 77 dma_addr_t dma_rx_phy; 78 u32 rx_tail_addr; 79 unsigned int state_saved; 80 struct { 81 struct sk_buff *skb; 82 unsigned int len; 83 unsigned int error; 84 } state; 85 }; 86 87 struct stmmac_channel { 88 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 89 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 90 struct stmmac_priv *priv_data; 91 spinlock_t lock; 92 u32 index; 93 }; 94 95 struct stmmac_tc_entry { 96 bool in_use; 97 bool in_hw; 98 bool is_last; 99 bool is_frag; 100 void *frag_ptr; 101 unsigned int table_pos; 102 u32 handle; 103 u32 prio; 104 struct { 105 u32 match_data; 106 u32 match_en; 107 u8 af:1; 108 u8 rf:1; 109 u8 im:1; 110 u8 nc:1; 111 u8 res1:4; 112 u8 frame_offset; 113 u8 ok_index; 114 u8 dma_ch_no; 115 u32 res2; 116 } __packed val; 117 }; 118 119 #define STMMAC_PPS_MAX 4 120 struct stmmac_pps_cfg { 121 bool available; 122 struct timespec64 start; 123 struct timespec64 period; 124 }; 125 126 struct stmmac_rss { 127 int enable; 128 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 129 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 130 }; 131 132 #define STMMAC_FLOW_ACTION_DROP BIT(0) 133 struct stmmac_flow_entry { 134 unsigned long cookie; 135 unsigned long action; 136 u8 ip_proto; 137 int in_use; 138 int idx; 139 int is_l4; 140 }; 141 142 struct stmmac_priv { 143 /* Frequently used values are kept adjacent for cache effect */ 144 u32 tx_coal_frames; 145 u32 tx_coal_timer; 146 u32 rx_coal_frames; 147 148 int tx_coalesce; 149 int hwts_tx_en; 150 bool tx_path_in_lpi_mode; 151 bool tso; 152 int sph; 153 u32 sarc_type; 154 155 unsigned int dma_buf_sz; 156 unsigned int rx_copybreak; 157 u32 rx_riwt; 158 int hwts_rx_en; 159 160 void __iomem *ioaddr; 161 struct net_device *dev; 162 struct device *device; 163 struct mac_device_info *hw; 164 int (*hwif_quirks)(struct stmmac_priv *priv); 165 struct mutex lock; 166 167 /* RX Queue */ 168 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 169 170 /* TX Queue */ 171 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 172 173 /* Generic channel for NAPI */ 174 struct stmmac_channel channel[STMMAC_CH_MAX]; 175 176 int speed; 177 unsigned int flow_ctrl; 178 unsigned int pause; 179 struct mii_bus *mii; 180 int mii_irq[PHY_MAX_ADDR]; 181 182 struct phylink_config phylink_config; 183 struct phylink *phylink; 184 185 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 186 struct stmmac_safety_stats sstats; 187 struct plat_stmmacenet_data *plat; 188 struct dma_features dma_cap; 189 struct stmmac_counters mmc; 190 int hw_cap_support; 191 int synopsys_id; 192 u32 msg_enable; 193 int wolopts; 194 int wol_irq; 195 int clk_csr; 196 struct timer_list eee_ctrl_timer; 197 int lpi_irq; 198 int eee_enabled; 199 int eee_active; 200 int tx_lpi_timer; 201 unsigned int mode; 202 unsigned int chain_mode; 203 int extend_desc; 204 struct hwtstamp_config tstamp_config; 205 struct ptp_clock *ptp_clock; 206 struct ptp_clock_info ptp_clock_ops; 207 unsigned int default_addend; 208 u32 sub_second_inc; 209 u32 systime_flags; 210 u32 adv_ts; 211 int use_riwt; 212 int irq_wake; 213 spinlock_t ptp_lock; 214 void __iomem *mmcaddr; 215 void __iomem *ptpaddr; 216 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 217 218 #ifdef CONFIG_DEBUG_FS 219 struct dentry *dbgfs_dir; 220 #endif 221 222 unsigned long state; 223 struct workqueue_struct *wq; 224 struct work_struct service_task; 225 226 /* TC Handling */ 227 unsigned int tc_entries_max; 228 unsigned int tc_off_max; 229 struct stmmac_tc_entry *tc_entries; 230 unsigned int flow_entries_max; 231 struct stmmac_flow_entry *flow_entries; 232 233 /* Pulse Per Second output */ 234 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 235 236 /* Receive Side Scaling */ 237 struct stmmac_rss rss; 238 }; 239 240 enum stmmac_state { 241 STMMAC_DOWN, 242 STMMAC_RESET_REQUESTED, 243 STMMAC_RESETING, 244 STMMAC_SERVICE_SCHED, 245 }; 246 247 int stmmac_mdio_unregister(struct net_device *ndev); 248 int stmmac_mdio_register(struct net_device *ndev); 249 int stmmac_mdio_reset(struct mii_bus *mii); 250 void stmmac_set_ethtool_ops(struct net_device *netdev); 251 252 void stmmac_ptp_register(struct stmmac_priv *priv); 253 void stmmac_ptp_unregister(struct stmmac_priv *priv); 254 int stmmac_resume(struct device *dev); 255 int stmmac_suspend(struct device *dev); 256 int stmmac_dvr_remove(struct device *dev); 257 int stmmac_dvr_probe(struct device *device, 258 struct plat_stmmacenet_data *plat_dat, 259 struct stmmac_resources *res); 260 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 261 bool stmmac_eee_init(struct stmmac_priv *priv); 262 263 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 264 void stmmac_selftest_run(struct net_device *dev, 265 struct ethtool_test *etest, u64 *buf); 266 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 267 int stmmac_selftest_get_count(struct stmmac_priv *priv); 268 #else 269 static inline void stmmac_selftest_run(struct net_device *dev, 270 struct ethtool_test *etest, u64 *buf) 271 { 272 /* Not enabled */ 273 } 274 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 275 u8 *data) 276 { 277 /* Not enabled */ 278 } 279 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 280 { 281 return -EOPNOTSUPP; 282 } 283 #endif /* CONFIG_STMMAC_SELFTESTS */ 284 285 #endif /* __STMMAC_H__ */ 286