1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 14 #include <linux/clk.h> 15 #include <linux/hrtimer.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool.h> 25 #include <uapi/linux/bpf.h> 26 27 struct stmmac_resources { 28 void __iomem *addr; 29 u8 mac[ETH_ALEN]; 30 int wol_irq; 31 int lpi_irq; 32 int irq; 33 int sfty_ce_irq; 34 int sfty_ue_irq; 35 int rx_irq[MTL_MAX_RX_QUEUES]; 36 int tx_irq[MTL_MAX_TX_QUEUES]; 37 }; 38 39 enum stmmac_txbuf_type { 40 STMMAC_TXBUF_T_SKB, 41 STMMAC_TXBUF_T_XDP_TX, 42 STMMAC_TXBUF_T_XDP_NDO, 43 STMMAC_TXBUF_T_XSK_TX, 44 }; 45 46 struct stmmac_tx_info { 47 dma_addr_t buf; 48 bool map_as_page; 49 unsigned len; 50 bool last_segment; 51 bool is_jumbo; 52 enum stmmac_txbuf_type buf_type; 53 }; 54 55 #define STMMAC_TBS_AVAIL BIT(0) 56 #define STMMAC_TBS_EN BIT(1) 57 58 /* Frequently used values are kept adjacent for cache effect */ 59 struct stmmac_tx_queue { 60 u32 tx_count_frames; 61 int tbs; 62 struct hrtimer txtimer; 63 u32 queue_index; 64 struct stmmac_priv *priv_data; 65 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 66 struct dma_edesc *dma_entx; 67 struct dma_desc *dma_tx; 68 union { 69 struct sk_buff **tx_skbuff; 70 struct xdp_frame **xdpf; 71 }; 72 struct stmmac_tx_info *tx_skbuff_dma; 73 struct xsk_buff_pool *xsk_pool; 74 u32 xsk_frames_done; 75 unsigned int cur_tx; 76 unsigned int dirty_tx; 77 dma_addr_t dma_tx_phy; 78 dma_addr_t tx_tail_addr; 79 u32 mss; 80 }; 81 82 struct stmmac_rx_buffer { 83 union { 84 struct { 85 struct page *page; 86 dma_addr_t addr; 87 __u32 page_offset; 88 }; 89 struct xdp_buff *xdp; 90 }; 91 struct page *sec_page; 92 dma_addr_t sec_addr; 93 }; 94 95 struct stmmac_xdp_buff { 96 struct xdp_buff xdp; 97 struct stmmac_priv *priv; 98 struct dma_desc *desc; 99 struct dma_desc *ndesc; 100 }; 101 102 struct stmmac_rx_queue { 103 u32 rx_count_frames; 104 u32 queue_index; 105 struct xdp_rxq_info xdp_rxq; 106 struct xsk_buff_pool *xsk_pool; 107 struct page_pool *page_pool; 108 struct stmmac_rx_buffer *buf_pool; 109 struct stmmac_priv *priv_data; 110 struct dma_extended_desc *dma_erx; 111 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 112 unsigned int cur_rx; 113 unsigned int dirty_rx; 114 unsigned int buf_alloc_num; 115 u32 rx_zeroc_thresh; 116 dma_addr_t dma_rx_phy; 117 u32 rx_tail_addr; 118 unsigned int state_saved; 119 struct { 120 struct sk_buff *skb; 121 unsigned int len; 122 unsigned int error; 123 } state; 124 }; 125 126 struct stmmac_channel { 127 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 128 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 129 struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; 130 struct stmmac_priv *priv_data; 131 spinlock_t lock; 132 u32 index; 133 }; 134 135 struct stmmac_tc_entry { 136 bool in_use; 137 bool in_hw; 138 bool is_last; 139 bool is_frag; 140 void *frag_ptr; 141 unsigned int table_pos; 142 u32 handle; 143 u32 prio; 144 struct { 145 u32 match_data; 146 u32 match_en; 147 u8 af:1; 148 u8 rf:1; 149 u8 im:1; 150 u8 nc:1; 151 u8 res1:4; 152 u8 frame_offset; 153 u8 ok_index; 154 u8 dma_ch_no; 155 u32 res2; 156 } __packed val; 157 }; 158 159 #define STMMAC_PPS_MAX 4 160 struct stmmac_pps_cfg { 161 bool available; 162 struct timespec64 start; 163 struct timespec64 period; 164 }; 165 166 struct stmmac_rss { 167 int enable; 168 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 169 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 170 }; 171 172 #define STMMAC_FLOW_ACTION_DROP BIT(0) 173 struct stmmac_flow_entry { 174 unsigned long cookie; 175 unsigned long action; 176 u8 ip_proto; 177 int in_use; 178 int idx; 179 int is_l4; 180 }; 181 182 /* Rx Frame Steering */ 183 enum stmmac_rfs_type { 184 STMMAC_RFS_T_VLAN, 185 STMMAC_RFS_T_LLDP, 186 STMMAC_RFS_T_1588, 187 STMMAC_RFS_T_MAX, 188 }; 189 190 struct stmmac_rfs_entry { 191 unsigned long cookie; 192 u16 etype; 193 int in_use; 194 int type; 195 int tc; 196 }; 197 198 struct stmmac_dma_conf { 199 unsigned int dma_buf_sz; 200 201 /* RX Queue */ 202 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 203 unsigned int dma_rx_size; 204 205 /* TX Queue */ 206 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 207 unsigned int dma_tx_size; 208 }; 209 210 struct stmmac_priv { 211 /* Frequently used values are kept adjacent for cache effect */ 212 u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 213 u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 214 u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 215 216 int hwts_tx_en; 217 bool tx_path_in_lpi_mode; 218 bool tso; 219 int sph; 220 int sph_cap; 221 u32 sarc_type; 222 223 unsigned int rx_copybreak; 224 u32 rx_riwt[MTL_MAX_TX_QUEUES]; 225 int hwts_rx_en; 226 227 void __iomem *ioaddr; 228 struct net_device *dev; 229 struct device *device; 230 struct mac_device_info *hw; 231 int (*hwif_quirks)(struct stmmac_priv *priv); 232 struct mutex lock; 233 234 struct stmmac_dma_conf dma_conf; 235 236 /* Generic channel for NAPI */ 237 struct stmmac_channel channel[STMMAC_CH_MAX]; 238 239 int speed; 240 unsigned int flow_ctrl; 241 unsigned int pause; 242 struct mii_bus *mii; 243 244 struct phylink_config phylink_config; 245 struct phylink *phylink; 246 247 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 248 struct stmmac_safety_stats sstats; 249 struct plat_stmmacenet_data *plat; 250 struct dma_features dma_cap; 251 struct stmmac_counters mmc; 252 int hw_cap_support; 253 int synopsys_id; 254 u32 msg_enable; 255 int wolopts; 256 int wol_irq; 257 int clk_csr; 258 struct timer_list eee_ctrl_timer; 259 int lpi_irq; 260 int eee_enabled; 261 int eee_active; 262 int tx_lpi_timer; 263 int tx_lpi_enabled; 264 int eee_tw_timer; 265 bool eee_sw_timer_en; 266 unsigned int mode; 267 unsigned int chain_mode; 268 int extend_desc; 269 struct hwtstamp_config tstamp_config; 270 struct ptp_clock *ptp_clock; 271 struct ptp_clock_info ptp_clock_ops; 272 unsigned int default_addend; 273 u32 sub_second_inc; 274 u32 systime_flags; 275 u32 adv_ts; 276 int use_riwt; 277 int irq_wake; 278 rwlock_t ptp_lock; 279 /* Protects auxiliary snapshot registers from concurrent access. */ 280 struct mutex aux_ts_lock; 281 wait_queue_head_t tstamp_busy_wait; 282 283 void __iomem *mmcaddr; 284 void __iomem *ptpaddr; 285 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 286 int sfty_ce_irq; 287 int sfty_ue_irq; 288 int rx_irq[MTL_MAX_RX_QUEUES]; 289 int tx_irq[MTL_MAX_TX_QUEUES]; 290 /*irq name */ 291 char int_name_mac[IFNAMSIZ + 9]; 292 char int_name_wol[IFNAMSIZ + 9]; 293 char int_name_lpi[IFNAMSIZ + 9]; 294 char int_name_sfty_ce[IFNAMSIZ + 10]; 295 char int_name_sfty_ue[IFNAMSIZ + 10]; 296 char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 297 char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 298 299 #ifdef CONFIG_DEBUG_FS 300 struct dentry *dbgfs_dir; 301 #endif 302 303 unsigned long state; 304 struct workqueue_struct *wq; 305 struct work_struct service_task; 306 307 /* Workqueue for handling FPE hand-shaking */ 308 unsigned long fpe_task_state; 309 struct workqueue_struct *fpe_wq; 310 struct work_struct fpe_task; 311 char wq_name[IFNAMSIZ + 4]; 312 313 /* TC Handling */ 314 unsigned int tc_entries_max; 315 unsigned int tc_off_max; 316 struct stmmac_tc_entry *tc_entries; 317 unsigned int flow_entries_max; 318 struct stmmac_flow_entry *flow_entries; 319 unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; 320 unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; 321 unsigned int rfs_entries_total; 322 struct stmmac_rfs_entry *rfs_entries; 323 324 /* Pulse Per Second output */ 325 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 326 327 /* Receive Side Scaling */ 328 struct stmmac_rss rss; 329 330 /* XDP BPF Program */ 331 unsigned long *af_xdp_zc_qps; 332 struct bpf_prog *xdp_prog; 333 }; 334 335 enum stmmac_state { 336 STMMAC_DOWN, 337 STMMAC_RESET_REQUESTED, 338 STMMAC_RESETING, 339 STMMAC_SERVICE_SCHED, 340 }; 341 342 int stmmac_mdio_unregister(struct net_device *ndev); 343 int stmmac_mdio_register(struct net_device *ndev); 344 int stmmac_mdio_reset(struct mii_bus *mii); 345 int stmmac_xpcs_setup(struct mii_bus *mii); 346 void stmmac_set_ethtool_ops(struct net_device *netdev); 347 348 int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); 349 void stmmac_ptp_register(struct stmmac_priv *priv); 350 void stmmac_ptp_unregister(struct stmmac_priv *priv); 351 int stmmac_xdp_open(struct net_device *dev); 352 void stmmac_xdp_release(struct net_device *dev); 353 int stmmac_resume(struct device *dev); 354 int stmmac_suspend(struct device *dev); 355 void stmmac_dvr_remove(struct device *dev); 356 int stmmac_dvr_probe(struct device *device, 357 struct plat_stmmacenet_data *plat_dat, 358 struct stmmac_resources *res); 359 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 360 bool stmmac_eee_init(struct stmmac_priv *priv); 361 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 362 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 363 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 364 void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); 365 366 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 367 { 368 return !!priv->xdp_prog; 369 } 370 371 static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 372 { 373 if (stmmac_xdp_is_enabled(priv)) 374 return XDP_PACKET_HEADROOM; 375 376 return 0; 377 } 378 379 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); 380 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); 381 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); 382 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); 383 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); 384 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 385 ktime_t current_time, 386 u64 cycle_time); 387 388 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 389 void stmmac_selftest_run(struct net_device *dev, 390 struct ethtool_test *etest, u64 *buf); 391 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 392 int stmmac_selftest_get_count(struct stmmac_priv *priv); 393 #else 394 static inline void stmmac_selftest_run(struct net_device *dev, 395 struct ethtool_test *etest, u64 *buf) 396 { 397 /* Not enabled */ 398 } 399 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 400 u8 *data) 401 { 402 /* Not enabled */ 403 } 404 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 405 { 406 return -EOPNOTSUPP; 407 } 408 #endif /* CONFIG_STMMAC_SELFTESTS */ 409 410 #endif /* __STMMAC_H__ */ 411