1*30f0ba42SInochi Amaoto // SPDX-License-Identifier: GPL-2.0+ 2*30f0ba42SInochi Amaoto /* 3*30f0ba42SInochi Amaoto * Spacemit DWMAC platform driver 4*30f0ba42SInochi Amaoto * 5*30f0ba42SInochi Amaoto * Copyright (C) 2026 Inochi Amaoto <inochiama@gmail.com> 6*30f0ba42SInochi Amaoto */ 7*30f0ba42SInochi Amaoto 8*30f0ba42SInochi Amaoto #include <linux/clk.h> 9*30f0ba42SInochi Amaoto #include <linux/math.h> 10*30f0ba42SInochi Amaoto #include <linux/mod_devicetable.h> 11*30f0ba42SInochi Amaoto #include <linux/module.h> 12*30f0ba42SInochi Amaoto #include <linux/mfd/syscon.h> 13*30f0ba42SInochi Amaoto #include <linux/of.h> 14*30f0ba42SInochi Amaoto #include <linux/platform_device.h> 15*30f0ba42SInochi Amaoto #include <linux/property.h> 16*30f0ba42SInochi Amaoto #include <linux/regmap.h> 17*30f0ba42SInochi Amaoto 18*30f0ba42SInochi Amaoto #include "stmmac_platform.h" 19*30f0ba42SInochi Amaoto 20*30f0ba42SInochi Amaoto /* ctrl register bits */ 21*30f0ba42SInochi Amaoto #define CTRL_PHY_INTF_RGMII BIT(3) 22*30f0ba42SInochi Amaoto #define CTRL_PHY_INTF_MII BIT(4) 23*30f0ba42SInochi Amaoto #define CTRL_WAKE_IRQ_EN BIT(9) 24*30f0ba42SInochi Amaoto #define CTRL_PHY_IRQ_EN BIT(12) 25*30f0ba42SInochi Amaoto 26*30f0ba42SInochi Amaoto /* dline register bits */ 27*30f0ba42SInochi Amaoto #define RGMII_RX_DLINE_EN BIT(0) 28*30f0ba42SInochi Amaoto #define RGMII_RX_DLINE_STEP GENMASK(5, 4) 29*30f0ba42SInochi Amaoto #define RGMII_RX_DLINE_CODE GENMASK(15, 8) 30*30f0ba42SInochi Amaoto #define RGMII_TX_DLINE_EN BIT(16) 31*30f0ba42SInochi Amaoto #define RGMII_TX_DLINE_STEP GENMASK(21, 20) 32*30f0ba42SInochi Amaoto #define RGMII_TX_DLINE_CODE GENMASK(31, 24) 33*30f0ba42SInochi Amaoto 34*30f0ba42SInochi Amaoto #define MAX_DLINE_DELAY_CODE 0xff 35*30f0ba42SInochi Amaoto #define MAX_WORKED_DELAY 2800 36*30f0ba42SInochi Amaoto /* Note: the delay step value is at 0.1ps */ 37*30f0ba42SInochi Amaoto #define K3_DELAY_STEP 367 38*30f0ba42SInochi Amaoto 39*30f0ba42SInochi Amaoto struct spacmit_dwmac { 40*30f0ba42SInochi Amaoto struct regmap *apmu; 41*30f0ba42SInochi Amaoto unsigned int ctrl_offset; 42*30f0ba42SInochi Amaoto unsigned int dline_offset; 43*30f0ba42SInochi Amaoto }; 44*30f0ba42SInochi Amaoto 45*30f0ba42SInochi Amaoto static int spacemit_dwmac_set_delay(struct spacmit_dwmac *dwmac, 46*30f0ba42SInochi Amaoto unsigned int tx_code, unsigned int rx_code) 47*30f0ba42SInochi Amaoto { 48*30f0ba42SInochi Amaoto unsigned int mask, val; 49*30f0ba42SInochi Amaoto 50*30f0ba42SInochi Amaoto mask = RGMII_TX_DLINE_STEP | RGMII_TX_DLINE_CODE | RGMII_TX_DLINE_EN | 51*30f0ba42SInochi Amaoto RGMII_RX_DLINE_STEP | RGMII_RX_DLINE_CODE | RGMII_RX_DLINE_EN; 52*30f0ba42SInochi Amaoto 53*30f0ba42SInochi Amaoto /* 54*30f0ba42SInochi Amaoto * Since the delay step provided by config 0 is small enough, and 55*30f0ba42SInochi Amaoto * it can cover the range of the valid delay, so there is no needed 56*30f0ba42SInochi Amaoto * to use other step config. 57*30f0ba42SInochi Amaoto */ 58*30f0ba42SInochi Amaoto val = FIELD_PREP(RGMII_TX_DLINE_STEP, 0) | 59*30f0ba42SInochi Amaoto FIELD_PREP(RGMII_TX_DLINE_CODE, tx_code) | RGMII_TX_DLINE_EN | 60*30f0ba42SInochi Amaoto FIELD_PREP(RGMII_RX_DLINE_STEP, 0) | 61*30f0ba42SInochi Amaoto FIELD_PREP(RGMII_RX_DLINE_CODE, rx_code) | RGMII_RX_DLINE_EN; 62*30f0ba42SInochi Amaoto 63*30f0ba42SInochi Amaoto return regmap_update_bits(dwmac->apmu, dwmac->dline_offset, 64*30f0ba42SInochi Amaoto mask, val); 65*30f0ba42SInochi Amaoto } 66*30f0ba42SInochi Amaoto 67*30f0ba42SInochi Amaoto static int spacemit_dwmac_detected_delay_value(unsigned int delay) 68*30f0ba42SInochi Amaoto { 69*30f0ba42SInochi Amaoto if (delay == 0) 70*30f0ba42SInochi Amaoto return 0; 71*30f0ba42SInochi Amaoto 72*30f0ba42SInochi Amaoto if (delay > MAX_WORKED_DELAY) 73*30f0ba42SInochi Amaoto return -EINVAL; 74*30f0ba42SInochi Amaoto 75*30f0ba42SInochi Amaoto /* 76*30f0ba42SInochi Amaoto * Note K3 require a specific factor for calculate 77*30f0ba42SInochi Amaoto * the delay, in this scenario it is 0.9. So the 78*30f0ba42SInochi Amaoto * formula is code * step / 10 * 0.9 79*30f0ba42SInochi Amaoto */ 80*30f0ba42SInochi Amaoto return DIV_ROUND_CLOSEST(delay * 10 * 10, K3_DELAY_STEP * 9); 81*30f0ba42SInochi Amaoto } 82*30f0ba42SInochi Amaoto 83*30f0ba42SInochi Amaoto static int spacemit_dwmac_fix_delay(struct spacmit_dwmac *dwmac, 84*30f0ba42SInochi Amaoto unsigned int tx_delay, 85*30f0ba42SInochi Amaoto unsigned int rx_delay) 86*30f0ba42SInochi Amaoto { 87*30f0ba42SInochi Amaoto int rx_code; 88*30f0ba42SInochi Amaoto int tx_code; 89*30f0ba42SInochi Amaoto 90*30f0ba42SInochi Amaoto rx_code = spacemit_dwmac_detected_delay_value(rx_delay); 91*30f0ba42SInochi Amaoto if (rx_code < 0) 92*30f0ba42SInochi Amaoto return rx_code; 93*30f0ba42SInochi Amaoto 94*30f0ba42SInochi Amaoto tx_code = spacemit_dwmac_detected_delay_value(tx_delay); 95*30f0ba42SInochi Amaoto if (tx_code < 0) 96*30f0ba42SInochi Amaoto return tx_code; 97*30f0ba42SInochi Amaoto 98*30f0ba42SInochi Amaoto return spacemit_dwmac_set_delay(dwmac, tx_code, rx_code); 99*30f0ba42SInochi Amaoto } 100*30f0ba42SInochi Amaoto 101*30f0ba42SInochi Amaoto static int spacemit_dwmac_update_irq_config(struct spacmit_dwmac *dwmac, 102*30f0ba42SInochi Amaoto struct stmmac_resources *stmmac_res) 103*30f0ba42SInochi Amaoto { 104*30f0ba42SInochi Amaoto unsigned int val = stmmac_res->wol_irq >= 0 ? CTRL_WAKE_IRQ_EN : 0; 105*30f0ba42SInochi Amaoto unsigned int mask = CTRL_WAKE_IRQ_EN; 106*30f0ba42SInochi Amaoto 107*30f0ba42SInochi Amaoto return regmap_update_bits(dwmac->apmu, dwmac->ctrl_offset, 108*30f0ba42SInochi Amaoto mask, val); 109*30f0ba42SInochi Amaoto } 110*30f0ba42SInochi Amaoto 111*30f0ba42SInochi Amaoto static void spacemit_get_interfaces(struct stmmac_priv *priv, void *bsp_priv, 112*30f0ba42SInochi Amaoto unsigned long *interfaces) 113*30f0ba42SInochi Amaoto { 114*30f0ba42SInochi Amaoto __set_bit(PHY_INTERFACE_MODE_MII, interfaces); 115*30f0ba42SInochi Amaoto __set_bit(PHY_INTERFACE_MODE_RMII, interfaces); 116*30f0ba42SInochi Amaoto phy_interface_set_rgmii(interfaces); 117*30f0ba42SInochi Amaoto } 118*30f0ba42SInochi Amaoto 119*30f0ba42SInochi Amaoto static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel) 120*30f0ba42SInochi Amaoto { 121*30f0ba42SInochi Amaoto unsigned int mask = CTRL_PHY_INTF_MII | CTRL_PHY_INTF_RGMII; 122*30f0ba42SInochi Amaoto struct spacmit_dwmac *dwmac = bsp_priv; 123*30f0ba42SInochi Amaoto unsigned int val = 0; 124*30f0ba42SInochi Amaoto 125*30f0ba42SInochi Amaoto switch (phy_intf_sel) { 126*30f0ba42SInochi Amaoto case PHY_INTF_SEL_GMII_MII: 127*30f0ba42SInochi Amaoto val = CTRL_PHY_INTF_MII; 128*30f0ba42SInochi Amaoto break; 129*30f0ba42SInochi Amaoto 130*30f0ba42SInochi Amaoto case PHY_INTF_SEL_RMII: 131*30f0ba42SInochi Amaoto break; 132*30f0ba42SInochi Amaoto 133*30f0ba42SInochi Amaoto case PHY_INTF_SEL_RGMII: 134*30f0ba42SInochi Amaoto val = CTRL_PHY_INTF_RGMII; 135*30f0ba42SInochi Amaoto break; 136*30f0ba42SInochi Amaoto 137*30f0ba42SInochi Amaoto default: 138*30f0ba42SInochi Amaoto return -EINVAL; 139*30f0ba42SInochi Amaoto } 140*30f0ba42SInochi Amaoto 141*30f0ba42SInochi Amaoto return regmap_update_bits(dwmac->apmu, dwmac->ctrl_offset, 142*30f0ba42SInochi Amaoto mask, val); 143*30f0ba42SInochi Amaoto } 144*30f0ba42SInochi Amaoto 145*30f0ba42SInochi Amaoto static int spacemit_dwmac_probe(struct platform_device *pdev) 146*30f0ba42SInochi Amaoto { 147*30f0ba42SInochi Amaoto struct plat_stmmacenet_data *plat_dat; 148*30f0ba42SInochi Amaoto struct stmmac_resources stmmac_res; 149*30f0ba42SInochi Amaoto struct device *dev = &pdev->dev; 150*30f0ba42SInochi Amaoto struct spacmit_dwmac *dwmac; 151*30f0ba42SInochi Amaoto unsigned int offset[2]; 152*30f0ba42SInochi Amaoto struct regmap *apmu; 153*30f0ba42SInochi Amaoto struct clk *clk_tx; 154*30f0ba42SInochi Amaoto u32 rx_delay = 0; 155*30f0ba42SInochi Amaoto u32 tx_delay = 0; 156*30f0ba42SInochi Amaoto int ret; 157*30f0ba42SInochi Amaoto 158*30f0ba42SInochi Amaoto ret = stmmac_get_platform_resources(pdev, &stmmac_res); 159*30f0ba42SInochi Amaoto if (ret) 160*30f0ba42SInochi Amaoto return dev_err_probe(dev, ret, 161*30f0ba42SInochi Amaoto "failed to get platform resources\n"); 162*30f0ba42SInochi Amaoto 163*30f0ba42SInochi Amaoto dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL); 164*30f0ba42SInochi Amaoto if (!dwmac) 165*30f0ba42SInochi Amaoto return -ENOMEM; 166*30f0ba42SInochi Amaoto 167*30f0ba42SInochi Amaoto plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); 168*30f0ba42SInochi Amaoto if (IS_ERR(plat_dat)) 169*30f0ba42SInochi Amaoto return dev_err_probe(dev, PTR_ERR(plat_dat), 170*30f0ba42SInochi Amaoto "failed to parse DT parameters\n"); 171*30f0ba42SInochi Amaoto 172*30f0ba42SInochi Amaoto clk_tx = devm_clk_get_enabled(&pdev->dev, "tx"); 173*30f0ba42SInochi Amaoto if (IS_ERR(clk_tx)) 174*30f0ba42SInochi Amaoto return dev_err_probe(&pdev->dev, PTR_ERR(clk_tx), 175*30f0ba42SInochi Amaoto "failed to get tx clock\n"); 176*30f0ba42SInochi Amaoto 177*30f0ba42SInochi Amaoto apmu = syscon_regmap_lookup_by_phandle_args(pdev->dev.of_node, 178*30f0ba42SInochi Amaoto "spacemit,apmu", 2, 179*30f0ba42SInochi Amaoto offset); 180*30f0ba42SInochi Amaoto if (IS_ERR(apmu)) 181*30f0ba42SInochi Amaoto return dev_err_probe(dev, PTR_ERR(apmu), 182*30f0ba42SInochi Amaoto "Failed to get apmu regmap\n"); 183*30f0ba42SInochi Amaoto 184*30f0ba42SInochi Amaoto dwmac->apmu = apmu; 185*30f0ba42SInochi Amaoto dwmac->ctrl_offset = offset[0]; 186*30f0ba42SInochi Amaoto dwmac->dline_offset = offset[1]; 187*30f0ba42SInochi Amaoto 188*30f0ba42SInochi Amaoto ret = spacemit_dwmac_update_irq_config(dwmac, &stmmac_res); 189*30f0ba42SInochi Amaoto if (ret) 190*30f0ba42SInochi Amaoto return dev_err_probe(dev, ret, "Failed to configure irq config\n"); 191*30f0ba42SInochi Amaoto 192*30f0ba42SInochi Amaoto of_property_read_u32(pdev->dev.of_node, "tx-internal-delay-ps", 193*30f0ba42SInochi Amaoto &tx_delay); 194*30f0ba42SInochi Amaoto of_property_read_u32(pdev->dev.of_node, "rx-internal-delay-ps", 195*30f0ba42SInochi Amaoto &rx_delay); 196*30f0ba42SInochi Amaoto 197*30f0ba42SInochi Amaoto plat_dat->get_interfaces = spacemit_get_interfaces; 198*30f0ba42SInochi Amaoto plat_dat->set_phy_intf_sel = spacemit_set_phy_intf_sel; 199*30f0ba42SInochi Amaoto plat_dat->bsp_priv = dwmac; 200*30f0ba42SInochi Amaoto 201*30f0ba42SInochi Amaoto ret = spacemit_dwmac_fix_delay(dwmac, tx_delay, rx_delay); 202*30f0ba42SInochi Amaoto if (ret) 203*30f0ba42SInochi Amaoto return dev_err_probe(dev, ret, "Failed to configure delay\n"); 204*30f0ba42SInochi Amaoto 205*30f0ba42SInochi Amaoto return stmmac_dvr_probe(dev, plat_dat, &stmmac_res); 206*30f0ba42SInochi Amaoto } 207*30f0ba42SInochi Amaoto 208*30f0ba42SInochi Amaoto static const struct of_device_id spacemit_dwmac_match[] = { 209*30f0ba42SInochi Amaoto { .compatible = "spacemit,k3-dwmac" }, 210*30f0ba42SInochi Amaoto { /* sentinel */ } 211*30f0ba42SInochi Amaoto }; 212*30f0ba42SInochi Amaoto MODULE_DEVICE_TABLE(of, spacemit_dwmac_match); 213*30f0ba42SInochi Amaoto 214*30f0ba42SInochi Amaoto static struct platform_driver spacemit_dwmac_driver = { 215*30f0ba42SInochi Amaoto .probe = spacemit_dwmac_probe, 216*30f0ba42SInochi Amaoto .remove = stmmac_pltfr_remove, 217*30f0ba42SInochi Amaoto .driver = { 218*30f0ba42SInochi Amaoto .name = "spacemit-dwmac", 219*30f0ba42SInochi Amaoto .pm = &stmmac_pltfr_pm_ops, 220*30f0ba42SInochi Amaoto .of_match_table = spacemit_dwmac_match, 221*30f0ba42SInochi Amaoto }, 222*30f0ba42SInochi Amaoto }; 223*30f0ba42SInochi Amaoto module_platform_driver(spacemit_dwmac_driver); 224*30f0ba42SInochi Amaoto 225*30f0ba42SInochi Amaoto MODULE_AUTHOR("Inochi Amaoto <inochiama@gmail.com>"); 226*30f0ba42SInochi Amaoto MODULE_DESCRIPTION("Spacemit DWMAC platform driver"); 227*30f0ba42SInochi Amaoto MODULE_LICENSE("GPL"); 228