xref: /linux/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c (revision d42202dce002ce0417448d11a091b4da21cacbd1)
17ad269eaSRoger Chen /**
27ad269eaSRoger Chen  * dwmac-rk.c - Rockchip RK3288 DWMAC specific glue layer
37ad269eaSRoger Chen  *
47ad269eaSRoger Chen  * Copyright (C) 2014 Chen-Zhi (Roger Chen)
57ad269eaSRoger Chen  *
67ad269eaSRoger Chen  * Chen-Zhi (Roger Chen)  <roger.chen@rock-chips.com>
77ad269eaSRoger Chen  *
87ad269eaSRoger Chen  * This program is free software; you can redistribute it and/or modify
97ad269eaSRoger Chen  * it under the terms of the GNU General Public License as published by
107ad269eaSRoger Chen  * the Free Software Foundation; either version 2 of the License, or
117ad269eaSRoger Chen  * (at your option) any later version.
127ad269eaSRoger Chen  *
137ad269eaSRoger Chen  * This program is distributed in the hope that it will be useful,
147ad269eaSRoger Chen  * but WITHOUT ANY WARRANTY; without even the implied warranty of
157ad269eaSRoger Chen  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
167ad269eaSRoger Chen  * GNU General Public License for more details.
177ad269eaSRoger Chen  */
187ad269eaSRoger Chen 
197ad269eaSRoger Chen #include <linux/stmmac.h>
207ad269eaSRoger Chen #include <linux/bitops.h>
217ad269eaSRoger Chen #include <linux/clk.h>
227ad269eaSRoger Chen #include <linux/phy.h>
237ad269eaSRoger Chen #include <linux/of_net.h>
247ad269eaSRoger Chen #include <linux/gpio.h>
25e0fb4013SJoachim Eastwood #include <linux/module.h>
267ad269eaSRoger Chen #include <linux/of_gpio.h>
277ad269eaSRoger Chen #include <linux/of_device.h>
28e0fb4013SJoachim Eastwood #include <linux/platform_device.h>
297ad269eaSRoger Chen #include <linux/regulator/consumer.h>
307ad269eaSRoger Chen #include <linux/delay.h>
317ad269eaSRoger Chen #include <linux/mfd/syscon.h>
327ad269eaSRoger Chen #include <linux/regmap.h>
337ad269eaSRoger Chen 
34e0fb4013SJoachim Eastwood #include "stmmac_platform.h"
35e0fb4013SJoachim Eastwood 
367ad269eaSRoger Chen struct rk_priv_data {
377ad269eaSRoger Chen 	struct platform_device *pdev;
387ad269eaSRoger Chen 	int phy_iface;
392e12f536SRomain Perier 	struct regulator *regulator;
407ad269eaSRoger Chen 
417ad269eaSRoger Chen 	bool clk_enabled;
427ad269eaSRoger Chen 	bool clock_input;
437ad269eaSRoger Chen 
447ad269eaSRoger Chen 	struct clk *clk_mac;
457ad269eaSRoger Chen 	struct clk *clk_mac_pll;
467ad269eaSRoger Chen 	struct clk *gmac_clkin;
477ad269eaSRoger Chen 	struct clk *mac_clk_rx;
487ad269eaSRoger Chen 	struct clk *mac_clk_tx;
497ad269eaSRoger Chen 	struct clk *clk_mac_ref;
507ad269eaSRoger Chen 	struct clk *clk_mac_refout;
517ad269eaSRoger Chen 	struct clk *aclk_mac;
527ad269eaSRoger Chen 	struct clk *pclk_mac;
537ad269eaSRoger Chen 
547ad269eaSRoger Chen 	int tx_delay;
557ad269eaSRoger Chen 	int rx_delay;
567ad269eaSRoger Chen 
577ad269eaSRoger Chen 	struct regmap *grf;
587ad269eaSRoger Chen };
597ad269eaSRoger Chen 
607ad269eaSRoger Chen #define HIWORD_UPDATE(val, mask, shift) \
617ad269eaSRoger Chen 		((val) << (shift) | (mask) << ((shift) + 16))
627ad269eaSRoger Chen 
637ad269eaSRoger Chen #define GRF_BIT(nr)	(BIT(nr) | BIT(nr+16))
647ad269eaSRoger Chen #define GRF_CLR_BIT(nr)	(BIT(nr+16))
657ad269eaSRoger Chen 
667ad269eaSRoger Chen #define RK3288_GRF_SOC_CON1	0x0248
677ad269eaSRoger Chen #define RK3288_GRF_SOC_CON3	0x0250
687ad269eaSRoger Chen #define RK3288_GRF_GPIO3D_E	0x01ec
697ad269eaSRoger Chen #define RK3288_GRF_GPIO4A_E	0x01f0
707ad269eaSRoger Chen #define RK3288_GRF_GPIO4B_E	0x01f4
717ad269eaSRoger Chen 
727ad269eaSRoger Chen /*RK3288_GRF_SOC_CON1*/
737ad269eaSRoger Chen #define GMAC_PHY_INTF_SEL_RGMII	(GRF_BIT(6) | GRF_CLR_BIT(7) | GRF_CLR_BIT(8))
747ad269eaSRoger Chen #define GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(6) | GRF_CLR_BIT(7) | GRF_BIT(8))
757ad269eaSRoger Chen #define GMAC_FLOW_CTRL		GRF_BIT(9)
767ad269eaSRoger Chen #define GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(9)
777ad269eaSRoger Chen #define GMAC_SPEED_10M		GRF_CLR_BIT(10)
787ad269eaSRoger Chen #define GMAC_SPEED_100M		GRF_BIT(10)
797ad269eaSRoger Chen #define GMAC_RMII_CLK_25M	GRF_BIT(11)
807ad269eaSRoger Chen #define GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(11)
817ad269eaSRoger Chen #define GMAC_CLK_125M		(GRF_CLR_BIT(12) | GRF_CLR_BIT(13))
827ad269eaSRoger Chen #define GMAC_CLK_25M		(GRF_BIT(12) | GRF_BIT(13))
837ad269eaSRoger Chen #define GMAC_CLK_2_5M		(GRF_CLR_BIT(12) | GRF_BIT(13))
847ad269eaSRoger Chen #define GMAC_RMII_MODE		GRF_BIT(14)
857ad269eaSRoger Chen #define GMAC_RMII_MODE_CLR	GRF_CLR_BIT(14)
867ad269eaSRoger Chen 
877ad269eaSRoger Chen /*RK3288_GRF_SOC_CON3*/
887ad269eaSRoger Chen #define GMAC_TXCLK_DLY_ENABLE	GRF_BIT(14)
897ad269eaSRoger Chen #define GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(14)
907ad269eaSRoger Chen #define GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)
917ad269eaSRoger Chen #define GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)
927ad269eaSRoger Chen #define GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 7)
937ad269eaSRoger Chen #define GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)
947ad269eaSRoger Chen 
957ad269eaSRoger Chen static void set_to_rgmii(struct rk_priv_data *bsp_priv,
967ad269eaSRoger Chen 			 int tx_delay, int rx_delay)
977ad269eaSRoger Chen {
987ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
997ad269eaSRoger Chen 
1007ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->grf)) {
101*d42202dcSRomain Perier 		dev_err(dev, "Missing rockchip,grf property\n");
1027ad269eaSRoger Chen 		return;
1037ad269eaSRoger Chen 	}
1047ad269eaSRoger Chen 
1057ad269eaSRoger Chen 	regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1067ad269eaSRoger Chen 		     GMAC_PHY_INTF_SEL_RGMII | GMAC_RMII_MODE_CLR);
1077ad269eaSRoger Chen 	regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3,
1087ad269eaSRoger Chen 		     GMAC_RXCLK_DLY_ENABLE | GMAC_TXCLK_DLY_ENABLE |
1097ad269eaSRoger Chen 		     GMAC_CLK_RX_DL_CFG(rx_delay) |
1107ad269eaSRoger Chen 		     GMAC_CLK_TX_DL_CFG(tx_delay));
1117ad269eaSRoger Chen }
1127ad269eaSRoger Chen 
1137ad269eaSRoger Chen static void set_to_rmii(struct rk_priv_data *bsp_priv)
1147ad269eaSRoger Chen {
1157ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
1167ad269eaSRoger Chen 
1177ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->grf)) {
118*d42202dcSRomain Perier 		dev_err(dev, "Missing rockchip,grf property\n");
1197ad269eaSRoger Chen 		return;
1207ad269eaSRoger Chen 	}
1217ad269eaSRoger Chen 
1227ad269eaSRoger Chen 	regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1237ad269eaSRoger Chen 		     GMAC_PHY_INTF_SEL_RMII | GMAC_RMII_MODE);
1247ad269eaSRoger Chen }
1257ad269eaSRoger Chen 
1267ad269eaSRoger Chen static void set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
1277ad269eaSRoger Chen {
1287ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
1297ad269eaSRoger Chen 
1307ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->grf)) {
131*d42202dcSRomain Perier 		dev_err(dev, "Missing rockchip,grf property\n");
1327ad269eaSRoger Chen 		return;
1337ad269eaSRoger Chen 	}
1347ad269eaSRoger Chen 
1357ad269eaSRoger Chen 	if (speed == 10)
1367ad269eaSRoger Chen 		regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, GMAC_CLK_2_5M);
1377ad269eaSRoger Chen 	else if (speed == 100)
1387ad269eaSRoger Chen 		regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, GMAC_CLK_25M);
1397ad269eaSRoger Chen 	else if (speed == 1000)
1407ad269eaSRoger Chen 		regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, GMAC_CLK_125M);
1417ad269eaSRoger Chen 	else
1427ad269eaSRoger Chen 		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
1437ad269eaSRoger Chen }
1447ad269eaSRoger Chen 
1457ad269eaSRoger Chen static void set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
1467ad269eaSRoger Chen {
1477ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
1487ad269eaSRoger Chen 
1497ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->grf)) {
150*d42202dcSRomain Perier 		dev_err(dev, "Missing rockchip,grf property\n");
1517ad269eaSRoger Chen 		return;
1527ad269eaSRoger Chen 	}
1537ad269eaSRoger Chen 
1547ad269eaSRoger Chen 	if (speed == 10) {
1557ad269eaSRoger Chen 		regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1567ad269eaSRoger Chen 			     GMAC_RMII_CLK_2_5M | GMAC_SPEED_10M);
1577ad269eaSRoger Chen 	} else if (speed == 100) {
1587ad269eaSRoger Chen 		regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1597ad269eaSRoger Chen 			     GMAC_RMII_CLK_25M | GMAC_SPEED_100M);
1607ad269eaSRoger Chen 	} else {
1617ad269eaSRoger Chen 		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
1627ad269eaSRoger Chen 	}
1637ad269eaSRoger Chen }
1647ad269eaSRoger Chen 
1657ad269eaSRoger Chen static int gmac_clk_init(struct rk_priv_data *bsp_priv)
1667ad269eaSRoger Chen {
1677ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
1687ad269eaSRoger Chen 
1697ad269eaSRoger Chen 	bsp_priv->clk_enabled = false;
1707ad269eaSRoger Chen 
1717ad269eaSRoger Chen 	bsp_priv->mac_clk_rx = devm_clk_get(dev, "mac_clk_rx");
1727ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->mac_clk_rx))
173*d42202dcSRomain Perier 		dev_err(dev, "cannot get clock %s\n",
174*d42202dcSRomain Perier 			"mac_clk_rx");
1757ad269eaSRoger Chen 
1767ad269eaSRoger Chen 	bsp_priv->mac_clk_tx = devm_clk_get(dev, "mac_clk_tx");
1777ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->mac_clk_tx))
178*d42202dcSRomain Perier 		dev_err(dev, "cannot get clock %s\n",
179*d42202dcSRomain Perier 			"mac_clk_tx");
1807ad269eaSRoger Chen 
1817ad269eaSRoger Chen 	bsp_priv->aclk_mac = devm_clk_get(dev, "aclk_mac");
1827ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->aclk_mac))
183*d42202dcSRomain Perier 		dev_err(dev, "cannot get clock %s\n",
184*d42202dcSRomain Perier 			"aclk_mac");
1857ad269eaSRoger Chen 
1867ad269eaSRoger Chen 	bsp_priv->pclk_mac = devm_clk_get(dev, "pclk_mac");
1877ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->pclk_mac))
188*d42202dcSRomain Perier 		dev_err(dev, "cannot get clock %s\n",
189*d42202dcSRomain Perier 			"pclk_mac");
1907ad269eaSRoger Chen 
1917ad269eaSRoger Chen 	bsp_priv->clk_mac = devm_clk_get(dev, "stmmaceth");
1927ad269eaSRoger Chen 	if (IS_ERR(bsp_priv->clk_mac))
193*d42202dcSRomain Perier 		dev_err(dev, "cannot get clock %s\n",
194*d42202dcSRomain Perier 			"stmmaceth");
1957ad269eaSRoger Chen 
1967ad269eaSRoger Chen 	if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
1977ad269eaSRoger Chen 		bsp_priv->clk_mac_ref = devm_clk_get(dev, "clk_mac_ref");
1987ad269eaSRoger Chen 		if (IS_ERR(bsp_priv->clk_mac_ref))
199*d42202dcSRomain Perier 			dev_err(dev, "cannot get clock %s\n",
200*d42202dcSRomain Perier 				"clk_mac_ref");
2017ad269eaSRoger Chen 
2027ad269eaSRoger Chen 		if (!bsp_priv->clock_input) {
2037ad269eaSRoger Chen 			bsp_priv->clk_mac_refout =
2047ad269eaSRoger Chen 				devm_clk_get(dev, "clk_mac_refout");
2057ad269eaSRoger Chen 			if (IS_ERR(bsp_priv->clk_mac_refout))
206*d42202dcSRomain Perier 				dev_err(dev, "cannot get clock %s\n",
207*d42202dcSRomain Perier 					"clk_mac_refout");
2087ad269eaSRoger Chen 		}
2097ad269eaSRoger Chen 	}
2107ad269eaSRoger Chen 
2117ad269eaSRoger Chen 	if (bsp_priv->clock_input) {
212*d42202dcSRomain Perier 		dev_info(dev, "clock input from PHY\n");
2137ad269eaSRoger Chen 	} else {
2147ad269eaSRoger Chen 		if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
2157ad269eaSRoger Chen 			clk_set_rate(bsp_priv->clk_mac_pll, 50000000);
2167ad269eaSRoger Chen 	}
2177ad269eaSRoger Chen 
2187ad269eaSRoger Chen 	return 0;
2197ad269eaSRoger Chen }
2207ad269eaSRoger Chen 
2217ad269eaSRoger Chen static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
2227ad269eaSRoger Chen {
2237ad269eaSRoger Chen 	int phy_iface = phy_iface = bsp_priv->phy_iface;
2247ad269eaSRoger Chen 
2257ad269eaSRoger Chen 	if (enable) {
2267ad269eaSRoger Chen 		if (!bsp_priv->clk_enabled) {
2277ad269eaSRoger Chen 			if (phy_iface == PHY_INTERFACE_MODE_RMII) {
2287ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->mac_clk_rx))
2297ad269eaSRoger Chen 					clk_prepare_enable(
2307ad269eaSRoger Chen 						bsp_priv->mac_clk_rx);
2317ad269eaSRoger Chen 
2327ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->clk_mac_ref))
2337ad269eaSRoger Chen 					clk_prepare_enable(
2347ad269eaSRoger Chen 						bsp_priv->clk_mac_ref);
2357ad269eaSRoger Chen 
2367ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->clk_mac_refout))
2377ad269eaSRoger Chen 					clk_prepare_enable(
2387ad269eaSRoger Chen 						bsp_priv->clk_mac_refout);
2397ad269eaSRoger Chen 			}
2407ad269eaSRoger Chen 
2417ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->aclk_mac))
2427ad269eaSRoger Chen 				clk_prepare_enable(bsp_priv->aclk_mac);
2437ad269eaSRoger Chen 
2447ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->pclk_mac))
2457ad269eaSRoger Chen 				clk_prepare_enable(bsp_priv->pclk_mac);
2467ad269eaSRoger Chen 
2477ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->mac_clk_tx))
2487ad269eaSRoger Chen 				clk_prepare_enable(bsp_priv->mac_clk_tx);
2497ad269eaSRoger Chen 
2507ad269eaSRoger Chen 			/**
2517ad269eaSRoger Chen 			 * if (!IS_ERR(bsp_priv->clk_mac))
2527ad269eaSRoger Chen 			 *	clk_prepare_enable(bsp_priv->clk_mac);
2537ad269eaSRoger Chen 			 */
2547ad269eaSRoger Chen 			mdelay(5);
2557ad269eaSRoger Chen 			bsp_priv->clk_enabled = true;
2567ad269eaSRoger Chen 		}
2577ad269eaSRoger Chen 	} else {
2587ad269eaSRoger Chen 		if (bsp_priv->clk_enabled) {
2597ad269eaSRoger Chen 			if (phy_iface == PHY_INTERFACE_MODE_RMII) {
2607ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->mac_clk_rx))
2617ad269eaSRoger Chen 					clk_disable_unprepare(
2627ad269eaSRoger Chen 						bsp_priv->mac_clk_rx);
2637ad269eaSRoger Chen 
2647ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->clk_mac_ref))
2657ad269eaSRoger Chen 					clk_disable_unprepare(
2667ad269eaSRoger Chen 						bsp_priv->clk_mac_ref);
2677ad269eaSRoger Chen 
2687ad269eaSRoger Chen 				if (!IS_ERR(bsp_priv->clk_mac_refout))
2697ad269eaSRoger Chen 					clk_disable_unprepare(
2707ad269eaSRoger Chen 						bsp_priv->clk_mac_refout);
2717ad269eaSRoger Chen 			}
2727ad269eaSRoger Chen 
2737ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->aclk_mac))
2747ad269eaSRoger Chen 				clk_disable_unprepare(bsp_priv->aclk_mac);
2757ad269eaSRoger Chen 
2767ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->pclk_mac))
2777ad269eaSRoger Chen 				clk_disable_unprepare(bsp_priv->pclk_mac);
2787ad269eaSRoger Chen 
2797ad269eaSRoger Chen 			if (!IS_ERR(bsp_priv->mac_clk_tx))
2807ad269eaSRoger Chen 				clk_disable_unprepare(bsp_priv->mac_clk_tx);
2817ad269eaSRoger Chen 			/**
2827ad269eaSRoger Chen 			 * if (!IS_ERR(bsp_priv->clk_mac))
2837ad269eaSRoger Chen 			 *	clk_disable_unprepare(bsp_priv->clk_mac);
2847ad269eaSRoger Chen 			 */
2857ad269eaSRoger Chen 			bsp_priv->clk_enabled = false;
2867ad269eaSRoger Chen 		}
2877ad269eaSRoger Chen 	}
2887ad269eaSRoger Chen 
2897ad269eaSRoger Chen 	return 0;
2907ad269eaSRoger Chen }
2917ad269eaSRoger Chen 
2927ad269eaSRoger Chen static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable)
2937ad269eaSRoger Chen {
2942e12f536SRomain Perier 	struct regulator *ldo = bsp_priv->regulator;
2957ad269eaSRoger Chen 	int ret;
2967ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
2977ad269eaSRoger Chen 
2982e12f536SRomain Perier 	if (!ldo) {
299*d42202dcSRomain Perier 		dev_err(dev, "no regulator found\n");
3007ad269eaSRoger Chen 		return -1;
3017ad269eaSRoger Chen 	}
3027ad269eaSRoger Chen 
3037ad269eaSRoger Chen 	if (enable) {
3047ad269eaSRoger Chen 		ret = regulator_enable(ldo);
3052e12f536SRomain Perier 		if (ret)
306*d42202dcSRomain Perier 			dev_err(dev, "fail to enable phy-supply\n");
3077ad269eaSRoger Chen 	} else {
3087ad269eaSRoger Chen 		ret = regulator_disable(ldo);
3092e12f536SRomain Perier 		if (ret)
310*d42202dcSRomain Perier 			dev_err(dev, "fail to disable phy-supply\n");
3117ad269eaSRoger Chen 	}
3127ad269eaSRoger Chen 
3137ad269eaSRoger Chen 	return 0;
3147ad269eaSRoger Chen }
3157ad269eaSRoger Chen 
3167ad269eaSRoger Chen static void *rk_gmac_setup(struct platform_device *pdev)
3177ad269eaSRoger Chen {
3187ad269eaSRoger Chen 	struct rk_priv_data *bsp_priv;
3197ad269eaSRoger Chen 	struct device *dev = &pdev->dev;
3207ad269eaSRoger Chen 	int ret;
3217ad269eaSRoger Chen 	const char *strings = NULL;
3227ad269eaSRoger Chen 	int value;
3237ad269eaSRoger Chen 
3247ad269eaSRoger Chen 	bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL);
3257ad269eaSRoger Chen 	if (!bsp_priv)
3267ad269eaSRoger Chen 		return ERR_PTR(-ENOMEM);
3277ad269eaSRoger Chen 
3287ad269eaSRoger Chen 	bsp_priv->phy_iface = of_get_phy_mode(dev->of_node);
3297ad269eaSRoger Chen 
3302e12f536SRomain Perier 	bsp_priv->regulator = devm_regulator_get_optional(dev, "phy");
3312e12f536SRomain Perier 	if (IS_ERR(bsp_priv->regulator)) {
3322e12f536SRomain Perier 		if (PTR_ERR(bsp_priv->regulator) == -EPROBE_DEFER) {
3332e12f536SRomain Perier 			dev_err(dev, "phy regulator is not available yet, deferred probing\n");
3342e12f536SRomain Perier 			return ERR_PTR(-EPROBE_DEFER);
3352e12f536SRomain Perier 		}
3362e12f536SRomain Perier 		dev_err(dev, "no regulator found\n");
3372e12f536SRomain Perier 		bsp_priv->regulator = NULL;
3387ad269eaSRoger Chen 	}
3397ad269eaSRoger Chen 
3407ad269eaSRoger Chen 	ret = of_property_read_string(dev->of_node, "clock_in_out", &strings);
3417ad269eaSRoger Chen 	if (ret) {
342*d42202dcSRomain Perier 		dev_err(dev, "Can not read property: clock_in_out.\n");
3437ad269eaSRoger Chen 		bsp_priv->clock_input = true;
3447ad269eaSRoger Chen 	} else {
345*d42202dcSRomain Perier 		dev_info(dev, "clock input or output? (%s).\n",
346*d42202dcSRomain Perier 			 strings);
3477ad269eaSRoger Chen 		if (!strcmp(strings, "input"))
3487ad269eaSRoger Chen 			bsp_priv->clock_input = true;
3497ad269eaSRoger Chen 		else
3507ad269eaSRoger Chen 			bsp_priv->clock_input = false;
3517ad269eaSRoger Chen 	}
3527ad269eaSRoger Chen 
3537ad269eaSRoger Chen 	ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
3547ad269eaSRoger Chen 	if (ret) {
3557ad269eaSRoger Chen 		bsp_priv->tx_delay = 0x30;
356*d42202dcSRomain Perier 		dev_err(dev, "Can not read property: tx_delay.");
357*d42202dcSRomain Perier 		dev_err(dev, "set tx_delay to 0x%x\n",
358*d42202dcSRomain Perier 			bsp_priv->tx_delay);
3597ad269eaSRoger Chen 	} else {
360*d42202dcSRomain Perier 		dev_info(dev, "TX delay(0x%x).\n", value);
3617ad269eaSRoger Chen 		bsp_priv->tx_delay = value;
3627ad269eaSRoger Chen 	}
3637ad269eaSRoger Chen 
3647ad269eaSRoger Chen 	ret = of_property_read_u32(dev->of_node, "rx_delay", &value);
3657ad269eaSRoger Chen 	if (ret) {
3667ad269eaSRoger Chen 		bsp_priv->rx_delay = 0x10;
367*d42202dcSRomain Perier 		dev_err(dev, "Can not read property: rx_delay.");
368*d42202dcSRomain Perier 		dev_err(dev, "set rx_delay to 0x%x\n",
369*d42202dcSRomain Perier 			bsp_priv->rx_delay);
3707ad269eaSRoger Chen 	} else {
371*d42202dcSRomain Perier 		dev_info(dev, "RX delay(0x%x).\n", value);
3727ad269eaSRoger Chen 		bsp_priv->rx_delay = value;
3737ad269eaSRoger Chen 	}
3747ad269eaSRoger Chen 
3757ad269eaSRoger Chen 	bsp_priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
3767ad269eaSRoger Chen 							"rockchip,grf");
3777ad269eaSRoger Chen 	bsp_priv->pdev = pdev;
3787ad269eaSRoger Chen 
3797ad269eaSRoger Chen 	/*rmii or rgmii*/
3807ad269eaSRoger Chen 	if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII) {
381*d42202dcSRomain Perier 		dev_info(dev, "init for RGMII\n");
3827ad269eaSRoger Chen 		set_to_rgmii(bsp_priv, bsp_priv->tx_delay, bsp_priv->rx_delay);
3837ad269eaSRoger Chen 	} else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
384*d42202dcSRomain Perier 		dev_info(dev, "init for RMII\n");
3857ad269eaSRoger Chen 		set_to_rmii(bsp_priv);
3867ad269eaSRoger Chen 	} else {
387*d42202dcSRomain Perier 		dev_err(dev, "NO interface defined!\n");
3887ad269eaSRoger Chen 	}
3897ad269eaSRoger Chen 
3907ad269eaSRoger Chen 	gmac_clk_init(bsp_priv);
3917ad269eaSRoger Chen 
3927ad269eaSRoger Chen 	return bsp_priv;
3937ad269eaSRoger Chen }
3947ad269eaSRoger Chen 
3957ad269eaSRoger Chen static int rk_gmac_init(struct platform_device *pdev, void *priv)
3967ad269eaSRoger Chen {
3977ad269eaSRoger Chen 	struct rk_priv_data *bsp_priv = priv;
3987ad269eaSRoger Chen 	int ret;
3997ad269eaSRoger Chen 
4007ad269eaSRoger Chen 	ret = phy_power_on(bsp_priv, true);
4017ad269eaSRoger Chen 	if (ret)
4027ad269eaSRoger Chen 		return ret;
4037ad269eaSRoger Chen 
4047ad269eaSRoger Chen 	ret = gmac_clk_enable(bsp_priv, true);
4057ad269eaSRoger Chen 	if (ret)
4067ad269eaSRoger Chen 		return ret;
4077ad269eaSRoger Chen 
4087ad269eaSRoger Chen 	return 0;
4097ad269eaSRoger Chen }
4107ad269eaSRoger Chen 
4117ad269eaSRoger Chen static void rk_gmac_exit(struct platform_device *pdev, void *priv)
4127ad269eaSRoger Chen {
4137ad269eaSRoger Chen 	struct rk_priv_data *gmac = priv;
4147ad269eaSRoger Chen 
4157ad269eaSRoger Chen 	phy_power_on(gmac, false);
4167ad269eaSRoger Chen 	gmac_clk_enable(gmac, false);
4177ad269eaSRoger Chen }
4187ad269eaSRoger Chen 
4197ad269eaSRoger Chen static void rk_fix_speed(void *priv, unsigned int speed)
4207ad269eaSRoger Chen {
4217ad269eaSRoger Chen 	struct rk_priv_data *bsp_priv = priv;
4227ad269eaSRoger Chen 	struct device *dev = &bsp_priv->pdev->dev;
4237ad269eaSRoger Chen 
4247ad269eaSRoger Chen 	if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII)
4257ad269eaSRoger Chen 		set_rgmii_speed(bsp_priv, speed);
4267ad269eaSRoger Chen 	else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
4277ad269eaSRoger Chen 		set_rmii_speed(bsp_priv, speed);
4287ad269eaSRoger Chen 	else
4297ad269eaSRoger Chen 		dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
4307ad269eaSRoger Chen }
4317ad269eaSRoger Chen 
432e0fb4013SJoachim Eastwood static const struct stmmac_of_data rk3288_gmac_data = {
4337ad269eaSRoger Chen 	.has_gmac = 1,
4347ad269eaSRoger Chen 	.fix_mac_speed = rk_fix_speed,
4357ad269eaSRoger Chen 	.setup = rk_gmac_setup,
4367ad269eaSRoger Chen 	.init = rk_gmac_init,
4377ad269eaSRoger Chen 	.exit = rk_gmac_exit,
4387ad269eaSRoger Chen };
439e0fb4013SJoachim Eastwood 
440e0fb4013SJoachim Eastwood static const struct of_device_id rk_gmac_dwmac_match[] = {
441e0fb4013SJoachim Eastwood 	{ .compatible = "rockchip,rk3288-gmac", .data = &rk3288_gmac_data},
442e0fb4013SJoachim Eastwood 	{ }
443e0fb4013SJoachim Eastwood };
444e0fb4013SJoachim Eastwood MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_match);
445e0fb4013SJoachim Eastwood 
446e0fb4013SJoachim Eastwood static struct platform_driver rk_gmac_dwmac_driver = {
447e0fb4013SJoachim Eastwood 	.probe  = stmmac_pltfr_probe,
448e0fb4013SJoachim Eastwood 	.remove = stmmac_pltfr_remove,
449e0fb4013SJoachim Eastwood 	.driver = {
450e0fb4013SJoachim Eastwood 		.name           = "rk_gmac-dwmac",
451e0fb4013SJoachim Eastwood 		.pm		= &stmmac_pltfr_pm_ops,
452e0fb4013SJoachim Eastwood 		.of_match_table = rk_gmac_dwmac_match,
453e0fb4013SJoachim Eastwood 	},
454e0fb4013SJoachim Eastwood };
455e0fb4013SJoachim Eastwood module_platform_driver(rk_gmac_dwmac_driver);
456e0fb4013SJoachim Eastwood 
457e0fb4013SJoachim Eastwood MODULE_AUTHOR("Chen-Zhi (Roger Chen) <roger.chen@rock-chips.com>");
458e0fb4013SJoachim Eastwood MODULE_DESCRIPTION("Rockchip RK3288 DWMAC specific glue layer");
459e0fb4013SJoachim Eastwood MODULE_LICENSE("GPL");
460