xref: /linux/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Intel DWMAC platform driver
3  *
4  * Copyright(C) 2020 Intel Corporation
5  */
6 
7 #include <linux/ethtool.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/platform_device.h>
11 #include <linux/property.h>
12 #include <linux/stmmac.h>
13 
14 #include "dwmac4.h"
15 #include "stmmac.h"
16 #include "stmmac_platform.h"
17 
18 struct intel_dwmac {
19 	struct device *dev;
20 	struct clk *tx_clk;
21 	const struct intel_dwmac_data *data;
22 };
23 
24 struct intel_dwmac_data {
25 	void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);
26 	unsigned long ptp_ref_clk_rate;
27 	unsigned long tx_clk_rate;
28 	bool tx_clk_en;
29 };
30 
31 static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
32 {
33 	struct intel_dwmac *dwmac = priv;
34 	unsigned long rate;
35 	int ret;
36 
37 	rate = clk_get_rate(dwmac->tx_clk);
38 
39 	switch (speed) {
40 	case SPEED_1000:
41 		rate = 125000000;
42 		break;
43 
44 	case SPEED_100:
45 		rate = 25000000;
46 		break;
47 
48 	case SPEED_10:
49 		rate = 2500000;
50 		break;
51 
52 	default:
53 		dev_err(dwmac->dev, "Invalid speed\n");
54 		break;
55 	}
56 
57 	ret = clk_set_rate(dwmac->tx_clk, rate);
58 	if (ret)
59 		dev_err(dwmac->dev, "Failed to configure tx clock rate\n");
60 }
61 
62 static const struct intel_dwmac_data kmb_data = {
63 	.fix_mac_speed = kmb_eth_fix_mac_speed,
64 	.ptp_ref_clk_rate = 200000000,
65 	.tx_clk_rate = 125000000,
66 	.tx_clk_en = true,
67 };
68 
69 static const struct of_device_id intel_eth_plat_match[] = {
70 	{ .compatible = "intel,keembay-dwmac", .data = &kmb_data },
71 	{ }
72 };
73 MODULE_DEVICE_TABLE(of, intel_eth_plat_match);
74 
75 static int intel_eth_plat_probe(struct platform_device *pdev)
76 {
77 	struct plat_stmmacenet_data *plat_dat;
78 	struct stmmac_resources stmmac_res;
79 	struct intel_dwmac *dwmac;
80 	unsigned long rate;
81 	int ret;
82 
83 	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
84 	if (ret)
85 		return ret;
86 
87 	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
88 	if (IS_ERR(plat_dat)) {
89 		dev_err(&pdev->dev, "dt configuration failed\n");
90 		return PTR_ERR(plat_dat);
91 	}
92 
93 	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
94 	if (!dwmac)
95 		return -ENOMEM;
96 
97 	dwmac->dev = &pdev->dev;
98 	dwmac->tx_clk = NULL;
99 
100 	/*
101 	 * This cannot return NULL at this point because the driver’s
102 	 * compatibility with the device has already been validated in
103 	 * platform_match().
104 	 */
105 	dwmac->data = device_get_match_data(&pdev->dev);
106 	if (dwmac->data->fix_mac_speed)
107 		plat_dat->fix_mac_speed = dwmac->data->fix_mac_speed;
108 
109 	/* Enable TX clock */
110 	if (dwmac->data->tx_clk_en) {
111 		dwmac->tx_clk = devm_clk_get(&pdev->dev, "tx_clk");
112 		if (IS_ERR(dwmac->tx_clk))
113 			return PTR_ERR(dwmac->tx_clk);
114 
115 		ret = clk_prepare_enable(dwmac->tx_clk);
116 		if (ret) {
117 			dev_err(&pdev->dev,
118 				"Failed to enable tx_clk\n");
119 			return ret;
120 		}
121 
122 		/* Check and configure TX clock rate */
123 		rate = clk_get_rate(dwmac->tx_clk);
124 		if (dwmac->data->tx_clk_rate &&
125 		    rate != dwmac->data->tx_clk_rate) {
126 			rate = dwmac->data->tx_clk_rate;
127 			ret = clk_set_rate(dwmac->tx_clk, rate);
128 			if (ret) {
129 				dev_err(&pdev->dev,
130 					"Failed to set tx_clk\n");
131 				goto err_tx_clk_disable;
132 			}
133 		}
134 
135 		/* Check and configure PTP ref clock rate */
136 		rate = clk_get_rate(plat_dat->clk_ptp_ref);
137 		if (dwmac->data->ptp_ref_clk_rate &&
138 		    rate != dwmac->data->ptp_ref_clk_rate) {
139 			rate = dwmac->data->ptp_ref_clk_rate;
140 			ret = clk_set_rate(plat_dat->clk_ptp_ref, rate);
141 			if (ret) {
142 				dev_err(&pdev->dev,
143 					"Failed to set clk_ptp_ref\n");
144 				goto err_tx_clk_disable;
145 			}
146 		}
147 	}
148 
149 	plat_dat->bsp_priv = dwmac;
150 	plat_dat->eee_usecs_rate = plat_dat->clk_ptp_rate;
151 
152 	if (plat_dat->eee_usecs_rate > 0) {
153 		u32 tx_lpi_usec;
154 
155 		tx_lpi_usec = (plat_dat->eee_usecs_rate / 1000000) - 1;
156 		writel(tx_lpi_usec, stmmac_res.addr + GMAC_1US_TIC_COUNTER);
157 	}
158 
159 	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
160 	if (ret)
161 		goto err_tx_clk_disable;
162 
163 	return 0;
164 
165 err_tx_clk_disable:
166 	if (dwmac->data->tx_clk_en)
167 		clk_disable_unprepare(dwmac->tx_clk);
168 	return ret;
169 }
170 
171 static void intel_eth_plat_remove(struct platform_device *pdev)
172 {
173 	struct intel_dwmac *dwmac = get_stmmac_bsp_priv(&pdev->dev);
174 
175 	stmmac_pltfr_remove(pdev);
176 	if (dwmac->data->tx_clk_en)
177 		clk_disable_unprepare(dwmac->tx_clk);
178 }
179 
180 static struct platform_driver intel_eth_plat_driver = {
181 	.probe  = intel_eth_plat_probe,
182 	.remove = intel_eth_plat_remove,
183 	.driver = {
184 		.name		= "intel-eth-plat",
185 		.pm		= &stmmac_pltfr_pm_ops,
186 		.of_match_table = intel_eth_plat_match,
187 	},
188 };
189 module_platform_driver(intel_eth_plat_driver);
190 
191 MODULE_LICENSE("GPL v2");
192 MODULE_DESCRIPTION("Intel DWMAC platform driver");
193