1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Header File to describe Normal/enhanced descriptor functions used for RING 4 and CHAINED modes. 5 6 Copyright(C) 2011 STMicroelectronics Ltd 7 8 It defines all the functions used to handle the normal/enhanced 9 descriptors in case of the DMA is configured to work in chained or 10 in ring mode. 11 12 13 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 14 *******************************************************************************/ 15 16 #ifndef __DESC_COM_H__ 17 #define __DESC_COM_H__ 18 19 /* Specific functions used for Ring mode */ 20 21 /* Enhanced descriptors */ 22 static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end, 23 int bfsize) 24 { 25 if (bfsize == BUF_SIZE_16KiB) 26 p->des1 |= cpu_to_le32(FIELD_PREP(ERDES1_BUFFER2_SIZE_MASK, 27 BUF_SIZE_8KiB)); 28 29 if (end) 30 p->des1 |= cpu_to_le32(ERDES1_END_RING); 31 } 32 33 static inline void enh_desc_end_tx_desc_on_ring(struct dma_desc *p, int end) 34 { 35 if (end) 36 p->des0 |= cpu_to_le32(ETDES0_END_RING); 37 else 38 p->des0 &= cpu_to_le32(~ETDES0_END_RING); 39 } 40 41 /* The maximum buffer 1 size is 8KiB - 1. However, we limit to 4KiB. */ 42 static inline void enh_set_tx_desc_len_on_ring(struct dma_desc *p, int len) 43 { 44 unsigned int buffer1_max_length = BUF_SIZE_4KiB; 45 46 if (unlikely(len > buffer1_max_length)) { 47 p->des1 |= cpu_to_le32(FIELD_PREP(ETDES1_BUFFER2_SIZE_MASK, 48 len - buffer1_max_length) | 49 FIELD_PREP(ETDES1_BUFFER1_SIZE_MASK, 50 buffer1_max_length)); 51 } else { 52 p->des1 |= cpu_to_le32(FIELD_PREP(ETDES1_BUFFER1_SIZE_MASK, 53 len)); 54 } 55 } 56 57 /* Normal descriptors */ 58 static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end, int bfsize) 59 { 60 if (bfsize >= BUF_SIZE_2KiB) { 61 int bfsize2; 62 63 bfsize2 = min(bfsize - BUF_SIZE_2KiB + 1, BUF_SIZE_2KiB - 1); 64 p->des1 |= cpu_to_le32(FIELD_PREP(RDES1_BUFFER2_SIZE_MASK, 65 bfsize2)); 66 } 67 68 if (end) 69 p->des1 |= cpu_to_le32(RDES1_END_RING); 70 } 71 72 static inline void ndesc_end_tx_desc_on_ring(struct dma_desc *p, int end) 73 { 74 if (end) 75 p->des1 |= cpu_to_le32(TDES1_END_RING); 76 else 77 p->des1 &= cpu_to_le32(~TDES1_END_RING); 78 } 79 80 /* The maximum buffer 1 size is 2KiB - 1, limited by the mask width */ 81 static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) 82 { 83 unsigned int buffer1_max_length = BUF_SIZE_2KiB - 1; 84 85 if (unlikely(len > buffer1_max_length)) { 86 p->des1 |= cpu_to_le32(FIELD_PREP(TDES1_BUFFER2_SIZE_MASK, 87 len - buffer1_max_length) | 88 FIELD_PREP(TDES1_BUFFER1_SIZE_MASK, 89 buffer1_max_length)); 90 } else { 91 p->des1 |= cpu_to_le32(FIELD_PREP(TDES1_BUFFER1_SIZE_MASK, 92 len)); 93 } 94 } 95 96 /* Specific functions used for Chain mode */ 97 98 /* Enhanced descriptors */ 99 static inline void ehn_desc_rx_set_on_chain(struct dma_desc *p) 100 { 101 p->des1 |= cpu_to_le32(ERDES1_SECOND_ADDRESS_CHAINED); 102 } 103 104 static inline void enh_desc_end_tx_desc_on_chain(struct dma_desc *p) 105 { 106 p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED); 107 } 108 109 static inline void enh_set_tx_desc_len_on_chain(struct dma_desc *p, int len) 110 { 111 p->des1 |= cpu_to_le32(len & ETDES1_BUFFER1_SIZE_MASK); 112 } 113 114 /* Normal descriptors */ 115 static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end) 116 { 117 p->des1 |= cpu_to_le32(RDES1_SECOND_ADDRESS_CHAINED); 118 } 119 120 static inline void ndesc_tx_set_on_chain(struct dma_desc *p) 121 { 122 p->des1 |= cpu_to_le32(TDES1_SECOND_ADDRESS_CHAINED); 123 } 124 125 static inline void norm_set_tx_desc_len_on_chain(struct dma_desc *p, int len) 126 { 127 p->des1 |= cpu_to_le32(len & TDES1_BUFFER1_SIZE_MASK); 128 } 129 #endif /* __DESC_COM_H__ */ 130