1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /*************************************************************************** 3 * 4 * Copyright (C) 2004-2008 SMSC 5 * Copyright (C) 2005-2008 ARM 6 * 7 *************************************************************************** 8 * Rewritten, heavily based on smsc911x simple driver by SMSC. 9 * Partly uses io macros from smc91x.c by Nicolas Pitre 10 * 11 * Supported devices: 12 * LAN9115, LAN9116, LAN9117, LAN9118 13 * LAN9215, LAN9216, LAN9217, LAN9218 14 * LAN9210, LAN9211 15 * LAN9220, LAN9221 16 * LAN89218,LAN9250 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/crc32.h> 22 #include <linux/clk.h> 23 #include <linux/delay.h> 24 #include <linux/errno.h> 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/init.h> 28 #include <linux/interrupt.h> 29 #include <linux/ioport.h> 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/netdevice.h> 33 #include <linux/platform_device.h> 34 #include <linux/regulator/consumer.h> 35 #include <linux/sched.h> 36 #include <linux/timer.h> 37 #include <linux/bug.h> 38 #include <linux/bitops.h> 39 #include <linux/irq.h> 40 #include <linux/io.h> 41 #include <linux/swab.h> 42 #include <linux/phy.h> 43 #include <linux/smsc911x.h> 44 #include <linux/device.h> 45 #include <linux/of.h> 46 #include <linux/of_device.h> 47 #include <linux/of_gpio.h> 48 #include <linux/of_net.h> 49 #include <linux/acpi.h> 50 #include <linux/pm_runtime.h> 51 #include <linux/property.h> 52 #include <linux/gpio/consumer.h> 53 54 #include "smsc911x.h" 55 56 #define SMSC_CHIPNAME "smsc911x" 57 #define SMSC_MDIONAME "smsc911x-mdio" 58 #define SMSC_DRV_VERSION "2008-10-21" 59 60 MODULE_LICENSE("GPL"); 61 MODULE_VERSION(SMSC_DRV_VERSION); 62 MODULE_ALIAS("platform:smsc911x"); 63 64 #if USE_DEBUG > 0 65 static int debug = 16; 66 #else 67 static int debug = 3; 68 #endif 69 70 module_param(debug, int, 0); 71 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 72 73 struct smsc911x_data; 74 75 struct smsc911x_ops { 76 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); 77 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); 78 void (*rx_readfifo)(struct smsc911x_data *pdata, 79 unsigned int *buf, unsigned int wordcount); 80 void (*tx_writefifo)(struct smsc911x_data *pdata, 81 unsigned int *buf, unsigned int wordcount); 82 }; 83 84 #define SMSC911X_NUM_SUPPLIES 2 85 86 struct smsc911x_data { 87 void __iomem *ioaddr; 88 89 unsigned int idrev; 90 91 /* used to decide which workarounds apply */ 92 unsigned int generation; 93 94 /* device configuration (copied from platform_data during probe) */ 95 struct smsc911x_platform_config config; 96 97 /* This needs to be acquired before calling any of below: 98 * smsc911x_mac_read(), smsc911x_mac_write() 99 */ 100 spinlock_t mac_lock; 101 102 /* spinlock to ensure register accesses are serialised */ 103 spinlock_t dev_lock; 104 105 struct mii_bus *mii_bus; 106 unsigned int using_extphy; 107 int last_duplex; 108 int last_carrier; 109 110 u32 msg_enable; 111 unsigned int gpio_setting; 112 unsigned int gpio_orig_setting; 113 struct net_device *dev; 114 struct napi_struct napi; 115 116 unsigned int software_irq_signal; 117 118 #ifdef USE_PHY_WORK_AROUND 119 #define MIN_PACKET_SIZE (64) 120 char loopback_tx_pkt[MIN_PACKET_SIZE]; 121 char loopback_rx_pkt[MIN_PACKET_SIZE]; 122 unsigned int resetcount; 123 #endif 124 125 /* Members for Multicast filter workaround */ 126 unsigned int multicast_update_pending; 127 unsigned int set_bits_mask; 128 unsigned int clear_bits_mask; 129 unsigned int hashhi; 130 unsigned int hashlo; 131 132 /* register access functions */ 133 const struct smsc911x_ops *ops; 134 135 /* regulators */ 136 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; 137 138 /* Reset GPIO */ 139 struct gpio_desc *reset_gpiod; 140 141 /* clock */ 142 struct clk *clk; 143 }; 144 145 /* Easy access to information */ 146 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) 147 148 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 149 { 150 if (pdata->config.flags & SMSC911X_USE_32BIT) 151 return readl(pdata->ioaddr + reg); 152 153 if (pdata->config.flags & SMSC911X_USE_16BIT) 154 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 155 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 156 157 BUG(); 158 return 0; 159 } 160 161 static inline u32 162 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) 163 { 164 if (pdata->config.flags & SMSC911X_USE_32BIT) 165 return readl(pdata->ioaddr + __smsc_shift(pdata, reg)); 166 167 if (pdata->config.flags & SMSC911X_USE_16BIT) 168 return (readw(pdata->ioaddr + 169 __smsc_shift(pdata, reg)) & 0xFFFF) | 170 ((readw(pdata->ioaddr + 171 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); 172 173 BUG(); 174 return 0; 175 } 176 177 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 178 { 179 u32 data; 180 unsigned long flags; 181 182 spin_lock_irqsave(&pdata->dev_lock, flags); 183 data = pdata->ops->reg_read(pdata, reg); 184 spin_unlock_irqrestore(&pdata->dev_lock, flags); 185 186 return data; 187 } 188 189 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 190 u32 val) 191 { 192 if (pdata->config.flags & SMSC911X_USE_32BIT) { 193 writel(val, pdata->ioaddr + reg); 194 return; 195 } 196 197 if (pdata->config.flags & SMSC911X_USE_16BIT) { 198 writew(val & 0xFFFF, pdata->ioaddr + reg); 199 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 200 return; 201 } 202 203 BUG(); 204 } 205 206 static inline void 207 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) 208 { 209 if (pdata->config.flags & SMSC911X_USE_32BIT) { 210 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg)); 211 return; 212 } 213 214 if (pdata->config.flags & SMSC911X_USE_16BIT) { 215 writew(val & 0xFFFF, 216 pdata->ioaddr + __smsc_shift(pdata, reg)); 217 writew((val >> 16) & 0xFFFF, 218 pdata->ioaddr + __smsc_shift(pdata, reg + 2)); 219 return; 220 } 221 222 BUG(); 223 } 224 225 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 226 u32 val) 227 { 228 unsigned long flags; 229 230 spin_lock_irqsave(&pdata->dev_lock, flags); 231 pdata->ops->reg_write(pdata, reg, val); 232 spin_unlock_irqrestore(&pdata->dev_lock, flags); 233 } 234 235 /* Writes a packet to the TX_DATA_FIFO */ 236 static inline void 237 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 238 unsigned int wordcount) 239 { 240 unsigned long flags; 241 242 spin_lock_irqsave(&pdata->dev_lock, flags); 243 244 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 245 while (wordcount--) 246 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 247 swab32(*buf++)); 248 goto out; 249 } 250 251 if (pdata->config.flags & SMSC911X_USE_32BIT) { 252 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 253 goto out; 254 } 255 256 if (pdata->config.flags & SMSC911X_USE_16BIT) { 257 while (wordcount--) 258 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 259 goto out; 260 } 261 262 BUG(); 263 out: 264 spin_unlock_irqrestore(&pdata->dev_lock, flags); 265 } 266 267 /* Writes a packet to the TX_DATA_FIFO - shifted version */ 268 static inline void 269 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 270 unsigned int wordcount) 271 { 272 unsigned long flags; 273 274 spin_lock_irqsave(&pdata->dev_lock, flags); 275 276 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 277 while (wordcount--) 278 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, 279 swab32(*buf++)); 280 goto out; 281 } 282 283 if (pdata->config.flags & SMSC911X_USE_32BIT) { 284 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata, 285 TX_DATA_FIFO), buf, wordcount); 286 goto out; 287 } 288 289 if (pdata->config.flags & SMSC911X_USE_16BIT) { 290 while (wordcount--) 291 __smsc911x_reg_write_shift(pdata, 292 TX_DATA_FIFO, *buf++); 293 goto out; 294 } 295 296 BUG(); 297 out: 298 spin_unlock_irqrestore(&pdata->dev_lock, flags); 299 } 300 301 /* Reads a packet out of the RX_DATA_FIFO */ 302 static inline void 303 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 304 unsigned int wordcount) 305 { 306 unsigned long flags; 307 308 spin_lock_irqsave(&pdata->dev_lock, flags); 309 310 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 311 while (wordcount--) 312 *buf++ = swab32(__smsc911x_reg_read(pdata, 313 RX_DATA_FIFO)); 314 goto out; 315 } 316 317 if (pdata->config.flags & SMSC911X_USE_32BIT) { 318 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 319 goto out; 320 } 321 322 if (pdata->config.flags & SMSC911X_USE_16BIT) { 323 while (wordcount--) 324 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 325 goto out; 326 } 327 328 BUG(); 329 out: 330 spin_unlock_irqrestore(&pdata->dev_lock, flags); 331 } 332 333 /* Reads a packet out of the RX_DATA_FIFO - shifted version */ 334 static inline void 335 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 336 unsigned int wordcount) 337 { 338 unsigned long flags; 339 340 spin_lock_irqsave(&pdata->dev_lock, flags); 341 342 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 343 while (wordcount--) 344 *buf++ = swab32(__smsc911x_reg_read_shift(pdata, 345 RX_DATA_FIFO)); 346 goto out; 347 } 348 349 if (pdata->config.flags & SMSC911X_USE_32BIT) { 350 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata, 351 RX_DATA_FIFO), buf, wordcount); 352 goto out; 353 } 354 355 if (pdata->config.flags & SMSC911X_USE_16BIT) { 356 while (wordcount--) 357 *buf++ = __smsc911x_reg_read_shift(pdata, 358 RX_DATA_FIFO); 359 goto out; 360 } 361 362 BUG(); 363 out: 364 spin_unlock_irqrestore(&pdata->dev_lock, flags); 365 } 366 367 /* 368 * enable regulator and clock resources. 369 */ 370 static int smsc911x_enable_resources(struct platform_device *pdev) 371 { 372 struct net_device *ndev = platform_get_drvdata(pdev); 373 struct smsc911x_data *pdata = netdev_priv(ndev); 374 int ret = 0; 375 376 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), 377 pdata->supplies); 378 if (ret) 379 netdev_err(ndev, "failed to enable regulators %d\n", 380 ret); 381 382 if (!IS_ERR(pdata->clk)) { 383 ret = clk_prepare_enable(pdata->clk); 384 if (ret < 0) 385 netdev_err(ndev, "failed to enable clock %d\n", ret); 386 } 387 388 return ret; 389 } 390 391 /* 392 * disable resources, currently just regulators. 393 */ 394 static int smsc911x_disable_resources(struct platform_device *pdev) 395 { 396 struct net_device *ndev = platform_get_drvdata(pdev); 397 struct smsc911x_data *pdata = netdev_priv(ndev); 398 int ret = 0; 399 400 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), 401 pdata->supplies); 402 403 if (!IS_ERR(pdata->clk)) 404 clk_disable_unprepare(pdata->clk); 405 406 return ret; 407 } 408 409 /* 410 * Request resources, currently just regulators. 411 * 412 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where 413 * these are not always-on we need to request regulators to be turned on 414 * before we can try to access the device registers. 415 */ 416 static int smsc911x_request_resources(struct platform_device *pdev) 417 { 418 struct net_device *ndev = platform_get_drvdata(pdev); 419 struct smsc911x_data *pdata = netdev_priv(ndev); 420 int ret = 0; 421 422 /* Request regulators */ 423 pdata->supplies[0].supply = "vdd33a"; 424 pdata->supplies[1].supply = "vddvario"; 425 ret = regulator_bulk_get(&pdev->dev, 426 ARRAY_SIZE(pdata->supplies), 427 pdata->supplies); 428 if (ret) { 429 /* 430 * Retry on deferrals, else just report the error 431 * and try to continue. 432 */ 433 if (ret == -EPROBE_DEFER) 434 return ret; 435 netdev_err(ndev, "couldn't get regulators %d\n", 436 ret); 437 } 438 439 /* Request optional RESET GPIO */ 440 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev, 441 "reset", 442 GPIOD_OUT_LOW); 443 444 /* Request clock */ 445 pdata->clk = clk_get(&pdev->dev, NULL); 446 if (IS_ERR(pdata->clk)) 447 dev_dbg(&pdev->dev, "couldn't get clock %li\n", 448 PTR_ERR(pdata->clk)); 449 450 return ret; 451 } 452 453 /* 454 * Free resources, currently just regulators. 455 * 456 */ 457 static void smsc911x_free_resources(struct platform_device *pdev) 458 { 459 struct net_device *ndev = platform_get_drvdata(pdev); 460 struct smsc911x_data *pdata = netdev_priv(ndev); 461 462 /* Free regulators */ 463 regulator_bulk_free(ARRAY_SIZE(pdata->supplies), 464 pdata->supplies); 465 466 /* Free clock */ 467 if (!IS_ERR(pdata->clk)) { 468 clk_put(pdata->clk); 469 pdata->clk = NULL; 470 } 471 } 472 473 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 474 * and smsc911x_mac_write, so assumes mac_lock is held */ 475 static int smsc911x_mac_complete(struct smsc911x_data *pdata) 476 { 477 int i; 478 u32 val; 479 480 SMSC_ASSERT_MAC_LOCK(pdata); 481 482 for (i = 0; i < 40; i++) { 483 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 484 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 485 return 0; 486 } 487 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " 488 "MAC_CSR_CMD: 0x%08X", val); 489 return -EIO; 490 } 491 492 /* Fetches a MAC register value. Assumes mac_lock is acquired */ 493 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 494 { 495 unsigned int temp; 496 497 SMSC_ASSERT_MAC_LOCK(pdata); 498 499 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 500 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 501 SMSC_WARN(pdata, hw, "MAC busy at entry"); 502 return 0xFFFFFFFF; 503 } 504 505 /* Send the MAC cmd */ 506 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 507 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 508 509 /* Workaround for hardware read-after-write restriction */ 510 temp = smsc911x_reg_read(pdata, BYTE_TEST); 511 512 /* Wait for the read to complete */ 513 if (likely(smsc911x_mac_complete(pdata) == 0)) 514 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 515 516 SMSC_WARN(pdata, hw, "MAC busy after read"); 517 return 0xFFFFFFFF; 518 } 519 520 /* Set a mac register, mac_lock must be acquired before calling */ 521 static void smsc911x_mac_write(struct smsc911x_data *pdata, 522 unsigned int offset, u32 val) 523 { 524 unsigned int temp; 525 526 SMSC_ASSERT_MAC_LOCK(pdata); 527 528 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 529 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 530 SMSC_WARN(pdata, hw, 531 "smsc911x_mac_write failed, MAC busy at entry"); 532 return; 533 } 534 535 /* Send data to write */ 536 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 537 538 /* Write the actual data */ 539 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 540 MAC_CSR_CMD_CSR_BUSY_)); 541 542 /* Workaround for hardware read-after-write restriction */ 543 temp = smsc911x_reg_read(pdata, BYTE_TEST); 544 545 /* Wait for the write to complete */ 546 if (likely(smsc911x_mac_complete(pdata) == 0)) 547 return; 548 549 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write"); 550 } 551 552 /* Get a phy register */ 553 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 554 { 555 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 556 unsigned long flags; 557 unsigned int addr; 558 int i, reg; 559 560 spin_lock_irqsave(&pdata->mac_lock, flags); 561 562 /* Confirm MII not busy */ 563 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 564 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???"); 565 reg = -EIO; 566 goto out; 567 } 568 569 /* Set the address, index & direction (read from PHY) */ 570 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 571 smsc911x_mac_write(pdata, MII_ACC, addr); 572 573 /* Wait for read to complete w/ timeout */ 574 for (i = 0; i < 100; i++) 575 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 576 reg = smsc911x_mac_read(pdata, MII_DATA); 577 goto out; 578 } 579 580 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish"); 581 reg = -EIO; 582 583 out: 584 spin_unlock_irqrestore(&pdata->mac_lock, flags); 585 return reg; 586 } 587 588 /* Set a phy register */ 589 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 590 u16 val) 591 { 592 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 593 unsigned long flags; 594 unsigned int addr; 595 int i, reg; 596 597 spin_lock_irqsave(&pdata->mac_lock, flags); 598 599 /* Confirm MII not busy */ 600 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 601 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???"); 602 reg = -EIO; 603 goto out; 604 } 605 606 /* Put the data to write in the MAC */ 607 smsc911x_mac_write(pdata, MII_DATA, val); 608 609 /* Set the address, index & direction (write to PHY) */ 610 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 611 MII_ACC_MII_WRITE_; 612 smsc911x_mac_write(pdata, MII_ACC, addr); 613 614 /* Wait for write to complete w/ timeout */ 615 for (i = 0; i < 100; i++) 616 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 617 reg = 0; 618 goto out; 619 } 620 621 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish"); 622 reg = -EIO; 623 624 out: 625 spin_unlock_irqrestore(&pdata->mac_lock, flags); 626 return reg; 627 } 628 629 /* Switch to external phy. Assumes tx and rx are stopped. */ 630 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 631 { 632 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 633 634 /* Disable phy clocks to the MAC */ 635 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 636 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 637 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 638 udelay(10); /* Enough time for clocks to stop */ 639 640 /* Switch to external phy */ 641 hwcfg |= HW_CFG_EXT_PHY_EN_; 642 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 643 644 /* Enable phy clocks to the MAC */ 645 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 646 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 647 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 648 udelay(10); /* Enough time for clocks to restart */ 649 650 hwcfg |= HW_CFG_SMI_SEL_; 651 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 652 } 653 654 /* Autodetects and enables external phy if present on supported chips. 655 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 656 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 657 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 658 { 659 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 660 661 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 662 SMSC_TRACE(pdata, hw, "Forcing internal PHY"); 663 pdata->using_extphy = 0; 664 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 665 SMSC_TRACE(pdata, hw, "Forcing external PHY"); 666 smsc911x_phy_enable_external(pdata); 667 pdata->using_extphy = 1; 668 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 669 SMSC_TRACE(pdata, hw, 670 "HW_CFG EXT_PHY_DET set, using external PHY"); 671 smsc911x_phy_enable_external(pdata); 672 pdata->using_extphy = 1; 673 } else { 674 SMSC_TRACE(pdata, hw, 675 "HW_CFG EXT_PHY_DET clear, using internal PHY"); 676 pdata->using_extphy = 0; 677 } 678 } 679 680 /* Fetches a tx status out of the status fifo */ 681 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 682 { 683 unsigned int result = 684 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 685 686 if (result != 0) 687 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 688 689 return result; 690 } 691 692 /* Fetches the next rx status */ 693 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 694 { 695 unsigned int result = 696 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 697 698 if (result != 0) 699 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 700 701 return result; 702 } 703 704 #ifdef USE_PHY_WORK_AROUND 705 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 706 { 707 unsigned int tries; 708 u32 wrsz; 709 u32 rdsz; 710 ulong bufp; 711 712 for (tries = 0; tries < 10; tries++) { 713 unsigned int txcmd_a; 714 unsigned int txcmd_b; 715 unsigned int status; 716 unsigned int pktlength; 717 unsigned int i; 718 719 /* Zero-out rx packet memory */ 720 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 721 722 /* Write tx packet to 118 */ 723 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 724 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 725 txcmd_a |= MIN_PACKET_SIZE; 726 727 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 728 729 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 730 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 731 732 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 733 wrsz = MIN_PACKET_SIZE + 3; 734 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 735 wrsz >>= 2; 736 737 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 738 739 /* Wait till transmit is done */ 740 i = 60; 741 do { 742 udelay(5); 743 status = smsc911x_tx_get_txstatus(pdata); 744 } while ((i--) && (!status)); 745 746 if (!status) { 747 SMSC_WARN(pdata, hw, 748 "Failed to transmit during loopback test"); 749 continue; 750 } 751 if (status & TX_STS_ES_) { 752 SMSC_WARN(pdata, hw, 753 "Transmit encountered errors during loopback test"); 754 continue; 755 } 756 757 /* Wait till receive is done */ 758 i = 60; 759 do { 760 udelay(5); 761 status = smsc911x_rx_get_rxstatus(pdata); 762 } while ((i--) && (!status)); 763 764 if (!status) { 765 SMSC_WARN(pdata, hw, 766 "Failed to receive during loopback test"); 767 continue; 768 } 769 if (status & RX_STS_ES_) { 770 SMSC_WARN(pdata, hw, 771 "Receive encountered errors during loopback test"); 772 continue; 773 } 774 775 pktlength = ((status & 0x3FFF0000UL) >> 16); 776 bufp = (ulong)pdata->loopback_rx_pkt; 777 rdsz = pktlength + 3; 778 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 779 rdsz >>= 2; 780 781 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 782 783 if (pktlength != (MIN_PACKET_SIZE + 4)) { 784 SMSC_WARN(pdata, hw, "Unexpected packet size " 785 "during loop back test, size=%d, will retry", 786 pktlength); 787 } else { 788 unsigned int j; 789 int mismatch = 0; 790 for (j = 0; j < MIN_PACKET_SIZE; j++) { 791 if (pdata->loopback_tx_pkt[j] 792 != pdata->loopback_rx_pkt[j]) { 793 mismatch = 1; 794 break; 795 } 796 } 797 if (!mismatch) { 798 SMSC_TRACE(pdata, hw, "Successfully verified " 799 "loopback packet"); 800 return 0; 801 } else { 802 SMSC_WARN(pdata, hw, "Data mismatch " 803 "during loop back test, will retry"); 804 } 805 } 806 } 807 808 return -EIO; 809 } 810 811 static int smsc911x_phy_reset(struct smsc911x_data *pdata) 812 { 813 unsigned int temp; 814 unsigned int i = 100000; 815 816 temp = smsc911x_reg_read(pdata, PMT_CTRL); 817 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_); 818 do { 819 msleep(1); 820 temp = smsc911x_reg_read(pdata, PMT_CTRL); 821 } while ((i--) && (temp & PMT_CTRL_PHY_RST_)); 822 823 if (unlikely(temp & PMT_CTRL_PHY_RST_)) { 824 SMSC_WARN(pdata, hw, "PHY reset failed to complete"); 825 return -EIO; 826 } 827 /* Extra delay required because the phy may not be completed with 828 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 829 * enough delay but using 1ms here to be safe */ 830 msleep(1); 831 832 return 0; 833 } 834 835 static int smsc911x_phy_loopbacktest(struct net_device *dev) 836 { 837 struct smsc911x_data *pdata = netdev_priv(dev); 838 struct phy_device *phy_dev = dev->phydev; 839 int result = -EIO; 840 unsigned int i, val; 841 unsigned long flags; 842 843 /* Initialise tx packet using broadcast destination address */ 844 eth_broadcast_addr(pdata->loopback_tx_pkt); 845 846 /* Use incrementing source address */ 847 for (i = 6; i < 12; i++) 848 pdata->loopback_tx_pkt[i] = (char)i; 849 850 /* Set length type field */ 851 pdata->loopback_tx_pkt[12] = 0x00; 852 pdata->loopback_tx_pkt[13] = 0x00; 853 854 for (i = 14; i < MIN_PACKET_SIZE; i++) 855 pdata->loopback_tx_pkt[i] = (char)i; 856 857 val = smsc911x_reg_read(pdata, HW_CFG); 858 val &= HW_CFG_TX_FIF_SZ_; 859 val |= HW_CFG_SF_; 860 smsc911x_reg_write(pdata, HW_CFG, val); 861 862 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 863 smsc911x_reg_write(pdata, RX_CFG, 864 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 865 866 for (i = 0; i < 10; i++) { 867 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 868 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, 869 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX); 870 871 /* Enable MAC tx/rx, FD */ 872 spin_lock_irqsave(&pdata->mac_lock, flags); 873 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 874 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 875 spin_unlock_irqrestore(&pdata->mac_lock, flags); 876 877 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 878 result = 0; 879 break; 880 } 881 pdata->resetcount++; 882 883 /* Disable MAC rx */ 884 spin_lock_irqsave(&pdata->mac_lock, flags); 885 smsc911x_mac_write(pdata, MAC_CR, 0); 886 spin_unlock_irqrestore(&pdata->mac_lock, flags); 887 888 smsc911x_phy_reset(pdata); 889 } 890 891 /* Disable MAC */ 892 spin_lock_irqsave(&pdata->mac_lock, flags); 893 smsc911x_mac_write(pdata, MAC_CR, 0); 894 spin_unlock_irqrestore(&pdata->mac_lock, flags); 895 896 /* Cancel PHY loopback mode */ 897 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0); 898 899 smsc911x_reg_write(pdata, TX_CFG, 0); 900 smsc911x_reg_write(pdata, RX_CFG, 0); 901 902 return result; 903 } 904 #endif /* USE_PHY_WORK_AROUND */ 905 906 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 907 { 908 struct net_device *ndev = pdata->dev; 909 struct phy_device *phy_dev = ndev->phydev; 910 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 911 u32 flow; 912 unsigned long flags; 913 914 if (phy_dev->duplex == DUPLEX_FULL) { 915 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 916 u16 rmtadv = phy_read(phy_dev, MII_LPA); 917 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 918 919 if (cap & FLOW_CTRL_RX) 920 flow = 0xFFFF0002; 921 else 922 flow = 0; 923 924 if (cap & FLOW_CTRL_TX) 925 afc |= 0xF; 926 else 927 afc &= ~0xF; 928 929 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s", 930 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 931 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 932 } else { 933 SMSC_TRACE(pdata, hw, "half duplex"); 934 flow = 0; 935 afc |= 0xF; 936 } 937 938 spin_lock_irqsave(&pdata->mac_lock, flags); 939 smsc911x_mac_write(pdata, FLOW, flow); 940 spin_unlock_irqrestore(&pdata->mac_lock, flags); 941 942 smsc911x_reg_write(pdata, AFC_CFG, afc); 943 } 944 945 /* Update link mode if anything has changed. Called periodically when the 946 * PHY is in polling mode, even if nothing has changed. */ 947 static void smsc911x_phy_adjust_link(struct net_device *dev) 948 { 949 struct smsc911x_data *pdata = netdev_priv(dev); 950 struct phy_device *phy_dev = dev->phydev; 951 unsigned long flags; 952 int carrier; 953 954 if (phy_dev->duplex != pdata->last_duplex) { 955 unsigned int mac_cr; 956 SMSC_TRACE(pdata, hw, "duplex state has changed"); 957 958 spin_lock_irqsave(&pdata->mac_lock, flags); 959 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 960 if (phy_dev->duplex) { 961 SMSC_TRACE(pdata, hw, 962 "configuring for full duplex mode"); 963 mac_cr |= MAC_CR_FDPX_; 964 } else { 965 SMSC_TRACE(pdata, hw, 966 "configuring for half duplex mode"); 967 mac_cr &= ~MAC_CR_FDPX_; 968 } 969 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 970 spin_unlock_irqrestore(&pdata->mac_lock, flags); 971 972 smsc911x_phy_update_flowcontrol(pdata); 973 pdata->last_duplex = phy_dev->duplex; 974 } 975 976 carrier = netif_carrier_ok(dev); 977 if (carrier != pdata->last_carrier) { 978 SMSC_TRACE(pdata, hw, "carrier state has changed"); 979 if (carrier) { 980 SMSC_TRACE(pdata, hw, "configuring for carrier OK"); 981 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 982 (!pdata->using_extphy)) { 983 /* Restore original GPIO configuration */ 984 pdata->gpio_setting = pdata->gpio_orig_setting; 985 smsc911x_reg_write(pdata, GPIO_CFG, 986 pdata->gpio_setting); 987 } 988 } else { 989 SMSC_TRACE(pdata, hw, "configuring for no carrier"); 990 /* Check global setting that LED1 991 * usage is 10/100 indicator */ 992 pdata->gpio_setting = smsc911x_reg_read(pdata, 993 GPIO_CFG); 994 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 995 (!pdata->using_extphy)) { 996 /* Force 10/100 LED off, after saving 997 * original GPIO configuration */ 998 pdata->gpio_orig_setting = pdata->gpio_setting; 999 1000 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 1001 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 1002 | GPIO_CFG_GPIODIR0_ 1003 | GPIO_CFG_GPIOD0_); 1004 smsc911x_reg_write(pdata, GPIO_CFG, 1005 pdata->gpio_setting); 1006 } 1007 } 1008 pdata->last_carrier = carrier; 1009 } 1010 } 1011 1012 static int smsc911x_mii_probe(struct net_device *dev) 1013 { 1014 struct smsc911x_data *pdata = netdev_priv(dev); 1015 struct phy_device *phydev = NULL; 1016 int ret; 1017 1018 /* find the first phy */ 1019 phydev = phy_find_first(pdata->mii_bus); 1020 if (!phydev) { 1021 netdev_err(dev, "no PHY found\n"); 1022 return -ENODEV; 1023 } 1024 1025 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X", 1026 phydev->mdio.addr, phydev->phy_id); 1027 1028 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link, 1029 pdata->config.phy_interface); 1030 1031 if (ret) { 1032 netdev_err(dev, "Could not attach to PHY\n"); 1033 return ret; 1034 } 1035 1036 phy_attached_info(phydev); 1037 1038 phy_set_max_speed(phydev, SPEED_100); 1039 1040 /* mask with MAC supported features */ 1041 phy_support_asym_pause(phydev); 1042 1043 pdata->last_duplex = -1; 1044 pdata->last_carrier = -1; 1045 1046 #ifdef USE_PHY_WORK_AROUND 1047 if (smsc911x_phy_loopbacktest(dev) < 0) { 1048 SMSC_WARN(pdata, hw, "Failed Loop Back Test"); 1049 phy_disconnect(phydev); 1050 return -ENODEV; 1051 } 1052 SMSC_TRACE(pdata, hw, "Passed Loop Back Test"); 1053 #endif /* USE_PHY_WORK_AROUND */ 1054 1055 SMSC_TRACE(pdata, hw, "phy initialised successfully"); 1056 return 0; 1057 } 1058 1059 static int smsc911x_mii_init(struct platform_device *pdev, 1060 struct net_device *dev) 1061 { 1062 struct smsc911x_data *pdata = netdev_priv(dev); 1063 int err = -ENXIO; 1064 1065 pdata->mii_bus = mdiobus_alloc(); 1066 if (!pdata->mii_bus) { 1067 err = -ENOMEM; 1068 goto err_out_1; 1069 } 1070 1071 pdata->mii_bus->name = SMSC_MDIONAME; 1072 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1073 pdev->name, pdev->id); 1074 pdata->mii_bus->priv = pdata; 1075 pdata->mii_bus->read = smsc911x_mii_read; 1076 pdata->mii_bus->write = smsc911x_mii_write; 1077 1078 pdata->mii_bus->parent = &pdev->dev; 1079 1080 switch (pdata->idrev & 0xFFFF0000) { 1081 case 0x01170000: 1082 case 0x01150000: 1083 case 0x117A0000: 1084 case 0x115A0000: 1085 /* External PHY supported, try to autodetect */ 1086 smsc911x_phy_initialise_external(pdata); 1087 break; 1088 default: 1089 SMSC_TRACE(pdata, hw, "External PHY is not supported, " 1090 "using internal PHY"); 1091 pdata->using_extphy = 0; 1092 break; 1093 } 1094 1095 if (!pdata->using_extphy) { 1096 /* Mask all PHYs except ID 1 (internal) */ 1097 pdata->mii_bus->phy_mask = ~(1 << 1); 1098 } 1099 1100 if (mdiobus_register(pdata->mii_bus)) { 1101 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1102 goto err_out_free_bus_2; 1103 } 1104 1105 return 0; 1106 1107 err_out_free_bus_2: 1108 mdiobus_free(pdata->mii_bus); 1109 err_out_1: 1110 return err; 1111 } 1112 1113 /* Gets the number of tx statuses in the fifo */ 1114 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 1115 { 1116 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 1117 & TX_FIFO_INF_TSUSED_) >> 16; 1118 } 1119 1120 /* Reads tx statuses and increments counters where necessary */ 1121 static void smsc911x_tx_update_txcounters(struct net_device *dev) 1122 { 1123 struct smsc911x_data *pdata = netdev_priv(dev); 1124 unsigned int tx_stat; 1125 1126 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 1127 if (unlikely(tx_stat & 0x80000000)) { 1128 /* In this driver the packet tag is used as the packet 1129 * length. Since a packet length can never reach the 1130 * size of 0x8000, this bit is reserved. It is worth 1131 * noting that the "reserved bit" in the warning above 1132 * does not reference a hardware defined reserved bit 1133 * but rather a driver defined one. 1134 */ 1135 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high"); 1136 } else { 1137 if (unlikely(tx_stat & TX_STS_ES_)) { 1138 dev->stats.tx_errors++; 1139 } else { 1140 dev->stats.tx_packets++; 1141 dev->stats.tx_bytes += (tx_stat >> 16); 1142 } 1143 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 1144 dev->stats.collisions += 16; 1145 dev->stats.tx_aborted_errors += 1; 1146 } else { 1147 dev->stats.collisions += 1148 ((tx_stat >> 3) & 0xF); 1149 } 1150 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 1151 dev->stats.tx_carrier_errors += 1; 1152 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 1153 dev->stats.collisions++; 1154 dev->stats.tx_aborted_errors++; 1155 } 1156 } 1157 } 1158 } 1159 1160 /* Increments the Rx error counters */ 1161 static void 1162 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 1163 { 1164 int crc_err = 0; 1165 1166 if (unlikely(rxstat & RX_STS_ES_)) { 1167 dev->stats.rx_errors++; 1168 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 1169 dev->stats.rx_crc_errors++; 1170 crc_err = 1; 1171 } 1172 } 1173 if (likely(!crc_err)) { 1174 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 1175 (rxstat & RX_STS_LENGTH_ERR_))) 1176 dev->stats.rx_length_errors++; 1177 if (rxstat & RX_STS_MCAST_) 1178 dev->stats.multicast++; 1179 } 1180 } 1181 1182 /* Quickly dumps bad packets */ 1183 static void 1184 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) 1185 { 1186 if (likely(pktwords >= 4)) { 1187 unsigned int timeout = 500; 1188 unsigned int val; 1189 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 1190 do { 1191 udelay(1); 1192 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 1193 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 1194 1195 if (unlikely(timeout == 0)) 1196 SMSC_WARN(pdata, hw, "Timed out waiting for " 1197 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 1198 } else { 1199 while (pktwords--) 1200 smsc911x_reg_read(pdata, RX_DATA_FIFO); 1201 } 1202 } 1203 1204 /* NAPI poll function */ 1205 static int smsc911x_poll(struct napi_struct *napi, int budget) 1206 { 1207 struct smsc911x_data *pdata = 1208 container_of(napi, struct smsc911x_data, napi); 1209 struct net_device *dev = pdata->dev; 1210 int npackets = 0; 1211 1212 while (npackets < budget) { 1213 unsigned int pktlength; 1214 unsigned int pktwords; 1215 struct sk_buff *skb; 1216 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 1217 1218 if (!rxstat) { 1219 unsigned int temp; 1220 /* We processed all packets available. Tell NAPI it can 1221 * stop polling then re-enable rx interrupts */ 1222 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1223 napi_complete(napi); 1224 temp = smsc911x_reg_read(pdata, INT_EN); 1225 temp |= INT_EN_RSFL_EN_; 1226 smsc911x_reg_write(pdata, INT_EN, temp); 1227 break; 1228 } 1229 1230 /* Count packet for NAPI scheduling, even if it has an error. 1231 * Error packets still require cycles to discard */ 1232 npackets++; 1233 1234 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1235 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1236 smsc911x_rx_counterrors(dev, rxstat); 1237 1238 if (unlikely(rxstat & RX_STS_ES_)) { 1239 SMSC_WARN(pdata, rx_err, 1240 "Discarding packet with error bit set"); 1241 /* Packet has an error, discard it and continue with 1242 * the next */ 1243 smsc911x_rx_fastforward(pdata, pktwords); 1244 dev->stats.rx_dropped++; 1245 continue; 1246 } 1247 1248 skb = netdev_alloc_skb(dev, pktwords << 2); 1249 if (unlikely(!skb)) { 1250 SMSC_WARN(pdata, rx_err, 1251 "Unable to allocate skb for rx packet"); 1252 /* Drop the packet and stop this polling iteration */ 1253 smsc911x_rx_fastforward(pdata, pktwords); 1254 dev->stats.rx_dropped++; 1255 break; 1256 } 1257 1258 pdata->ops->rx_readfifo(pdata, 1259 (unsigned int *)skb->data, pktwords); 1260 1261 /* Align IP on 16B boundary */ 1262 skb_reserve(skb, NET_IP_ALIGN); 1263 skb_put(skb, pktlength - 4); 1264 skb->protocol = eth_type_trans(skb, dev); 1265 skb_checksum_none_assert(skb); 1266 netif_receive_skb(skb); 1267 1268 /* Update counters */ 1269 dev->stats.rx_packets++; 1270 dev->stats.rx_bytes += (pktlength - 4); 1271 } 1272 1273 /* Return total received packets */ 1274 return npackets; 1275 } 1276 1277 /* Returns hash bit number for given MAC address 1278 * Example: 1279 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1280 static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1281 { 1282 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1283 } 1284 1285 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1286 { 1287 /* Performs the multicast & mac_cr update. This is called when 1288 * safe on the current hardware, and with the mac_lock held */ 1289 unsigned int mac_cr; 1290 1291 SMSC_ASSERT_MAC_LOCK(pdata); 1292 1293 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1294 mac_cr |= pdata->set_bits_mask; 1295 mac_cr &= ~(pdata->clear_bits_mask); 1296 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1297 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1298 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1299 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1300 mac_cr, pdata->hashhi, pdata->hashlo); 1301 } 1302 1303 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1304 { 1305 unsigned int mac_cr; 1306 1307 /* This function is only called for older LAN911x devices 1308 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1309 * be modified during Rx - newer devices immediately update the 1310 * registers. 1311 * 1312 * This is called from interrupt context */ 1313 1314 spin_lock(&pdata->mac_lock); 1315 1316 /* Check Rx has stopped */ 1317 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1318 SMSC_WARN(pdata, drv, "Rx not stopped"); 1319 1320 /* Perform the update - safe to do now Rx has stopped */ 1321 smsc911x_rx_multicast_update(pdata); 1322 1323 /* Re-enable Rx */ 1324 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1325 mac_cr |= MAC_CR_RXEN_; 1326 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1327 1328 pdata->multicast_update_pending = 0; 1329 1330 spin_unlock(&pdata->mac_lock); 1331 } 1332 1333 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata) 1334 { 1335 struct net_device *ndev = pdata->dev; 1336 struct phy_device *phy_dev = ndev->phydev; 1337 int rc = 0; 1338 1339 if (!phy_dev) 1340 return rc; 1341 1342 /* If the internal PHY is in General Power-Down mode, all, except the 1343 * management interface, is powered-down and stays in that condition as 1344 * long as Phy register bit 0.11 is HIGH. 1345 * 1346 * In that case, clear the bit 0.11, so the PHY powers up and we can 1347 * access to the phy registers. 1348 */ 1349 rc = phy_read(phy_dev, MII_BMCR); 1350 if (rc < 0) { 1351 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1352 return rc; 1353 } 1354 1355 /* If the PHY general power-down bit is not set is not necessary to 1356 * disable the general power down-mode. 1357 */ 1358 if (rc & BMCR_PDOWN) { 1359 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN); 1360 if (rc < 0) { 1361 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1362 return rc; 1363 } 1364 1365 usleep_range(1000, 1500); 1366 } 1367 1368 return 0; 1369 } 1370 1371 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) 1372 { 1373 struct net_device *ndev = pdata->dev; 1374 struct phy_device *phy_dev = ndev->phydev; 1375 int rc = 0; 1376 1377 if (!phy_dev) 1378 return rc; 1379 1380 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS); 1381 1382 if (rc < 0) { 1383 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1384 return rc; 1385 } 1386 1387 /* Only disable if energy detect mode is already enabled */ 1388 if (rc & MII_LAN83C185_EDPWRDOWN) { 1389 /* Disable energy detect mode for this SMSC Transceivers */ 1390 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS, 1391 rc & (~MII_LAN83C185_EDPWRDOWN)); 1392 1393 if (rc < 0) { 1394 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1395 return rc; 1396 } 1397 /* Allow PHY to wakeup */ 1398 mdelay(2); 1399 } 1400 1401 return 0; 1402 } 1403 1404 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) 1405 { 1406 struct net_device *ndev = pdata->dev; 1407 struct phy_device *phy_dev = ndev->phydev; 1408 int rc = 0; 1409 1410 if (!phy_dev) 1411 return rc; 1412 1413 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS); 1414 1415 if (rc < 0) { 1416 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1417 return rc; 1418 } 1419 1420 /* Only enable if energy detect mode is already disabled */ 1421 if (!(rc & MII_LAN83C185_EDPWRDOWN)) { 1422 /* Enable energy detect mode for this SMSC Transceivers */ 1423 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS, 1424 rc | MII_LAN83C185_EDPWRDOWN); 1425 1426 if (rc < 0) { 1427 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1428 return rc; 1429 } 1430 } 1431 return 0; 1432 } 1433 1434 static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1435 { 1436 unsigned int timeout; 1437 unsigned int temp; 1438 int ret; 1439 unsigned int reset_offset = HW_CFG; 1440 unsigned int reset_mask = HW_CFG_SRST_; 1441 1442 /* 1443 * Make sure to power-up the PHY chip before doing a reset, otherwise 1444 * the reset fails. 1445 */ 1446 ret = smsc911x_phy_general_power_up(pdata); 1447 if (ret) { 1448 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip"); 1449 return ret; 1450 } 1451 1452 /* 1453 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that 1454 * are initialized in a Energy Detect Power-Down mode that prevents 1455 * the MAC chip to be software reseted. So we have to wakeup the PHY 1456 * before. 1457 */ 1458 if (pdata->generation == 4) { 1459 ret = smsc911x_phy_disable_energy_detect(pdata); 1460 1461 if (ret) { 1462 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1463 return ret; 1464 } 1465 } 1466 1467 if ((pdata->idrev & 0xFFFF0000) == LAN9250) { 1468 /* special reset for LAN9250 */ 1469 reset_offset = RESET_CTL; 1470 reset_mask = RESET_CTL_DIGITAL_RST_; 1471 } 1472 1473 /* Reset the LAN911x */ 1474 smsc911x_reg_write(pdata, reset_offset, reset_mask); 1475 1476 /* verify reset bit is cleared */ 1477 timeout = 10; 1478 do { 1479 udelay(10); 1480 temp = smsc911x_reg_read(pdata, reset_offset); 1481 } while ((--timeout) && (temp & reset_mask)); 1482 1483 if (unlikely(temp & reset_mask)) { 1484 SMSC_WARN(pdata, drv, "Failed to complete reset"); 1485 return -EIO; 1486 } 1487 1488 if (pdata->generation == 4) { 1489 ret = smsc911x_phy_enable_energy_detect(pdata); 1490 1491 if (ret) { 1492 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1493 return ret; 1494 } 1495 } 1496 1497 return 0; 1498 } 1499 1500 /* Sets the device MAC address to dev_addr, called with mac_lock held */ 1501 static void 1502 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1503 { 1504 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1505 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1506 (dev_addr[1] << 8) | dev_addr[0]; 1507 1508 SMSC_ASSERT_MAC_LOCK(pdata); 1509 1510 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1511 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1512 } 1513 1514 static void smsc911x_disable_irq_chip(struct net_device *dev) 1515 { 1516 struct smsc911x_data *pdata = netdev_priv(dev); 1517 1518 smsc911x_reg_write(pdata, INT_EN, 0); 1519 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1520 } 1521 1522 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1523 { 1524 struct net_device *dev = dev_id; 1525 struct smsc911x_data *pdata = netdev_priv(dev); 1526 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1527 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1528 int serviced = IRQ_NONE; 1529 u32 temp; 1530 1531 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1532 temp = smsc911x_reg_read(pdata, INT_EN); 1533 temp &= (~INT_EN_SW_INT_EN_); 1534 smsc911x_reg_write(pdata, INT_EN, temp); 1535 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1536 pdata->software_irq_signal = 1; 1537 smp_wmb(); 1538 serviced = IRQ_HANDLED; 1539 } 1540 1541 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1542 /* Called when there is a multicast update scheduled and 1543 * it is now safe to complete the update */ 1544 SMSC_TRACE(pdata, intr, "RX Stop interrupt"); 1545 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1546 if (pdata->multicast_update_pending) 1547 smsc911x_rx_multicast_update_workaround(pdata); 1548 serviced = IRQ_HANDLED; 1549 } 1550 1551 if (intsts & inten & INT_STS_TDFA_) { 1552 temp = smsc911x_reg_read(pdata, FIFO_INT); 1553 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1554 smsc911x_reg_write(pdata, FIFO_INT, temp); 1555 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1556 netif_wake_queue(dev); 1557 serviced = IRQ_HANDLED; 1558 } 1559 1560 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1561 SMSC_TRACE(pdata, intr, "RX Error interrupt"); 1562 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1563 serviced = IRQ_HANDLED; 1564 } 1565 1566 if (likely(intsts & inten & INT_STS_RSFL_)) { 1567 if (likely(napi_schedule_prep(&pdata->napi))) { 1568 /* Disable Rx interrupts */ 1569 temp = smsc911x_reg_read(pdata, INT_EN); 1570 temp &= (~INT_EN_RSFL_EN_); 1571 smsc911x_reg_write(pdata, INT_EN, temp); 1572 /* Schedule a NAPI poll */ 1573 __napi_schedule(&pdata->napi); 1574 } else { 1575 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed"); 1576 } 1577 serviced = IRQ_HANDLED; 1578 } 1579 1580 return serviced; 1581 } 1582 1583 static int smsc911x_open(struct net_device *dev) 1584 { 1585 struct smsc911x_data *pdata = netdev_priv(dev); 1586 unsigned int timeout; 1587 unsigned int temp; 1588 unsigned int intcfg; 1589 int retval; 1590 int irq_flags; 1591 1592 /* find and start the given phy */ 1593 if (!dev->phydev) { 1594 retval = smsc911x_mii_probe(dev); 1595 if (retval < 0) { 1596 SMSC_WARN(pdata, probe, "Error starting phy"); 1597 goto out; 1598 } 1599 } 1600 1601 /* Reset the LAN911x */ 1602 retval = smsc911x_soft_reset(pdata); 1603 if (retval) { 1604 SMSC_WARN(pdata, hw, "soft reset failed"); 1605 goto mii_free_out; 1606 } 1607 1608 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1609 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1610 1611 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1612 spin_lock_irq(&pdata->mac_lock); 1613 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1614 spin_unlock_irq(&pdata->mac_lock); 1615 1616 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1617 timeout = 50; 1618 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1619 --timeout) { 1620 udelay(10); 1621 } 1622 1623 if (unlikely(timeout == 0)) 1624 SMSC_WARN(pdata, ifup, 1625 "Timed out waiting for EEPROM busy bit to clear"); 1626 1627 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1628 1629 /* The soft reset above cleared the device's MAC address, 1630 * restore it from local copy (set in probe) */ 1631 spin_lock_irq(&pdata->mac_lock); 1632 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1633 spin_unlock_irq(&pdata->mac_lock); 1634 1635 /* Initialise irqs, but leave all sources disabled */ 1636 smsc911x_disable_irq_chip(dev); 1637 1638 /* Set interrupt deassertion to 100uS */ 1639 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1640 1641 if (pdata->config.irq_polarity) { 1642 SMSC_TRACE(pdata, ifup, "irq polarity: active high"); 1643 intcfg |= INT_CFG_IRQ_POL_; 1644 } else { 1645 SMSC_TRACE(pdata, ifup, "irq polarity: active low"); 1646 } 1647 1648 if (pdata->config.irq_type) { 1649 SMSC_TRACE(pdata, ifup, "irq type: push-pull"); 1650 intcfg |= INT_CFG_IRQ_TYPE_; 1651 } else { 1652 SMSC_TRACE(pdata, ifup, "irq type: open drain"); 1653 } 1654 1655 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1656 1657 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq); 1658 pdata->software_irq_signal = 0; 1659 smp_wmb(); 1660 1661 irq_flags = irq_get_trigger_type(dev->irq); 1662 retval = request_irq(dev->irq, smsc911x_irqhandler, 1663 irq_flags | IRQF_SHARED, dev->name, dev); 1664 if (retval) { 1665 SMSC_WARN(pdata, probe, 1666 "Unable to claim requested irq: %d", dev->irq); 1667 goto mii_free_out; 1668 } 1669 1670 temp = smsc911x_reg_read(pdata, INT_EN); 1671 temp |= INT_EN_SW_INT_EN_; 1672 smsc911x_reg_write(pdata, INT_EN, temp); 1673 1674 timeout = 1000; 1675 while (timeout--) { 1676 if (pdata->software_irq_signal) 1677 break; 1678 msleep(1); 1679 } 1680 1681 if (!pdata->software_irq_signal) { 1682 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n", 1683 dev->irq); 1684 retval = -ENODEV; 1685 goto irq_stop_out; 1686 } 1687 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d", 1688 dev->irq); 1689 1690 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1691 (unsigned long)pdata->ioaddr, dev->irq); 1692 1693 /* Reset the last known duplex and carrier */ 1694 pdata->last_duplex = -1; 1695 pdata->last_carrier = -1; 1696 1697 /* Bring the PHY up */ 1698 phy_start(dev->phydev); 1699 1700 temp = smsc911x_reg_read(pdata, HW_CFG); 1701 /* Preserve TX FIFO size and external PHY configuration */ 1702 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1703 temp |= HW_CFG_SF_; 1704 smsc911x_reg_write(pdata, HW_CFG, temp); 1705 1706 temp = smsc911x_reg_read(pdata, FIFO_INT); 1707 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1708 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1709 smsc911x_reg_write(pdata, FIFO_INT, temp); 1710 1711 /* set RX Data offset to 2 bytes for alignment */ 1712 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8)); 1713 1714 /* enable NAPI polling before enabling RX interrupts */ 1715 napi_enable(&pdata->napi); 1716 1717 temp = smsc911x_reg_read(pdata, INT_EN); 1718 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1719 smsc911x_reg_write(pdata, INT_EN, temp); 1720 1721 spin_lock_irq(&pdata->mac_lock); 1722 temp = smsc911x_mac_read(pdata, MAC_CR); 1723 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1724 smsc911x_mac_write(pdata, MAC_CR, temp); 1725 spin_unlock_irq(&pdata->mac_lock); 1726 1727 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1728 1729 netif_start_queue(dev); 1730 return 0; 1731 1732 irq_stop_out: 1733 free_irq(dev->irq, dev); 1734 mii_free_out: 1735 phy_disconnect(dev->phydev); 1736 dev->phydev = NULL; 1737 out: 1738 return retval; 1739 } 1740 1741 /* Entry point for stopping the interface */ 1742 static int smsc911x_stop(struct net_device *dev) 1743 { 1744 struct smsc911x_data *pdata = netdev_priv(dev); 1745 unsigned int temp; 1746 1747 /* Disable all device interrupts */ 1748 temp = smsc911x_reg_read(pdata, INT_CFG); 1749 temp &= ~INT_CFG_IRQ_EN_; 1750 smsc911x_reg_write(pdata, INT_CFG, temp); 1751 1752 /* Stop Tx and Rx polling */ 1753 netif_stop_queue(dev); 1754 napi_disable(&pdata->napi); 1755 1756 /* At this point all Rx and Tx activity is stopped */ 1757 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1758 smsc911x_tx_update_txcounters(dev); 1759 1760 free_irq(dev->irq, dev); 1761 1762 /* Bring the PHY down */ 1763 if (dev->phydev) { 1764 phy_stop(dev->phydev); 1765 phy_disconnect(dev->phydev); 1766 dev->phydev = NULL; 1767 } 1768 netif_carrier_off(dev); 1769 1770 SMSC_TRACE(pdata, ifdown, "Interface stopped"); 1771 return 0; 1772 } 1773 1774 /* Entry point for transmitting a packet */ 1775 static netdev_tx_t 1776 smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1777 { 1778 struct smsc911x_data *pdata = netdev_priv(dev); 1779 unsigned int freespace; 1780 unsigned int tx_cmd_a; 1781 unsigned int tx_cmd_b; 1782 unsigned int temp; 1783 u32 wrsz; 1784 ulong bufp; 1785 1786 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1787 1788 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1789 SMSC_WARN(pdata, tx_err, 1790 "Tx data fifo low, space available: %d", freespace); 1791 1792 /* Word alignment adjustment */ 1793 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1794 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1795 tx_cmd_a |= (unsigned int)skb->len; 1796 1797 tx_cmd_b = ((unsigned int)skb->len) << 16; 1798 tx_cmd_b |= (unsigned int)skb->len; 1799 1800 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1801 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1802 1803 bufp = (ulong)skb->data & (~0x3); 1804 wrsz = (u32)skb->len + 3; 1805 wrsz += (u32)((ulong)skb->data & 0x3); 1806 wrsz >>= 2; 1807 1808 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1809 freespace -= (skb->len + 32); 1810 skb_tx_timestamp(skb); 1811 dev_consume_skb_any(skb); 1812 1813 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1814 smsc911x_tx_update_txcounters(dev); 1815 1816 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1817 netif_stop_queue(dev); 1818 temp = smsc911x_reg_read(pdata, FIFO_INT); 1819 temp &= 0x00FFFFFF; 1820 temp |= 0x32000000; 1821 smsc911x_reg_write(pdata, FIFO_INT, temp); 1822 } 1823 1824 return NETDEV_TX_OK; 1825 } 1826 1827 /* Entry point for getting status counters */ 1828 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1829 { 1830 struct smsc911x_data *pdata = netdev_priv(dev); 1831 smsc911x_tx_update_txcounters(dev); 1832 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1833 return &dev->stats; 1834 } 1835 1836 /* Entry point for setting addressing modes */ 1837 static void smsc911x_set_multicast_list(struct net_device *dev) 1838 { 1839 struct smsc911x_data *pdata = netdev_priv(dev); 1840 unsigned long flags; 1841 1842 if (dev->flags & IFF_PROMISC) { 1843 /* Enabling promiscuous mode */ 1844 pdata->set_bits_mask = MAC_CR_PRMS_; 1845 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1846 pdata->hashhi = 0; 1847 pdata->hashlo = 0; 1848 } else if (dev->flags & IFF_ALLMULTI) { 1849 /* Enabling all multicast mode */ 1850 pdata->set_bits_mask = MAC_CR_MCPAS_; 1851 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1852 pdata->hashhi = 0; 1853 pdata->hashlo = 0; 1854 } else if (!netdev_mc_empty(dev)) { 1855 /* Enabling specific multicast addresses */ 1856 unsigned int hash_high = 0; 1857 unsigned int hash_low = 0; 1858 struct netdev_hw_addr *ha; 1859 1860 pdata->set_bits_mask = MAC_CR_HPFILT_; 1861 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1862 1863 netdev_for_each_mc_addr(ha, dev) { 1864 unsigned int bitnum = smsc911x_hash(ha->addr); 1865 unsigned int mask = 0x01 << (bitnum & 0x1F); 1866 1867 if (bitnum & 0x20) 1868 hash_high |= mask; 1869 else 1870 hash_low |= mask; 1871 } 1872 1873 pdata->hashhi = hash_high; 1874 pdata->hashlo = hash_low; 1875 } else { 1876 /* Enabling local MAC address only */ 1877 pdata->set_bits_mask = 0; 1878 pdata->clear_bits_mask = 1879 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1880 pdata->hashhi = 0; 1881 pdata->hashlo = 0; 1882 } 1883 1884 spin_lock_irqsave(&pdata->mac_lock, flags); 1885 1886 if (pdata->generation <= 1) { 1887 /* Older hardware revision - cannot change these flags while 1888 * receiving data */ 1889 if (!pdata->multicast_update_pending) { 1890 unsigned int temp; 1891 SMSC_TRACE(pdata, hw, "scheduling mcast update"); 1892 pdata->multicast_update_pending = 1; 1893 1894 /* Request the hardware to stop, then perform the 1895 * update when we get an RX_STOP interrupt */ 1896 temp = smsc911x_mac_read(pdata, MAC_CR); 1897 temp &= ~(MAC_CR_RXEN_); 1898 smsc911x_mac_write(pdata, MAC_CR, temp); 1899 } else { 1900 /* There is another update pending, this should now 1901 * use the newer values */ 1902 } 1903 } else { 1904 /* Newer hardware revision - can write immediately */ 1905 smsc911x_rx_multicast_update(pdata); 1906 } 1907 1908 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1909 } 1910 1911 #ifdef CONFIG_NET_POLL_CONTROLLER 1912 static void smsc911x_poll_controller(struct net_device *dev) 1913 { 1914 disable_irq(dev->irq); 1915 smsc911x_irqhandler(0, dev); 1916 enable_irq(dev->irq); 1917 } 1918 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1919 1920 static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1921 { 1922 struct smsc911x_data *pdata = netdev_priv(dev); 1923 struct sockaddr *addr = p; 1924 1925 /* On older hardware revisions we cannot change the mac address 1926 * registers while receiving data. Newer devices can safely change 1927 * this at any time. */ 1928 if (pdata->generation <= 1 && netif_running(dev)) 1929 return -EBUSY; 1930 1931 if (!is_valid_ether_addr(addr->sa_data)) 1932 return -EADDRNOTAVAIL; 1933 1934 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1935 1936 spin_lock_irq(&pdata->mac_lock); 1937 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1938 spin_unlock_irq(&pdata->mac_lock); 1939 1940 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 1941 1942 return 0; 1943 } 1944 1945 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1946 struct ethtool_drvinfo *info) 1947 { 1948 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1949 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1950 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1951 sizeof(info->bus_info)); 1952 } 1953 1954 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1955 { 1956 struct smsc911x_data *pdata = netdev_priv(dev); 1957 return pdata->msg_enable; 1958 } 1959 1960 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1961 { 1962 struct smsc911x_data *pdata = netdev_priv(dev); 1963 pdata->msg_enable = level; 1964 } 1965 1966 static int smsc911x_ethtool_getregslen(struct net_device *dev) 1967 { 1968 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1969 sizeof(u32); 1970 } 1971 1972 static void 1973 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1974 void *buf) 1975 { 1976 struct smsc911x_data *pdata = netdev_priv(dev); 1977 struct phy_device *phy_dev = dev->phydev; 1978 unsigned long flags; 1979 unsigned int i; 1980 unsigned int j = 0; 1981 u32 *data = buf; 1982 1983 regs->version = pdata->idrev; 1984 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1985 data[j++] = smsc911x_reg_read(pdata, i); 1986 1987 for (i = MAC_CR; i <= WUCSR; i++) { 1988 spin_lock_irqsave(&pdata->mac_lock, flags); 1989 data[j++] = smsc911x_mac_read(pdata, i); 1990 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1991 } 1992 1993 for (i = 0; i <= 31; i++) 1994 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus, 1995 phy_dev->mdio.addr, i); 1996 } 1997 1998 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 1999 { 2000 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 2001 temp &= ~GPIO_CFG_EEPR_EN_; 2002 smsc911x_reg_write(pdata, GPIO_CFG, temp); 2003 msleep(1); 2004 } 2005 2006 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 2007 { 2008 int timeout = 100; 2009 u32 e2cmd; 2010 2011 SMSC_TRACE(pdata, drv, "op 0x%08x", op); 2012 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 2013 SMSC_WARN(pdata, drv, "Busy at start"); 2014 return -EBUSY; 2015 } 2016 2017 e2cmd = op | E2P_CMD_EPC_BUSY_; 2018 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 2019 2020 do { 2021 msleep(1); 2022 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 2023 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 2024 2025 if (!timeout) { 2026 SMSC_TRACE(pdata, drv, "TIMED OUT"); 2027 return -EAGAIN; 2028 } 2029 2030 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 2031 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation"); 2032 return -EINVAL; 2033 } 2034 2035 return 0; 2036 } 2037 2038 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 2039 u8 address, u8 *data) 2040 { 2041 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 2042 int ret; 2043 2044 SMSC_TRACE(pdata, drv, "address 0x%x", address); 2045 ret = smsc911x_eeprom_send_cmd(pdata, op); 2046 2047 if (!ret) 2048 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 2049 2050 return ret; 2051 } 2052 2053 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 2054 u8 address, u8 data) 2055 { 2056 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 2057 int ret; 2058 2059 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data); 2060 ret = smsc911x_eeprom_send_cmd(pdata, op); 2061 2062 if (!ret) { 2063 op = E2P_CMD_EPC_CMD_WRITE_ | address; 2064 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 2065 2066 /* Workaround for hardware read-after-write restriction */ 2067 smsc911x_reg_read(pdata, BYTE_TEST); 2068 2069 ret = smsc911x_eeprom_send_cmd(pdata, op); 2070 } 2071 2072 return ret; 2073 } 2074 2075 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 2076 { 2077 return SMSC911X_EEPROM_SIZE; 2078 } 2079 2080 static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 2081 struct ethtool_eeprom *eeprom, u8 *data) 2082 { 2083 struct smsc911x_data *pdata = netdev_priv(dev); 2084 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 2085 int len; 2086 int i; 2087 2088 smsc911x_eeprom_enable_access(pdata); 2089 2090 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 2091 for (i = 0; i < len; i++) { 2092 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 2093 if (ret < 0) { 2094 eeprom->len = 0; 2095 return ret; 2096 } 2097 } 2098 2099 memcpy(data, &eeprom_data[eeprom->offset], len); 2100 eeprom->len = len; 2101 return 0; 2102 } 2103 2104 static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 2105 struct ethtool_eeprom *eeprom, u8 *data) 2106 { 2107 int ret; 2108 struct smsc911x_data *pdata = netdev_priv(dev); 2109 2110 smsc911x_eeprom_enable_access(pdata); 2111 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 2112 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 2113 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 2114 2115 /* Single byte write, according to man page */ 2116 eeprom->len = 1; 2117 2118 return ret; 2119 } 2120 2121 static const struct ethtool_ops smsc911x_ethtool_ops = { 2122 .get_link = ethtool_op_get_link, 2123 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 2124 .nway_reset = phy_ethtool_nway_reset, 2125 .get_msglevel = smsc911x_ethtool_getmsglevel, 2126 .set_msglevel = smsc911x_ethtool_setmsglevel, 2127 .get_regs_len = smsc911x_ethtool_getregslen, 2128 .get_regs = smsc911x_ethtool_getregs, 2129 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2130 .get_eeprom = smsc911x_ethtool_get_eeprom, 2131 .set_eeprom = smsc911x_ethtool_set_eeprom, 2132 .get_ts_info = ethtool_op_get_ts_info, 2133 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2134 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2135 }; 2136 2137 static const struct net_device_ops smsc911x_netdev_ops = { 2138 .ndo_open = smsc911x_open, 2139 .ndo_stop = smsc911x_stop, 2140 .ndo_start_xmit = smsc911x_hard_start_xmit, 2141 .ndo_get_stats = smsc911x_get_stats, 2142 .ndo_set_rx_mode = smsc911x_set_multicast_list, 2143 .ndo_do_ioctl = phy_do_ioctl_running, 2144 .ndo_validate_addr = eth_validate_addr, 2145 .ndo_set_mac_address = smsc911x_set_mac_address, 2146 #ifdef CONFIG_NET_POLL_CONTROLLER 2147 .ndo_poll_controller = smsc911x_poll_controller, 2148 #endif 2149 }; 2150 2151 /* copies the current mac address from hardware to dev->dev_addr */ 2152 static void smsc911x_read_mac_address(struct net_device *dev) 2153 { 2154 struct smsc911x_data *pdata = netdev_priv(dev); 2155 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 2156 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 2157 2158 dev->dev_addr[0] = (u8)(mac_low32); 2159 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 2160 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 2161 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 2162 dev->dev_addr[4] = (u8)(mac_high16); 2163 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 2164 } 2165 2166 /* Initializing private device structures, only called from probe */ 2167 static int smsc911x_init(struct net_device *dev) 2168 { 2169 struct smsc911x_data *pdata = netdev_priv(dev); 2170 unsigned int byte_test, mask; 2171 unsigned int to = 100; 2172 2173 SMSC_TRACE(pdata, probe, "Driver Parameters:"); 2174 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX", 2175 (unsigned long)pdata->ioaddr); 2176 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq); 2177 SMSC_TRACE(pdata, probe, "PHY will be autodetected."); 2178 2179 spin_lock_init(&pdata->dev_lock); 2180 spin_lock_init(&pdata->mac_lock); 2181 2182 if (pdata->ioaddr == NULL) { 2183 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000"); 2184 return -ENODEV; 2185 } 2186 2187 /* 2188 * poll the READY bit in PMT_CTRL. Any other access to the device is 2189 * forbidden while this bit isn't set. Try for 100ms 2190 * 2191 * Note that this test is done before the WORD_SWAP register is 2192 * programmed. So in some configurations the READY bit is at 16 before 2193 * WORD_SWAP is written to. This issue is worked around by waiting 2194 * until either bit 0 or bit 16 gets set in PMT_CTRL. 2195 * 2196 * SMSC has confirmed that checking bit 16 (marked as reserved in 2197 * the datasheet) is fine since these bits "will either never be set 2198 * or can only go high after READY does (so also indicate the device 2199 * is ready)". 2200 */ 2201 2202 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); 2203 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) 2204 udelay(1000); 2205 2206 if (to == 0) { 2207 netdev_err(dev, "Device not READY in 100ms aborting\n"); 2208 return -ENODEV; 2209 } 2210 2211 /* Check byte ordering */ 2212 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2213 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test); 2214 if (byte_test == 0x43218765) { 2215 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " 2216 "applying WORD_SWAP"); 2217 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 2218 2219 /* 1 dummy read of BYTE_TEST is needed after a write to 2220 * WORD_SWAP before its contents are valid */ 2221 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2222 2223 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2224 } 2225 2226 if (byte_test != 0x87654321) { 2227 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test); 2228 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 2229 SMSC_WARN(pdata, probe, 2230 "top 16 bits equal to bottom 16 bits"); 2231 SMSC_TRACE(pdata, probe, 2232 "This may mean the chip is set " 2233 "for 32 bit while the bus is reading 16 bit"); 2234 } 2235 return -ENODEV; 2236 } 2237 2238 /* Default generation to zero (all workarounds apply) */ 2239 pdata->generation = 0; 2240 2241 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 2242 switch (pdata->idrev & 0xFFFF0000) { 2243 case LAN9118: 2244 case LAN9117: 2245 case LAN9116: 2246 case LAN9115: 2247 case LAN89218: 2248 /* LAN911[5678] family */ 2249 pdata->generation = pdata->idrev & 0x0000FFFF; 2250 break; 2251 2252 case LAN9218: 2253 case LAN9217: 2254 case LAN9216: 2255 case LAN9215: 2256 /* LAN921[5678] family */ 2257 pdata->generation = 3; 2258 break; 2259 2260 case LAN9210: 2261 case LAN9211: 2262 case LAN9220: 2263 case LAN9221: 2264 case LAN9250: 2265 /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */ 2266 pdata->generation = 4; 2267 break; 2268 2269 default: 2270 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", 2271 pdata->idrev); 2272 return -ENODEV; 2273 } 2274 2275 SMSC_TRACE(pdata, probe, 2276 "LAN911x identified, idrev: 0x%08X, generation: %d", 2277 pdata->idrev, pdata->generation); 2278 2279 if (pdata->generation == 0) 2280 SMSC_WARN(pdata, probe, 2281 "This driver is not intended for this chip revision"); 2282 2283 /* workaround for platforms without an eeprom, where the mac address 2284 * is stored elsewhere and set by the bootloader. This saves the 2285 * mac address before resetting the device */ 2286 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { 2287 spin_lock_irq(&pdata->mac_lock); 2288 smsc911x_read_mac_address(dev); 2289 spin_unlock_irq(&pdata->mac_lock); 2290 } 2291 2292 /* Reset the LAN911x */ 2293 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata)) 2294 return -ENODEV; 2295 2296 dev->flags |= IFF_MULTICAST; 2297 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 2298 dev->netdev_ops = &smsc911x_netdev_ops; 2299 dev->ethtool_ops = &smsc911x_ethtool_ops; 2300 2301 return 0; 2302 } 2303 2304 static int smsc911x_drv_remove(struct platform_device *pdev) 2305 { 2306 struct net_device *dev; 2307 struct smsc911x_data *pdata; 2308 struct resource *res; 2309 2310 dev = platform_get_drvdata(pdev); 2311 BUG_ON(!dev); 2312 pdata = netdev_priv(dev); 2313 BUG_ON(!pdata); 2314 BUG_ON(!pdata->ioaddr); 2315 2316 SMSC_TRACE(pdata, ifdown, "Stopping driver"); 2317 2318 unregister_netdev(dev); 2319 2320 mdiobus_unregister(pdata->mii_bus); 2321 mdiobus_free(pdata->mii_bus); 2322 2323 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2324 "smsc911x-memory"); 2325 if (!res) 2326 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2327 2328 release_mem_region(res->start, resource_size(res)); 2329 2330 iounmap(pdata->ioaddr); 2331 2332 (void)smsc911x_disable_resources(pdev); 2333 smsc911x_free_resources(pdev); 2334 2335 free_netdev(dev); 2336 2337 pm_runtime_put(&pdev->dev); 2338 pm_runtime_disable(&pdev->dev); 2339 2340 return 0; 2341 } 2342 2343 /* standard register acces */ 2344 static const struct smsc911x_ops standard_smsc911x_ops = { 2345 .reg_read = __smsc911x_reg_read, 2346 .reg_write = __smsc911x_reg_write, 2347 .rx_readfifo = smsc911x_rx_readfifo, 2348 .tx_writefifo = smsc911x_tx_writefifo, 2349 }; 2350 2351 /* shifted register access */ 2352 static const struct smsc911x_ops shifted_smsc911x_ops = { 2353 .reg_read = __smsc911x_reg_read_shift, 2354 .reg_write = __smsc911x_reg_write_shift, 2355 .rx_readfifo = smsc911x_rx_readfifo_shift, 2356 .tx_writefifo = smsc911x_tx_writefifo_shift, 2357 }; 2358 2359 static int smsc911x_probe_config(struct smsc911x_platform_config *config, 2360 struct device *dev) 2361 { 2362 int phy_interface; 2363 u32 width = 0; 2364 int err; 2365 2366 phy_interface = device_get_phy_mode(dev); 2367 if (phy_interface < 0) 2368 phy_interface = PHY_INTERFACE_MODE_NA; 2369 config->phy_interface = phy_interface; 2370 2371 device_get_mac_address(dev, config->mac, ETH_ALEN); 2372 2373 err = device_property_read_u32(dev, "reg-io-width", &width); 2374 if (err == -ENXIO) 2375 return err; 2376 if (!err && width == 4) 2377 config->flags |= SMSC911X_USE_32BIT; 2378 else 2379 config->flags |= SMSC911X_USE_16BIT; 2380 2381 device_property_read_u32(dev, "reg-shift", &config->shift); 2382 2383 if (device_property_present(dev, "smsc,irq-active-high")) 2384 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; 2385 2386 if (device_property_present(dev, "smsc,irq-push-pull")) 2387 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; 2388 2389 if (device_property_present(dev, "smsc,force-internal-phy")) 2390 config->flags |= SMSC911X_FORCE_INTERNAL_PHY; 2391 2392 if (device_property_present(dev, "smsc,force-external-phy")) 2393 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; 2394 2395 if (device_property_present(dev, "smsc,save-mac-address")) 2396 config->flags |= SMSC911X_SAVE_MAC_ADDRESS; 2397 2398 return 0; 2399 } 2400 2401 static int smsc911x_drv_probe(struct platform_device *pdev) 2402 { 2403 struct net_device *dev; 2404 struct smsc911x_data *pdata; 2405 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev); 2406 struct resource *res; 2407 int res_size, irq; 2408 int retval; 2409 2410 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2411 "smsc911x-memory"); 2412 if (!res) 2413 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2414 if (!res) { 2415 pr_warn("Could not allocate resource\n"); 2416 retval = -ENODEV; 2417 goto out_0; 2418 } 2419 res_size = resource_size(res); 2420 2421 irq = platform_get_irq(pdev, 0); 2422 if (irq == -EPROBE_DEFER) { 2423 retval = -EPROBE_DEFER; 2424 goto out_0; 2425 } else if (irq <= 0) { 2426 pr_warn("Could not allocate irq resource\n"); 2427 retval = -ENODEV; 2428 goto out_0; 2429 } 2430 2431 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 2432 retval = -EBUSY; 2433 goto out_0; 2434 } 2435 2436 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 2437 if (!dev) { 2438 retval = -ENOMEM; 2439 goto out_release_io_1; 2440 } 2441 2442 SET_NETDEV_DEV(dev, &pdev->dev); 2443 2444 pdata = netdev_priv(dev); 2445 dev->irq = irq; 2446 pdata->ioaddr = ioremap(res->start, res_size); 2447 if (!pdata->ioaddr) { 2448 retval = -ENOMEM; 2449 goto out_ioremap_fail; 2450 } 2451 2452 pdata->dev = dev; 2453 pdata->msg_enable = ((1 << debug) - 1); 2454 2455 platform_set_drvdata(pdev, dev); 2456 2457 retval = smsc911x_request_resources(pdev); 2458 if (retval) 2459 goto out_request_resources_fail; 2460 2461 retval = smsc911x_enable_resources(pdev); 2462 if (retval) 2463 goto out_enable_resources_fail; 2464 2465 if (pdata->ioaddr == NULL) { 2466 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid"); 2467 retval = -ENOMEM; 2468 goto out_disable_resources; 2469 } 2470 2471 retval = smsc911x_probe_config(&pdata->config, &pdev->dev); 2472 if (retval && config) { 2473 /* copy config parameters across to pdata */ 2474 memcpy(&pdata->config, config, sizeof(pdata->config)); 2475 retval = 0; 2476 } 2477 2478 if (retval) { 2479 SMSC_WARN(pdata, probe, "Error smsc911x config not found"); 2480 goto out_disable_resources; 2481 } 2482 2483 /* assume standard, non-shifted, access to HW registers */ 2484 pdata->ops = &standard_smsc911x_ops; 2485 /* apply the right access if shifting is needed */ 2486 if (pdata->config.shift) 2487 pdata->ops = &shifted_smsc911x_ops; 2488 2489 pm_runtime_enable(&pdev->dev); 2490 pm_runtime_get_sync(&pdev->dev); 2491 2492 retval = smsc911x_init(dev); 2493 if (retval < 0) 2494 goto out_init_fail; 2495 2496 netif_carrier_off(dev); 2497 2498 retval = smsc911x_mii_init(pdev, dev); 2499 if (retval) { 2500 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval); 2501 goto out_init_fail; 2502 } 2503 2504 retval = register_netdev(dev); 2505 if (retval) { 2506 SMSC_WARN(pdata, probe, "Error %i registering device", retval); 2507 goto out_init_fail; 2508 } else { 2509 SMSC_TRACE(pdata, probe, 2510 "Network interface: \"%s\"", dev->name); 2511 } 2512 2513 spin_lock_irq(&pdata->mac_lock); 2514 2515 /* Check if mac address has been specified when bringing interface up */ 2516 if (is_valid_ether_addr(dev->dev_addr)) { 2517 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2518 SMSC_TRACE(pdata, probe, 2519 "MAC Address is specified by configuration"); 2520 } else if (is_valid_ether_addr(pdata->config.mac)) { 2521 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN); 2522 SMSC_TRACE(pdata, probe, 2523 "MAC Address specified by platform data"); 2524 } else { 2525 /* Try reading mac address from device. if EEPROM is present 2526 * it will already have been set */ 2527 smsc_get_mac(dev); 2528 2529 if (is_valid_ether_addr(dev->dev_addr)) { 2530 /* eeprom values are valid so use them */ 2531 SMSC_TRACE(pdata, probe, 2532 "Mac Address is read from LAN911x EEPROM"); 2533 } else { 2534 /* eeprom values are invalid, generate random MAC */ 2535 eth_hw_addr_random(dev); 2536 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2537 SMSC_TRACE(pdata, probe, 2538 "MAC Address is set to eth_random_addr"); 2539 } 2540 } 2541 2542 spin_unlock_irq(&pdata->mac_lock); 2543 2544 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 2545 2546 return 0; 2547 2548 out_init_fail: 2549 pm_runtime_put(&pdev->dev); 2550 pm_runtime_disable(&pdev->dev); 2551 out_disable_resources: 2552 (void)smsc911x_disable_resources(pdev); 2553 out_enable_resources_fail: 2554 smsc911x_free_resources(pdev); 2555 out_request_resources_fail: 2556 iounmap(pdata->ioaddr); 2557 out_ioremap_fail: 2558 free_netdev(dev); 2559 out_release_io_1: 2560 release_mem_region(res->start, resource_size(res)); 2561 out_0: 2562 return retval; 2563 } 2564 2565 #ifdef CONFIG_PM 2566 /* This implementation assumes the devices remains powered on its VDDVARIO 2567 * pins during suspend. */ 2568 2569 /* TODO: implement freeze/thaw callbacks for hibernation.*/ 2570 2571 static int smsc911x_suspend(struct device *dev) 2572 { 2573 struct net_device *ndev = dev_get_drvdata(dev); 2574 struct smsc911x_data *pdata = netdev_priv(ndev); 2575 2576 if (netif_running(ndev)) { 2577 netif_stop_queue(ndev); 2578 netif_device_detach(ndev); 2579 } 2580 2581 /* enable wake on LAN, energy detection and the external PME 2582 * signal. */ 2583 smsc911x_reg_write(pdata, PMT_CTRL, 2584 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2585 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2586 2587 pm_runtime_disable(dev); 2588 pm_runtime_set_suspended(dev); 2589 2590 return 0; 2591 } 2592 2593 static int smsc911x_resume(struct device *dev) 2594 { 2595 struct net_device *ndev = dev_get_drvdata(dev); 2596 struct smsc911x_data *pdata = netdev_priv(ndev); 2597 unsigned int to = 100; 2598 2599 pm_runtime_enable(dev); 2600 pm_runtime_resume(dev); 2601 2602 /* Note 3.11 from the datasheet: 2603 * "When the LAN9220 is in a power saving state, a write of any 2604 * data to the BYTE_TEST register will wake-up the device." 2605 */ 2606 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2607 2608 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2609 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2610 * if it failed. */ 2611 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2612 udelay(1000); 2613 2614 if (to == 0) 2615 return -EIO; 2616 2617 if (netif_running(ndev)) { 2618 netif_device_attach(ndev); 2619 netif_start_queue(ndev); 2620 } 2621 2622 return 0; 2623 } 2624 2625 static const struct dev_pm_ops smsc911x_pm_ops = { 2626 .suspend = smsc911x_suspend, 2627 .resume = smsc911x_resume, 2628 }; 2629 2630 #define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2631 2632 #else 2633 #define SMSC911X_PM_OPS NULL 2634 #endif 2635 2636 #ifdef CONFIG_OF 2637 static const struct of_device_id smsc911x_dt_ids[] = { 2638 { .compatible = "smsc,lan9115", }, 2639 { /* sentinel */ } 2640 }; 2641 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); 2642 #endif 2643 2644 static const struct acpi_device_id smsc911x_acpi_match[] = { 2645 { "ARMH9118", 0 }, 2646 { } 2647 }; 2648 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match); 2649 2650 static struct platform_driver smsc911x_driver = { 2651 .probe = smsc911x_drv_probe, 2652 .remove = smsc911x_drv_remove, 2653 .driver = { 2654 .name = SMSC_CHIPNAME, 2655 .pm = SMSC911X_PM_OPS, 2656 .of_match_table = of_match_ptr(smsc911x_dt_ids), 2657 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match), 2658 }, 2659 }; 2660 2661 /* Entry point for loading the module */ 2662 static int __init smsc911x_init_module(void) 2663 { 2664 SMSC_INITIALIZE(); 2665 return platform_driver_register(&smsc911x_driver); 2666 } 2667 2668 /* entry point for unloading the module */ 2669 static void __exit smsc911x_cleanup_module(void) 2670 { 2671 platform_driver_unregister(&smsc911x_driver); 2672 } 2673 2674 module_init(smsc911x_init_module); 2675 module_exit(smsc911x_cleanup_module); 2676