1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <linux/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 110 static const struct pci_device_id sis900_pci_tbl[] = { 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 113 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 115 {0,} 116 }; 117 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 118 119 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 120 121 static const struct mii_chip_info { 122 const char * name; 123 u16 phy_id0; 124 u16 phy_id1; 125 u8 phy_types; 126 #define HOME 0x0001 127 #define LAN 0x0002 128 #define MIX 0x0003 129 #define UNKNOWN 0x0 130 } mii_chip_table[] = { 131 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 132 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 133 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 134 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 135 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 136 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 137 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 138 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 139 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 140 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 141 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 142 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 143 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 144 {NULL,}, 145 }; 146 147 struct mii_phy { 148 struct mii_phy * next; 149 int phy_addr; 150 u16 phy_id0; 151 u16 phy_id1; 152 u16 status; 153 u8 phy_types; 154 }; 155 156 typedef struct _BufferDesc { 157 u32 link; 158 u32 cmdsts; 159 u32 bufptr; 160 } BufferDesc; 161 162 struct sis900_private { 163 struct pci_dev * pci_dev; 164 165 spinlock_t lock; 166 167 struct mii_phy * mii; 168 struct mii_phy * first_mii; /* record the first mii structure */ 169 unsigned int cur_phy; 170 struct mii_if_info mii_info; 171 172 void __iomem *ioaddr; 173 174 struct timer_list timer; /* Link status detection timer. */ 175 u8 autong_complete; /* 1: auto-negotiate complete */ 176 177 u32 msg_enable; 178 179 unsigned int cur_rx, dirty_rx; /* producer/consumer pointers for Tx/Rx ring */ 180 unsigned int cur_tx, dirty_tx; 181 182 /* The saved address of a sent/receive-in-place packet buffer */ 183 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 184 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 185 BufferDesc *tx_ring; 186 BufferDesc *rx_ring; 187 188 dma_addr_t tx_ring_dma; 189 dma_addr_t rx_ring_dma; 190 191 unsigned int tx_full; /* The Tx queue is full. */ 192 u8 host_bridge_rev; 193 u8 chipset_rev; 194 /* EEPROM data */ 195 int eeprom_size; 196 }; 197 198 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 199 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 200 MODULE_LICENSE("GPL"); 201 202 module_param(multicast_filter_limit, int, 0444); 203 module_param(max_interrupt_work, int, 0444); 204 module_param(sis900_debug, int, 0444); 205 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 206 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 207 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 208 209 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 210 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 211 #define sr32(reg) ioread32(ioaddr + (reg)) 212 #define sr16(reg) ioread16(ioaddr + (reg)) 213 214 #ifdef CONFIG_NET_POLL_CONTROLLER 215 static void sis900_poll(struct net_device *dev); 216 #endif 217 static int sis900_open(struct net_device *net_dev); 218 static int sis900_mii_probe (struct net_device * net_dev); 219 static void sis900_init_rxfilter (struct net_device * net_dev); 220 static u16 read_eeprom(void __iomem *ioaddr, int location); 221 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 222 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 223 static void sis900_timer(struct timer_list *t); 224 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 225 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue); 226 static void sis900_init_tx_ring(struct net_device *net_dev); 227 static void sis900_init_rx_ring(struct net_device *net_dev); 228 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 229 struct net_device *net_dev); 230 static int sis900_rx(struct net_device *net_dev); 231 static void sis900_finish_xmit (struct net_device *net_dev); 232 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 233 static int sis900_close(struct net_device *net_dev); 234 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 235 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 236 static void set_rx_mode(struct net_device *net_dev); 237 static void sis900_reset(struct net_device *net_dev); 238 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 239 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 240 static u16 sis900_default_phy(struct net_device * net_dev); 241 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 242 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 243 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 244 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 245 static const struct ethtool_ops sis900_ethtool_ops; 246 247 /** 248 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 249 * @pci_dev: the sis900 pci device 250 * @net_dev: the net device to get address for 251 * 252 * Older SiS900 and friends, use EEPROM to store MAC address. 253 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 254 */ 255 256 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 257 struct net_device *net_dev) 258 { 259 struct sis900_private *sis_priv = netdev_priv(net_dev); 260 void __iomem *ioaddr = sis_priv->ioaddr; 261 u16 signature; 262 int i; 263 264 /* check to see if we have sane EEPROM */ 265 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 266 if (signature == 0xffff || signature == 0x0000) { 267 printk (KERN_WARNING "%s: Error EEPROM read %x\n", 268 pci_name(pci_dev), signature); 269 return 0; 270 } 271 272 /* get MAC address from EEPROM */ 273 for (i = 0; i < 3; i++) 274 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 275 276 return 1; 277 } 278 279 /** 280 * sis630e_get_mac_addr - Get MAC address for SiS630E model 281 * @pci_dev: the sis900 pci device 282 * @net_dev: the net device to get address for 283 * 284 * SiS630E model, use APC CMOS RAM to store MAC address. 285 * APC CMOS RAM is accessed through ISA bridge. 286 * MAC address is read into @net_dev->dev_addr. 287 */ 288 289 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 290 struct net_device *net_dev) 291 { 292 struct pci_dev *isa_bridge = NULL; 293 u8 reg; 294 int i; 295 296 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 297 if (!isa_bridge) 298 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 299 if (!isa_bridge) { 300 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 301 pci_name(pci_dev)); 302 return 0; 303 } 304 pci_read_config_byte(isa_bridge, 0x48, ®); 305 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 306 307 for (i = 0; i < 6; i++) { 308 outb(0x09 + i, 0x70); 309 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 310 } 311 312 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 313 pci_dev_put(isa_bridge); 314 315 return 1; 316 } 317 318 319 /** 320 * sis635_get_mac_addr - Get MAC address for SIS635 model 321 * @pci_dev: the sis900 pci device 322 * @net_dev: the net device to get address for 323 * 324 * SiS635 model, set MAC Reload Bit to load Mac address from APC 325 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 326 * @net_dev->dev_addr. 327 */ 328 329 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 330 struct net_device *net_dev) 331 { 332 struct sis900_private *sis_priv = netdev_priv(net_dev); 333 void __iomem *ioaddr = sis_priv->ioaddr; 334 u32 rfcrSave; 335 u32 i; 336 337 rfcrSave = sr32(rfcr); 338 339 sw32(cr, rfcrSave | RELOAD); 340 sw32(cr, 0); 341 342 /* disable packet filtering before setting filter */ 343 sw32(rfcr, rfcrSave & ~RFEN); 344 345 /* load MAC addr to filter data register */ 346 for (i = 0 ; i < 3 ; i++) { 347 sw32(rfcr, (i << RFADDR_shift)); 348 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr); 349 } 350 351 /* enable packet filtering */ 352 sw32(rfcr, rfcrSave | RFEN); 353 354 return 1; 355 } 356 357 /** 358 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 359 * @pci_dev: the sis900 pci device 360 * @net_dev: the net device to get address for 361 * 362 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 363 * is shared by 364 * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first 365 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed 366 * by LAN, otherwise it is not. After MAC address is read from EEPROM, send 367 * EEDONE signal to refuse EEPROM access by LAN. 368 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 369 * The signature field in SiS962 or SiS963 spec is meaningless. 370 * MAC address is read into @net_dev->dev_addr. 371 */ 372 373 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 374 struct net_device *net_dev) 375 { 376 struct sis900_private *sis_priv = netdev_priv(net_dev); 377 void __iomem *ioaddr = sis_priv->ioaddr; 378 int wait, rc = 0; 379 380 sw32(mear, EEREQ); 381 for (wait = 0; wait < 2000; wait++) { 382 if (sr32(mear) & EEGNT) { 383 u16 *mac = (u16 *)net_dev->dev_addr; 384 int i; 385 386 /* get MAC address from EEPROM */ 387 for (i = 0; i < 3; i++) 388 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 389 390 rc = 1; 391 break; 392 } 393 udelay(1); 394 } 395 sw32(mear, EEDONE); 396 return rc; 397 } 398 399 static const struct net_device_ops sis900_netdev_ops = { 400 .ndo_open = sis900_open, 401 .ndo_stop = sis900_close, 402 .ndo_start_xmit = sis900_start_xmit, 403 .ndo_set_config = sis900_set_config, 404 .ndo_set_rx_mode = set_rx_mode, 405 .ndo_validate_addr = eth_validate_addr, 406 .ndo_set_mac_address = eth_mac_addr, 407 .ndo_do_ioctl = mii_ioctl, 408 .ndo_tx_timeout = sis900_tx_timeout, 409 #ifdef CONFIG_NET_POLL_CONTROLLER 410 .ndo_poll_controller = sis900_poll, 411 #endif 412 }; 413 414 /** 415 * sis900_probe - Probe for sis900 device 416 * @pci_dev: the sis900 pci device 417 * @pci_id: the pci device ID 418 * 419 * Check and probe sis900 net device for @pci_dev. 420 * Get mac address according to the chip revision, 421 * and assign SiS900-specific entries in the device structure. 422 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 423 */ 424 425 static int sis900_probe(struct pci_dev *pci_dev, 426 const struct pci_device_id *pci_id) 427 { 428 struct sis900_private *sis_priv; 429 struct net_device *net_dev; 430 struct pci_dev *dev; 431 dma_addr_t ring_dma; 432 void *ring_space; 433 void __iomem *ioaddr; 434 int i, ret; 435 const char *card_name = card_names[pci_id->driver_data]; 436 const char *dev_name = pci_name(pci_dev); 437 438 /* when built into the kernel, we only print version if device is found */ 439 #ifndef MODULE 440 static int printed_version; 441 if (!printed_version++) 442 printk(version); 443 #endif 444 445 /* setup various bits in PCI command register */ 446 ret = pci_enable_device(pci_dev); 447 if(ret) return ret; 448 449 i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); 450 if(i){ 451 printk(KERN_ERR "sis900.c: architecture does not support " 452 "32bit PCI busmaster DMA\n"); 453 return i; 454 } 455 456 pci_set_master(pci_dev); 457 458 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 459 if (!net_dev) 460 return -ENOMEM; 461 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 462 463 /* We do a request_region() to register /proc/ioports info. */ 464 ret = pci_request_regions(pci_dev, "sis900"); 465 if (ret) 466 goto err_out; 467 468 /* IO region. */ 469 ioaddr = pci_iomap(pci_dev, 0, 0); 470 if (!ioaddr) { 471 ret = -ENOMEM; 472 goto err_out_cleardev; 473 } 474 475 sis_priv = netdev_priv(net_dev); 476 sis_priv->ioaddr = ioaddr; 477 sis_priv->pci_dev = pci_dev; 478 spin_lock_init(&sis_priv->lock); 479 480 sis_priv->eeprom_size = 24; 481 482 pci_set_drvdata(pci_dev, net_dev); 483 484 ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE, 485 &ring_dma, GFP_KERNEL); 486 if (!ring_space) { 487 ret = -ENOMEM; 488 goto err_out_unmap; 489 } 490 sis_priv->tx_ring = ring_space; 491 sis_priv->tx_ring_dma = ring_dma; 492 493 ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE, 494 &ring_dma, GFP_KERNEL); 495 if (!ring_space) { 496 ret = -ENOMEM; 497 goto err_unmap_tx; 498 } 499 sis_priv->rx_ring = ring_space; 500 sis_priv->rx_ring_dma = ring_dma; 501 502 /* The SiS900-specific entries in the device structure. */ 503 net_dev->netdev_ops = &sis900_netdev_ops; 504 net_dev->watchdog_timeo = TX_TIMEOUT; 505 net_dev->ethtool_ops = &sis900_ethtool_ops; 506 507 if (sis900_debug > 0) 508 sis_priv->msg_enable = sis900_debug; 509 else 510 sis_priv->msg_enable = SIS900_DEF_MSG; 511 512 sis_priv->mii_info.dev = net_dev; 513 sis_priv->mii_info.mdio_read = mdio_read; 514 sis_priv->mii_info.mdio_write = mdio_write; 515 sis_priv->mii_info.phy_id_mask = 0x1f; 516 sis_priv->mii_info.reg_num_mask = 0x1f; 517 518 /* Get Mac address according to the chip revision */ 519 sis_priv->chipset_rev = pci_dev->revision; 520 if(netif_msg_probe(sis_priv)) 521 printk(KERN_DEBUG "%s: detected revision %2.2x, " 522 "trying to get MAC address...\n", 523 dev_name, sis_priv->chipset_rev); 524 525 ret = 0; 526 if (sis_priv->chipset_rev == SIS630E_900_REV) 527 ret = sis630e_get_mac_addr(pci_dev, net_dev); 528 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 529 ret = sis635_get_mac_addr(pci_dev, net_dev); 530 else if (sis_priv->chipset_rev == SIS96x_900_REV) 531 ret = sis96x_get_mac_addr(pci_dev, net_dev); 532 else 533 ret = sis900_get_mac_addr(pci_dev, net_dev); 534 535 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 536 eth_hw_addr_random(net_dev); 537 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 538 "using random generated one\n", dev_name); 539 } 540 541 /* 630ET : set the mii access mode as software-mode */ 542 if (sis_priv->chipset_rev == SIS630ET_900_REV) 543 sw32(cr, ACCESSMODE | sr32(cr)); 544 545 /* probe for mii transceiver */ 546 if (sis900_mii_probe(net_dev) == 0) { 547 printk(KERN_WARNING "%s: Error probing MII device.\n", 548 dev_name); 549 ret = -ENODEV; 550 goto err_unmap_rx; 551 } 552 553 /* save our host bridge revision */ 554 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 555 if (dev) { 556 sis_priv->host_bridge_rev = dev->revision; 557 pci_dev_put(dev); 558 } 559 560 ret = register_netdev(net_dev); 561 if (ret) 562 goto err_unmap_rx; 563 564 /* print some information about our NIC */ 565 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 566 net_dev->name, card_name, ioaddr, pci_dev->irq, 567 net_dev->dev_addr); 568 569 /* Detect Wake on Lan support */ 570 ret = (sr32(CFGPMC) & PMESP) >> 27; 571 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 572 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 573 574 return 0; 575 576 err_unmap_rx: 577 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 578 sis_priv->rx_ring_dma); 579 err_unmap_tx: 580 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 581 sis_priv->tx_ring_dma); 582 err_out_unmap: 583 pci_iounmap(pci_dev, ioaddr); 584 err_out_cleardev: 585 pci_release_regions(pci_dev); 586 err_out: 587 free_netdev(net_dev); 588 return ret; 589 } 590 591 /** 592 * sis900_mii_probe - Probe MII PHY for sis900 593 * @net_dev: the net device to probe for 594 * 595 * Search for total of 32 possible mii phy addresses. 596 * Identify and set current phy if found one, 597 * return error if it failed to found. 598 */ 599 600 static int sis900_mii_probe(struct net_device *net_dev) 601 { 602 struct sis900_private *sis_priv = netdev_priv(net_dev); 603 const char *dev_name = pci_name(sis_priv->pci_dev); 604 u16 poll_bit = MII_STAT_LINK, status = 0; 605 unsigned long timeout = jiffies + 5 * HZ; 606 int phy_addr; 607 608 sis_priv->mii = NULL; 609 610 /* search for total of 32 possible mii phy addresses */ 611 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 612 struct mii_phy * mii_phy = NULL; 613 u16 mii_status; 614 int i; 615 616 mii_phy = NULL; 617 for(i = 0; i < 2; i++) 618 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 619 620 if (mii_status == 0xffff || mii_status == 0x0000) { 621 if (netif_msg_probe(sis_priv)) 622 printk(KERN_DEBUG "%s: MII at address %d" 623 " not accessible\n", 624 dev_name, phy_addr); 625 continue; 626 } 627 628 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 629 mii_phy = sis_priv->first_mii; 630 while (mii_phy) { 631 struct mii_phy *phy; 632 phy = mii_phy; 633 mii_phy = mii_phy->next; 634 kfree(phy); 635 } 636 return 0; 637 } 638 639 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 640 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 641 mii_phy->phy_addr = phy_addr; 642 mii_phy->status = mii_status; 643 mii_phy->next = sis_priv->mii; 644 sis_priv->mii = mii_phy; 645 sis_priv->first_mii = mii_phy; 646 647 for (i = 0; mii_chip_table[i].phy_id1; i++) 648 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 649 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 650 mii_phy->phy_types = mii_chip_table[i].phy_types; 651 if (mii_chip_table[i].phy_types == MIX) 652 mii_phy->phy_types = 653 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 654 printk(KERN_INFO "%s: %s transceiver found " 655 "at address %d.\n", 656 dev_name, 657 mii_chip_table[i].name, 658 phy_addr); 659 break; 660 } 661 662 if( !mii_chip_table[i].phy_id1 ) { 663 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 664 dev_name, phy_addr); 665 mii_phy->phy_types = UNKNOWN; 666 } 667 } 668 669 if (sis_priv->mii == NULL) { 670 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 671 return 0; 672 } 673 674 /* select default PHY for mac */ 675 sis_priv->mii = NULL; 676 sis900_default_phy( net_dev ); 677 678 /* Reset phy if default phy is internal sis900 */ 679 if ((sis_priv->mii->phy_id0 == 0x001D) && 680 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 681 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 682 683 /* workaround for ICS1893 PHY */ 684 if ((sis_priv->mii->phy_id0 == 0x0015) && 685 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 686 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 687 688 if(status & MII_STAT_LINK){ 689 while (poll_bit) { 690 yield(); 691 692 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 693 if (time_after_eq(jiffies, timeout)) { 694 printk(KERN_WARNING "%s: reset phy and link down now\n", 695 dev_name); 696 return -ETIME; 697 } 698 } 699 } 700 701 if (sis_priv->chipset_rev == SIS630E_900_REV) { 702 /* SiS 630E has some bugs on default value of PHY registers */ 703 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 704 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 705 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 706 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 707 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 708 } 709 710 if (sis_priv->mii->status & MII_STAT_LINK) 711 netif_carrier_on(net_dev); 712 else 713 netif_carrier_off(net_dev); 714 715 return 1; 716 } 717 718 /** 719 * sis900_default_phy - Select default PHY for sis900 mac. 720 * @net_dev: the net device to probe for 721 * 722 * Select first detected PHY with link as default. 723 * If no one is link on, select PHY whose types is HOME as default. 724 * If HOME doesn't exist, select LAN. 725 */ 726 727 static u16 sis900_default_phy(struct net_device * net_dev) 728 { 729 struct sis900_private *sis_priv = netdev_priv(net_dev); 730 struct mii_phy *phy = NULL, *phy_home = NULL, 731 *default_phy = NULL, *phy_lan = NULL; 732 u16 status; 733 734 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 735 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 736 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 737 738 /* Link ON & Not select default PHY & not ghost PHY */ 739 if ((status & MII_STAT_LINK) && !default_phy && 740 (phy->phy_types != UNKNOWN)) { 741 default_phy = phy; 742 } else { 743 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 744 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 745 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 746 if (phy->phy_types == HOME) 747 phy_home = phy; 748 else if(phy->phy_types == LAN) 749 phy_lan = phy; 750 } 751 } 752 753 if (!default_phy && phy_home) 754 default_phy = phy_home; 755 else if (!default_phy && phy_lan) 756 default_phy = phy_lan; 757 else if (!default_phy) 758 default_phy = sis_priv->first_mii; 759 760 if (sis_priv->mii != default_phy) { 761 sis_priv->mii = default_phy; 762 sis_priv->cur_phy = default_phy->phy_addr; 763 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 764 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 765 } 766 767 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 768 769 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 770 status &= (~MII_CNTL_ISOLATE); 771 772 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 773 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 774 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 775 776 return status; 777 } 778 779 780 /** 781 * sis900_set_capability - set the media capability of network adapter. 782 * @net_dev : the net device to probe for 783 * @phy : default PHY 784 * 785 * Set the media capability of network adapter according to 786 * mii status register. It's necessary before auto-negotiate. 787 */ 788 789 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 790 { 791 u16 cap; 792 793 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 794 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 795 796 cap = MII_NWAY_CSMA_CD | 797 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 798 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 799 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 800 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 801 802 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 803 } 804 805 806 /* Delay between EEPROM clock transitions. */ 807 #define eeprom_delay() sr32(mear) 808 809 /** 810 * read_eeprom - Read Serial EEPROM 811 * @ioaddr: base i/o address 812 * @location: the EEPROM location to read 813 * 814 * Read Serial EEPROM through EEPROM Access Register. 815 * Note that location is in word (16 bits) unit 816 */ 817 818 static u16 read_eeprom(void __iomem *ioaddr, int location) 819 { 820 u32 read_cmd = location | EEread; 821 int i; 822 u16 retval = 0; 823 824 sw32(mear, 0); 825 eeprom_delay(); 826 sw32(mear, EECS); 827 eeprom_delay(); 828 829 /* Shift the read command (9) bits out. */ 830 for (i = 8; i >= 0; i--) { 831 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 832 833 sw32(mear, dataval); 834 eeprom_delay(); 835 sw32(mear, dataval | EECLK); 836 eeprom_delay(); 837 } 838 sw32(mear, EECS); 839 eeprom_delay(); 840 841 /* read the 16-bits data in */ 842 for (i = 16; i > 0; i--) { 843 sw32(mear, EECS); 844 eeprom_delay(); 845 sw32(mear, EECS | EECLK); 846 eeprom_delay(); 847 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 848 eeprom_delay(); 849 } 850 851 /* Terminate the EEPROM access. */ 852 sw32(mear, 0); 853 eeprom_delay(); 854 855 return retval; 856 } 857 858 /* Read and write the MII management registers using software-generated 859 serial MDIO protocol. Note that the command bits and data bits are 860 send out separately */ 861 #define mdio_delay() sr32(mear) 862 863 static void mdio_idle(struct sis900_private *sp) 864 { 865 void __iomem *ioaddr = sp->ioaddr; 866 867 sw32(mear, MDIO | MDDIR); 868 mdio_delay(); 869 sw32(mear, MDIO | MDDIR | MDC); 870 } 871 872 /* Synchronize the MII management interface by shifting 32 one bits out. */ 873 static void mdio_reset(struct sis900_private *sp) 874 { 875 void __iomem *ioaddr = sp->ioaddr; 876 int i; 877 878 for (i = 31; i >= 0; i--) { 879 sw32(mear, MDDIR | MDIO); 880 mdio_delay(); 881 sw32(mear, MDDIR | MDIO | MDC); 882 mdio_delay(); 883 } 884 } 885 886 /** 887 * mdio_read - read MII PHY register 888 * @net_dev: the net device to read 889 * @phy_id: the phy address to read 890 * @location: the phy register id to read 891 * 892 * Read MII registers through MDIO and MDC 893 * using MDIO management frame structure and protocol(defined by ISO/IEC). 894 * Please see SiS7014 or ICS spec 895 */ 896 897 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 898 { 899 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 900 struct sis900_private *sp = netdev_priv(net_dev); 901 void __iomem *ioaddr = sp->ioaddr; 902 u16 retval = 0; 903 int i; 904 905 mdio_reset(sp); 906 mdio_idle(sp); 907 908 for (i = 15; i >= 0; i--) { 909 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 910 911 sw32(mear, dataval); 912 mdio_delay(); 913 sw32(mear, dataval | MDC); 914 mdio_delay(); 915 } 916 917 /* Read the 16 data bits. */ 918 for (i = 16; i > 0; i--) { 919 sw32(mear, 0); 920 mdio_delay(); 921 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 922 sw32(mear, MDC); 923 mdio_delay(); 924 } 925 sw32(mear, 0x00); 926 927 return retval; 928 } 929 930 /** 931 * mdio_write - write MII PHY register 932 * @net_dev: the net device to write 933 * @phy_id: the phy address to write 934 * @location: the phy register id to write 935 * @value: the register value to write with 936 * 937 * Write MII registers with @value through MDIO and MDC 938 * using MDIO management frame structure and protocol(defined by ISO/IEC) 939 * please see SiS7014 or ICS spec 940 */ 941 942 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 943 int value) 944 { 945 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 946 struct sis900_private *sp = netdev_priv(net_dev); 947 void __iomem *ioaddr = sp->ioaddr; 948 int i; 949 950 mdio_reset(sp); 951 mdio_idle(sp); 952 953 /* Shift the command bits out. */ 954 for (i = 15; i >= 0; i--) { 955 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 956 957 sw8(mear, dataval); 958 mdio_delay(); 959 sw8(mear, dataval | MDC); 960 mdio_delay(); 961 } 962 mdio_delay(); 963 964 /* Shift the value bits out. */ 965 for (i = 15; i >= 0; i--) { 966 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 967 968 sw32(mear, dataval); 969 mdio_delay(); 970 sw32(mear, dataval | MDC); 971 mdio_delay(); 972 } 973 mdio_delay(); 974 975 /* Clear out extra bits. */ 976 for (i = 2; i > 0; i--) { 977 sw8(mear, 0); 978 mdio_delay(); 979 sw8(mear, MDC); 980 mdio_delay(); 981 } 982 sw32(mear, 0x00); 983 } 984 985 986 /** 987 * sis900_reset_phy - reset sis900 mii phy. 988 * @net_dev: the net device to write 989 * @phy_addr: default phy address 990 * 991 * Some specific phy can't work properly without reset. 992 * This function will be called during initialization and 993 * link status change from ON to DOWN. 994 */ 995 996 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 997 { 998 int i; 999 u16 status; 1000 1001 for (i = 0; i < 2; i++) 1002 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1003 1004 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1005 1006 return status; 1007 } 1008 1009 #ifdef CONFIG_NET_POLL_CONTROLLER 1010 /* 1011 * Polling 'interrupt' - used by things like netconsole to send skbs 1012 * without having to re-enable interrupts. It's not called while 1013 * the interrupt routine is executing. 1014 */ 1015 static void sis900_poll(struct net_device *dev) 1016 { 1017 struct sis900_private *sp = netdev_priv(dev); 1018 const int irq = sp->pci_dev->irq; 1019 1020 disable_irq(irq); 1021 sis900_interrupt(irq, dev); 1022 enable_irq(irq); 1023 } 1024 #endif 1025 1026 /** 1027 * sis900_open - open sis900 device 1028 * @net_dev: the net device to open 1029 * 1030 * Do some initialization and start net interface. 1031 * enable interrupts and set sis900 timer. 1032 */ 1033 1034 static int 1035 sis900_open(struct net_device *net_dev) 1036 { 1037 struct sis900_private *sis_priv = netdev_priv(net_dev); 1038 void __iomem *ioaddr = sis_priv->ioaddr; 1039 int ret; 1040 1041 /* Soft reset the chip. */ 1042 sis900_reset(net_dev); 1043 1044 /* Equalizer workaround Rule */ 1045 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1046 1047 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1048 net_dev->name, net_dev); 1049 if (ret) 1050 return ret; 1051 1052 sis900_init_rxfilter(net_dev); 1053 1054 sis900_init_tx_ring(net_dev); 1055 sis900_init_rx_ring(net_dev); 1056 1057 set_rx_mode(net_dev); 1058 1059 netif_start_queue(net_dev); 1060 1061 /* Workaround for EDB */ 1062 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1063 1064 /* Enable all known interrupts by setting the interrupt mask. */ 1065 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1066 sw32(cr, RxENA | sr32(cr)); 1067 sw32(ier, IE); 1068 1069 sis900_check_mode(net_dev, sis_priv->mii); 1070 1071 /* Set the timer to switch to check for link beat and perhaps switch 1072 to an alternate media type. */ 1073 timer_setup(&sis_priv->timer, sis900_timer, 0); 1074 sis_priv->timer.expires = jiffies + HZ; 1075 add_timer(&sis_priv->timer); 1076 1077 return 0; 1078 } 1079 1080 /** 1081 * sis900_init_rxfilter - Initialize the Rx filter 1082 * @net_dev: the net device to initialize for 1083 * 1084 * Set receive filter address to our MAC address 1085 * and enable packet filtering. 1086 */ 1087 1088 static void 1089 sis900_init_rxfilter (struct net_device * net_dev) 1090 { 1091 struct sis900_private *sis_priv = netdev_priv(net_dev); 1092 void __iomem *ioaddr = sis_priv->ioaddr; 1093 u32 rfcrSave; 1094 u32 i; 1095 1096 rfcrSave = sr32(rfcr); 1097 1098 /* disable packet filtering before setting filter */ 1099 sw32(rfcr, rfcrSave & ~RFEN); 1100 1101 /* load MAC addr to filter data register */ 1102 for (i = 0 ; i < 3 ; i++) { 1103 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1104 1105 sw32(rfcr, i << RFADDR_shift); 1106 sw32(rfdr, w); 1107 1108 if (netif_msg_hw(sis_priv)) { 1109 printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n", 1110 net_dev->name, i, sr32(rfdr)); 1111 } 1112 } 1113 1114 /* enable packet filtering */ 1115 sw32(rfcr, rfcrSave | RFEN); 1116 } 1117 1118 /** 1119 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1120 * @net_dev: the net device to initialize for 1121 * 1122 * Initialize the Tx descriptor ring, 1123 */ 1124 1125 static void 1126 sis900_init_tx_ring(struct net_device *net_dev) 1127 { 1128 struct sis900_private *sis_priv = netdev_priv(net_dev); 1129 void __iomem *ioaddr = sis_priv->ioaddr; 1130 int i; 1131 1132 sis_priv->tx_full = 0; 1133 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1134 1135 for (i = 0; i < NUM_TX_DESC; i++) { 1136 sis_priv->tx_skbuff[i] = NULL; 1137 1138 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1139 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1140 sis_priv->tx_ring[i].cmdsts = 0; 1141 sis_priv->tx_ring[i].bufptr = 0; 1142 } 1143 1144 /* load Transmit Descriptor Register */ 1145 sw32(txdp, sis_priv->tx_ring_dma); 1146 if (netif_msg_hw(sis_priv)) 1147 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1148 net_dev->name, sr32(txdp)); 1149 } 1150 1151 /** 1152 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1153 * @net_dev: the net device to initialize for 1154 * 1155 * Initialize the Rx descriptor ring, 1156 * and pre-allocate receive buffers (socket buffer) 1157 */ 1158 1159 static void 1160 sis900_init_rx_ring(struct net_device *net_dev) 1161 { 1162 struct sis900_private *sis_priv = netdev_priv(net_dev); 1163 void __iomem *ioaddr = sis_priv->ioaddr; 1164 int i; 1165 1166 sis_priv->cur_rx = 0; 1167 sis_priv->dirty_rx = 0; 1168 1169 /* init RX descriptor */ 1170 for (i = 0; i < NUM_RX_DESC; i++) { 1171 sis_priv->rx_skbuff[i] = NULL; 1172 1173 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1174 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1175 sis_priv->rx_ring[i].cmdsts = 0; 1176 sis_priv->rx_ring[i].bufptr = 0; 1177 } 1178 1179 /* allocate sock buffers */ 1180 for (i = 0; i < NUM_RX_DESC; i++) { 1181 struct sk_buff *skb; 1182 1183 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1184 /* not enough memory for skbuff, this makes a "hole" 1185 on the buffer ring, it is not clear how the 1186 hardware will react to this kind of degenerated 1187 buffer */ 1188 break; 1189 } 1190 sis_priv->rx_skbuff[i] = skb; 1191 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1192 sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1193 skb->data, 1194 RX_BUF_SIZE, 1195 DMA_FROM_DEVICE); 1196 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1197 sis_priv->rx_ring[i].bufptr))) { 1198 dev_kfree_skb(skb); 1199 sis_priv->rx_skbuff[i] = NULL; 1200 break; 1201 } 1202 } 1203 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1204 1205 /* load Receive Descriptor Register */ 1206 sw32(rxdp, sis_priv->rx_ring_dma); 1207 if (netif_msg_hw(sis_priv)) 1208 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1209 net_dev->name, sr32(rxdp)); 1210 } 1211 1212 /** 1213 * sis630_set_eq - set phy equalizer value for 630 LAN 1214 * @net_dev: the net device to set equalizer value 1215 * @revision: 630 LAN revision number 1216 * 1217 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1218 * PHY register 14h(Test) 1219 * Bit 14: 0 -- Automatically detect (default) 1220 * 1 -- Manually set Equalizer filter 1221 * Bit 13: 0 -- (Default) 1222 * 1 -- Speed up convergence of equalizer setting 1223 * Bit 9 : 0 -- (Default) 1224 * 1 -- Disable Baseline Wander 1225 * Bit 3~7 -- Equalizer filter setting 1226 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1227 * Then calculate equalizer value 1228 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1229 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1230 * Calculate Equalizer value: 1231 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1232 * When the equalizer is stable, this value is not a fixed value. It will be within 1233 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1234 * 0 <= max <= 4 --> set equalizer to max 1235 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1236 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1237 */ 1238 1239 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1240 { 1241 struct sis900_private *sis_priv = netdev_priv(net_dev); 1242 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1243 int i, maxcount=10; 1244 1245 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1246 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1247 return; 1248 1249 if (netif_carrier_ok(net_dev)) { 1250 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1251 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1252 (0x2200 | reg14h) & 0xBFFF); 1253 for (i=0; i < maxcount; i++) { 1254 eq_value = (0x00F8 & mdio_read(net_dev, 1255 sis_priv->cur_phy, MII_RESV)) >> 3; 1256 if (i == 0) 1257 max_value=min_value=eq_value; 1258 max_value = (eq_value > max_value) ? 1259 eq_value : max_value; 1260 min_value = (eq_value < min_value) ? 1261 eq_value : min_value; 1262 } 1263 /* 630E rule to determine the equalizer value */ 1264 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1265 revision == SIS630ET_900_REV) { 1266 if (max_value < 5) 1267 eq_value = max_value; 1268 else if (max_value >= 5 && max_value < 15) 1269 eq_value = (max_value == min_value) ? 1270 max_value+2 : max_value+1; 1271 else if (max_value >= 15) 1272 eq_value=(max_value == min_value) ? 1273 max_value+6 : max_value+5; 1274 } 1275 /* 630B0&B1 rule to determine the equalizer value */ 1276 if (revision == SIS630A_900_REV && 1277 (sis_priv->host_bridge_rev == SIS630B0 || 1278 sis_priv->host_bridge_rev == SIS630B1)) { 1279 if (max_value == 0) 1280 eq_value = 3; 1281 else 1282 eq_value = (max_value + min_value + 1)/2; 1283 } 1284 /* write equalizer value and setting */ 1285 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1286 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1287 reg14h = (reg14h | 0x6000) & 0xFDFF; 1288 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1289 } else { 1290 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1291 if (revision == SIS630A_900_REV && 1292 (sis_priv->host_bridge_rev == SIS630B0 || 1293 sis_priv->host_bridge_rev == SIS630B1)) 1294 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1295 (reg14h | 0x2200) & 0xBFFF); 1296 else 1297 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1298 (reg14h | 0x2000) & 0xBFFF); 1299 } 1300 } 1301 1302 /** 1303 * sis900_timer - sis900 timer routine 1304 * @t: timer list containing a pointer to sis900 net device 1305 * 1306 * On each timer ticks we check two things, 1307 * link status (ON/OFF) and link mode (10/100/Full/Half) 1308 */ 1309 1310 static void sis900_timer(struct timer_list *t) 1311 { 1312 struct sis900_private *sis_priv = from_timer(sis_priv, t, timer); 1313 struct net_device *net_dev = sis_priv->mii_info.dev; 1314 struct mii_phy *mii_phy = sis_priv->mii; 1315 static const int next_tick = 5*HZ; 1316 int speed = 0, duplex = 0; 1317 u16 status; 1318 1319 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1320 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1321 1322 /* Link OFF -> ON */ 1323 if (!netif_carrier_ok(net_dev)) { 1324 LookForLink: 1325 /* Search for new PHY */ 1326 status = sis900_default_phy(net_dev); 1327 mii_phy = sis_priv->mii; 1328 1329 if (status & MII_STAT_LINK) { 1330 WARN_ON(!(status & MII_STAT_AUTO_DONE)); 1331 1332 sis900_read_mode(net_dev, &speed, &duplex); 1333 if (duplex) { 1334 sis900_set_mode(sis_priv, speed, duplex); 1335 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1336 netif_carrier_on(net_dev); 1337 } 1338 } 1339 } else { 1340 /* Link ON -> OFF */ 1341 if (!(status & MII_STAT_LINK)){ 1342 netif_carrier_off(net_dev); 1343 if(netif_msg_link(sis_priv)) 1344 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1345 1346 /* Change mode issue */ 1347 if ((mii_phy->phy_id0 == 0x001D) && 1348 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1349 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1350 1351 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1352 1353 goto LookForLink; 1354 } 1355 } 1356 1357 sis_priv->timer.expires = jiffies + next_tick; 1358 add_timer(&sis_priv->timer); 1359 } 1360 1361 /** 1362 * sis900_check_mode - check the media mode for sis900 1363 * @net_dev: the net device to be checked 1364 * @mii_phy: the mii phy 1365 * 1366 * Older driver gets the media mode from mii status output 1367 * register. Now we set our media capability and auto-negotiate 1368 * to get the upper bound of speed and duplex between two ends. 1369 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1370 * and autong_complete should be set to 1. 1371 */ 1372 1373 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1374 { 1375 struct sis900_private *sis_priv = netdev_priv(net_dev); 1376 void __iomem *ioaddr = sis_priv->ioaddr; 1377 int speed, duplex; 1378 1379 if (mii_phy->phy_types == LAN) { 1380 sw32(cfg, ~EXD & sr32(cfg)); 1381 sis900_set_capability(net_dev , mii_phy); 1382 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1383 } else { 1384 sw32(cfg, EXD | sr32(cfg)); 1385 speed = HW_SPEED_HOME; 1386 duplex = FDX_CAPABLE_HALF_SELECTED; 1387 sis900_set_mode(sis_priv, speed, duplex); 1388 sis_priv->autong_complete = 1; 1389 } 1390 } 1391 1392 /** 1393 * sis900_set_mode - Set the media mode of mac register. 1394 * @sp: the device private data 1395 * @speed : the transmit speed to be determined 1396 * @duplex: the duplex mode to be determined 1397 * 1398 * Set the media mode of mac register txcfg/rxcfg according to 1399 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1400 * bus is used instead of PCI bus. When this bit is set 1, the 1401 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1402 * double words. 1403 */ 1404 1405 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1406 { 1407 void __iomem *ioaddr = sp->ioaddr; 1408 u32 tx_flags = 0, rx_flags = 0; 1409 1410 if (sr32( cfg) & EDB_MASTER_EN) { 1411 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1412 (TX_FILL_THRESH << TxFILLT_shift); 1413 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1414 } else { 1415 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1416 (TX_FILL_THRESH << TxFILLT_shift); 1417 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1418 } 1419 1420 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1421 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1422 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1423 } else { 1424 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1425 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1426 } 1427 1428 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1429 tx_flags |= (TxCSI | TxHBI); 1430 rx_flags |= RxATX; 1431 } 1432 1433 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1434 /* Can accept Jumbo packet */ 1435 rx_flags |= RxAJAB; 1436 #endif 1437 1438 sw32(txcfg, tx_flags); 1439 sw32(rxcfg, rx_flags); 1440 } 1441 1442 /** 1443 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1444 * @net_dev: the net device to read mode for 1445 * @phy_addr: mii phy address 1446 * 1447 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1448 * autong_complete should be set to 0 when starting auto-negotiation. 1449 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1450 * sis900_timer will wait for link on again if autong_complete = 0. 1451 */ 1452 1453 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1454 { 1455 struct sis900_private *sis_priv = netdev_priv(net_dev); 1456 int i = 0; 1457 u32 status; 1458 1459 for (i = 0; i < 2; i++) 1460 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1461 1462 if (!(status & MII_STAT_LINK)){ 1463 if(netif_msg_link(sis_priv)) 1464 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1465 sis_priv->autong_complete = 1; 1466 netif_carrier_off(net_dev); 1467 return; 1468 } 1469 1470 /* (Re)start AutoNegotiate */ 1471 mdio_write(net_dev, phy_addr, MII_CONTROL, 1472 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1473 sis_priv->autong_complete = 0; 1474 } 1475 1476 1477 /** 1478 * sis900_read_mode - read media mode for sis900 internal phy 1479 * @net_dev: the net device to read mode for 1480 * @speed : the transmit speed to be determined 1481 * @duplex : the duplex mode to be determined 1482 * 1483 * The capability of remote end will be put in mii register autorec 1484 * after auto-negotiation. Use AND operation to get the upper bound 1485 * of speed and duplex between two ends. 1486 */ 1487 1488 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1489 { 1490 struct sis900_private *sis_priv = netdev_priv(net_dev); 1491 struct mii_phy *phy = sis_priv->mii; 1492 int phy_addr = sis_priv->cur_phy; 1493 u32 status; 1494 u16 autoadv, autorec; 1495 int i; 1496 1497 for (i = 0; i < 2; i++) 1498 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1499 1500 if (!(status & MII_STAT_LINK)) 1501 return; 1502 1503 /* AutoNegotiate completed */ 1504 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1505 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1506 status = autoadv & autorec; 1507 1508 *speed = HW_SPEED_10_MBPS; 1509 *duplex = FDX_CAPABLE_HALF_SELECTED; 1510 1511 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1512 *speed = HW_SPEED_100_MBPS; 1513 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1514 *duplex = FDX_CAPABLE_FULL_SELECTED; 1515 1516 sis_priv->autong_complete = 1; 1517 1518 /* Workaround for Realtek RTL8201 PHY issue */ 1519 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1520 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1521 *duplex = FDX_CAPABLE_FULL_SELECTED; 1522 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1523 *speed = HW_SPEED_100_MBPS; 1524 } 1525 1526 if(netif_msg_link(sis_priv)) 1527 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1528 net_dev->name, 1529 *speed == HW_SPEED_100_MBPS ? 1530 "100mbps" : "10mbps", 1531 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1532 "full" : "half"); 1533 } 1534 1535 /** 1536 * sis900_tx_timeout - sis900 transmit timeout routine 1537 * @net_dev: the net device to transmit 1538 * @txqueue: index of hanging queue 1539 * 1540 * print transmit timeout status 1541 * disable interrupts and do some tasks 1542 */ 1543 1544 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue) 1545 { 1546 struct sis900_private *sis_priv = netdev_priv(net_dev); 1547 void __iomem *ioaddr = sis_priv->ioaddr; 1548 unsigned long flags; 1549 int i; 1550 1551 if (netif_msg_tx_err(sis_priv)) { 1552 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1553 net_dev->name, sr32(cr), sr32(isr)); 1554 } 1555 1556 /* Disable interrupts by clearing the interrupt mask. */ 1557 sw32(imr, 0x0000); 1558 1559 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1560 spin_lock_irqsave(&sis_priv->lock, flags); 1561 1562 /* discard unsent packets */ 1563 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1564 for (i = 0; i < NUM_TX_DESC; i++) { 1565 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1566 1567 if (skb) { 1568 dma_unmap_single(&sis_priv->pci_dev->dev, 1569 sis_priv->tx_ring[i].bufptr, 1570 skb->len, DMA_TO_DEVICE); 1571 dev_kfree_skb_irq(skb); 1572 sis_priv->tx_skbuff[i] = NULL; 1573 sis_priv->tx_ring[i].cmdsts = 0; 1574 sis_priv->tx_ring[i].bufptr = 0; 1575 net_dev->stats.tx_dropped++; 1576 } 1577 } 1578 sis_priv->tx_full = 0; 1579 netif_wake_queue(net_dev); 1580 1581 spin_unlock_irqrestore(&sis_priv->lock, flags); 1582 1583 netif_trans_update(net_dev); /* prevent tx timeout */ 1584 1585 /* load Transmit Descriptor Register */ 1586 sw32(txdp, sis_priv->tx_ring_dma); 1587 1588 /* Enable all known interrupts by setting the interrupt mask. */ 1589 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1590 } 1591 1592 /** 1593 * sis900_start_xmit - sis900 start transmit routine 1594 * @skb: socket buffer pointer to put the data being transmitted 1595 * @net_dev: the net device to transmit with 1596 * 1597 * Set the transmit buffer descriptor, 1598 * and write TxENA to enable transmit state machine. 1599 * tell upper layer if the buffer is full 1600 */ 1601 1602 static netdev_tx_t 1603 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1604 { 1605 struct sis900_private *sis_priv = netdev_priv(net_dev); 1606 void __iomem *ioaddr = sis_priv->ioaddr; 1607 unsigned int entry; 1608 unsigned long flags; 1609 unsigned int index_cur_tx, index_dirty_tx; 1610 unsigned int count_dirty_tx; 1611 1612 spin_lock_irqsave(&sis_priv->lock, flags); 1613 1614 /* Calculate the next Tx descriptor entry. */ 1615 entry = sis_priv->cur_tx % NUM_TX_DESC; 1616 sis_priv->tx_skbuff[entry] = skb; 1617 1618 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1619 sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1620 skb->data, skb->len, 1621 DMA_TO_DEVICE); 1622 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1623 sis_priv->tx_ring[entry].bufptr))) { 1624 dev_kfree_skb_any(skb); 1625 sis_priv->tx_skbuff[entry] = NULL; 1626 net_dev->stats.tx_dropped++; 1627 spin_unlock_irqrestore(&sis_priv->lock, flags); 1628 return NETDEV_TX_OK; 1629 } 1630 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); 1631 sw32(cr, TxENA | sr32(cr)); 1632 1633 sis_priv->cur_tx ++; 1634 index_cur_tx = sis_priv->cur_tx; 1635 index_dirty_tx = sis_priv->dirty_tx; 1636 1637 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1638 count_dirty_tx ++; 1639 1640 if (index_cur_tx == index_dirty_tx) { 1641 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1642 sis_priv->tx_full = 1; 1643 netif_stop_queue(net_dev); 1644 } else if (count_dirty_tx < NUM_TX_DESC) { 1645 /* Typical path, tell upper layer that more transmission is possible */ 1646 netif_start_queue(net_dev); 1647 } else { 1648 /* buffer full, tell upper layer no more transmission */ 1649 sis_priv->tx_full = 1; 1650 netif_stop_queue(net_dev); 1651 } 1652 1653 spin_unlock_irqrestore(&sis_priv->lock, flags); 1654 1655 if (netif_msg_tx_queued(sis_priv)) 1656 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1657 "to slot %d.\n", 1658 net_dev->name, skb->data, (int)skb->len, entry); 1659 1660 return NETDEV_TX_OK; 1661 } 1662 1663 /** 1664 * sis900_interrupt - sis900 interrupt handler 1665 * @irq: the irq number 1666 * @dev_instance: the client data object 1667 * 1668 * The interrupt handler does all of the Rx thread work, 1669 * and cleans up after the Tx thread 1670 */ 1671 1672 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1673 { 1674 struct net_device *net_dev = dev_instance; 1675 struct sis900_private *sis_priv = netdev_priv(net_dev); 1676 int boguscnt = max_interrupt_work; 1677 void __iomem *ioaddr = sis_priv->ioaddr; 1678 u32 status; 1679 unsigned int handled = 0; 1680 1681 spin_lock (&sis_priv->lock); 1682 1683 do { 1684 status = sr32(isr); 1685 1686 if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0) 1687 /* nothing interesting happened */ 1688 break; 1689 handled = 1; 1690 1691 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1692 if (status & (RxORN | RxERR | RxOK)) 1693 /* Rx interrupt */ 1694 sis900_rx(net_dev); 1695 1696 if (status & (TxURN | TxERR | TxDESC)) 1697 /* Tx interrupt */ 1698 sis900_finish_xmit(net_dev); 1699 1700 /* something strange happened !!! */ 1701 if (status & HIBERR) { 1702 if(netif_msg_intr(sis_priv)) 1703 printk(KERN_INFO "%s: Abnormal interrupt, " 1704 "status %#8.8x.\n", net_dev->name, status); 1705 break; 1706 } 1707 if (--boguscnt < 0) { 1708 if(netif_msg_intr(sis_priv)) 1709 printk(KERN_INFO "%s: Too much work at interrupt, " 1710 "interrupt status = %#8.8x.\n", 1711 net_dev->name, status); 1712 break; 1713 } 1714 } while (1); 1715 1716 if(netif_msg_intr(sis_priv)) 1717 printk(KERN_DEBUG "%s: exiting interrupt, " 1718 "interrupt status = %#8.8x\n", 1719 net_dev->name, sr32(isr)); 1720 1721 spin_unlock (&sis_priv->lock); 1722 return IRQ_RETVAL(handled); 1723 } 1724 1725 /** 1726 * sis900_rx - sis900 receive routine 1727 * @net_dev: the net device which receives data 1728 * 1729 * Process receive interrupt events, 1730 * put buffer to higher layer and refill buffer pool 1731 * Note: This function is called by interrupt handler, 1732 * don't do "too much" work here 1733 */ 1734 1735 static int sis900_rx(struct net_device *net_dev) 1736 { 1737 struct sis900_private *sis_priv = netdev_priv(net_dev); 1738 void __iomem *ioaddr = sis_priv->ioaddr; 1739 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1740 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1741 int rx_work_limit; 1742 1743 if (netif_msg_rx_status(sis_priv)) 1744 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1745 "status:0x%8.8x\n", 1746 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1747 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1748 1749 while (rx_status & OWN) { 1750 unsigned int rx_size; 1751 unsigned int data_size; 1752 1753 if (--rx_work_limit < 0) 1754 break; 1755 1756 data_size = rx_status & DSIZE; 1757 rx_size = data_size - CRC_SIZE; 1758 1759 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1760 /* ``TOOLONG'' flag means jumbo packet received. */ 1761 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1762 rx_status &= (~ ((unsigned int)TOOLONG)); 1763 #endif 1764 1765 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1766 /* corrupted packet received */ 1767 if (netif_msg_rx_err(sis_priv)) 1768 printk(KERN_DEBUG "%s: Corrupted packet " 1769 "received, buffer status = 0x%8.8x/%d.\n", 1770 net_dev->name, rx_status, data_size); 1771 net_dev->stats.rx_errors++; 1772 if (rx_status & OVERRUN) 1773 net_dev->stats.rx_over_errors++; 1774 if (rx_status & (TOOLONG|RUNT)) 1775 net_dev->stats.rx_length_errors++; 1776 if (rx_status & (RXISERR | FAERR)) 1777 net_dev->stats.rx_frame_errors++; 1778 if (rx_status & CRCERR) 1779 net_dev->stats.rx_crc_errors++; 1780 /* reset buffer descriptor state */ 1781 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1782 } else { 1783 struct sk_buff * skb; 1784 struct sk_buff * rx_skb; 1785 1786 dma_unmap_single(&sis_priv->pci_dev->dev, 1787 sis_priv->rx_ring[entry].bufptr, 1788 RX_BUF_SIZE, DMA_FROM_DEVICE); 1789 1790 /* refill the Rx buffer, what if there is not enough 1791 * memory for new socket buffer ?? */ 1792 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1793 /* 1794 * Not enough memory to refill the buffer 1795 * so we need to recycle the old one so 1796 * as to avoid creating a memory hole 1797 * in the rx ring 1798 */ 1799 skb = sis_priv->rx_skbuff[entry]; 1800 net_dev->stats.rx_dropped++; 1801 goto refill_rx_ring; 1802 } 1803 1804 /* This situation should never happen, but due to 1805 some unknown bugs, it is possible that 1806 we are working on NULL sk_buff :-( */ 1807 if (sis_priv->rx_skbuff[entry] == NULL) { 1808 if (netif_msg_rx_err(sis_priv)) 1809 printk(KERN_WARNING "%s: NULL pointer " 1810 "encountered in Rx ring\n" 1811 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1812 net_dev->name, sis_priv->cur_rx, 1813 sis_priv->dirty_rx); 1814 dev_kfree_skb(skb); 1815 break; 1816 } 1817 1818 /* give the socket buffer to upper layers */ 1819 rx_skb = sis_priv->rx_skbuff[entry]; 1820 skb_put(rx_skb, rx_size); 1821 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1822 netif_rx(rx_skb); 1823 1824 /* some network statistics */ 1825 if ((rx_status & BCAST) == MCAST) 1826 net_dev->stats.multicast++; 1827 net_dev->stats.rx_bytes += rx_size; 1828 net_dev->stats.rx_packets++; 1829 sis_priv->dirty_rx++; 1830 refill_rx_ring: 1831 sis_priv->rx_skbuff[entry] = skb; 1832 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1833 sis_priv->rx_ring[entry].bufptr = 1834 dma_map_single(&sis_priv->pci_dev->dev, 1835 skb->data, RX_BUF_SIZE, 1836 DMA_FROM_DEVICE); 1837 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1838 sis_priv->rx_ring[entry].bufptr))) { 1839 dev_kfree_skb_irq(skb); 1840 sis_priv->rx_skbuff[entry] = NULL; 1841 break; 1842 } 1843 } 1844 sis_priv->cur_rx++; 1845 entry = sis_priv->cur_rx % NUM_RX_DESC; 1846 rx_status = sis_priv->rx_ring[entry].cmdsts; 1847 } // while 1848 1849 /* refill the Rx buffer, what if the rate of refilling is slower 1850 * than consuming ?? */ 1851 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1852 struct sk_buff *skb; 1853 1854 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1855 1856 if (sis_priv->rx_skbuff[entry] == NULL) { 1857 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); 1858 if (skb == NULL) { 1859 /* not enough memory for skbuff, this makes a 1860 * "hole" on the buffer ring, it is not clear 1861 * how the hardware will react to this kind 1862 * of degenerated buffer */ 1863 net_dev->stats.rx_dropped++; 1864 break; 1865 } 1866 sis_priv->rx_skbuff[entry] = skb; 1867 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1868 sis_priv->rx_ring[entry].bufptr = 1869 dma_map_single(&sis_priv->pci_dev->dev, 1870 skb->data, RX_BUF_SIZE, 1871 DMA_FROM_DEVICE); 1872 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1873 sis_priv->rx_ring[entry].bufptr))) { 1874 dev_kfree_skb_irq(skb); 1875 sis_priv->rx_skbuff[entry] = NULL; 1876 break; 1877 } 1878 } 1879 } 1880 /* re-enable the potentially idle receive state matchine */ 1881 sw32(cr , RxENA | sr32(cr)); 1882 1883 return 0; 1884 } 1885 1886 /** 1887 * sis900_finish_xmit - finish up transmission of packets 1888 * @net_dev: the net device to be transmitted on 1889 * 1890 * Check for error condition and free socket buffer etc 1891 * schedule for more transmission as needed 1892 * Note: This function is called by interrupt handler, 1893 * don't do "too much" work here 1894 */ 1895 1896 static void sis900_finish_xmit (struct net_device *net_dev) 1897 { 1898 struct sis900_private *sis_priv = netdev_priv(net_dev); 1899 1900 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1901 struct sk_buff *skb; 1902 unsigned int entry; 1903 u32 tx_status; 1904 1905 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1906 tx_status = sis_priv->tx_ring[entry].cmdsts; 1907 1908 if (tx_status & OWN) { 1909 /* The packet is not transmitted yet (owned by hardware) ! 1910 * Note: this is an almost impossible condition 1911 * on TxDESC interrupt ('descriptor interrupt') */ 1912 break; 1913 } 1914 1915 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1916 /* packet unsuccessfully transmitted */ 1917 if (netif_msg_tx_err(sis_priv)) 1918 printk(KERN_DEBUG "%s: Transmit " 1919 "error, Tx status %8.8x.\n", 1920 net_dev->name, tx_status); 1921 net_dev->stats.tx_errors++; 1922 if (tx_status & UNDERRUN) 1923 net_dev->stats.tx_fifo_errors++; 1924 if (tx_status & ABORT) 1925 net_dev->stats.tx_aborted_errors++; 1926 if (tx_status & NOCARRIER) 1927 net_dev->stats.tx_carrier_errors++; 1928 if (tx_status & OWCOLL) 1929 net_dev->stats.tx_window_errors++; 1930 } else { 1931 /* packet successfully transmitted */ 1932 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1933 net_dev->stats.tx_bytes += tx_status & DSIZE; 1934 net_dev->stats.tx_packets++; 1935 } 1936 /* Free the original skb. */ 1937 skb = sis_priv->tx_skbuff[entry]; 1938 dma_unmap_single(&sis_priv->pci_dev->dev, 1939 sis_priv->tx_ring[entry].bufptr, skb->len, 1940 DMA_TO_DEVICE); 1941 dev_consume_skb_irq(skb); 1942 sis_priv->tx_skbuff[entry] = NULL; 1943 sis_priv->tx_ring[entry].bufptr = 0; 1944 sis_priv->tx_ring[entry].cmdsts = 0; 1945 } 1946 1947 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1948 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1949 /* The ring is no longer full, clear tx_full and schedule 1950 * more transmission by netif_wake_queue(net_dev) */ 1951 sis_priv->tx_full = 0; 1952 netif_wake_queue (net_dev); 1953 } 1954 } 1955 1956 /** 1957 * sis900_close - close sis900 device 1958 * @net_dev: the net device to be closed 1959 * 1960 * Disable interrupts, stop the Tx and Rx Status Machine 1961 * free Tx and RX socket buffer 1962 */ 1963 1964 static int sis900_close(struct net_device *net_dev) 1965 { 1966 struct sis900_private *sis_priv = netdev_priv(net_dev); 1967 struct pci_dev *pdev = sis_priv->pci_dev; 1968 void __iomem *ioaddr = sis_priv->ioaddr; 1969 struct sk_buff *skb; 1970 int i; 1971 1972 netif_stop_queue(net_dev); 1973 1974 /* Disable interrupts by clearing the interrupt mask. */ 1975 sw32(imr, 0x0000); 1976 sw32(ier, 0x0000); 1977 1978 /* Stop the chip's Tx and Rx Status Machine */ 1979 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1980 1981 del_timer(&sis_priv->timer); 1982 1983 free_irq(pdev->irq, net_dev); 1984 1985 /* Free Tx and RX skbuff */ 1986 for (i = 0; i < NUM_RX_DESC; i++) { 1987 skb = sis_priv->rx_skbuff[i]; 1988 if (skb) { 1989 dma_unmap_single(&pdev->dev, 1990 sis_priv->rx_ring[i].bufptr, 1991 RX_BUF_SIZE, DMA_FROM_DEVICE); 1992 dev_kfree_skb(skb); 1993 sis_priv->rx_skbuff[i] = NULL; 1994 } 1995 } 1996 for (i = 0; i < NUM_TX_DESC; i++) { 1997 skb = sis_priv->tx_skbuff[i]; 1998 if (skb) { 1999 dma_unmap_single(&pdev->dev, 2000 sis_priv->tx_ring[i].bufptr, 2001 skb->len, DMA_TO_DEVICE); 2002 dev_kfree_skb(skb); 2003 sis_priv->tx_skbuff[i] = NULL; 2004 } 2005 } 2006 2007 /* Green! Put the chip in low-power mode. */ 2008 2009 return 0; 2010 } 2011 2012 /** 2013 * sis900_get_drvinfo - Return information about driver 2014 * @net_dev: the net device to probe 2015 * @info: container for info returned 2016 * 2017 * Process ethtool command such as "ehtool -i" to show information 2018 */ 2019 2020 static void sis900_get_drvinfo(struct net_device *net_dev, 2021 struct ethtool_drvinfo *info) 2022 { 2023 struct sis900_private *sis_priv = netdev_priv(net_dev); 2024 2025 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2026 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2027 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2028 sizeof(info->bus_info)); 2029 } 2030 2031 static u32 sis900_get_msglevel(struct net_device *net_dev) 2032 { 2033 struct sis900_private *sis_priv = netdev_priv(net_dev); 2034 return sis_priv->msg_enable; 2035 } 2036 2037 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2038 { 2039 struct sis900_private *sis_priv = netdev_priv(net_dev); 2040 sis_priv->msg_enable = value; 2041 } 2042 2043 static u32 sis900_get_link(struct net_device *net_dev) 2044 { 2045 struct sis900_private *sis_priv = netdev_priv(net_dev); 2046 return mii_link_ok(&sis_priv->mii_info); 2047 } 2048 2049 static int sis900_get_link_ksettings(struct net_device *net_dev, 2050 struct ethtool_link_ksettings *cmd) 2051 { 2052 struct sis900_private *sis_priv = netdev_priv(net_dev); 2053 spin_lock_irq(&sis_priv->lock); 2054 mii_ethtool_get_link_ksettings(&sis_priv->mii_info, cmd); 2055 spin_unlock_irq(&sis_priv->lock); 2056 return 0; 2057 } 2058 2059 static int sis900_set_link_ksettings(struct net_device *net_dev, 2060 const struct ethtool_link_ksettings *cmd) 2061 { 2062 struct sis900_private *sis_priv = netdev_priv(net_dev); 2063 int rt; 2064 spin_lock_irq(&sis_priv->lock); 2065 rt = mii_ethtool_set_link_ksettings(&sis_priv->mii_info, cmd); 2066 spin_unlock_irq(&sis_priv->lock); 2067 return rt; 2068 } 2069 2070 static int sis900_nway_reset(struct net_device *net_dev) 2071 { 2072 struct sis900_private *sis_priv = netdev_priv(net_dev); 2073 return mii_nway_restart(&sis_priv->mii_info); 2074 } 2075 2076 /** 2077 * sis900_set_wol - Set up Wake on Lan registers 2078 * @net_dev: the net device to probe 2079 * @wol: container for info passed to the driver 2080 * 2081 * Process ethtool command "wol" to setup wake on lan features. 2082 * SiS900 supports sending WoL events if a correct packet is received, 2083 * but there is no simple way to filter them to only a subset (broadcast, 2084 * multicast, unicast or arp). 2085 */ 2086 2087 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2088 { 2089 struct sis900_private *sis_priv = netdev_priv(net_dev); 2090 void __iomem *ioaddr = sis_priv->ioaddr; 2091 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2092 2093 if (wol->wolopts == 0) { 2094 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2095 cfgpmcsr &= ~PME_EN; 2096 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2097 sw32(pmctrl, pmctrl_bits); 2098 if (netif_msg_wol(sis_priv)) 2099 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2100 return 0; 2101 } 2102 2103 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2104 | WAKE_BCAST | WAKE_ARP)) 2105 return -EINVAL; 2106 2107 if (wol->wolopts & WAKE_MAGIC) 2108 pmctrl_bits |= MAGICPKT; 2109 if (wol->wolopts & WAKE_PHY) 2110 pmctrl_bits |= LINKON; 2111 2112 sw32(pmctrl, pmctrl_bits); 2113 2114 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2115 cfgpmcsr |= PME_EN; 2116 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2117 if (netif_msg_wol(sis_priv)) 2118 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2119 2120 return 0; 2121 } 2122 2123 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2124 { 2125 struct sis900_private *sp = netdev_priv(net_dev); 2126 void __iomem *ioaddr = sp->ioaddr; 2127 u32 pmctrl_bits; 2128 2129 pmctrl_bits = sr32(pmctrl); 2130 if (pmctrl_bits & MAGICPKT) 2131 wol->wolopts |= WAKE_MAGIC; 2132 if (pmctrl_bits & LINKON) 2133 wol->wolopts |= WAKE_PHY; 2134 2135 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2136 } 2137 2138 static int sis900_get_eeprom_len(struct net_device *dev) 2139 { 2140 struct sis900_private *sis_priv = netdev_priv(dev); 2141 2142 return sis_priv->eeprom_size; 2143 } 2144 2145 static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf) 2146 { 2147 struct sis900_private *sis_priv = netdev_priv(net_dev); 2148 void __iomem *ioaddr = sis_priv->ioaddr; 2149 int wait, ret = -EAGAIN; 2150 u16 signature; 2151 u16 *ebuf = (u16 *)buf; 2152 int i; 2153 2154 if (sis_priv->chipset_rev == SIS96x_900_REV) { 2155 sw32(mear, EEREQ); 2156 for (wait = 0; wait < 2000; wait++) { 2157 if (sr32(mear) & EEGNT) { 2158 /* read 16 bits, and index by 16 bits */ 2159 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2160 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2161 ret = 0; 2162 break; 2163 } 2164 udelay(1); 2165 } 2166 sw32(mear, EEDONE); 2167 } else { 2168 signature = (u16)read_eeprom(ioaddr, EEPROMSignature); 2169 if (signature != 0xffff && signature != 0x0000) { 2170 /* read 16 bits, and index by 16 bits */ 2171 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2172 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2173 ret = 0; 2174 } 2175 } 2176 return ret; 2177 } 2178 2179 #define SIS900_EEPROM_MAGIC 0xBABE 2180 static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 2181 { 2182 struct sis900_private *sis_priv = netdev_priv(dev); 2183 u8 *eebuf; 2184 int res; 2185 2186 eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL); 2187 if (!eebuf) 2188 return -ENOMEM; 2189 2190 eeprom->magic = SIS900_EEPROM_MAGIC; 2191 spin_lock_irq(&sis_priv->lock); 2192 res = sis900_read_eeprom(dev, eebuf); 2193 spin_unlock_irq(&sis_priv->lock); 2194 if (!res) 2195 memcpy(data, eebuf + eeprom->offset, eeprom->len); 2196 kfree(eebuf); 2197 return res; 2198 } 2199 2200 static const struct ethtool_ops sis900_ethtool_ops = { 2201 .get_drvinfo = sis900_get_drvinfo, 2202 .get_msglevel = sis900_get_msglevel, 2203 .set_msglevel = sis900_set_msglevel, 2204 .get_link = sis900_get_link, 2205 .nway_reset = sis900_nway_reset, 2206 .get_wol = sis900_get_wol, 2207 .set_wol = sis900_set_wol, 2208 .get_link_ksettings = sis900_get_link_ksettings, 2209 .set_link_ksettings = sis900_set_link_ksettings, 2210 .get_eeprom_len = sis900_get_eeprom_len, 2211 .get_eeprom = sis900_get_eeprom, 2212 }; 2213 2214 /** 2215 * mii_ioctl - process MII i/o control command 2216 * @net_dev: the net device to command for 2217 * @rq: parameter for command 2218 * @cmd: the i/o command 2219 * 2220 * Process MII command like read/write MII register 2221 */ 2222 2223 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2224 { 2225 struct sis900_private *sis_priv = netdev_priv(net_dev); 2226 struct mii_ioctl_data *data = if_mii(rq); 2227 2228 switch(cmd) { 2229 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2230 data->phy_id = sis_priv->mii->phy_addr; 2231 fallthrough; 2232 2233 case SIOCGMIIREG: /* Read MII PHY register. */ 2234 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2235 return 0; 2236 2237 case SIOCSMIIREG: /* Write MII PHY register. */ 2238 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2239 return 0; 2240 default: 2241 return -EOPNOTSUPP; 2242 } 2243 } 2244 2245 /** 2246 * sis900_set_config - Set media type by net_device.set_config 2247 * @dev: the net device for media type change 2248 * @map: ifmap passed by ifconfig 2249 * 2250 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2251 * we support only port changes. All other runtime configuration 2252 * changes will be ignored 2253 */ 2254 2255 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2256 { 2257 struct sis900_private *sis_priv = netdev_priv(dev); 2258 struct mii_phy *mii_phy = sis_priv->mii; 2259 2260 u16 status; 2261 2262 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2263 /* we switch on the ifmap->port field. I couldn't find anything 2264 * like a definition or standard for the values of that field. 2265 * I think the meaning of those values is device specific. But 2266 * since I would like to change the media type via the ifconfig 2267 * command I use the definition from linux/netdevice.h 2268 * (which seems to be different from the ifport(pcmcia) definition) */ 2269 switch(map->port){ 2270 case IF_PORT_UNKNOWN: /* use auto here */ 2271 dev->if_port = map->port; 2272 /* we are going to change the media type, so the Link 2273 * will be temporary down and we need to reflect that 2274 * here. When the Link comes up again, it will be 2275 * sensed by the sis_timer procedure, which also does 2276 * all the rest for us */ 2277 netif_carrier_off(dev); 2278 2279 /* read current state */ 2280 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2281 2282 /* enable auto negotiation and reset the negotioation 2283 * (I don't really know what the auto negatiotiation 2284 * reset really means, but it sounds for me right to 2285 * do one here) */ 2286 mdio_write(dev, mii_phy->phy_addr, 2287 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2288 2289 break; 2290 2291 case IF_PORT_10BASET: /* 10BaseT */ 2292 dev->if_port = map->port; 2293 2294 /* we are going to change the media type, so the Link 2295 * will be temporary down and we need to reflect that 2296 * here. When the Link comes up again, it will be 2297 * sensed by the sis_timer procedure, which also does 2298 * all the rest for us */ 2299 netif_carrier_off(dev); 2300 2301 /* set Speed to 10Mbps */ 2302 /* read current state */ 2303 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2304 2305 /* disable auto negotiation and force 10MBit mode*/ 2306 mdio_write(dev, mii_phy->phy_addr, 2307 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2308 MII_CNTL_AUTO)); 2309 break; 2310 2311 case IF_PORT_100BASET: /* 100BaseT */ 2312 case IF_PORT_100BASETX: /* 100BaseTx */ 2313 dev->if_port = map->port; 2314 2315 /* we are going to change the media type, so the Link 2316 * will be temporary down and we need to reflect that 2317 * here. When the Link comes up again, it will be 2318 * sensed by the sis_timer procedure, which also does 2319 * all the rest for us */ 2320 netif_carrier_off(dev); 2321 2322 /* set Speed to 100Mbps */ 2323 /* disable auto negotiation and enable 100MBit Mode */ 2324 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2325 mdio_write(dev, mii_phy->phy_addr, 2326 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2327 MII_CNTL_SPEED); 2328 2329 break; 2330 2331 case IF_PORT_10BASE2: /* 10Base2 */ 2332 case IF_PORT_AUI: /* AUI */ 2333 case IF_PORT_100BASEFX: /* 100BaseFx */ 2334 /* These Modes are not supported (are they?)*/ 2335 return -EOPNOTSUPP; 2336 2337 default: 2338 return -EINVAL; 2339 } 2340 } 2341 return 0; 2342 } 2343 2344 /** 2345 * sis900_mcast_bitnr - compute hashtable index 2346 * @addr: multicast address 2347 * @revision: revision id of chip 2348 * 2349 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2350 * hash table, which makes this function a little bit different from other drivers 2351 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2352 * multicast hash table. 2353 */ 2354 2355 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2356 { 2357 2358 u32 crc = ether_crc(6, addr); 2359 2360 /* leave 8 or 7 most siginifant bits */ 2361 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2362 return (int)(crc >> 24); 2363 else 2364 return (int)(crc >> 25); 2365 } 2366 2367 /** 2368 * set_rx_mode - Set SiS900 receive mode 2369 * @net_dev: the net device to be set 2370 * 2371 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2372 * And set the appropriate multicast filter. 2373 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2374 */ 2375 2376 static void set_rx_mode(struct net_device *net_dev) 2377 { 2378 struct sis900_private *sis_priv = netdev_priv(net_dev); 2379 void __iomem *ioaddr = sis_priv->ioaddr; 2380 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2381 int i, table_entries; 2382 u32 rx_mode; 2383 2384 /* 635 Hash Table entries = 256(2^16) */ 2385 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2386 (sis_priv->chipset_rev == SIS900B_900_REV)) 2387 table_entries = 16; 2388 else 2389 table_entries = 8; 2390 2391 if (net_dev->flags & IFF_PROMISC) { 2392 /* Accept any kinds of packets */ 2393 rx_mode = RFPromiscuous; 2394 for (i = 0; i < table_entries; i++) 2395 mc_filter[i] = 0xffff; 2396 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2397 (net_dev->flags & IFF_ALLMULTI)) { 2398 /* too many multicast addresses or accept all multicast packet */ 2399 rx_mode = RFAAB | RFAAM; 2400 for (i = 0; i < table_entries; i++) 2401 mc_filter[i] = 0xffff; 2402 } else { 2403 /* Accept Broadcast packet, destination address matchs our 2404 * MAC address, use Receive Filter to reject unwanted MCAST 2405 * packets */ 2406 struct netdev_hw_addr *ha; 2407 rx_mode = RFAAB; 2408 2409 netdev_for_each_mc_addr(ha, net_dev) { 2410 unsigned int bit_nr; 2411 2412 bit_nr = sis900_mcast_bitnr(ha->addr, 2413 sis_priv->chipset_rev); 2414 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2415 } 2416 } 2417 2418 /* update Multicast Hash Table in Receive Filter */ 2419 for (i = 0; i < table_entries; i++) { 2420 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2421 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2422 sw32(rfdr, mc_filter[i]); 2423 } 2424 2425 sw32(rfcr, RFEN | rx_mode); 2426 2427 /* sis900 is capable of looping back packets at MAC level for 2428 * debugging purpose */ 2429 if (net_dev->flags & IFF_LOOPBACK) { 2430 u32 cr_saved; 2431 /* We must disable Tx/Rx before setting loopback mode */ 2432 cr_saved = sr32(cr); 2433 sw32(cr, cr_saved | TxDIS | RxDIS); 2434 /* enable loopback */ 2435 sw32(txcfg, sr32(txcfg) | TxMLB); 2436 sw32(rxcfg, sr32(rxcfg) | RxATX); 2437 /* restore cr */ 2438 sw32(cr, cr_saved); 2439 } 2440 } 2441 2442 /** 2443 * sis900_reset - Reset sis900 MAC 2444 * @net_dev: the net device to reset 2445 * 2446 * reset sis900 MAC and wait until finished 2447 * reset through command register 2448 * change backoff algorithm for 900B0 & 635 M/B 2449 */ 2450 2451 static void sis900_reset(struct net_device *net_dev) 2452 { 2453 struct sis900_private *sis_priv = netdev_priv(net_dev); 2454 void __iomem *ioaddr = sis_priv->ioaddr; 2455 u32 status = TxRCMP | RxRCMP; 2456 int i; 2457 2458 sw32(ier, 0); 2459 sw32(imr, 0); 2460 sw32(rfcr, 0); 2461 2462 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2463 2464 /* Check that the chip has finished the reset. */ 2465 for (i = 0; status && (i < 1000); i++) 2466 status ^= sr32(isr) & status; 2467 2468 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2469 sis_priv->chipset_rev == SIS900B_900_REV) 2470 sw32(cfg, PESEL | RND_CNT); 2471 else 2472 sw32(cfg, PESEL); 2473 } 2474 2475 /** 2476 * sis900_remove - Remove sis900 device 2477 * @pci_dev: the pci device to be removed 2478 * 2479 * remove and release SiS900 net device 2480 */ 2481 2482 static void sis900_remove(struct pci_dev *pci_dev) 2483 { 2484 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2485 struct sis900_private *sis_priv = netdev_priv(net_dev); 2486 2487 unregister_netdev(net_dev); 2488 2489 while (sis_priv->first_mii) { 2490 struct mii_phy *phy = sis_priv->first_mii; 2491 2492 sis_priv->first_mii = phy->next; 2493 kfree(phy); 2494 } 2495 2496 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2497 sis_priv->rx_ring_dma); 2498 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2499 sis_priv->tx_ring_dma); 2500 pci_iounmap(pci_dev, sis_priv->ioaddr); 2501 free_netdev(net_dev); 2502 pci_release_regions(pci_dev); 2503 } 2504 2505 static int __maybe_unused sis900_suspend(struct device *dev) 2506 { 2507 struct net_device *net_dev = dev_get_drvdata(dev); 2508 struct sis900_private *sis_priv = netdev_priv(net_dev); 2509 void __iomem *ioaddr = sis_priv->ioaddr; 2510 2511 if(!netif_running(net_dev)) 2512 return 0; 2513 2514 netif_stop_queue(net_dev); 2515 netif_device_detach(net_dev); 2516 2517 /* Stop the chip's Tx and Rx Status Machine */ 2518 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2519 2520 return 0; 2521 } 2522 2523 static int __maybe_unused sis900_resume(struct device *dev) 2524 { 2525 struct net_device *net_dev = dev_get_drvdata(dev); 2526 struct sis900_private *sis_priv = netdev_priv(net_dev); 2527 void __iomem *ioaddr = sis_priv->ioaddr; 2528 2529 if(!netif_running(net_dev)) 2530 return 0; 2531 2532 sis900_init_rxfilter(net_dev); 2533 2534 sis900_init_tx_ring(net_dev); 2535 sis900_init_rx_ring(net_dev); 2536 2537 set_rx_mode(net_dev); 2538 2539 netif_device_attach(net_dev); 2540 netif_start_queue(net_dev); 2541 2542 /* Workaround for EDB */ 2543 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2544 2545 /* Enable all known interrupts by setting the interrupt mask. */ 2546 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 2547 sw32(cr, RxENA | sr32(cr)); 2548 sw32(ier, IE); 2549 2550 sis900_check_mode(net_dev, sis_priv->mii); 2551 2552 return 0; 2553 } 2554 2555 static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume); 2556 2557 static struct pci_driver sis900_pci_driver = { 2558 .name = SIS900_MODULE_NAME, 2559 .id_table = sis900_pci_tbl, 2560 .probe = sis900_probe, 2561 .remove = sis900_remove, 2562 .driver.pm = &sis900_pm_ops, 2563 }; 2564 2565 static int __init sis900_init_module(void) 2566 { 2567 /* when a module, this is printed whether or not devices are found in probe */ 2568 #ifdef MODULE 2569 printk(version); 2570 #endif 2571 2572 return pci_register_driver(&sis900_pci_driver); 2573 } 2574 2575 static void __exit sis900_cleanup_module(void) 2576 { 2577 pci_unregister_driver(&sis900_pci_driver); 2578 } 2579 2580 module_init(sis900_init_module); 2581 module_exit(sis900_cleanup_module); 2582 2583