1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <linux/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 110 static const struct pci_device_id sis900_pci_tbl[] = { 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 113 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 115 {0,} 116 }; 117 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 118 119 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 120 121 static const struct mii_chip_info { 122 const char * name; 123 u16 phy_id0; 124 u16 phy_id1; 125 u8 phy_types; 126 #define HOME 0x0001 127 #define LAN 0x0002 128 #define MIX 0x0003 129 #define UNKNOWN 0x0 130 } mii_chip_table[] = { 131 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 132 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 133 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 134 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 135 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 136 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 137 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 138 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 139 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 140 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 141 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 142 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 143 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 144 {NULL,}, 145 }; 146 147 struct mii_phy { 148 struct mii_phy * next; 149 int phy_addr; 150 u16 phy_id0; 151 u16 phy_id1; 152 u16 status; 153 u8 phy_types; 154 }; 155 156 typedef struct _BufferDesc { 157 u32 link; 158 u32 cmdsts; 159 u32 bufptr; 160 } BufferDesc; 161 162 struct sis900_private { 163 struct pci_dev * pci_dev; 164 165 spinlock_t lock; 166 167 struct mii_phy * mii; 168 struct mii_phy * first_mii; /* record the first mii structure */ 169 unsigned int cur_phy; 170 struct mii_if_info mii_info; 171 172 void __iomem *ioaddr; 173 174 struct timer_list timer; /* Link status detection timer. */ 175 u8 autong_complete; /* 1: auto-negotiate complete */ 176 177 u32 msg_enable; 178 179 unsigned int cur_rx, dirty_rx; /* producer/consumer pointers for Tx/Rx ring */ 180 unsigned int cur_tx, dirty_tx; 181 182 /* The saved address of a sent/receive-in-place packet buffer */ 183 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 184 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 185 BufferDesc *tx_ring; 186 BufferDesc *rx_ring; 187 188 dma_addr_t tx_ring_dma; 189 dma_addr_t rx_ring_dma; 190 191 unsigned int tx_full; /* The Tx queue is full. */ 192 u8 host_bridge_rev; 193 u8 chipset_rev; 194 /* EEPROM data */ 195 int eeprom_size; 196 }; 197 198 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 199 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 200 MODULE_LICENSE("GPL"); 201 202 module_param(multicast_filter_limit, int, 0444); 203 module_param(max_interrupt_work, int, 0444); 204 module_param(sis900_debug, int, 0444); 205 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 206 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 207 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 208 209 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 210 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 211 #define sr32(reg) ioread32(ioaddr + (reg)) 212 #define sr16(reg) ioread16(ioaddr + (reg)) 213 214 #ifdef CONFIG_NET_POLL_CONTROLLER 215 static void sis900_poll(struct net_device *dev); 216 #endif 217 static int sis900_open(struct net_device *net_dev); 218 static int sis900_mii_probe (struct net_device * net_dev); 219 static void sis900_init_rxfilter (struct net_device * net_dev); 220 static u16 read_eeprom(void __iomem *ioaddr, int location); 221 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 222 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 223 static void sis900_timer(struct timer_list *t); 224 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 225 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue); 226 static void sis900_init_tx_ring(struct net_device *net_dev); 227 static void sis900_init_rx_ring(struct net_device *net_dev); 228 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 229 struct net_device *net_dev); 230 static int sis900_rx(struct net_device *net_dev); 231 static void sis900_finish_xmit (struct net_device *net_dev); 232 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 233 static int sis900_close(struct net_device *net_dev); 234 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 235 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 236 static void set_rx_mode(struct net_device *net_dev); 237 static void sis900_reset(struct net_device *net_dev); 238 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 239 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 240 static u16 sis900_default_phy(struct net_device * net_dev); 241 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 242 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 243 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 244 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 245 static const struct ethtool_ops sis900_ethtool_ops; 246 247 /** 248 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 249 * @pci_dev: the sis900 pci device 250 * @net_dev: the net device to get address for 251 * 252 * Older SiS900 and friends, use EEPROM to store MAC address. 253 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 254 */ 255 256 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 257 struct net_device *net_dev) 258 { 259 struct sis900_private *sis_priv = netdev_priv(net_dev); 260 void __iomem *ioaddr = sis_priv->ioaddr; 261 u16 addr[ETH_ALEN / 2]; 262 u16 signature; 263 int i; 264 265 /* check to see if we have sane EEPROM */ 266 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 267 if (signature == 0xffff || signature == 0x0000) { 268 printk (KERN_WARNING "%s: Error EEPROM read %x\n", 269 pci_name(pci_dev), signature); 270 return 0; 271 } 272 273 /* get MAC address from EEPROM */ 274 for (i = 0; i < 3; i++) 275 addr[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 276 eth_hw_addr_set(net_dev, (u8 *)addr); 277 278 return 1; 279 } 280 281 /** 282 * sis630e_get_mac_addr - Get MAC address for SiS630E model 283 * @pci_dev: the sis900 pci device 284 * @net_dev: the net device to get address for 285 * 286 * SiS630E model, use APC CMOS RAM to store MAC address. 287 * APC CMOS RAM is accessed through ISA bridge. 288 * MAC address is read into @net_dev->dev_addr. 289 */ 290 291 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 292 struct net_device *net_dev) 293 { 294 struct pci_dev *isa_bridge = NULL; 295 u8 addr[ETH_ALEN]; 296 u8 reg; 297 int i; 298 299 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 300 if (!isa_bridge) 301 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 302 if (!isa_bridge) { 303 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 304 pci_name(pci_dev)); 305 return 0; 306 } 307 pci_read_config_byte(isa_bridge, 0x48, ®); 308 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 309 310 for (i = 0; i < 6; i++) { 311 outb(0x09 + i, 0x70); 312 addr[i] = inb(0x71); 313 } 314 eth_hw_addr_set(net_dev, addr); 315 316 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 317 pci_dev_put(isa_bridge); 318 319 return 1; 320 } 321 322 323 /** 324 * sis635_get_mac_addr - Get MAC address for SIS635 model 325 * @pci_dev: the sis900 pci device 326 * @net_dev: the net device to get address for 327 * 328 * SiS635 model, set MAC Reload Bit to load Mac address from APC 329 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 330 * @net_dev->dev_addr. 331 */ 332 333 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 334 struct net_device *net_dev) 335 { 336 struct sis900_private *sis_priv = netdev_priv(net_dev); 337 void __iomem *ioaddr = sis_priv->ioaddr; 338 u16 addr[ETH_ALEN / 2]; 339 u32 rfcrSave; 340 u32 i; 341 342 rfcrSave = sr32(rfcr); 343 344 sw32(cr, rfcrSave | RELOAD); 345 sw32(cr, 0); 346 347 /* disable packet filtering before setting filter */ 348 sw32(rfcr, rfcrSave & ~RFEN); 349 350 /* load MAC addr to filter data register */ 351 for (i = 0 ; i < 3 ; i++) { 352 sw32(rfcr, (i << RFADDR_shift)); 353 addr[i] = sr16(rfdr); 354 } 355 eth_hw_addr_set(net_dev, (u8 *)addr); 356 357 /* enable packet filtering */ 358 sw32(rfcr, rfcrSave | RFEN); 359 360 return 1; 361 } 362 363 /** 364 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 365 * @pci_dev: the sis900 pci device 366 * @net_dev: the net device to get address for 367 * 368 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 369 * is shared by 370 * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first 371 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed 372 * by LAN, otherwise it is not. After MAC address is read from EEPROM, send 373 * EEDONE signal to refuse EEPROM access by LAN. 374 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 375 * The signature field in SiS962 or SiS963 spec is meaningless. 376 * MAC address is read into @net_dev->dev_addr. 377 */ 378 379 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 380 struct net_device *net_dev) 381 { 382 struct sis900_private *sis_priv = netdev_priv(net_dev); 383 void __iomem *ioaddr = sis_priv->ioaddr; 384 u16 addr[ETH_ALEN / 2]; 385 int wait, rc = 0; 386 387 sw32(mear, EEREQ); 388 for (wait = 0; wait < 2000; wait++) { 389 if (sr32(mear) & EEGNT) { 390 int i; 391 392 /* get MAC address from EEPROM */ 393 for (i = 0; i < 3; i++) 394 addr[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 395 eth_hw_addr_set(net_dev, (u8 *)addr); 396 397 rc = 1; 398 break; 399 } 400 udelay(1); 401 } 402 sw32(mear, EEDONE); 403 return rc; 404 } 405 406 static const struct net_device_ops sis900_netdev_ops = { 407 .ndo_open = sis900_open, 408 .ndo_stop = sis900_close, 409 .ndo_start_xmit = sis900_start_xmit, 410 .ndo_set_config = sis900_set_config, 411 .ndo_set_rx_mode = set_rx_mode, 412 .ndo_validate_addr = eth_validate_addr, 413 .ndo_set_mac_address = eth_mac_addr, 414 .ndo_eth_ioctl = mii_ioctl, 415 .ndo_tx_timeout = sis900_tx_timeout, 416 #ifdef CONFIG_NET_POLL_CONTROLLER 417 .ndo_poll_controller = sis900_poll, 418 #endif 419 }; 420 421 /** 422 * sis900_probe - Probe for sis900 device 423 * @pci_dev: the sis900 pci device 424 * @pci_id: the pci device ID 425 * 426 * Check and probe sis900 net device for @pci_dev. 427 * Get mac address according to the chip revision, 428 * and assign SiS900-specific entries in the device structure. 429 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 430 */ 431 432 static int sis900_probe(struct pci_dev *pci_dev, 433 const struct pci_device_id *pci_id) 434 { 435 struct sis900_private *sis_priv; 436 struct net_device *net_dev; 437 struct pci_dev *dev; 438 dma_addr_t ring_dma; 439 void *ring_space; 440 void __iomem *ioaddr; 441 int i, ret; 442 const char *card_name = card_names[pci_id->driver_data]; 443 const char *dev_name = pci_name(pci_dev); 444 445 /* when built into the kernel, we only print version if device is found */ 446 #ifndef MODULE 447 static int printed_version; 448 if (!printed_version++) 449 printk(version); 450 #endif 451 452 /* setup various bits in PCI command register */ 453 ret = pcim_enable_device(pci_dev); 454 if(ret) return ret; 455 456 i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); 457 if(i){ 458 printk(KERN_ERR "sis900.c: architecture does not support " 459 "32bit PCI busmaster DMA\n"); 460 return i; 461 } 462 463 pci_set_master(pci_dev); 464 465 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 466 if (!net_dev) 467 return -ENOMEM; 468 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 469 470 /* We do a request_region() to register /proc/ioports info. */ 471 ret = pci_request_regions(pci_dev, "sis900"); 472 if (ret) 473 goto err_out; 474 475 /* IO region. */ 476 ioaddr = pci_iomap(pci_dev, 0, 0); 477 if (!ioaddr) { 478 ret = -ENOMEM; 479 goto err_out; 480 } 481 482 sis_priv = netdev_priv(net_dev); 483 sis_priv->ioaddr = ioaddr; 484 sis_priv->pci_dev = pci_dev; 485 spin_lock_init(&sis_priv->lock); 486 487 sis_priv->eeprom_size = 24; 488 489 pci_set_drvdata(pci_dev, net_dev); 490 491 ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE, 492 &ring_dma, GFP_KERNEL); 493 if (!ring_space) { 494 ret = -ENOMEM; 495 goto err_out_unmap; 496 } 497 sis_priv->tx_ring = ring_space; 498 sis_priv->tx_ring_dma = ring_dma; 499 500 ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE, 501 &ring_dma, GFP_KERNEL); 502 if (!ring_space) { 503 ret = -ENOMEM; 504 goto err_unmap_tx; 505 } 506 sis_priv->rx_ring = ring_space; 507 sis_priv->rx_ring_dma = ring_dma; 508 509 /* The SiS900-specific entries in the device structure. */ 510 net_dev->netdev_ops = &sis900_netdev_ops; 511 net_dev->watchdog_timeo = TX_TIMEOUT; 512 net_dev->ethtool_ops = &sis900_ethtool_ops; 513 514 if (sis900_debug > 0) 515 sis_priv->msg_enable = sis900_debug; 516 else 517 sis_priv->msg_enable = SIS900_DEF_MSG; 518 519 sis_priv->mii_info.dev = net_dev; 520 sis_priv->mii_info.mdio_read = mdio_read; 521 sis_priv->mii_info.mdio_write = mdio_write; 522 sis_priv->mii_info.phy_id_mask = 0x1f; 523 sis_priv->mii_info.reg_num_mask = 0x1f; 524 525 /* Get Mac address according to the chip revision */ 526 sis_priv->chipset_rev = pci_dev->revision; 527 if(netif_msg_probe(sis_priv)) 528 printk(KERN_DEBUG "%s: detected revision %2.2x, " 529 "trying to get MAC address...\n", 530 dev_name, sis_priv->chipset_rev); 531 532 ret = 0; 533 if (sis_priv->chipset_rev == SIS630E_900_REV) 534 ret = sis630e_get_mac_addr(pci_dev, net_dev); 535 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 536 ret = sis635_get_mac_addr(pci_dev, net_dev); 537 else if (sis_priv->chipset_rev == SIS96x_900_REV) 538 ret = sis96x_get_mac_addr(pci_dev, net_dev); 539 else 540 ret = sis900_get_mac_addr(pci_dev, net_dev); 541 542 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 543 eth_hw_addr_random(net_dev); 544 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 545 "using random generated one\n", dev_name); 546 } 547 548 /* 630ET : set the mii access mode as software-mode */ 549 if (sis_priv->chipset_rev == SIS630ET_900_REV) 550 sw32(cr, ACCESSMODE | sr32(cr)); 551 552 /* probe for mii transceiver */ 553 if (sis900_mii_probe(net_dev) == 0) { 554 printk(KERN_WARNING "%s: Error probing MII device.\n", 555 dev_name); 556 ret = -ENODEV; 557 goto err_unmap_rx; 558 } 559 560 /* save our host bridge revision */ 561 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 562 if (dev) { 563 sis_priv->host_bridge_rev = dev->revision; 564 pci_dev_put(dev); 565 } 566 567 ret = register_netdev(net_dev); 568 if (ret) 569 goto err_unmap_rx; 570 571 /* print some information about our NIC */ 572 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 573 net_dev->name, card_name, ioaddr, pci_dev->irq, 574 net_dev->dev_addr); 575 576 /* Detect Wake on Lan support */ 577 ret = (sr32(CFGPMC) & PMESP) >> 27; 578 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 579 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 580 581 return 0; 582 583 err_unmap_rx: 584 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 585 sis_priv->rx_ring_dma); 586 err_unmap_tx: 587 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 588 sis_priv->tx_ring_dma); 589 err_out_unmap: 590 pci_iounmap(pci_dev, ioaddr); 591 err_out: 592 free_netdev(net_dev); 593 return ret; 594 } 595 596 /** 597 * sis900_mii_probe - Probe MII PHY for sis900 598 * @net_dev: the net device to probe for 599 * 600 * Search for total of 32 possible mii phy addresses. 601 * Identify and set current phy if found one, 602 * return error if it failed to found. 603 */ 604 605 static int sis900_mii_probe(struct net_device *net_dev) 606 { 607 struct sis900_private *sis_priv = netdev_priv(net_dev); 608 const char *dev_name = pci_name(sis_priv->pci_dev); 609 u16 poll_bit = MII_STAT_LINK, status = 0; 610 unsigned long timeout = jiffies + 5 * HZ; 611 int phy_addr; 612 613 sis_priv->mii = NULL; 614 615 /* search for total of 32 possible mii phy addresses */ 616 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 617 struct mii_phy * mii_phy = NULL; 618 u16 mii_status; 619 int i; 620 621 mii_phy = NULL; 622 for(i = 0; i < 2; i++) 623 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 624 625 if (mii_status == 0xffff || mii_status == 0x0000) { 626 if (netif_msg_probe(sis_priv)) 627 printk(KERN_DEBUG "%s: MII at address %d" 628 " not accessible\n", 629 dev_name, phy_addr); 630 continue; 631 } 632 633 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 634 mii_phy = sis_priv->first_mii; 635 while (mii_phy) { 636 struct mii_phy *phy; 637 phy = mii_phy; 638 mii_phy = mii_phy->next; 639 kfree(phy); 640 } 641 return 0; 642 } 643 644 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 645 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 646 mii_phy->phy_addr = phy_addr; 647 mii_phy->status = mii_status; 648 mii_phy->next = sis_priv->mii; 649 sis_priv->mii = mii_phy; 650 sis_priv->first_mii = mii_phy; 651 652 for (i = 0; mii_chip_table[i].phy_id1; i++) 653 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 654 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 655 mii_phy->phy_types = mii_chip_table[i].phy_types; 656 if (mii_chip_table[i].phy_types == MIX) 657 mii_phy->phy_types = 658 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 659 printk(KERN_INFO "%s: %s transceiver found " 660 "at address %d.\n", 661 dev_name, 662 mii_chip_table[i].name, 663 phy_addr); 664 break; 665 } 666 667 if( !mii_chip_table[i].phy_id1 ) { 668 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 669 dev_name, phy_addr); 670 mii_phy->phy_types = UNKNOWN; 671 } 672 } 673 674 if (sis_priv->mii == NULL) { 675 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 676 return 0; 677 } 678 679 /* select default PHY for mac */ 680 sis_priv->mii = NULL; 681 sis900_default_phy( net_dev ); 682 683 /* Reset phy if default phy is internal sis900 */ 684 if ((sis_priv->mii->phy_id0 == 0x001D) && 685 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 686 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 687 688 /* workaround for ICS1893 PHY */ 689 if ((sis_priv->mii->phy_id0 == 0x0015) && 690 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 691 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 692 693 if(status & MII_STAT_LINK){ 694 while (poll_bit) { 695 yield(); 696 697 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 698 if (time_after_eq(jiffies, timeout)) { 699 printk(KERN_WARNING "%s: reset phy and link down now\n", 700 dev_name); 701 return -ETIME; 702 } 703 } 704 } 705 706 if (sis_priv->chipset_rev == SIS630E_900_REV) { 707 /* SiS 630E has some bugs on default value of PHY registers */ 708 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 709 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 710 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 711 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 712 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 713 } 714 715 if (sis_priv->mii->status & MII_STAT_LINK) 716 netif_carrier_on(net_dev); 717 else 718 netif_carrier_off(net_dev); 719 720 return 1; 721 } 722 723 /** 724 * sis900_default_phy - Select default PHY for sis900 mac. 725 * @net_dev: the net device to probe for 726 * 727 * Select first detected PHY with link as default. 728 * If no one is link on, select PHY whose types is HOME as default. 729 * If HOME doesn't exist, select LAN. 730 */ 731 732 static u16 sis900_default_phy(struct net_device * net_dev) 733 { 734 struct sis900_private *sis_priv = netdev_priv(net_dev); 735 struct mii_phy *phy = NULL, *phy_home = NULL, 736 *default_phy = NULL, *phy_lan = NULL; 737 u16 status; 738 739 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 740 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 741 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 742 743 /* Link ON & Not select default PHY & not ghost PHY */ 744 if ((status & MII_STAT_LINK) && !default_phy && 745 (phy->phy_types != UNKNOWN)) { 746 default_phy = phy; 747 } else { 748 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 749 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 750 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 751 if (phy->phy_types == HOME) 752 phy_home = phy; 753 else if(phy->phy_types == LAN) 754 phy_lan = phy; 755 } 756 } 757 758 if (!default_phy && phy_home) 759 default_phy = phy_home; 760 else if (!default_phy && phy_lan) 761 default_phy = phy_lan; 762 else if (!default_phy) 763 default_phy = sis_priv->first_mii; 764 765 if (sis_priv->mii != default_phy) { 766 sis_priv->mii = default_phy; 767 sis_priv->cur_phy = default_phy->phy_addr; 768 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 769 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 770 } 771 772 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 773 774 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 775 status &= (~MII_CNTL_ISOLATE); 776 777 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 778 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 779 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 780 781 return status; 782 } 783 784 785 /** 786 * sis900_set_capability - set the media capability of network adapter. 787 * @net_dev : the net device to probe for 788 * @phy : default PHY 789 * 790 * Set the media capability of network adapter according to 791 * mii status register. It's necessary before auto-negotiate. 792 */ 793 794 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 795 { 796 u16 cap; 797 798 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 799 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 800 801 cap = MII_NWAY_CSMA_CD | 802 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 803 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 804 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 805 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 806 807 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 808 } 809 810 811 /* Delay between EEPROM clock transitions. */ 812 #define eeprom_delay() sr32(mear) 813 814 /** 815 * read_eeprom - Read Serial EEPROM 816 * @ioaddr: base i/o address 817 * @location: the EEPROM location to read 818 * 819 * Read Serial EEPROM through EEPROM Access Register. 820 * Note that location is in word (16 bits) unit 821 */ 822 823 static u16 read_eeprom(void __iomem *ioaddr, int location) 824 { 825 u32 read_cmd = location | EEread; 826 int i; 827 u16 retval = 0; 828 829 sw32(mear, 0); 830 eeprom_delay(); 831 sw32(mear, EECS); 832 eeprom_delay(); 833 834 /* Shift the read command (9) bits out. */ 835 for (i = 8; i >= 0; i--) { 836 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 837 838 sw32(mear, dataval); 839 eeprom_delay(); 840 sw32(mear, dataval | EECLK); 841 eeprom_delay(); 842 } 843 sw32(mear, EECS); 844 eeprom_delay(); 845 846 /* read the 16-bits data in */ 847 for (i = 16; i > 0; i--) { 848 sw32(mear, EECS); 849 eeprom_delay(); 850 sw32(mear, EECS | EECLK); 851 eeprom_delay(); 852 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 853 eeprom_delay(); 854 } 855 856 /* Terminate the EEPROM access. */ 857 sw32(mear, 0); 858 eeprom_delay(); 859 860 return retval; 861 } 862 863 /* Read and write the MII management registers using software-generated 864 serial MDIO protocol. Note that the command bits and data bits are 865 send out separately */ 866 #define mdio_delay() sr32(mear) 867 868 static void mdio_idle(struct sis900_private *sp) 869 { 870 void __iomem *ioaddr = sp->ioaddr; 871 872 sw32(mear, MDIO | MDDIR); 873 mdio_delay(); 874 sw32(mear, MDIO | MDDIR | MDC); 875 } 876 877 /* Synchronize the MII management interface by shifting 32 one bits out. */ 878 static void mdio_reset(struct sis900_private *sp) 879 { 880 void __iomem *ioaddr = sp->ioaddr; 881 int i; 882 883 for (i = 31; i >= 0; i--) { 884 sw32(mear, MDDIR | MDIO); 885 mdio_delay(); 886 sw32(mear, MDDIR | MDIO | MDC); 887 mdio_delay(); 888 } 889 } 890 891 /** 892 * mdio_read - read MII PHY register 893 * @net_dev: the net device to read 894 * @phy_id: the phy address to read 895 * @location: the phy register id to read 896 * 897 * Read MII registers through MDIO and MDC 898 * using MDIO management frame structure and protocol(defined by ISO/IEC). 899 * Please see SiS7014 or ICS spec 900 */ 901 902 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 903 { 904 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 905 struct sis900_private *sp = netdev_priv(net_dev); 906 void __iomem *ioaddr = sp->ioaddr; 907 u16 retval = 0; 908 int i; 909 910 mdio_reset(sp); 911 mdio_idle(sp); 912 913 for (i = 15; i >= 0; i--) { 914 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 915 916 sw32(mear, dataval); 917 mdio_delay(); 918 sw32(mear, dataval | MDC); 919 mdio_delay(); 920 } 921 922 /* Read the 16 data bits. */ 923 for (i = 16; i > 0; i--) { 924 sw32(mear, 0); 925 mdio_delay(); 926 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 927 sw32(mear, MDC); 928 mdio_delay(); 929 } 930 sw32(mear, 0x00); 931 932 return retval; 933 } 934 935 /** 936 * mdio_write - write MII PHY register 937 * @net_dev: the net device to write 938 * @phy_id: the phy address to write 939 * @location: the phy register id to write 940 * @value: the register value to write with 941 * 942 * Write MII registers with @value through MDIO and MDC 943 * using MDIO management frame structure and protocol(defined by ISO/IEC) 944 * please see SiS7014 or ICS spec 945 */ 946 947 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 948 int value) 949 { 950 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 951 struct sis900_private *sp = netdev_priv(net_dev); 952 void __iomem *ioaddr = sp->ioaddr; 953 int i; 954 955 mdio_reset(sp); 956 mdio_idle(sp); 957 958 /* Shift the command bits out. */ 959 for (i = 15; i >= 0; i--) { 960 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 961 962 sw8(mear, dataval); 963 mdio_delay(); 964 sw8(mear, dataval | MDC); 965 mdio_delay(); 966 } 967 mdio_delay(); 968 969 /* Shift the value bits out. */ 970 for (i = 15; i >= 0; i--) { 971 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 972 973 sw32(mear, dataval); 974 mdio_delay(); 975 sw32(mear, dataval | MDC); 976 mdio_delay(); 977 } 978 mdio_delay(); 979 980 /* Clear out extra bits. */ 981 for (i = 2; i > 0; i--) { 982 sw8(mear, 0); 983 mdio_delay(); 984 sw8(mear, MDC); 985 mdio_delay(); 986 } 987 sw32(mear, 0x00); 988 } 989 990 991 /** 992 * sis900_reset_phy - reset sis900 mii phy. 993 * @net_dev: the net device to write 994 * @phy_addr: default phy address 995 * 996 * Some specific phy can't work properly without reset. 997 * This function will be called during initialization and 998 * link status change from ON to DOWN. 999 */ 1000 1001 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 1002 { 1003 int i; 1004 u16 status; 1005 1006 for (i = 0; i < 2; i++) 1007 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1008 1009 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1010 1011 return status; 1012 } 1013 1014 #ifdef CONFIG_NET_POLL_CONTROLLER 1015 /* 1016 * Polling 'interrupt' - used by things like netconsole to send skbs 1017 * without having to re-enable interrupts. It's not called while 1018 * the interrupt routine is executing. 1019 */ 1020 static void sis900_poll(struct net_device *dev) 1021 { 1022 struct sis900_private *sp = netdev_priv(dev); 1023 const int irq = sp->pci_dev->irq; 1024 1025 disable_irq(irq); 1026 sis900_interrupt(irq, dev); 1027 enable_irq(irq); 1028 } 1029 #endif 1030 1031 /** 1032 * sis900_open - open sis900 device 1033 * @net_dev: the net device to open 1034 * 1035 * Do some initialization and start net interface. 1036 * enable interrupts and set sis900 timer. 1037 */ 1038 1039 static int 1040 sis900_open(struct net_device *net_dev) 1041 { 1042 struct sis900_private *sis_priv = netdev_priv(net_dev); 1043 void __iomem *ioaddr = sis_priv->ioaddr; 1044 int ret; 1045 1046 /* Soft reset the chip. */ 1047 sis900_reset(net_dev); 1048 1049 /* Equalizer workaround Rule */ 1050 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1051 1052 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1053 net_dev->name, net_dev); 1054 if (ret) 1055 return ret; 1056 1057 sis900_init_rxfilter(net_dev); 1058 1059 sis900_init_tx_ring(net_dev); 1060 sis900_init_rx_ring(net_dev); 1061 1062 set_rx_mode(net_dev); 1063 1064 netif_start_queue(net_dev); 1065 1066 /* Workaround for EDB */ 1067 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1068 1069 /* Enable all known interrupts by setting the interrupt mask. */ 1070 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1071 sw32(cr, RxENA | sr32(cr)); 1072 sw32(ier, IE); 1073 1074 sis900_check_mode(net_dev, sis_priv->mii); 1075 1076 /* Set the timer to switch to check for link beat and perhaps switch 1077 to an alternate media type. */ 1078 timer_setup(&sis_priv->timer, sis900_timer, 0); 1079 sis_priv->timer.expires = jiffies + HZ; 1080 add_timer(&sis_priv->timer); 1081 1082 return 0; 1083 } 1084 1085 /** 1086 * sis900_init_rxfilter - Initialize the Rx filter 1087 * @net_dev: the net device to initialize for 1088 * 1089 * Set receive filter address to our MAC address 1090 * and enable packet filtering. 1091 */ 1092 1093 static void 1094 sis900_init_rxfilter (struct net_device * net_dev) 1095 { 1096 struct sis900_private *sis_priv = netdev_priv(net_dev); 1097 void __iomem *ioaddr = sis_priv->ioaddr; 1098 u32 rfcrSave; 1099 u32 i; 1100 1101 rfcrSave = sr32(rfcr); 1102 1103 /* disable packet filtering before setting filter */ 1104 sw32(rfcr, rfcrSave & ~RFEN); 1105 1106 /* load MAC addr to filter data register */ 1107 for (i = 0 ; i < 3 ; i++) { 1108 u32 w = (u32) *((const u16 *)(net_dev->dev_addr)+i); 1109 1110 sw32(rfcr, i << RFADDR_shift); 1111 sw32(rfdr, w); 1112 1113 if (netif_msg_hw(sis_priv)) { 1114 printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n", 1115 net_dev->name, i, sr32(rfdr)); 1116 } 1117 } 1118 1119 /* enable packet filtering */ 1120 sw32(rfcr, rfcrSave | RFEN); 1121 } 1122 1123 /** 1124 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1125 * @net_dev: the net device to initialize for 1126 * 1127 * Initialize the Tx descriptor ring, 1128 */ 1129 1130 static void 1131 sis900_init_tx_ring(struct net_device *net_dev) 1132 { 1133 struct sis900_private *sis_priv = netdev_priv(net_dev); 1134 void __iomem *ioaddr = sis_priv->ioaddr; 1135 int i; 1136 1137 sis_priv->tx_full = 0; 1138 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1139 1140 for (i = 0; i < NUM_TX_DESC; i++) { 1141 sis_priv->tx_skbuff[i] = NULL; 1142 1143 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1144 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1145 sis_priv->tx_ring[i].cmdsts = 0; 1146 sis_priv->tx_ring[i].bufptr = 0; 1147 } 1148 1149 /* load Transmit Descriptor Register */ 1150 sw32(txdp, sis_priv->tx_ring_dma); 1151 if (netif_msg_hw(sis_priv)) 1152 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1153 net_dev->name, sr32(txdp)); 1154 } 1155 1156 /** 1157 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1158 * @net_dev: the net device to initialize for 1159 * 1160 * Initialize the Rx descriptor ring, 1161 * and pre-allocate receive buffers (socket buffer) 1162 */ 1163 1164 static void 1165 sis900_init_rx_ring(struct net_device *net_dev) 1166 { 1167 struct sis900_private *sis_priv = netdev_priv(net_dev); 1168 void __iomem *ioaddr = sis_priv->ioaddr; 1169 int i; 1170 1171 sis_priv->cur_rx = 0; 1172 sis_priv->dirty_rx = 0; 1173 1174 /* init RX descriptor */ 1175 for (i = 0; i < NUM_RX_DESC; i++) { 1176 sis_priv->rx_skbuff[i] = NULL; 1177 1178 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1179 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1180 sis_priv->rx_ring[i].cmdsts = 0; 1181 sis_priv->rx_ring[i].bufptr = 0; 1182 } 1183 1184 /* allocate sock buffers */ 1185 for (i = 0; i < NUM_RX_DESC; i++) { 1186 struct sk_buff *skb; 1187 1188 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1189 /* not enough memory for skbuff, this makes a "hole" 1190 on the buffer ring, it is not clear how the 1191 hardware will react to this kind of degenerated 1192 buffer */ 1193 break; 1194 } 1195 sis_priv->rx_skbuff[i] = skb; 1196 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1197 sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1198 skb->data, 1199 RX_BUF_SIZE, 1200 DMA_FROM_DEVICE); 1201 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1202 sis_priv->rx_ring[i].bufptr))) { 1203 dev_kfree_skb(skb); 1204 sis_priv->rx_skbuff[i] = NULL; 1205 break; 1206 } 1207 } 1208 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1209 1210 /* load Receive Descriptor Register */ 1211 sw32(rxdp, sis_priv->rx_ring_dma); 1212 if (netif_msg_hw(sis_priv)) 1213 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1214 net_dev->name, sr32(rxdp)); 1215 } 1216 1217 /** 1218 * sis630_set_eq - set phy equalizer value for 630 LAN 1219 * @net_dev: the net device to set equalizer value 1220 * @revision: 630 LAN revision number 1221 * 1222 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1223 * PHY register 14h(Test) 1224 * Bit 14: 0 -- Automatically detect (default) 1225 * 1 -- Manually set Equalizer filter 1226 * Bit 13: 0 -- (Default) 1227 * 1 -- Speed up convergence of equalizer setting 1228 * Bit 9 : 0 -- (Default) 1229 * 1 -- Disable Baseline Wander 1230 * Bit 3~7 -- Equalizer filter setting 1231 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1232 * Then calculate equalizer value 1233 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1234 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1235 * Calculate Equalizer value: 1236 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1237 * When the equalizer is stable, this value is not a fixed value. It will be within 1238 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1239 * 0 <= max <= 4 --> set equalizer to max 1240 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1241 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1242 */ 1243 1244 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1245 { 1246 struct sis900_private *sis_priv = netdev_priv(net_dev); 1247 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1248 int i, maxcount=10; 1249 1250 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1251 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1252 return; 1253 1254 if (netif_carrier_ok(net_dev)) { 1255 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1256 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1257 (0x2200 | reg14h) & 0xBFFF); 1258 for (i=0; i < maxcount; i++) { 1259 eq_value = (0x00F8 & mdio_read(net_dev, 1260 sis_priv->cur_phy, MII_RESV)) >> 3; 1261 if (i == 0) 1262 max_value=min_value=eq_value; 1263 max_value = (eq_value > max_value) ? 1264 eq_value : max_value; 1265 min_value = (eq_value < min_value) ? 1266 eq_value : min_value; 1267 } 1268 /* 630E rule to determine the equalizer value */ 1269 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1270 revision == SIS630ET_900_REV) { 1271 if (max_value < 5) 1272 eq_value = max_value; 1273 else if (max_value >= 5 && max_value < 15) 1274 eq_value = (max_value == min_value) ? 1275 max_value+2 : max_value+1; 1276 else if (max_value >= 15) 1277 eq_value=(max_value == min_value) ? 1278 max_value+6 : max_value+5; 1279 } 1280 /* 630B0&B1 rule to determine the equalizer value */ 1281 if (revision == SIS630A_900_REV && 1282 (sis_priv->host_bridge_rev == SIS630B0 || 1283 sis_priv->host_bridge_rev == SIS630B1)) { 1284 if (max_value == 0) 1285 eq_value = 3; 1286 else 1287 eq_value = (max_value + min_value + 1)/2; 1288 } 1289 /* write equalizer value and setting */ 1290 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1291 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1292 reg14h = (reg14h | 0x6000) & 0xFDFF; 1293 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1294 } else { 1295 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1296 if (revision == SIS630A_900_REV && 1297 (sis_priv->host_bridge_rev == SIS630B0 || 1298 sis_priv->host_bridge_rev == SIS630B1)) 1299 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1300 (reg14h | 0x2200) & 0xBFFF); 1301 else 1302 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1303 (reg14h | 0x2000) & 0xBFFF); 1304 } 1305 } 1306 1307 /** 1308 * sis900_timer - sis900 timer routine 1309 * @t: timer list containing a pointer to sis900 net device 1310 * 1311 * On each timer ticks we check two things, 1312 * link status (ON/OFF) and link mode (10/100/Full/Half) 1313 */ 1314 1315 static void sis900_timer(struct timer_list *t) 1316 { 1317 struct sis900_private *sis_priv = from_timer(sis_priv, t, timer); 1318 struct net_device *net_dev = sis_priv->mii_info.dev; 1319 struct mii_phy *mii_phy = sis_priv->mii; 1320 static const int next_tick = 5*HZ; 1321 int speed = 0, duplex = 0; 1322 u16 status; 1323 1324 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1325 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1326 1327 /* Link OFF -> ON */ 1328 if (!netif_carrier_ok(net_dev)) { 1329 LookForLink: 1330 /* Search for new PHY */ 1331 status = sis900_default_phy(net_dev); 1332 mii_phy = sis_priv->mii; 1333 1334 if (status & MII_STAT_LINK) { 1335 WARN_ON(!(status & MII_STAT_AUTO_DONE)); 1336 1337 sis900_read_mode(net_dev, &speed, &duplex); 1338 if (duplex) { 1339 sis900_set_mode(sis_priv, speed, duplex); 1340 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1341 netif_carrier_on(net_dev); 1342 } 1343 } 1344 } else { 1345 /* Link ON -> OFF */ 1346 if (!(status & MII_STAT_LINK)){ 1347 netif_carrier_off(net_dev); 1348 if(netif_msg_link(sis_priv)) 1349 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1350 1351 /* Change mode issue */ 1352 if ((mii_phy->phy_id0 == 0x001D) && 1353 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1354 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1355 1356 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1357 1358 goto LookForLink; 1359 } 1360 } 1361 1362 sis_priv->timer.expires = jiffies + next_tick; 1363 add_timer(&sis_priv->timer); 1364 } 1365 1366 /** 1367 * sis900_check_mode - check the media mode for sis900 1368 * @net_dev: the net device to be checked 1369 * @mii_phy: the mii phy 1370 * 1371 * Older driver gets the media mode from mii status output 1372 * register. Now we set our media capability and auto-negotiate 1373 * to get the upper bound of speed and duplex between two ends. 1374 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1375 * and autong_complete should be set to 1. 1376 */ 1377 1378 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1379 { 1380 struct sis900_private *sis_priv = netdev_priv(net_dev); 1381 void __iomem *ioaddr = sis_priv->ioaddr; 1382 int speed, duplex; 1383 1384 if (mii_phy->phy_types == LAN) { 1385 sw32(cfg, ~EXD & sr32(cfg)); 1386 sis900_set_capability(net_dev , mii_phy); 1387 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1388 } else { 1389 sw32(cfg, EXD | sr32(cfg)); 1390 speed = HW_SPEED_HOME; 1391 duplex = FDX_CAPABLE_HALF_SELECTED; 1392 sis900_set_mode(sis_priv, speed, duplex); 1393 sis_priv->autong_complete = 1; 1394 } 1395 } 1396 1397 /** 1398 * sis900_set_mode - Set the media mode of mac register. 1399 * @sp: the device private data 1400 * @speed : the transmit speed to be determined 1401 * @duplex: the duplex mode to be determined 1402 * 1403 * Set the media mode of mac register txcfg/rxcfg according to 1404 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1405 * bus is used instead of PCI bus. When this bit is set 1, the 1406 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1407 * double words. 1408 */ 1409 1410 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1411 { 1412 void __iomem *ioaddr = sp->ioaddr; 1413 u32 tx_flags = 0, rx_flags = 0; 1414 1415 if (sr32( cfg) & EDB_MASTER_EN) { 1416 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1417 (TX_FILL_THRESH << TxFILLT_shift); 1418 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1419 } else { 1420 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1421 (TX_FILL_THRESH << TxFILLT_shift); 1422 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1423 } 1424 1425 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1426 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1427 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1428 } else { 1429 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1430 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1431 } 1432 1433 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1434 tx_flags |= (TxCSI | TxHBI); 1435 rx_flags |= RxATX; 1436 } 1437 1438 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1439 /* Can accept Jumbo packet */ 1440 rx_flags |= RxAJAB; 1441 #endif 1442 1443 sw32(txcfg, tx_flags); 1444 sw32(rxcfg, rx_flags); 1445 } 1446 1447 /** 1448 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1449 * @net_dev: the net device to read mode for 1450 * @phy_addr: mii phy address 1451 * 1452 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1453 * autong_complete should be set to 0 when starting auto-negotiation. 1454 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1455 * sis900_timer will wait for link on again if autong_complete = 0. 1456 */ 1457 1458 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1459 { 1460 struct sis900_private *sis_priv = netdev_priv(net_dev); 1461 int i = 0; 1462 u32 status; 1463 1464 for (i = 0; i < 2; i++) 1465 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1466 1467 if (!(status & MII_STAT_LINK)){ 1468 if(netif_msg_link(sis_priv)) 1469 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1470 sis_priv->autong_complete = 1; 1471 netif_carrier_off(net_dev); 1472 return; 1473 } 1474 1475 /* (Re)start AutoNegotiate */ 1476 mdio_write(net_dev, phy_addr, MII_CONTROL, 1477 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1478 sis_priv->autong_complete = 0; 1479 } 1480 1481 1482 /** 1483 * sis900_read_mode - read media mode for sis900 internal phy 1484 * @net_dev: the net device to read mode for 1485 * @speed : the transmit speed to be determined 1486 * @duplex : the duplex mode to be determined 1487 * 1488 * The capability of remote end will be put in mii register autorec 1489 * after auto-negotiation. Use AND operation to get the upper bound 1490 * of speed and duplex between two ends. 1491 */ 1492 1493 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1494 { 1495 struct sis900_private *sis_priv = netdev_priv(net_dev); 1496 struct mii_phy *phy = sis_priv->mii; 1497 int phy_addr = sis_priv->cur_phy; 1498 u32 status; 1499 u16 autoadv, autorec; 1500 int i; 1501 1502 for (i = 0; i < 2; i++) 1503 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1504 1505 if (!(status & MII_STAT_LINK)) 1506 return; 1507 1508 /* AutoNegotiate completed */ 1509 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1510 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1511 status = autoadv & autorec; 1512 1513 *speed = HW_SPEED_10_MBPS; 1514 *duplex = FDX_CAPABLE_HALF_SELECTED; 1515 1516 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1517 *speed = HW_SPEED_100_MBPS; 1518 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1519 *duplex = FDX_CAPABLE_FULL_SELECTED; 1520 1521 sis_priv->autong_complete = 1; 1522 1523 /* Workaround for Realtek RTL8201 PHY issue */ 1524 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1525 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1526 *duplex = FDX_CAPABLE_FULL_SELECTED; 1527 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1528 *speed = HW_SPEED_100_MBPS; 1529 } 1530 1531 if(netif_msg_link(sis_priv)) 1532 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1533 net_dev->name, 1534 *speed == HW_SPEED_100_MBPS ? 1535 "100mbps" : "10mbps", 1536 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1537 "full" : "half"); 1538 } 1539 1540 /** 1541 * sis900_tx_timeout - sis900 transmit timeout routine 1542 * @net_dev: the net device to transmit 1543 * @txqueue: index of hanging queue 1544 * 1545 * print transmit timeout status 1546 * disable interrupts and do some tasks 1547 */ 1548 1549 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue) 1550 { 1551 struct sis900_private *sis_priv = netdev_priv(net_dev); 1552 void __iomem *ioaddr = sis_priv->ioaddr; 1553 unsigned long flags; 1554 int i; 1555 1556 if (netif_msg_tx_err(sis_priv)) { 1557 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1558 net_dev->name, sr32(cr), sr32(isr)); 1559 } 1560 1561 /* Disable interrupts by clearing the interrupt mask. */ 1562 sw32(imr, 0x0000); 1563 1564 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1565 spin_lock_irqsave(&sis_priv->lock, flags); 1566 1567 /* discard unsent packets */ 1568 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1569 for (i = 0; i < NUM_TX_DESC; i++) { 1570 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1571 1572 if (skb) { 1573 dma_unmap_single(&sis_priv->pci_dev->dev, 1574 sis_priv->tx_ring[i].bufptr, 1575 skb->len, DMA_TO_DEVICE); 1576 dev_kfree_skb_irq(skb); 1577 sis_priv->tx_skbuff[i] = NULL; 1578 sis_priv->tx_ring[i].cmdsts = 0; 1579 sis_priv->tx_ring[i].bufptr = 0; 1580 net_dev->stats.tx_dropped++; 1581 } 1582 } 1583 sis_priv->tx_full = 0; 1584 netif_wake_queue(net_dev); 1585 1586 spin_unlock_irqrestore(&sis_priv->lock, flags); 1587 1588 netif_trans_update(net_dev); /* prevent tx timeout */ 1589 1590 /* load Transmit Descriptor Register */ 1591 sw32(txdp, sis_priv->tx_ring_dma); 1592 1593 /* Enable all known interrupts by setting the interrupt mask. */ 1594 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1595 } 1596 1597 /** 1598 * sis900_start_xmit - sis900 start transmit routine 1599 * @skb: socket buffer pointer to put the data being transmitted 1600 * @net_dev: the net device to transmit with 1601 * 1602 * Set the transmit buffer descriptor, 1603 * and write TxENA to enable transmit state machine. 1604 * tell upper layer if the buffer is full 1605 */ 1606 1607 static netdev_tx_t 1608 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1609 { 1610 struct sis900_private *sis_priv = netdev_priv(net_dev); 1611 void __iomem *ioaddr = sis_priv->ioaddr; 1612 unsigned int entry; 1613 unsigned long flags; 1614 unsigned int index_cur_tx, index_dirty_tx; 1615 unsigned int count_dirty_tx; 1616 1617 spin_lock_irqsave(&sis_priv->lock, flags); 1618 1619 /* Calculate the next Tx descriptor entry. */ 1620 entry = sis_priv->cur_tx % NUM_TX_DESC; 1621 sis_priv->tx_skbuff[entry] = skb; 1622 1623 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1624 sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1625 skb->data, skb->len, 1626 DMA_TO_DEVICE); 1627 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1628 sis_priv->tx_ring[entry].bufptr))) { 1629 dev_kfree_skb_any(skb); 1630 sis_priv->tx_skbuff[entry] = NULL; 1631 net_dev->stats.tx_dropped++; 1632 spin_unlock_irqrestore(&sis_priv->lock, flags); 1633 return NETDEV_TX_OK; 1634 } 1635 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); 1636 sw32(cr, TxENA | sr32(cr)); 1637 1638 sis_priv->cur_tx ++; 1639 index_cur_tx = sis_priv->cur_tx; 1640 index_dirty_tx = sis_priv->dirty_tx; 1641 1642 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1643 count_dirty_tx ++; 1644 1645 if (index_cur_tx == index_dirty_tx) { 1646 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1647 sis_priv->tx_full = 1; 1648 netif_stop_queue(net_dev); 1649 } else if (count_dirty_tx < NUM_TX_DESC) { 1650 /* Typical path, tell upper layer that more transmission is possible */ 1651 netif_start_queue(net_dev); 1652 } else { 1653 /* buffer full, tell upper layer no more transmission */ 1654 sis_priv->tx_full = 1; 1655 netif_stop_queue(net_dev); 1656 } 1657 1658 spin_unlock_irqrestore(&sis_priv->lock, flags); 1659 1660 if (netif_msg_tx_queued(sis_priv)) 1661 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1662 "to slot %d.\n", 1663 net_dev->name, skb->data, (int)skb->len, entry); 1664 1665 return NETDEV_TX_OK; 1666 } 1667 1668 /** 1669 * sis900_interrupt - sis900 interrupt handler 1670 * @irq: the irq number 1671 * @dev_instance: the client data object 1672 * 1673 * The interrupt handler does all of the Rx thread work, 1674 * and cleans up after the Tx thread 1675 */ 1676 1677 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1678 { 1679 struct net_device *net_dev = dev_instance; 1680 struct sis900_private *sis_priv = netdev_priv(net_dev); 1681 int boguscnt = max_interrupt_work; 1682 void __iomem *ioaddr = sis_priv->ioaddr; 1683 u32 status; 1684 unsigned int handled = 0; 1685 1686 spin_lock (&sis_priv->lock); 1687 1688 do { 1689 status = sr32(isr); 1690 1691 if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0) 1692 /* nothing interesting happened */ 1693 break; 1694 handled = 1; 1695 1696 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1697 if (status & (RxORN | RxERR | RxOK)) 1698 /* Rx interrupt */ 1699 sis900_rx(net_dev); 1700 1701 if (status & (TxURN | TxERR | TxDESC)) 1702 /* Tx interrupt */ 1703 sis900_finish_xmit(net_dev); 1704 1705 /* something strange happened !!! */ 1706 if (status & HIBERR) { 1707 if(netif_msg_intr(sis_priv)) 1708 printk(KERN_INFO "%s: Abnormal interrupt, " 1709 "status %#8.8x.\n", net_dev->name, status); 1710 break; 1711 } 1712 if (--boguscnt < 0) { 1713 if(netif_msg_intr(sis_priv)) 1714 printk(KERN_INFO "%s: Too much work at interrupt, " 1715 "interrupt status = %#8.8x.\n", 1716 net_dev->name, status); 1717 break; 1718 } 1719 } while (1); 1720 1721 if(netif_msg_intr(sis_priv)) 1722 printk(KERN_DEBUG "%s: exiting interrupt, " 1723 "interrupt status = %#8.8x\n", 1724 net_dev->name, sr32(isr)); 1725 1726 spin_unlock (&sis_priv->lock); 1727 return IRQ_RETVAL(handled); 1728 } 1729 1730 /** 1731 * sis900_rx - sis900 receive routine 1732 * @net_dev: the net device which receives data 1733 * 1734 * Process receive interrupt events, 1735 * put buffer to higher layer and refill buffer pool 1736 * Note: This function is called by interrupt handler, 1737 * don't do "too much" work here 1738 */ 1739 1740 static int sis900_rx(struct net_device *net_dev) 1741 { 1742 struct sis900_private *sis_priv = netdev_priv(net_dev); 1743 void __iomem *ioaddr = sis_priv->ioaddr; 1744 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1745 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1746 int rx_work_limit; 1747 1748 if (netif_msg_rx_status(sis_priv)) 1749 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1750 "status:0x%8.8x\n", 1751 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1752 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1753 1754 while (rx_status & OWN) { 1755 unsigned int rx_size; 1756 unsigned int data_size; 1757 1758 if (--rx_work_limit < 0) 1759 break; 1760 1761 data_size = rx_status & DSIZE; 1762 rx_size = data_size - CRC_SIZE; 1763 1764 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1765 /* ``TOOLONG'' flag means jumbo packet received. */ 1766 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1767 rx_status &= (~ ((unsigned int)TOOLONG)); 1768 #endif 1769 1770 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1771 /* corrupted packet received */ 1772 if (netif_msg_rx_err(sis_priv)) 1773 printk(KERN_DEBUG "%s: Corrupted packet " 1774 "received, buffer status = 0x%8.8x/%d.\n", 1775 net_dev->name, rx_status, data_size); 1776 net_dev->stats.rx_errors++; 1777 if (rx_status & OVERRUN) 1778 net_dev->stats.rx_over_errors++; 1779 if (rx_status & (TOOLONG|RUNT)) 1780 net_dev->stats.rx_length_errors++; 1781 if (rx_status & (RXISERR | FAERR)) 1782 net_dev->stats.rx_frame_errors++; 1783 if (rx_status & CRCERR) 1784 net_dev->stats.rx_crc_errors++; 1785 /* reset buffer descriptor state */ 1786 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1787 } else { 1788 struct sk_buff * skb; 1789 struct sk_buff * rx_skb; 1790 1791 dma_unmap_single(&sis_priv->pci_dev->dev, 1792 sis_priv->rx_ring[entry].bufptr, 1793 RX_BUF_SIZE, DMA_FROM_DEVICE); 1794 1795 /* refill the Rx buffer, what if there is not enough 1796 * memory for new socket buffer ?? */ 1797 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1798 /* 1799 * Not enough memory to refill the buffer 1800 * so we need to recycle the old one so 1801 * as to avoid creating a memory hole 1802 * in the rx ring 1803 */ 1804 skb = sis_priv->rx_skbuff[entry]; 1805 net_dev->stats.rx_dropped++; 1806 goto refill_rx_ring; 1807 } 1808 1809 /* This situation should never happen, but due to 1810 some unknown bugs, it is possible that 1811 we are working on NULL sk_buff :-( */ 1812 if (sis_priv->rx_skbuff[entry] == NULL) { 1813 if (netif_msg_rx_err(sis_priv)) 1814 printk(KERN_WARNING "%s: NULL pointer " 1815 "encountered in Rx ring\n" 1816 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1817 net_dev->name, sis_priv->cur_rx, 1818 sis_priv->dirty_rx); 1819 dev_kfree_skb(skb); 1820 break; 1821 } 1822 1823 /* give the socket buffer to upper layers */ 1824 rx_skb = sis_priv->rx_skbuff[entry]; 1825 skb_put(rx_skb, rx_size); 1826 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1827 netif_rx(rx_skb); 1828 1829 /* some network statistics */ 1830 if ((rx_status & BCAST) == MCAST) 1831 net_dev->stats.multicast++; 1832 net_dev->stats.rx_bytes += rx_size; 1833 net_dev->stats.rx_packets++; 1834 sis_priv->dirty_rx++; 1835 refill_rx_ring: 1836 sis_priv->rx_skbuff[entry] = skb; 1837 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1838 sis_priv->rx_ring[entry].bufptr = 1839 dma_map_single(&sis_priv->pci_dev->dev, 1840 skb->data, RX_BUF_SIZE, 1841 DMA_FROM_DEVICE); 1842 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1843 sis_priv->rx_ring[entry].bufptr))) { 1844 dev_kfree_skb_irq(skb); 1845 sis_priv->rx_skbuff[entry] = NULL; 1846 break; 1847 } 1848 } 1849 sis_priv->cur_rx++; 1850 entry = sis_priv->cur_rx % NUM_RX_DESC; 1851 rx_status = sis_priv->rx_ring[entry].cmdsts; 1852 } // while 1853 1854 /* refill the Rx buffer, what if the rate of refilling is slower 1855 * than consuming ?? */ 1856 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1857 struct sk_buff *skb; 1858 1859 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1860 1861 if (sis_priv->rx_skbuff[entry] == NULL) { 1862 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); 1863 if (skb == NULL) { 1864 /* not enough memory for skbuff, this makes a 1865 * "hole" on the buffer ring, it is not clear 1866 * how the hardware will react to this kind 1867 * of degenerated buffer */ 1868 net_dev->stats.rx_dropped++; 1869 break; 1870 } 1871 sis_priv->rx_skbuff[entry] = skb; 1872 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1873 sis_priv->rx_ring[entry].bufptr = 1874 dma_map_single(&sis_priv->pci_dev->dev, 1875 skb->data, RX_BUF_SIZE, 1876 DMA_FROM_DEVICE); 1877 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1878 sis_priv->rx_ring[entry].bufptr))) { 1879 dev_kfree_skb_irq(skb); 1880 sis_priv->rx_skbuff[entry] = NULL; 1881 break; 1882 } 1883 } 1884 } 1885 /* re-enable the potentially idle receive state matchine */ 1886 sw32(cr , RxENA | sr32(cr)); 1887 1888 return 0; 1889 } 1890 1891 /** 1892 * sis900_finish_xmit - finish up transmission of packets 1893 * @net_dev: the net device to be transmitted on 1894 * 1895 * Check for error condition and free socket buffer etc 1896 * schedule for more transmission as needed 1897 * Note: This function is called by interrupt handler, 1898 * don't do "too much" work here 1899 */ 1900 1901 static void sis900_finish_xmit (struct net_device *net_dev) 1902 { 1903 struct sis900_private *sis_priv = netdev_priv(net_dev); 1904 1905 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1906 struct sk_buff *skb; 1907 unsigned int entry; 1908 u32 tx_status; 1909 1910 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1911 tx_status = sis_priv->tx_ring[entry].cmdsts; 1912 1913 if (tx_status & OWN) { 1914 /* The packet is not transmitted yet (owned by hardware) ! 1915 * Note: this is an almost impossible condition 1916 * on TxDESC interrupt ('descriptor interrupt') */ 1917 break; 1918 } 1919 1920 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1921 /* packet unsuccessfully transmitted */ 1922 if (netif_msg_tx_err(sis_priv)) 1923 printk(KERN_DEBUG "%s: Transmit " 1924 "error, Tx status %8.8x.\n", 1925 net_dev->name, tx_status); 1926 net_dev->stats.tx_errors++; 1927 if (tx_status & UNDERRUN) 1928 net_dev->stats.tx_fifo_errors++; 1929 if (tx_status & ABORT) 1930 net_dev->stats.tx_aborted_errors++; 1931 if (tx_status & NOCARRIER) 1932 net_dev->stats.tx_carrier_errors++; 1933 if (tx_status & OWCOLL) 1934 net_dev->stats.tx_window_errors++; 1935 } else { 1936 /* packet successfully transmitted */ 1937 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1938 net_dev->stats.tx_bytes += tx_status & DSIZE; 1939 net_dev->stats.tx_packets++; 1940 } 1941 /* Free the original skb. */ 1942 skb = sis_priv->tx_skbuff[entry]; 1943 dma_unmap_single(&sis_priv->pci_dev->dev, 1944 sis_priv->tx_ring[entry].bufptr, skb->len, 1945 DMA_TO_DEVICE); 1946 dev_consume_skb_irq(skb); 1947 sis_priv->tx_skbuff[entry] = NULL; 1948 sis_priv->tx_ring[entry].bufptr = 0; 1949 sis_priv->tx_ring[entry].cmdsts = 0; 1950 } 1951 1952 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1953 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1954 /* The ring is no longer full, clear tx_full and schedule 1955 * more transmission by netif_wake_queue(net_dev) */ 1956 sis_priv->tx_full = 0; 1957 netif_wake_queue (net_dev); 1958 } 1959 } 1960 1961 /** 1962 * sis900_close - close sis900 device 1963 * @net_dev: the net device to be closed 1964 * 1965 * Disable interrupts, stop the Tx and Rx Status Machine 1966 * free Tx and RX socket buffer 1967 */ 1968 1969 static int sis900_close(struct net_device *net_dev) 1970 { 1971 struct sis900_private *sis_priv = netdev_priv(net_dev); 1972 struct pci_dev *pdev = sis_priv->pci_dev; 1973 void __iomem *ioaddr = sis_priv->ioaddr; 1974 struct sk_buff *skb; 1975 int i; 1976 1977 netif_stop_queue(net_dev); 1978 1979 /* Disable interrupts by clearing the interrupt mask. */ 1980 sw32(imr, 0x0000); 1981 sw32(ier, 0x0000); 1982 1983 /* Stop the chip's Tx and Rx Status Machine */ 1984 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1985 1986 del_timer(&sis_priv->timer); 1987 1988 free_irq(pdev->irq, net_dev); 1989 1990 /* Free Tx and RX skbuff */ 1991 for (i = 0; i < NUM_RX_DESC; i++) { 1992 skb = sis_priv->rx_skbuff[i]; 1993 if (skb) { 1994 dma_unmap_single(&pdev->dev, 1995 sis_priv->rx_ring[i].bufptr, 1996 RX_BUF_SIZE, DMA_FROM_DEVICE); 1997 dev_kfree_skb(skb); 1998 sis_priv->rx_skbuff[i] = NULL; 1999 } 2000 } 2001 for (i = 0; i < NUM_TX_DESC; i++) { 2002 skb = sis_priv->tx_skbuff[i]; 2003 if (skb) { 2004 dma_unmap_single(&pdev->dev, 2005 sis_priv->tx_ring[i].bufptr, 2006 skb->len, DMA_TO_DEVICE); 2007 dev_kfree_skb(skb); 2008 sis_priv->tx_skbuff[i] = NULL; 2009 } 2010 } 2011 2012 /* Green! Put the chip in low-power mode. */ 2013 2014 return 0; 2015 } 2016 2017 /** 2018 * sis900_get_drvinfo - Return information about driver 2019 * @net_dev: the net device to probe 2020 * @info: container for info returned 2021 * 2022 * Process ethtool command such as "ehtool -i" to show information 2023 */ 2024 2025 static void sis900_get_drvinfo(struct net_device *net_dev, 2026 struct ethtool_drvinfo *info) 2027 { 2028 struct sis900_private *sis_priv = netdev_priv(net_dev); 2029 2030 strscpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2031 strscpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2032 strscpy(info->bus_info, pci_name(sis_priv->pci_dev), 2033 sizeof(info->bus_info)); 2034 } 2035 2036 static u32 sis900_get_msglevel(struct net_device *net_dev) 2037 { 2038 struct sis900_private *sis_priv = netdev_priv(net_dev); 2039 return sis_priv->msg_enable; 2040 } 2041 2042 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2043 { 2044 struct sis900_private *sis_priv = netdev_priv(net_dev); 2045 sis_priv->msg_enable = value; 2046 } 2047 2048 static u32 sis900_get_link(struct net_device *net_dev) 2049 { 2050 struct sis900_private *sis_priv = netdev_priv(net_dev); 2051 return mii_link_ok(&sis_priv->mii_info); 2052 } 2053 2054 static int sis900_get_link_ksettings(struct net_device *net_dev, 2055 struct ethtool_link_ksettings *cmd) 2056 { 2057 struct sis900_private *sis_priv = netdev_priv(net_dev); 2058 spin_lock_irq(&sis_priv->lock); 2059 mii_ethtool_get_link_ksettings(&sis_priv->mii_info, cmd); 2060 spin_unlock_irq(&sis_priv->lock); 2061 return 0; 2062 } 2063 2064 static int sis900_set_link_ksettings(struct net_device *net_dev, 2065 const struct ethtool_link_ksettings *cmd) 2066 { 2067 struct sis900_private *sis_priv = netdev_priv(net_dev); 2068 int rt; 2069 spin_lock_irq(&sis_priv->lock); 2070 rt = mii_ethtool_set_link_ksettings(&sis_priv->mii_info, cmd); 2071 spin_unlock_irq(&sis_priv->lock); 2072 return rt; 2073 } 2074 2075 static int sis900_nway_reset(struct net_device *net_dev) 2076 { 2077 struct sis900_private *sis_priv = netdev_priv(net_dev); 2078 return mii_nway_restart(&sis_priv->mii_info); 2079 } 2080 2081 /** 2082 * sis900_set_wol - Set up Wake on Lan registers 2083 * @net_dev: the net device to probe 2084 * @wol: container for info passed to the driver 2085 * 2086 * Process ethtool command "wol" to setup wake on lan features. 2087 * SiS900 supports sending WoL events if a correct packet is received, 2088 * but there is no simple way to filter them to only a subset (broadcast, 2089 * multicast, unicast or arp). 2090 */ 2091 2092 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2093 { 2094 struct sis900_private *sis_priv = netdev_priv(net_dev); 2095 void __iomem *ioaddr = sis_priv->ioaddr; 2096 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2097 2098 if (wol->wolopts == 0) { 2099 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2100 cfgpmcsr &= ~PME_EN; 2101 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2102 sw32(pmctrl, pmctrl_bits); 2103 if (netif_msg_wol(sis_priv)) 2104 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2105 return 0; 2106 } 2107 2108 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2109 | WAKE_BCAST | WAKE_ARP)) 2110 return -EINVAL; 2111 2112 if (wol->wolopts & WAKE_MAGIC) 2113 pmctrl_bits |= MAGICPKT; 2114 if (wol->wolopts & WAKE_PHY) 2115 pmctrl_bits |= LINKON; 2116 2117 sw32(pmctrl, pmctrl_bits); 2118 2119 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2120 cfgpmcsr |= PME_EN; 2121 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2122 if (netif_msg_wol(sis_priv)) 2123 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2124 2125 return 0; 2126 } 2127 2128 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2129 { 2130 struct sis900_private *sp = netdev_priv(net_dev); 2131 void __iomem *ioaddr = sp->ioaddr; 2132 u32 pmctrl_bits; 2133 2134 pmctrl_bits = sr32(pmctrl); 2135 if (pmctrl_bits & MAGICPKT) 2136 wol->wolopts |= WAKE_MAGIC; 2137 if (pmctrl_bits & LINKON) 2138 wol->wolopts |= WAKE_PHY; 2139 2140 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2141 } 2142 2143 static int sis900_get_eeprom_len(struct net_device *dev) 2144 { 2145 struct sis900_private *sis_priv = netdev_priv(dev); 2146 2147 return sis_priv->eeprom_size; 2148 } 2149 2150 static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf) 2151 { 2152 struct sis900_private *sis_priv = netdev_priv(net_dev); 2153 void __iomem *ioaddr = sis_priv->ioaddr; 2154 int wait, ret = -EAGAIN; 2155 u16 signature; 2156 u16 *ebuf = (u16 *)buf; 2157 int i; 2158 2159 if (sis_priv->chipset_rev == SIS96x_900_REV) { 2160 sw32(mear, EEREQ); 2161 for (wait = 0; wait < 2000; wait++) { 2162 if (sr32(mear) & EEGNT) { 2163 /* read 16 bits, and index by 16 bits */ 2164 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2165 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2166 ret = 0; 2167 break; 2168 } 2169 udelay(1); 2170 } 2171 sw32(mear, EEDONE); 2172 } else { 2173 signature = (u16)read_eeprom(ioaddr, EEPROMSignature); 2174 if (signature != 0xffff && signature != 0x0000) { 2175 /* read 16 bits, and index by 16 bits */ 2176 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2177 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2178 ret = 0; 2179 } 2180 } 2181 return ret; 2182 } 2183 2184 #define SIS900_EEPROM_MAGIC 0xBABE 2185 static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 2186 { 2187 struct sis900_private *sis_priv = netdev_priv(dev); 2188 u8 *eebuf; 2189 int res; 2190 2191 eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL); 2192 if (!eebuf) 2193 return -ENOMEM; 2194 2195 eeprom->magic = SIS900_EEPROM_MAGIC; 2196 spin_lock_irq(&sis_priv->lock); 2197 res = sis900_read_eeprom(dev, eebuf); 2198 spin_unlock_irq(&sis_priv->lock); 2199 if (!res) 2200 memcpy(data, eebuf + eeprom->offset, eeprom->len); 2201 kfree(eebuf); 2202 return res; 2203 } 2204 2205 static const struct ethtool_ops sis900_ethtool_ops = { 2206 .get_drvinfo = sis900_get_drvinfo, 2207 .get_msglevel = sis900_get_msglevel, 2208 .set_msglevel = sis900_set_msglevel, 2209 .get_link = sis900_get_link, 2210 .nway_reset = sis900_nway_reset, 2211 .get_wol = sis900_get_wol, 2212 .set_wol = sis900_set_wol, 2213 .get_link_ksettings = sis900_get_link_ksettings, 2214 .set_link_ksettings = sis900_set_link_ksettings, 2215 .get_eeprom_len = sis900_get_eeprom_len, 2216 .get_eeprom = sis900_get_eeprom, 2217 }; 2218 2219 /** 2220 * mii_ioctl - process MII i/o control command 2221 * @net_dev: the net device to command for 2222 * @rq: parameter for command 2223 * @cmd: the i/o command 2224 * 2225 * Process MII command like read/write MII register 2226 */ 2227 2228 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2229 { 2230 struct sis900_private *sis_priv = netdev_priv(net_dev); 2231 struct mii_ioctl_data *data = if_mii(rq); 2232 2233 switch(cmd) { 2234 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2235 data->phy_id = sis_priv->mii->phy_addr; 2236 fallthrough; 2237 2238 case SIOCGMIIREG: /* Read MII PHY register. */ 2239 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2240 return 0; 2241 2242 case SIOCSMIIREG: /* Write MII PHY register. */ 2243 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2244 return 0; 2245 default: 2246 return -EOPNOTSUPP; 2247 } 2248 } 2249 2250 /** 2251 * sis900_set_config - Set media type by net_device.set_config 2252 * @dev: the net device for media type change 2253 * @map: ifmap passed by ifconfig 2254 * 2255 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2256 * we support only port changes. All other runtime configuration 2257 * changes will be ignored 2258 */ 2259 2260 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2261 { 2262 struct sis900_private *sis_priv = netdev_priv(dev); 2263 struct mii_phy *mii_phy = sis_priv->mii; 2264 2265 u16 status; 2266 2267 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2268 /* we switch on the ifmap->port field. I couldn't find anything 2269 * like a definition or standard for the values of that field. 2270 * I think the meaning of those values is device specific. But 2271 * since I would like to change the media type via the ifconfig 2272 * command I use the definition from linux/netdevice.h 2273 * (which seems to be different from the ifport(pcmcia) definition) */ 2274 switch(map->port){ 2275 case IF_PORT_UNKNOWN: /* use auto here */ 2276 WRITE_ONCE(dev->if_port, map->port); 2277 /* we are going to change the media type, so the Link 2278 * will be temporary down and we need to reflect that 2279 * here. When the Link comes up again, it will be 2280 * sensed by the sis_timer procedure, which also does 2281 * all the rest for us */ 2282 netif_carrier_off(dev); 2283 2284 /* read current state */ 2285 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2286 2287 /* enable auto negotiation and reset the negotioation 2288 * (I don't really know what the auto negatiotiation 2289 * reset really means, but it sounds for me right to 2290 * do one here) */ 2291 mdio_write(dev, mii_phy->phy_addr, 2292 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2293 2294 break; 2295 2296 case IF_PORT_10BASET: /* 10BaseT */ 2297 WRITE_ONCE(dev->if_port, map->port); 2298 2299 /* we are going to change the media type, so the Link 2300 * will be temporary down and we need to reflect that 2301 * here. When the Link comes up again, it will be 2302 * sensed by the sis_timer procedure, which also does 2303 * all the rest for us */ 2304 netif_carrier_off(dev); 2305 2306 /* set Speed to 10Mbps */ 2307 /* read current state */ 2308 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2309 2310 /* disable auto negotiation and force 10MBit mode*/ 2311 mdio_write(dev, mii_phy->phy_addr, 2312 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2313 MII_CNTL_AUTO)); 2314 break; 2315 2316 case IF_PORT_100BASET: /* 100BaseT */ 2317 case IF_PORT_100BASETX: /* 100BaseTx */ 2318 WRITE_ONCE(dev->if_port, map->port); 2319 2320 /* we are going to change the media type, so the Link 2321 * will be temporary down and we need to reflect that 2322 * here. When the Link comes up again, it will be 2323 * sensed by the sis_timer procedure, which also does 2324 * all the rest for us */ 2325 netif_carrier_off(dev); 2326 2327 /* set Speed to 100Mbps */ 2328 /* disable auto negotiation and enable 100MBit Mode */ 2329 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2330 mdio_write(dev, mii_phy->phy_addr, 2331 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2332 MII_CNTL_SPEED); 2333 2334 break; 2335 2336 case IF_PORT_10BASE2: /* 10Base2 */ 2337 case IF_PORT_AUI: /* AUI */ 2338 case IF_PORT_100BASEFX: /* 100BaseFx */ 2339 /* These Modes are not supported (are they?)*/ 2340 return -EOPNOTSUPP; 2341 2342 default: 2343 return -EINVAL; 2344 } 2345 } 2346 return 0; 2347 } 2348 2349 /** 2350 * sis900_mcast_bitnr - compute hashtable index 2351 * @addr: multicast address 2352 * @revision: revision id of chip 2353 * 2354 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2355 * hash table, which makes this function a little bit different from other drivers 2356 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2357 * multicast hash table. 2358 */ 2359 2360 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2361 { 2362 2363 u32 crc = ether_crc(6, addr); 2364 2365 /* leave 8 or 7 most siginifant bits */ 2366 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2367 return (int)(crc >> 24); 2368 else 2369 return (int)(crc >> 25); 2370 } 2371 2372 /** 2373 * set_rx_mode - Set SiS900 receive mode 2374 * @net_dev: the net device to be set 2375 * 2376 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2377 * And set the appropriate multicast filter. 2378 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2379 */ 2380 2381 static void set_rx_mode(struct net_device *net_dev) 2382 { 2383 struct sis900_private *sis_priv = netdev_priv(net_dev); 2384 void __iomem *ioaddr = sis_priv->ioaddr; 2385 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2386 int i, table_entries; 2387 u32 rx_mode; 2388 2389 /* 635 Hash Table entries = 256(2^16) */ 2390 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2391 (sis_priv->chipset_rev == SIS900B_900_REV)) 2392 table_entries = 16; 2393 else 2394 table_entries = 8; 2395 2396 if (net_dev->flags & IFF_PROMISC) { 2397 /* Accept any kinds of packets */ 2398 rx_mode = RFPromiscuous; 2399 for (i = 0; i < table_entries; i++) 2400 mc_filter[i] = 0xffff; 2401 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2402 (net_dev->flags & IFF_ALLMULTI)) { 2403 /* too many multicast addresses or accept all multicast packet */ 2404 rx_mode = RFAAB | RFAAM; 2405 for (i = 0; i < table_entries; i++) 2406 mc_filter[i] = 0xffff; 2407 } else { 2408 /* Accept Broadcast packet, destination address matchs our 2409 * MAC address, use Receive Filter to reject unwanted MCAST 2410 * packets */ 2411 struct netdev_hw_addr *ha; 2412 rx_mode = RFAAB; 2413 2414 netdev_for_each_mc_addr(ha, net_dev) { 2415 unsigned int bit_nr; 2416 2417 bit_nr = sis900_mcast_bitnr(ha->addr, 2418 sis_priv->chipset_rev); 2419 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2420 } 2421 } 2422 2423 /* update Multicast Hash Table in Receive Filter */ 2424 for (i = 0; i < table_entries; i++) { 2425 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2426 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2427 sw32(rfdr, mc_filter[i]); 2428 } 2429 2430 sw32(rfcr, RFEN | rx_mode); 2431 2432 /* sis900 is capable of looping back packets at MAC level for 2433 * debugging purpose */ 2434 if (net_dev->flags & IFF_LOOPBACK) { 2435 u32 cr_saved; 2436 /* We must disable Tx/Rx before setting loopback mode */ 2437 cr_saved = sr32(cr); 2438 sw32(cr, cr_saved | TxDIS | RxDIS); 2439 /* enable loopback */ 2440 sw32(txcfg, sr32(txcfg) | TxMLB); 2441 sw32(rxcfg, sr32(rxcfg) | RxATX); 2442 /* restore cr */ 2443 sw32(cr, cr_saved); 2444 } 2445 } 2446 2447 /** 2448 * sis900_reset - Reset sis900 MAC 2449 * @net_dev: the net device to reset 2450 * 2451 * reset sis900 MAC and wait until finished 2452 * reset through command register 2453 * change backoff algorithm for 900B0 & 635 M/B 2454 */ 2455 2456 static void sis900_reset(struct net_device *net_dev) 2457 { 2458 struct sis900_private *sis_priv = netdev_priv(net_dev); 2459 void __iomem *ioaddr = sis_priv->ioaddr; 2460 u32 status = TxRCMP | RxRCMP; 2461 int i; 2462 2463 sw32(ier, 0); 2464 sw32(imr, 0); 2465 sw32(rfcr, 0); 2466 2467 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2468 2469 /* Check that the chip has finished the reset. */ 2470 for (i = 0; status && (i < 1000); i++) 2471 status ^= sr32(isr) & status; 2472 2473 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2474 sis_priv->chipset_rev == SIS900B_900_REV) 2475 sw32(cfg, PESEL | RND_CNT); 2476 else 2477 sw32(cfg, PESEL); 2478 } 2479 2480 /** 2481 * sis900_remove - Remove sis900 device 2482 * @pci_dev: the pci device to be removed 2483 * 2484 * remove and release SiS900 net device 2485 */ 2486 2487 static void sis900_remove(struct pci_dev *pci_dev) 2488 { 2489 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2490 struct sis900_private *sis_priv = netdev_priv(net_dev); 2491 2492 unregister_netdev(net_dev); 2493 2494 while (sis_priv->first_mii) { 2495 struct mii_phy *phy = sis_priv->first_mii; 2496 2497 sis_priv->first_mii = phy->next; 2498 kfree(phy); 2499 } 2500 2501 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2502 sis_priv->rx_ring_dma); 2503 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2504 sis_priv->tx_ring_dma); 2505 pci_iounmap(pci_dev, sis_priv->ioaddr); 2506 free_netdev(net_dev); 2507 } 2508 2509 static int __maybe_unused sis900_suspend(struct device *dev) 2510 { 2511 struct net_device *net_dev = dev_get_drvdata(dev); 2512 struct sis900_private *sis_priv = netdev_priv(net_dev); 2513 void __iomem *ioaddr = sis_priv->ioaddr; 2514 2515 if(!netif_running(net_dev)) 2516 return 0; 2517 2518 netif_stop_queue(net_dev); 2519 netif_device_detach(net_dev); 2520 2521 /* Stop the chip's Tx and Rx Status Machine */ 2522 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2523 2524 return 0; 2525 } 2526 2527 static int __maybe_unused sis900_resume(struct device *dev) 2528 { 2529 struct net_device *net_dev = dev_get_drvdata(dev); 2530 struct sis900_private *sis_priv = netdev_priv(net_dev); 2531 void __iomem *ioaddr = sis_priv->ioaddr; 2532 2533 if(!netif_running(net_dev)) 2534 return 0; 2535 2536 sis900_init_rxfilter(net_dev); 2537 2538 sis900_init_tx_ring(net_dev); 2539 sis900_init_rx_ring(net_dev); 2540 2541 set_rx_mode(net_dev); 2542 2543 netif_device_attach(net_dev); 2544 netif_start_queue(net_dev); 2545 2546 /* Workaround for EDB */ 2547 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2548 2549 /* Enable all known interrupts by setting the interrupt mask. */ 2550 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 2551 sw32(cr, RxENA | sr32(cr)); 2552 sw32(ier, IE); 2553 2554 sis900_check_mode(net_dev, sis_priv->mii); 2555 2556 return 0; 2557 } 2558 2559 static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume); 2560 2561 static struct pci_driver sis900_pci_driver = { 2562 .name = SIS900_MODULE_NAME, 2563 .id_table = sis900_pci_tbl, 2564 .probe = sis900_probe, 2565 .remove = sis900_remove, 2566 .driver.pm = &sis900_pm_ops, 2567 }; 2568 2569 static int __init sis900_init_module(void) 2570 { 2571 /* when a module, this is printed whether or not devices are found in probe */ 2572 #ifdef MODULE 2573 printk(version); 2574 #endif 2575 2576 return pci_register_driver(&sis900_pci_driver); 2577 } 2578 2579 static void __exit sis900_cleanup_module(void) 2580 { 2581 pci_unregister_driver(&sis900_pci_driver); 2582 } 2583 2584 module_init(sis900_init_module); 2585 module_exit(sis900_cleanup_module); 2586 2587