1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <asm/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = { 110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 114 {0,} 115 }; 116 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 117 118 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 119 120 static const struct mii_chip_info { 121 const char * name; 122 u16 phy_id0; 123 u16 phy_id1; 124 u8 phy_types; 125 #define HOME 0x0001 126 #define LAN 0x0002 127 #define MIX 0x0003 128 #define UNKNOWN 0x0 129 } mii_chip_table[] = { 130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 137 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 143 {NULL,}, 144 }; 145 146 struct mii_phy { 147 struct mii_phy * next; 148 int phy_addr; 149 u16 phy_id0; 150 u16 phy_id1; 151 u16 status; 152 u8 phy_types; 153 }; 154 155 typedef struct _BufferDesc { 156 u32 link; 157 u32 cmdsts; 158 u32 bufptr; 159 } BufferDesc; 160 161 struct sis900_private { 162 struct pci_dev * pci_dev; 163 164 spinlock_t lock; 165 166 struct mii_phy * mii; 167 struct mii_phy * first_mii; /* record the first mii structure */ 168 unsigned int cur_phy; 169 struct mii_if_info mii_info; 170 171 void __iomem *ioaddr; 172 173 struct timer_list timer; /* Link status detection timer. */ 174 u8 autong_complete; /* 1: auto-negotiate complete */ 175 176 u32 msg_enable; 177 178 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ 179 unsigned int cur_tx, dirty_tx; 180 181 /* The saved address of a sent/receive-in-place packet buffer */ 182 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 183 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 184 BufferDesc *tx_ring; 185 BufferDesc *rx_ring; 186 187 dma_addr_t tx_ring_dma; 188 dma_addr_t rx_ring_dma; 189 190 unsigned int tx_full; /* The Tx queue is full. */ 191 u8 host_bridge_rev; 192 u8 chipset_rev; 193 }; 194 195 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 196 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 197 MODULE_LICENSE("GPL"); 198 199 module_param(multicast_filter_limit, int, 0444); 200 module_param(max_interrupt_work, int, 0444); 201 module_param(sis900_debug, int, 0444); 202 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 203 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 204 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 205 206 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 207 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 208 #define sr32(reg) ioread32(ioaddr + (reg)) 209 #define sr16(reg) ioread16(ioaddr + (reg)) 210 211 #ifdef CONFIG_NET_POLL_CONTROLLER 212 static void sis900_poll(struct net_device *dev); 213 #endif 214 static int sis900_open(struct net_device *net_dev); 215 static int sis900_mii_probe (struct net_device * net_dev); 216 static void sis900_init_rxfilter (struct net_device * net_dev); 217 static u16 read_eeprom(void __iomem *ioaddr, int location); 218 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 219 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 220 static void sis900_timer(unsigned long data); 221 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 222 static void sis900_tx_timeout(struct net_device *net_dev); 223 static void sis900_init_tx_ring(struct net_device *net_dev); 224 static void sis900_init_rx_ring(struct net_device *net_dev); 225 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 226 struct net_device *net_dev); 227 static int sis900_rx(struct net_device *net_dev); 228 static void sis900_finish_xmit (struct net_device *net_dev); 229 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 230 static int sis900_close(struct net_device *net_dev); 231 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 232 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 233 static void set_rx_mode(struct net_device *net_dev); 234 static void sis900_reset(struct net_device *net_dev); 235 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 236 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 237 static u16 sis900_default_phy(struct net_device * net_dev); 238 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 239 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 240 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 241 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 242 static const struct ethtool_ops sis900_ethtool_ops; 243 244 /** 245 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 246 * @pci_dev: the sis900 pci device 247 * @net_dev: the net device to get address for 248 * 249 * Older SiS900 and friends, use EEPROM to store MAC address. 250 * MAC address is read from read_eeprom() into @net_dev->dev_addr and 251 * @net_dev->perm_addr. 252 */ 253 254 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 255 struct net_device *net_dev) 256 { 257 struct sis900_private *sis_priv = netdev_priv(net_dev); 258 void __iomem *ioaddr = sis_priv->ioaddr; 259 u16 signature; 260 int i; 261 262 /* check to see if we have sane EEPROM */ 263 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 264 if (signature == 0xffff || signature == 0x0000) { 265 printk (KERN_WARNING "%s: Error EERPOM read %x\n", 266 pci_name(pci_dev), signature); 267 return 0; 268 } 269 270 /* get MAC address from EEPROM */ 271 for (i = 0; i < 3; i++) 272 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 273 274 /* Store MAC Address in perm_addr */ 275 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 276 277 return 1; 278 } 279 280 /** 281 * sis630e_get_mac_addr - Get MAC address for SiS630E model 282 * @pci_dev: the sis900 pci device 283 * @net_dev: the net device to get address for 284 * 285 * SiS630E model, use APC CMOS RAM to store MAC address. 286 * APC CMOS RAM is accessed through ISA bridge. 287 * MAC address is read into @net_dev->dev_addr and 288 * @net_dev->perm_addr. 289 */ 290 291 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 292 struct net_device *net_dev) 293 { 294 struct pci_dev *isa_bridge = NULL; 295 u8 reg; 296 int i; 297 298 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 299 if (!isa_bridge) 300 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 301 if (!isa_bridge) { 302 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 303 pci_name(pci_dev)); 304 return 0; 305 } 306 pci_read_config_byte(isa_bridge, 0x48, ®); 307 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 308 309 for (i = 0; i < 6; i++) { 310 outb(0x09 + i, 0x70); 311 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 312 } 313 314 /* Store MAC Address in perm_addr */ 315 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 316 317 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 318 pci_dev_put(isa_bridge); 319 320 return 1; 321 } 322 323 324 /** 325 * sis635_get_mac_addr - Get MAC address for SIS635 model 326 * @pci_dev: the sis900 pci device 327 * @net_dev: the net device to get address for 328 * 329 * SiS635 model, set MAC Reload Bit to load Mac address from APC 330 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 331 * @net_dev->dev_addr and @net_dev->perm_addr. 332 */ 333 334 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 335 struct net_device *net_dev) 336 { 337 struct sis900_private *sis_priv = netdev_priv(net_dev); 338 void __iomem *ioaddr = sis_priv->ioaddr; 339 u32 rfcrSave; 340 u32 i; 341 342 rfcrSave = sr32(rfcr); 343 344 sw32(cr, rfcrSave | RELOAD); 345 sw32(cr, 0); 346 347 /* disable packet filtering before setting filter */ 348 sw32(rfcr, rfcrSave & ~RFEN); 349 350 /* load MAC addr to filter data register */ 351 for (i = 0 ; i < 3 ; i++) { 352 sw32(rfcr, (i << RFADDR_shift)); 353 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr); 354 } 355 356 /* Store MAC Address in perm_addr */ 357 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 358 359 /* enable packet filtering */ 360 sw32(rfcr, rfcrSave | RFEN); 361 362 return 1; 363 } 364 365 /** 366 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 367 * @pci_dev: the sis900 pci device 368 * @net_dev: the net device to get address for 369 * 370 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 371 * is shared by 372 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first 373 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access 374 * by LAN, otherwise is not. After MAC address is read from EEPROM, send 375 * EEDONE signal to refuse EEPROM access by LAN. 376 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 377 * The signature field in SiS962 or SiS963 spec is meaningless. 378 * MAC address is read into @net_dev->dev_addr and @net_dev->perm_addr. 379 */ 380 381 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 382 struct net_device *net_dev) 383 { 384 struct sis900_private *sis_priv = netdev_priv(net_dev); 385 void __iomem *ioaddr = sis_priv->ioaddr; 386 int wait, rc = 0; 387 388 sw32(mear, EEREQ); 389 for (wait = 0; wait < 2000; wait++) { 390 if (sr32(mear) & EEGNT) { 391 u16 *mac = (u16 *)net_dev->dev_addr; 392 int i; 393 394 /* get MAC address from EEPROM */ 395 for (i = 0; i < 3; i++) 396 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 397 398 /* Store MAC Address in perm_addr */ 399 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 400 401 rc = 1; 402 break; 403 } 404 udelay(1); 405 } 406 sw32(mear, EEDONE); 407 return rc; 408 } 409 410 static const struct net_device_ops sis900_netdev_ops = { 411 .ndo_open = sis900_open, 412 .ndo_stop = sis900_close, 413 .ndo_start_xmit = sis900_start_xmit, 414 .ndo_set_config = sis900_set_config, 415 .ndo_set_rx_mode = set_rx_mode, 416 .ndo_change_mtu = eth_change_mtu, 417 .ndo_validate_addr = eth_validate_addr, 418 .ndo_set_mac_address = eth_mac_addr, 419 .ndo_do_ioctl = mii_ioctl, 420 .ndo_tx_timeout = sis900_tx_timeout, 421 #ifdef CONFIG_NET_POLL_CONTROLLER 422 .ndo_poll_controller = sis900_poll, 423 #endif 424 }; 425 426 /** 427 * sis900_probe - Probe for sis900 device 428 * @pci_dev: the sis900 pci device 429 * @pci_id: the pci device ID 430 * 431 * Check and probe sis900 net device for @pci_dev. 432 * Get mac address according to the chip revision, 433 * and assign SiS900-specific entries in the device structure. 434 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 435 */ 436 437 static int sis900_probe(struct pci_dev *pci_dev, 438 const struct pci_device_id *pci_id) 439 { 440 struct sis900_private *sis_priv; 441 struct net_device *net_dev; 442 struct pci_dev *dev; 443 dma_addr_t ring_dma; 444 void *ring_space; 445 void __iomem *ioaddr; 446 int i, ret; 447 const char *card_name = card_names[pci_id->driver_data]; 448 const char *dev_name = pci_name(pci_dev); 449 450 /* when built into the kernel, we only print version if device is found */ 451 #ifndef MODULE 452 static int printed_version; 453 if (!printed_version++) 454 printk(version); 455 #endif 456 457 /* setup various bits in PCI command register */ 458 ret = pci_enable_device(pci_dev); 459 if(ret) return ret; 460 461 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 462 if(i){ 463 printk(KERN_ERR "sis900.c: architecture does not support " 464 "32bit PCI busmaster DMA\n"); 465 return i; 466 } 467 468 pci_set_master(pci_dev); 469 470 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 471 if (!net_dev) 472 return -ENOMEM; 473 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 474 475 /* We do a request_region() to register /proc/ioports info. */ 476 ret = pci_request_regions(pci_dev, "sis900"); 477 if (ret) 478 goto err_out; 479 480 /* IO region. */ 481 ioaddr = pci_iomap(pci_dev, 0, 0); 482 if (!ioaddr) { 483 ret = -ENOMEM; 484 goto err_out_cleardev; 485 } 486 487 sis_priv = netdev_priv(net_dev); 488 sis_priv->ioaddr = ioaddr; 489 sis_priv->pci_dev = pci_dev; 490 spin_lock_init(&sis_priv->lock); 491 492 pci_set_drvdata(pci_dev, net_dev); 493 494 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 495 if (!ring_space) { 496 ret = -ENOMEM; 497 goto err_out_unmap; 498 } 499 sis_priv->tx_ring = ring_space; 500 sis_priv->tx_ring_dma = ring_dma; 501 502 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); 503 if (!ring_space) { 504 ret = -ENOMEM; 505 goto err_unmap_tx; 506 } 507 sis_priv->rx_ring = ring_space; 508 sis_priv->rx_ring_dma = ring_dma; 509 510 /* The SiS900-specific entries in the device structure. */ 511 net_dev->netdev_ops = &sis900_netdev_ops; 512 net_dev->watchdog_timeo = TX_TIMEOUT; 513 net_dev->ethtool_ops = &sis900_ethtool_ops; 514 515 if (sis900_debug > 0) 516 sis_priv->msg_enable = sis900_debug; 517 else 518 sis_priv->msg_enable = SIS900_DEF_MSG; 519 520 sis_priv->mii_info.dev = net_dev; 521 sis_priv->mii_info.mdio_read = mdio_read; 522 sis_priv->mii_info.mdio_write = mdio_write; 523 sis_priv->mii_info.phy_id_mask = 0x1f; 524 sis_priv->mii_info.reg_num_mask = 0x1f; 525 526 /* Get Mac address according to the chip revision */ 527 sis_priv->chipset_rev = pci_dev->revision; 528 if(netif_msg_probe(sis_priv)) 529 printk(KERN_DEBUG "%s: detected revision %2.2x, " 530 "trying to get MAC address...\n", 531 dev_name, sis_priv->chipset_rev); 532 533 ret = 0; 534 if (sis_priv->chipset_rev == SIS630E_900_REV) 535 ret = sis630e_get_mac_addr(pci_dev, net_dev); 536 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 537 ret = sis635_get_mac_addr(pci_dev, net_dev); 538 else if (sis_priv->chipset_rev == SIS96x_900_REV) 539 ret = sis96x_get_mac_addr(pci_dev, net_dev); 540 else 541 ret = sis900_get_mac_addr(pci_dev, net_dev); 542 543 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 544 eth_hw_addr_random(net_dev); 545 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 546 "using random generated one\n", dev_name); 547 } 548 549 /* 630ET : set the mii access mode as software-mode */ 550 if (sis_priv->chipset_rev == SIS630ET_900_REV) 551 sw32(cr, ACCESSMODE | sr32(cr)); 552 553 /* probe for mii transceiver */ 554 if (sis900_mii_probe(net_dev) == 0) { 555 printk(KERN_WARNING "%s: Error probing MII device.\n", 556 dev_name); 557 ret = -ENODEV; 558 goto err_unmap_rx; 559 } 560 561 /* save our host bridge revision */ 562 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 563 if (dev) { 564 sis_priv->host_bridge_rev = dev->revision; 565 pci_dev_put(dev); 566 } 567 568 ret = register_netdev(net_dev); 569 if (ret) 570 goto err_unmap_rx; 571 572 /* print some information about our NIC */ 573 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 574 net_dev->name, card_name, ioaddr, pci_dev->irq, 575 net_dev->dev_addr); 576 577 /* Detect Wake on Lan support */ 578 ret = (sr32(CFGPMC) & PMESP) >> 27; 579 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 580 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 581 582 return 0; 583 584 err_unmap_rx: 585 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 586 sis_priv->rx_ring_dma); 587 err_unmap_tx: 588 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 589 sis_priv->tx_ring_dma); 590 err_out_unmap: 591 pci_iounmap(pci_dev, ioaddr); 592 err_out_cleardev: 593 pci_set_drvdata(pci_dev, NULL); 594 pci_release_regions(pci_dev); 595 err_out: 596 free_netdev(net_dev); 597 return ret; 598 } 599 600 /** 601 * sis900_mii_probe - Probe MII PHY for sis900 602 * @net_dev: the net device to probe for 603 * 604 * Search for total of 32 possible mii phy addresses. 605 * Identify and set current phy if found one, 606 * return error if it failed to found. 607 */ 608 609 static int sis900_mii_probe(struct net_device *net_dev) 610 { 611 struct sis900_private *sis_priv = netdev_priv(net_dev); 612 const char *dev_name = pci_name(sis_priv->pci_dev); 613 u16 poll_bit = MII_STAT_LINK, status = 0; 614 unsigned long timeout = jiffies + 5 * HZ; 615 int phy_addr; 616 617 sis_priv->mii = NULL; 618 619 /* search for total of 32 possible mii phy addresses */ 620 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 621 struct mii_phy * mii_phy = NULL; 622 u16 mii_status; 623 int i; 624 625 mii_phy = NULL; 626 for(i = 0; i < 2; i++) 627 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 628 629 if (mii_status == 0xffff || mii_status == 0x0000) { 630 if (netif_msg_probe(sis_priv)) 631 printk(KERN_DEBUG "%s: MII at address %d" 632 " not accessible\n", 633 dev_name, phy_addr); 634 continue; 635 } 636 637 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 638 mii_phy = sis_priv->first_mii; 639 while (mii_phy) { 640 struct mii_phy *phy; 641 phy = mii_phy; 642 mii_phy = mii_phy->next; 643 kfree(phy); 644 } 645 return 0; 646 } 647 648 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 649 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 650 mii_phy->phy_addr = phy_addr; 651 mii_phy->status = mii_status; 652 mii_phy->next = sis_priv->mii; 653 sis_priv->mii = mii_phy; 654 sis_priv->first_mii = mii_phy; 655 656 for (i = 0; mii_chip_table[i].phy_id1; i++) 657 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 658 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 659 mii_phy->phy_types = mii_chip_table[i].phy_types; 660 if (mii_chip_table[i].phy_types == MIX) 661 mii_phy->phy_types = 662 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 663 printk(KERN_INFO "%s: %s transceiver found " 664 "at address %d.\n", 665 dev_name, 666 mii_chip_table[i].name, 667 phy_addr); 668 break; 669 } 670 671 if( !mii_chip_table[i].phy_id1 ) { 672 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 673 dev_name, phy_addr); 674 mii_phy->phy_types = UNKNOWN; 675 } 676 } 677 678 if (sis_priv->mii == NULL) { 679 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 680 return 0; 681 } 682 683 /* select default PHY for mac */ 684 sis_priv->mii = NULL; 685 sis900_default_phy( net_dev ); 686 687 /* Reset phy if default phy is internal sis900 */ 688 if ((sis_priv->mii->phy_id0 == 0x001D) && 689 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 690 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 691 692 /* workaround for ICS1893 PHY */ 693 if ((sis_priv->mii->phy_id0 == 0x0015) && 694 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 695 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 696 697 if(status & MII_STAT_LINK){ 698 while (poll_bit) { 699 yield(); 700 701 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 702 if (time_after_eq(jiffies, timeout)) { 703 printk(KERN_WARNING "%s: reset phy and link down now\n", 704 dev_name); 705 return -ETIME; 706 } 707 } 708 } 709 710 if (sis_priv->chipset_rev == SIS630E_900_REV) { 711 /* SiS 630E has some bugs on default value of PHY registers */ 712 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 713 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 714 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 715 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 716 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 717 } 718 719 if (sis_priv->mii->status & MII_STAT_LINK) 720 netif_carrier_on(net_dev); 721 else 722 netif_carrier_off(net_dev); 723 724 return 1; 725 } 726 727 /** 728 * sis900_default_phy - Select default PHY for sis900 mac. 729 * @net_dev: the net device to probe for 730 * 731 * Select first detected PHY with link as default. 732 * If no one is link on, select PHY whose types is HOME as default. 733 * If HOME doesn't exist, select LAN. 734 */ 735 736 static u16 sis900_default_phy(struct net_device * net_dev) 737 { 738 struct sis900_private *sis_priv = netdev_priv(net_dev); 739 struct mii_phy *phy = NULL, *phy_home = NULL, 740 *default_phy = NULL, *phy_lan = NULL; 741 u16 status; 742 743 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 744 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 745 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 746 747 /* Link ON & Not select default PHY & not ghost PHY */ 748 if ((status & MII_STAT_LINK) && !default_phy && 749 (phy->phy_types != UNKNOWN)) 750 default_phy = phy; 751 else { 752 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 753 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 754 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 755 if (phy->phy_types == HOME) 756 phy_home = phy; 757 else if(phy->phy_types == LAN) 758 phy_lan = phy; 759 } 760 } 761 762 if (!default_phy && phy_home) 763 default_phy = phy_home; 764 else if (!default_phy && phy_lan) 765 default_phy = phy_lan; 766 else if (!default_phy) 767 default_phy = sis_priv->first_mii; 768 769 if (sis_priv->mii != default_phy) { 770 sis_priv->mii = default_phy; 771 sis_priv->cur_phy = default_phy->phy_addr; 772 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 773 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 774 } 775 776 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 777 778 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 779 status &= (~MII_CNTL_ISOLATE); 780 781 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 782 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 783 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 784 785 return status; 786 } 787 788 789 /** 790 * sis900_set_capability - set the media capability of network adapter. 791 * @net_dev : the net device to probe for 792 * @phy : default PHY 793 * 794 * Set the media capability of network adapter according to 795 * mii status register. It's necessary before auto-negotiate. 796 */ 797 798 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 799 { 800 u16 cap; 801 u16 status; 802 803 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 804 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 805 806 cap = MII_NWAY_CSMA_CD | 807 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 808 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 809 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 810 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 811 812 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 813 } 814 815 816 /* Delay between EEPROM clock transitions. */ 817 #define eeprom_delay() sr32(mear) 818 819 /** 820 * read_eeprom - Read Serial EEPROM 821 * @ioaddr: base i/o address 822 * @location: the EEPROM location to read 823 * 824 * Read Serial EEPROM through EEPROM Access Register. 825 * Note that location is in word (16 bits) unit 826 */ 827 828 static u16 read_eeprom(void __iomem *ioaddr, int location) 829 { 830 u32 read_cmd = location | EEread; 831 int i; 832 u16 retval = 0; 833 834 sw32(mear, 0); 835 eeprom_delay(); 836 sw32(mear, EECS); 837 eeprom_delay(); 838 839 /* Shift the read command (9) bits out. */ 840 for (i = 8; i >= 0; i--) { 841 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 842 843 sw32(mear, dataval); 844 eeprom_delay(); 845 sw32(mear, dataval | EECLK); 846 eeprom_delay(); 847 } 848 sw32(mear, EECS); 849 eeprom_delay(); 850 851 /* read the 16-bits data in */ 852 for (i = 16; i > 0; i--) { 853 sw32(mear, EECS); 854 eeprom_delay(); 855 sw32(mear, EECS | EECLK); 856 eeprom_delay(); 857 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 858 eeprom_delay(); 859 } 860 861 /* Terminate the EEPROM access. */ 862 sw32(mear, 0); 863 eeprom_delay(); 864 865 return retval; 866 } 867 868 /* Read and write the MII management registers using software-generated 869 serial MDIO protocol. Note that the command bits and data bits are 870 send out separately */ 871 #define mdio_delay() sr32(mear) 872 873 static void mdio_idle(struct sis900_private *sp) 874 { 875 void __iomem *ioaddr = sp->ioaddr; 876 877 sw32(mear, MDIO | MDDIR); 878 mdio_delay(); 879 sw32(mear, MDIO | MDDIR | MDC); 880 } 881 882 /* Synchronize the MII management interface by shifting 32 one bits out. */ 883 static void mdio_reset(struct sis900_private *sp) 884 { 885 void __iomem *ioaddr = sp->ioaddr; 886 int i; 887 888 for (i = 31; i >= 0; i--) { 889 sw32(mear, MDDIR | MDIO); 890 mdio_delay(); 891 sw32(mear, MDDIR | MDIO | MDC); 892 mdio_delay(); 893 } 894 } 895 896 /** 897 * mdio_read - read MII PHY register 898 * @net_dev: the net device to read 899 * @phy_id: the phy address to read 900 * @location: the phy regiester id to read 901 * 902 * Read MII registers through MDIO and MDC 903 * using MDIO management frame structure and protocol(defined by ISO/IEC). 904 * Please see SiS7014 or ICS spec 905 */ 906 907 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 908 { 909 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 910 struct sis900_private *sp = netdev_priv(net_dev); 911 void __iomem *ioaddr = sp->ioaddr; 912 u16 retval = 0; 913 int i; 914 915 mdio_reset(sp); 916 mdio_idle(sp); 917 918 for (i = 15; i >= 0; i--) { 919 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 920 921 sw32(mear, dataval); 922 mdio_delay(); 923 sw32(mear, dataval | MDC); 924 mdio_delay(); 925 } 926 927 /* Read the 16 data bits. */ 928 for (i = 16; i > 0; i--) { 929 sw32(mear, 0); 930 mdio_delay(); 931 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 932 sw32(mear, MDC); 933 mdio_delay(); 934 } 935 sw32(mear, 0x00); 936 937 return retval; 938 } 939 940 /** 941 * mdio_write - write MII PHY register 942 * @net_dev: the net device to write 943 * @phy_id: the phy address to write 944 * @location: the phy regiester id to write 945 * @value: the register value to write with 946 * 947 * Write MII registers with @value through MDIO and MDC 948 * using MDIO management frame structure and protocol(defined by ISO/IEC) 949 * please see SiS7014 or ICS spec 950 */ 951 952 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 953 int value) 954 { 955 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 956 struct sis900_private *sp = netdev_priv(net_dev); 957 void __iomem *ioaddr = sp->ioaddr; 958 int i; 959 960 mdio_reset(sp); 961 mdio_idle(sp); 962 963 /* Shift the command bits out. */ 964 for (i = 15; i >= 0; i--) { 965 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 966 967 sw8(mear, dataval); 968 mdio_delay(); 969 sw8(mear, dataval | MDC); 970 mdio_delay(); 971 } 972 mdio_delay(); 973 974 /* Shift the value bits out. */ 975 for (i = 15; i >= 0; i--) { 976 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 977 978 sw32(mear, dataval); 979 mdio_delay(); 980 sw32(mear, dataval | MDC); 981 mdio_delay(); 982 } 983 mdio_delay(); 984 985 /* Clear out extra bits. */ 986 for (i = 2; i > 0; i--) { 987 sw8(mear, 0); 988 mdio_delay(); 989 sw8(mear, MDC); 990 mdio_delay(); 991 } 992 sw32(mear, 0x00); 993 } 994 995 996 /** 997 * sis900_reset_phy - reset sis900 mii phy. 998 * @net_dev: the net device to write 999 * @phy_addr: default phy address 1000 * 1001 * Some specific phy can't work properly without reset. 1002 * This function will be called during initialization and 1003 * link status change from ON to DOWN. 1004 */ 1005 1006 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 1007 { 1008 int i; 1009 u16 status; 1010 1011 for (i = 0; i < 2; i++) 1012 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1013 1014 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1015 1016 return status; 1017 } 1018 1019 #ifdef CONFIG_NET_POLL_CONTROLLER 1020 /* 1021 * Polling 'interrupt' - used by things like netconsole to send skbs 1022 * without having to re-enable interrupts. It's not called while 1023 * the interrupt routine is executing. 1024 */ 1025 static void sis900_poll(struct net_device *dev) 1026 { 1027 struct sis900_private *sp = netdev_priv(dev); 1028 const int irq = sp->pci_dev->irq; 1029 1030 disable_irq(irq); 1031 sis900_interrupt(irq, dev); 1032 enable_irq(irq); 1033 } 1034 #endif 1035 1036 /** 1037 * sis900_open - open sis900 device 1038 * @net_dev: the net device to open 1039 * 1040 * Do some initialization and start net interface. 1041 * enable interrupts and set sis900 timer. 1042 */ 1043 1044 static int 1045 sis900_open(struct net_device *net_dev) 1046 { 1047 struct sis900_private *sis_priv = netdev_priv(net_dev); 1048 void __iomem *ioaddr = sis_priv->ioaddr; 1049 int ret; 1050 1051 /* Soft reset the chip. */ 1052 sis900_reset(net_dev); 1053 1054 /* Equalizer workaround Rule */ 1055 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1056 1057 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1058 net_dev->name, net_dev); 1059 if (ret) 1060 return ret; 1061 1062 sis900_init_rxfilter(net_dev); 1063 1064 sis900_init_tx_ring(net_dev); 1065 sis900_init_rx_ring(net_dev); 1066 1067 set_rx_mode(net_dev); 1068 1069 netif_start_queue(net_dev); 1070 1071 /* Workaround for EDB */ 1072 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1073 1074 /* Enable all known interrupts by setting the interrupt mask. */ 1075 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1076 sw32(cr, RxENA | sr32(cr)); 1077 sw32(ier, IE); 1078 1079 sis900_check_mode(net_dev, sis_priv->mii); 1080 1081 /* Set the timer to switch to check for link beat and perhaps switch 1082 to an alternate media type. */ 1083 init_timer(&sis_priv->timer); 1084 sis_priv->timer.expires = jiffies + HZ; 1085 sis_priv->timer.data = (unsigned long)net_dev; 1086 sis_priv->timer.function = sis900_timer; 1087 add_timer(&sis_priv->timer); 1088 1089 return 0; 1090 } 1091 1092 /** 1093 * sis900_init_rxfilter - Initialize the Rx filter 1094 * @net_dev: the net device to initialize for 1095 * 1096 * Set receive filter address to our MAC address 1097 * and enable packet filtering. 1098 */ 1099 1100 static void 1101 sis900_init_rxfilter (struct net_device * net_dev) 1102 { 1103 struct sis900_private *sis_priv = netdev_priv(net_dev); 1104 void __iomem *ioaddr = sis_priv->ioaddr; 1105 u32 rfcrSave; 1106 u32 i; 1107 1108 rfcrSave = sr32(rfcr); 1109 1110 /* disable packet filtering before setting filter */ 1111 sw32(rfcr, rfcrSave & ~RFEN); 1112 1113 /* load MAC addr to filter data register */ 1114 for (i = 0 ; i < 3 ; i++) { 1115 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1116 1117 sw32(rfcr, i << RFADDR_shift); 1118 sw32(rfdr, w); 1119 1120 if (netif_msg_hw(sis_priv)) { 1121 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1122 net_dev->name, i, sr32(rfdr)); 1123 } 1124 } 1125 1126 /* enable packet filtering */ 1127 sw32(rfcr, rfcrSave | RFEN); 1128 } 1129 1130 /** 1131 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1132 * @net_dev: the net device to initialize for 1133 * 1134 * Initialize the Tx descriptor ring, 1135 */ 1136 1137 static void 1138 sis900_init_tx_ring(struct net_device *net_dev) 1139 { 1140 struct sis900_private *sis_priv = netdev_priv(net_dev); 1141 void __iomem *ioaddr = sis_priv->ioaddr; 1142 int i; 1143 1144 sis_priv->tx_full = 0; 1145 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1146 1147 for (i = 0; i < NUM_TX_DESC; i++) { 1148 sis_priv->tx_skbuff[i] = NULL; 1149 1150 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1151 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1152 sis_priv->tx_ring[i].cmdsts = 0; 1153 sis_priv->tx_ring[i].bufptr = 0; 1154 } 1155 1156 /* load Transmit Descriptor Register */ 1157 sw32(txdp, sis_priv->tx_ring_dma); 1158 if (netif_msg_hw(sis_priv)) 1159 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1160 net_dev->name, sr32(txdp)); 1161 } 1162 1163 /** 1164 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1165 * @net_dev: the net device to initialize for 1166 * 1167 * Initialize the Rx descriptor ring, 1168 * and pre-allocate recevie buffers (socket buffer) 1169 */ 1170 1171 static void 1172 sis900_init_rx_ring(struct net_device *net_dev) 1173 { 1174 struct sis900_private *sis_priv = netdev_priv(net_dev); 1175 void __iomem *ioaddr = sis_priv->ioaddr; 1176 int i; 1177 1178 sis_priv->cur_rx = 0; 1179 sis_priv->dirty_rx = 0; 1180 1181 /* init RX descriptor */ 1182 for (i = 0; i < NUM_RX_DESC; i++) { 1183 sis_priv->rx_skbuff[i] = NULL; 1184 1185 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1186 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1187 sis_priv->rx_ring[i].cmdsts = 0; 1188 sis_priv->rx_ring[i].bufptr = 0; 1189 } 1190 1191 /* allocate sock buffers */ 1192 for (i = 0; i < NUM_RX_DESC; i++) { 1193 struct sk_buff *skb; 1194 1195 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1196 /* not enough memory for skbuff, this makes a "hole" 1197 on the buffer ring, it is not clear how the 1198 hardware will react to this kind of degenerated 1199 buffer */ 1200 break; 1201 } 1202 sis_priv->rx_skbuff[i] = skb; 1203 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1204 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, 1205 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1206 } 1207 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1208 1209 /* load Receive Descriptor Register */ 1210 sw32(rxdp, sis_priv->rx_ring_dma); 1211 if (netif_msg_hw(sis_priv)) 1212 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1213 net_dev->name, sr32(rxdp)); 1214 } 1215 1216 /** 1217 * sis630_set_eq - set phy equalizer value for 630 LAN 1218 * @net_dev: the net device to set equalizer value 1219 * @revision: 630 LAN revision number 1220 * 1221 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1222 * PHY register 14h(Test) 1223 * Bit 14: 0 -- Automatically detect (default) 1224 * 1 -- Manually set Equalizer filter 1225 * Bit 13: 0 -- (Default) 1226 * 1 -- Speed up convergence of equalizer setting 1227 * Bit 9 : 0 -- (Default) 1228 * 1 -- Disable Baseline Wander 1229 * Bit 3~7 -- Equalizer filter setting 1230 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1231 * Then calculate equalizer value 1232 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1233 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1234 * Calculate Equalizer value: 1235 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1236 * When the equalizer is stable, this value is not a fixed value. It will be within 1237 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1238 * 0 <= max <= 4 --> set equalizer to max 1239 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1240 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1241 */ 1242 1243 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1244 { 1245 struct sis900_private *sis_priv = netdev_priv(net_dev); 1246 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1247 int i, maxcount=10; 1248 1249 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1250 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1251 return; 1252 1253 if (netif_carrier_ok(net_dev)) { 1254 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1255 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1256 (0x2200 | reg14h) & 0xBFFF); 1257 for (i=0; i < maxcount; i++) { 1258 eq_value = (0x00F8 & mdio_read(net_dev, 1259 sis_priv->cur_phy, MII_RESV)) >> 3; 1260 if (i == 0) 1261 max_value=min_value=eq_value; 1262 max_value = (eq_value > max_value) ? 1263 eq_value : max_value; 1264 min_value = (eq_value < min_value) ? 1265 eq_value : min_value; 1266 } 1267 /* 630E rule to determine the equalizer value */ 1268 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1269 revision == SIS630ET_900_REV) { 1270 if (max_value < 5) 1271 eq_value = max_value; 1272 else if (max_value >= 5 && max_value < 15) 1273 eq_value = (max_value == min_value) ? 1274 max_value+2 : max_value+1; 1275 else if (max_value >= 15) 1276 eq_value=(max_value == min_value) ? 1277 max_value+6 : max_value+5; 1278 } 1279 /* 630B0&B1 rule to determine the equalizer value */ 1280 if (revision == SIS630A_900_REV && 1281 (sis_priv->host_bridge_rev == SIS630B0 || 1282 sis_priv->host_bridge_rev == SIS630B1)) { 1283 if (max_value == 0) 1284 eq_value = 3; 1285 else 1286 eq_value = (max_value + min_value + 1)/2; 1287 } 1288 /* write equalizer value and setting */ 1289 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1290 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1291 reg14h = (reg14h | 0x6000) & 0xFDFF; 1292 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1293 } else { 1294 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1295 if (revision == SIS630A_900_REV && 1296 (sis_priv->host_bridge_rev == SIS630B0 || 1297 sis_priv->host_bridge_rev == SIS630B1)) 1298 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1299 (reg14h | 0x2200) & 0xBFFF); 1300 else 1301 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1302 (reg14h | 0x2000) & 0xBFFF); 1303 } 1304 } 1305 1306 /** 1307 * sis900_timer - sis900 timer routine 1308 * @data: pointer to sis900 net device 1309 * 1310 * On each timer ticks we check two things, 1311 * link status (ON/OFF) and link mode (10/100/Full/Half) 1312 */ 1313 1314 static void sis900_timer(unsigned long data) 1315 { 1316 struct net_device *net_dev = (struct net_device *)data; 1317 struct sis900_private *sis_priv = netdev_priv(net_dev); 1318 struct mii_phy *mii_phy = sis_priv->mii; 1319 static const int next_tick = 5*HZ; 1320 u16 status; 1321 1322 if (!sis_priv->autong_complete){ 1323 int uninitialized_var(speed), duplex = 0; 1324 1325 sis900_read_mode(net_dev, &speed, &duplex); 1326 if (duplex){ 1327 sis900_set_mode(sis_priv, speed, duplex); 1328 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1329 netif_start_queue(net_dev); 1330 } 1331 1332 sis_priv->timer.expires = jiffies + HZ; 1333 add_timer(&sis_priv->timer); 1334 return; 1335 } 1336 1337 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1338 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1339 1340 /* Link OFF -> ON */ 1341 if (!netif_carrier_ok(net_dev)) { 1342 LookForLink: 1343 /* Search for new PHY */ 1344 status = sis900_default_phy(net_dev); 1345 mii_phy = sis_priv->mii; 1346 1347 if (status & MII_STAT_LINK){ 1348 sis900_check_mode(net_dev, mii_phy); 1349 netif_carrier_on(net_dev); 1350 } 1351 } else { 1352 /* Link ON -> OFF */ 1353 if (!(status & MII_STAT_LINK)){ 1354 netif_carrier_off(net_dev); 1355 if(netif_msg_link(sis_priv)) 1356 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1357 1358 /* Change mode issue */ 1359 if ((mii_phy->phy_id0 == 0x001D) && 1360 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1361 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1362 1363 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1364 1365 goto LookForLink; 1366 } 1367 } 1368 1369 sis_priv->timer.expires = jiffies + next_tick; 1370 add_timer(&sis_priv->timer); 1371 } 1372 1373 /** 1374 * sis900_check_mode - check the media mode for sis900 1375 * @net_dev: the net device to be checked 1376 * @mii_phy: the mii phy 1377 * 1378 * Older driver gets the media mode from mii status output 1379 * register. Now we set our media capability and auto-negotiate 1380 * to get the upper bound of speed and duplex between two ends. 1381 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1382 * and autong_complete should be set to 1. 1383 */ 1384 1385 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1386 { 1387 struct sis900_private *sis_priv = netdev_priv(net_dev); 1388 void __iomem *ioaddr = sis_priv->ioaddr; 1389 int speed, duplex; 1390 1391 if (mii_phy->phy_types == LAN) { 1392 sw32(cfg, ~EXD & sr32(cfg)); 1393 sis900_set_capability(net_dev , mii_phy); 1394 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1395 } else { 1396 sw32(cfg, EXD | sr32(cfg)); 1397 speed = HW_SPEED_HOME; 1398 duplex = FDX_CAPABLE_HALF_SELECTED; 1399 sis900_set_mode(sis_priv, speed, duplex); 1400 sis_priv->autong_complete = 1; 1401 } 1402 } 1403 1404 /** 1405 * sis900_set_mode - Set the media mode of mac register. 1406 * @sp: the device private data 1407 * @speed : the transmit speed to be determined 1408 * @duplex: the duplex mode to be determined 1409 * 1410 * Set the media mode of mac register txcfg/rxcfg according to 1411 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1412 * bus is used instead of PCI bus. When this bit is set 1, the 1413 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1414 * double words. 1415 */ 1416 1417 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1418 { 1419 void __iomem *ioaddr = sp->ioaddr; 1420 u32 tx_flags = 0, rx_flags = 0; 1421 1422 if (sr32( cfg) & EDB_MASTER_EN) { 1423 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1424 (TX_FILL_THRESH << TxFILLT_shift); 1425 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1426 } else { 1427 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1428 (TX_FILL_THRESH << TxFILLT_shift); 1429 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1430 } 1431 1432 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1433 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1434 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1435 } else { 1436 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1437 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1438 } 1439 1440 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1441 tx_flags |= (TxCSI | TxHBI); 1442 rx_flags |= RxATX; 1443 } 1444 1445 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1446 /* Can accept Jumbo packet */ 1447 rx_flags |= RxAJAB; 1448 #endif 1449 1450 sw32(txcfg, tx_flags); 1451 sw32(rxcfg, rx_flags); 1452 } 1453 1454 /** 1455 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1456 * @net_dev: the net device to read mode for 1457 * @phy_addr: mii phy address 1458 * 1459 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1460 * autong_complete should be set to 0 when starting auto-negotiation. 1461 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1462 * sis900_timer will wait for link on again if autong_complete = 0. 1463 */ 1464 1465 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1466 { 1467 struct sis900_private *sis_priv = netdev_priv(net_dev); 1468 int i = 0; 1469 u32 status; 1470 1471 for (i = 0; i < 2; i++) 1472 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1473 1474 if (!(status & MII_STAT_LINK)){ 1475 if(netif_msg_link(sis_priv)) 1476 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1477 sis_priv->autong_complete = 1; 1478 netif_carrier_off(net_dev); 1479 return; 1480 } 1481 1482 /* (Re)start AutoNegotiate */ 1483 mdio_write(net_dev, phy_addr, MII_CONTROL, 1484 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1485 sis_priv->autong_complete = 0; 1486 } 1487 1488 1489 /** 1490 * sis900_read_mode - read media mode for sis900 internal phy 1491 * @net_dev: the net device to read mode for 1492 * @speed : the transmit speed to be determined 1493 * @duplex : the duplex mode to be determined 1494 * 1495 * The capability of remote end will be put in mii register autorec 1496 * after auto-negotiation. Use AND operation to get the upper bound 1497 * of speed and duplex between two ends. 1498 */ 1499 1500 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1501 { 1502 struct sis900_private *sis_priv = netdev_priv(net_dev); 1503 struct mii_phy *phy = sis_priv->mii; 1504 int phy_addr = sis_priv->cur_phy; 1505 u32 status; 1506 u16 autoadv, autorec; 1507 int i; 1508 1509 for (i = 0; i < 2; i++) 1510 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1511 1512 if (!(status & MII_STAT_LINK)) 1513 return; 1514 1515 /* AutoNegotiate completed */ 1516 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1517 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1518 status = autoadv & autorec; 1519 1520 *speed = HW_SPEED_10_MBPS; 1521 *duplex = FDX_CAPABLE_HALF_SELECTED; 1522 1523 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1524 *speed = HW_SPEED_100_MBPS; 1525 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1526 *duplex = FDX_CAPABLE_FULL_SELECTED; 1527 1528 sis_priv->autong_complete = 1; 1529 1530 /* Workaround for Realtek RTL8201 PHY issue */ 1531 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1532 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1533 *duplex = FDX_CAPABLE_FULL_SELECTED; 1534 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1535 *speed = HW_SPEED_100_MBPS; 1536 } 1537 1538 if(netif_msg_link(sis_priv)) 1539 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1540 net_dev->name, 1541 *speed == HW_SPEED_100_MBPS ? 1542 "100mbps" : "10mbps", 1543 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1544 "full" : "half"); 1545 } 1546 1547 /** 1548 * sis900_tx_timeout - sis900 transmit timeout routine 1549 * @net_dev: the net device to transmit 1550 * 1551 * print transmit timeout status 1552 * disable interrupts and do some tasks 1553 */ 1554 1555 static void sis900_tx_timeout(struct net_device *net_dev) 1556 { 1557 struct sis900_private *sis_priv = netdev_priv(net_dev); 1558 void __iomem *ioaddr = sis_priv->ioaddr; 1559 unsigned long flags; 1560 int i; 1561 1562 if (netif_msg_tx_err(sis_priv)) { 1563 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1564 net_dev->name, sr32(cr), sr32(isr)); 1565 } 1566 1567 /* Disable interrupts by clearing the interrupt mask. */ 1568 sw32(imr, 0x0000); 1569 1570 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1571 spin_lock_irqsave(&sis_priv->lock, flags); 1572 1573 /* discard unsent packets */ 1574 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1575 for (i = 0; i < NUM_TX_DESC; i++) { 1576 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1577 1578 if (skb) { 1579 pci_unmap_single(sis_priv->pci_dev, 1580 sis_priv->tx_ring[i].bufptr, skb->len, 1581 PCI_DMA_TODEVICE); 1582 dev_kfree_skb_irq(skb); 1583 sis_priv->tx_skbuff[i] = NULL; 1584 sis_priv->tx_ring[i].cmdsts = 0; 1585 sis_priv->tx_ring[i].bufptr = 0; 1586 net_dev->stats.tx_dropped++; 1587 } 1588 } 1589 sis_priv->tx_full = 0; 1590 netif_wake_queue(net_dev); 1591 1592 spin_unlock_irqrestore(&sis_priv->lock, flags); 1593 1594 net_dev->trans_start = jiffies; /* prevent tx timeout */ 1595 1596 /* load Transmit Descriptor Register */ 1597 sw32(txdp, sis_priv->tx_ring_dma); 1598 1599 /* Enable all known interrupts by setting the interrupt mask. */ 1600 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1601 } 1602 1603 /** 1604 * sis900_start_xmit - sis900 start transmit routine 1605 * @skb: socket buffer pointer to put the data being transmitted 1606 * @net_dev: the net device to transmit with 1607 * 1608 * Set the transmit buffer descriptor, 1609 * and write TxENA to enable transmit state machine. 1610 * tell upper layer if the buffer is full 1611 */ 1612 1613 static netdev_tx_t 1614 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1615 { 1616 struct sis900_private *sis_priv = netdev_priv(net_dev); 1617 void __iomem *ioaddr = sis_priv->ioaddr; 1618 unsigned int entry; 1619 unsigned long flags; 1620 unsigned int index_cur_tx, index_dirty_tx; 1621 unsigned int count_dirty_tx; 1622 1623 /* Don't transmit data before the complete of auto-negotiation */ 1624 if(!sis_priv->autong_complete){ 1625 netif_stop_queue(net_dev); 1626 return NETDEV_TX_BUSY; 1627 } 1628 1629 spin_lock_irqsave(&sis_priv->lock, flags); 1630 1631 /* Calculate the next Tx descriptor entry. */ 1632 entry = sis_priv->cur_tx % NUM_TX_DESC; 1633 sis_priv->tx_skbuff[entry] = skb; 1634 1635 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1636 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1637 skb->data, skb->len, PCI_DMA_TODEVICE); 1638 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1639 sw32(cr, TxENA | sr32(cr)); 1640 1641 sis_priv->cur_tx ++; 1642 index_cur_tx = sis_priv->cur_tx; 1643 index_dirty_tx = sis_priv->dirty_tx; 1644 1645 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1646 count_dirty_tx ++; 1647 1648 if (index_cur_tx == index_dirty_tx) { 1649 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1650 sis_priv->tx_full = 1; 1651 netif_stop_queue(net_dev); 1652 } else if (count_dirty_tx < NUM_TX_DESC) { 1653 /* Typical path, tell upper layer that more transmission is possible */ 1654 netif_start_queue(net_dev); 1655 } else { 1656 /* buffer full, tell upper layer no more transmission */ 1657 sis_priv->tx_full = 1; 1658 netif_stop_queue(net_dev); 1659 } 1660 1661 spin_unlock_irqrestore(&sis_priv->lock, flags); 1662 1663 if (netif_msg_tx_queued(sis_priv)) 1664 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1665 "to slot %d.\n", 1666 net_dev->name, skb->data, (int)skb->len, entry); 1667 1668 return NETDEV_TX_OK; 1669 } 1670 1671 /** 1672 * sis900_interrupt - sis900 interrupt handler 1673 * @irq: the irq number 1674 * @dev_instance: the client data object 1675 * 1676 * The interrupt handler does all of the Rx thread work, 1677 * and cleans up after the Tx thread 1678 */ 1679 1680 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1681 { 1682 struct net_device *net_dev = dev_instance; 1683 struct sis900_private *sis_priv = netdev_priv(net_dev); 1684 int boguscnt = max_interrupt_work; 1685 void __iomem *ioaddr = sis_priv->ioaddr; 1686 u32 status; 1687 unsigned int handled = 0; 1688 1689 spin_lock (&sis_priv->lock); 1690 1691 do { 1692 status = sr32(isr); 1693 1694 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1695 /* nothing intresting happened */ 1696 break; 1697 handled = 1; 1698 1699 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1700 if (status & (RxORN | RxERR | RxOK)) 1701 /* Rx interrupt */ 1702 sis900_rx(net_dev); 1703 1704 if (status & (TxURN | TxERR | TxIDLE)) 1705 /* Tx interrupt */ 1706 sis900_finish_xmit(net_dev); 1707 1708 /* something strange happened !!! */ 1709 if (status & HIBERR) { 1710 if(netif_msg_intr(sis_priv)) 1711 printk(KERN_INFO "%s: Abnormal interrupt, " 1712 "status %#8.8x.\n", net_dev->name, status); 1713 break; 1714 } 1715 if (--boguscnt < 0) { 1716 if(netif_msg_intr(sis_priv)) 1717 printk(KERN_INFO "%s: Too much work at interrupt, " 1718 "interrupt status = %#8.8x.\n", 1719 net_dev->name, status); 1720 break; 1721 } 1722 } while (1); 1723 1724 if(netif_msg_intr(sis_priv)) 1725 printk(KERN_DEBUG "%s: exiting interrupt, " 1726 "interrupt status = 0x%#8.8x.\n", 1727 net_dev->name, sr32(isr)); 1728 1729 spin_unlock (&sis_priv->lock); 1730 return IRQ_RETVAL(handled); 1731 } 1732 1733 /** 1734 * sis900_rx - sis900 receive routine 1735 * @net_dev: the net device which receives data 1736 * 1737 * Process receive interrupt events, 1738 * put buffer to higher layer and refill buffer pool 1739 * Note: This function is called by interrupt handler, 1740 * don't do "too much" work here 1741 */ 1742 1743 static int sis900_rx(struct net_device *net_dev) 1744 { 1745 struct sis900_private *sis_priv = netdev_priv(net_dev); 1746 void __iomem *ioaddr = sis_priv->ioaddr; 1747 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1748 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1749 int rx_work_limit; 1750 1751 if (netif_msg_rx_status(sis_priv)) 1752 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1753 "status:0x%8.8x\n", 1754 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1755 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1756 1757 while (rx_status & OWN) { 1758 unsigned int rx_size; 1759 unsigned int data_size; 1760 1761 if (--rx_work_limit < 0) 1762 break; 1763 1764 data_size = rx_status & DSIZE; 1765 rx_size = data_size - CRC_SIZE; 1766 1767 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1768 /* ``TOOLONG'' flag means jumbo packet received. */ 1769 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1770 rx_status &= (~ ((unsigned int)TOOLONG)); 1771 #endif 1772 1773 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1774 /* corrupted packet received */ 1775 if (netif_msg_rx_err(sis_priv)) 1776 printk(KERN_DEBUG "%s: Corrupted packet " 1777 "received, buffer status = 0x%8.8x/%d.\n", 1778 net_dev->name, rx_status, data_size); 1779 net_dev->stats.rx_errors++; 1780 if (rx_status & OVERRUN) 1781 net_dev->stats.rx_over_errors++; 1782 if (rx_status & (TOOLONG|RUNT)) 1783 net_dev->stats.rx_length_errors++; 1784 if (rx_status & (RXISERR | FAERR)) 1785 net_dev->stats.rx_frame_errors++; 1786 if (rx_status & CRCERR) 1787 net_dev->stats.rx_crc_errors++; 1788 /* reset buffer descriptor state */ 1789 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1790 } else { 1791 struct sk_buff * skb; 1792 struct sk_buff * rx_skb; 1793 1794 pci_unmap_single(sis_priv->pci_dev, 1795 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, 1796 PCI_DMA_FROMDEVICE); 1797 1798 /* refill the Rx buffer, what if there is not enough 1799 * memory for new socket buffer ?? */ 1800 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1801 /* 1802 * Not enough memory to refill the buffer 1803 * so we need to recycle the old one so 1804 * as to avoid creating a memory hole 1805 * in the rx ring 1806 */ 1807 skb = sis_priv->rx_skbuff[entry]; 1808 net_dev->stats.rx_dropped++; 1809 goto refill_rx_ring; 1810 } 1811 1812 /* This situation should never happen, but due to 1813 some unknown bugs, it is possible that 1814 we are working on NULL sk_buff :-( */ 1815 if (sis_priv->rx_skbuff[entry] == NULL) { 1816 if (netif_msg_rx_err(sis_priv)) 1817 printk(KERN_WARNING "%s: NULL pointer " 1818 "encountered in Rx ring\n" 1819 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1820 net_dev->name, sis_priv->cur_rx, 1821 sis_priv->dirty_rx); 1822 dev_kfree_skb(skb); 1823 break; 1824 } 1825 1826 /* give the socket buffer to upper layers */ 1827 rx_skb = sis_priv->rx_skbuff[entry]; 1828 skb_put(rx_skb, rx_size); 1829 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1830 netif_rx(rx_skb); 1831 1832 /* some network statistics */ 1833 if ((rx_status & BCAST) == MCAST) 1834 net_dev->stats.multicast++; 1835 net_dev->stats.rx_bytes += rx_size; 1836 net_dev->stats.rx_packets++; 1837 sis_priv->dirty_rx++; 1838 refill_rx_ring: 1839 sis_priv->rx_skbuff[entry] = skb; 1840 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1841 sis_priv->rx_ring[entry].bufptr = 1842 pci_map_single(sis_priv->pci_dev, skb->data, 1843 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1844 } 1845 sis_priv->cur_rx++; 1846 entry = sis_priv->cur_rx % NUM_RX_DESC; 1847 rx_status = sis_priv->rx_ring[entry].cmdsts; 1848 } // while 1849 1850 /* refill the Rx buffer, what if the rate of refilling is slower 1851 * than consuming ?? */ 1852 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1853 struct sk_buff *skb; 1854 1855 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1856 1857 if (sis_priv->rx_skbuff[entry] == NULL) { 1858 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1859 /* not enough memory for skbuff, this makes a 1860 * "hole" on the buffer ring, it is not clear 1861 * how the hardware will react to this kind 1862 * of degenerated buffer */ 1863 if (netif_msg_rx_err(sis_priv)) 1864 printk(KERN_INFO "%s: Memory squeeze, " 1865 "deferring packet.\n", 1866 net_dev->name); 1867 net_dev->stats.rx_dropped++; 1868 break; 1869 } 1870 sis_priv->rx_skbuff[entry] = skb; 1871 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1872 sis_priv->rx_ring[entry].bufptr = 1873 pci_map_single(sis_priv->pci_dev, skb->data, 1874 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1875 } 1876 } 1877 /* re-enable the potentially idle receive state matchine */ 1878 sw32(cr , RxENA | sr32(cr)); 1879 1880 return 0; 1881 } 1882 1883 /** 1884 * sis900_finish_xmit - finish up transmission of packets 1885 * @net_dev: the net device to be transmitted on 1886 * 1887 * Check for error condition and free socket buffer etc 1888 * schedule for more transmission as needed 1889 * Note: This function is called by interrupt handler, 1890 * don't do "too much" work here 1891 */ 1892 1893 static void sis900_finish_xmit (struct net_device *net_dev) 1894 { 1895 struct sis900_private *sis_priv = netdev_priv(net_dev); 1896 1897 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1898 struct sk_buff *skb; 1899 unsigned int entry; 1900 u32 tx_status; 1901 1902 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1903 tx_status = sis_priv->tx_ring[entry].cmdsts; 1904 1905 if (tx_status & OWN) { 1906 /* The packet is not transmitted yet (owned by hardware) ! 1907 * Note: the interrupt is generated only when Tx Machine 1908 * is idle, so this is an almost impossible case */ 1909 break; 1910 } 1911 1912 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1913 /* packet unsuccessfully transmitted */ 1914 if (netif_msg_tx_err(sis_priv)) 1915 printk(KERN_DEBUG "%s: Transmit " 1916 "error, Tx status %8.8x.\n", 1917 net_dev->name, tx_status); 1918 net_dev->stats.tx_errors++; 1919 if (tx_status & UNDERRUN) 1920 net_dev->stats.tx_fifo_errors++; 1921 if (tx_status & ABORT) 1922 net_dev->stats.tx_aborted_errors++; 1923 if (tx_status & NOCARRIER) 1924 net_dev->stats.tx_carrier_errors++; 1925 if (tx_status & OWCOLL) 1926 net_dev->stats.tx_window_errors++; 1927 } else { 1928 /* packet successfully transmitted */ 1929 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1930 net_dev->stats.tx_bytes += tx_status & DSIZE; 1931 net_dev->stats.tx_packets++; 1932 } 1933 /* Free the original skb. */ 1934 skb = sis_priv->tx_skbuff[entry]; 1935 pci_unmap_single(sis_priv->pci_dev, 1936 sis_priv->tx_ring[entry].bufptr, skb->len, 1937 PCI_DMA_TODEVICE); 1938 dev_kfree_skb_irq(skb); 1939 sis_priv->tx_skbuff[entry] = NULL; 1940 sis_priv->tx_ring[entry].bufptr = 0; 1941 sis_priv->tx_ring[entry].cmdsts = 0; 1942 } 1943 1944 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1945 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1946 /* The ring is no longer full, clear tx_full and schedule 1947 * more transmission by netif_wake_queue(net_dev) */ 1948 sis_priv->tx_full = 0; 1949 netif_wake_queue (net_dev); 1950 } 1951 } 1952 1953 /** 1954 * sis900_close - close sis900 device 1955 * @net_dev: the net device to be closed 1956 * 1957 * Disable interrupts, stop the Tx and Rx Status Machine 1958 * free Tx and RX socket buffer 1959 */ 1960 1961 static int sis900_close(struct net_device *net_dev) 1962 { 1963 struct sis900_private *sis_priv = netdev_priv(net_dev); 1964 struct pci_dev *pdev = sis_priv->pci_dev; 1965 void __iomem *ioaddr = sis_priv->ioaddr; 1966 struct sk_buff *skb; 1967 int i; 1968 1969 netif_stop_queue(net_dev); 1970 1971 /* Disable interrupts by clearing the interrupt mask. */ 1972 sw32(imr, 0x0000); 1973 sw32(ier, 0x0000); 1974 1975 /* Stop the chip's Tx and Rx Status Machine */ 1976 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1977 1978 del_timer(&sis_priv->timer); 1979 1980 free_irq(pdev->irq, net_dev); 1981 1982 /* Free Tx and RX skbuff */ 1983 for (i = 0; i < NUM_RX_DESC; i++) { 1984 skb = sis_priv->rx_skbuff[i]; 1985 if (skb) { 1986 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr, 1987 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1988 dev_kfree_skb(skb); 1989 sis_priv->rx_skbuff[i] = NULL; 1990 } 1991 } 1992 for (i = 0; i < NUM_TX_DESC; i++) { 1993 skb = sis_priv->tx_skbuff[i]; 1994 if (skb) { 1995 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr, 1996 skb->len, PCI_DMA_TODEVICE); 1997 dev_kfree_skb(skb); 1998 sis_priv->tx_skbuff[i] = NULL; 1999 } 2000 } 2001 2002 /* Green! Put the chip in low-power mode. */ 2003 2004 return 0; 2005 } 2006 2007 /** 2008 * sis900_get_drvinfo - Return information about driver 2009 * @net_dev: the net device to probe 2010 * @info: container for info returned 2011 * 2012 * Process ethtool command such as "ehtool -i" to show information 2013 */ 2014 2015 static void sis900_get_drvinfo(struct net_device *net_dev, 2016 struct ethtool_drvinfo *info) 2017 { 2018 struct sis900_private *sis_priv = netdev_priv(net_dev); 2019 2020 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2021 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2022 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2023 sizeof(info->bus_info)); 2024 } 2025 2026 static u32 sis900_get_msglevel(struct net_device *net_dev) 2027 { 2028 struct sis900_private *sis_priv = netdev_priv(net_dev); 2029 return sis_priv->msg_enable; 2030 } 2031 2032 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2033 { 2034 struct sis900_private *sis_priv = netdev_priv(net_dev); 2035 sis_priv->msg_enable = value; 2036 } 2037 2038 static u32 sis900_get_link(struct net_device *net_dev) 2039 { 2040 struct sis900_private *sis_priv = netdev_priv(net_dev); 2041 return mii_link_ok(&sis_priv->mii_info); 2042 } 2043 2044 static int sis900_get_settings(struct net_device *net_dev, 2045 struct ethtool_cmd *cmd) 2046 { 2047 struct sis900_private *sis_priv = netdev_priv(net_dev); 2048 spin_lock_irq(&sis_priv->lock); 2049 mii_ethtool_gset(&sis_priv->mii_info, cmd); 2050 spin_unlock_irq(&sis_priv->lock); 2051 return 0; 2052 } 2053 2054 static int sis900_set_settings(struct net_device *net_dev, 2055 struct ethtool_cmd *cmd) 2056 { 2057 struct sis900_private *sis_priv = netdev_priv(net_dev); 2058 int rt; 2059 spin_lock_irq(&sis_priv->lock); 2060 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); 2061 spin_unlock_irq(&sis_priv->lock); 2062 return rt; 2063 } 2064 2065 static int sis900_nway_reset(struct net_device *net_dev) 2066 { 2067 struct sis900_private *sis_priv = netdev_priv(net_dev); 2068 return mii_nway_restart(&sis_priv->mii_info); 2069 } 2070 2071 /** 2072 * sis900_set_wol - Set up Wake on Lan registers 2073 * @net_dev: the net device to probe 2074 * @wol: container for info passed to the driver 2075 * 2076 * Process ethtool command "wol" to setup wake on lan features. 2077 * SiS900 supports sending WoL events if a correct packet is received, 2078 * but there is no simple way to filter them to only a subset (broadcast, 2079 * multicast, unicast or arp). 2080 */ 2081 2082 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2083 { 2084 struct sis900_private *sis_priv = netdev_priv(net_dev); 2085 void __iomem *ioaddr = sis_priv->ioaddr; 2086 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2087 2088 if (wol->wolopts == 0) { 2089 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2090 cfgpmcsr &= ~PME_EN; 2091 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2092 sw32(pmctrl, pmctrl_bits); 2093 if (netif_msg_wol(sis_priv)) 2094 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2095 return 0; 2096 } 2097 2098 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2099 | WAKE_BCAST | WAKE_ARP)) 2100 return -EINVAL; 2101 2102 if (wol->wolopts & WAKE_MAGIC) 2103 pmctrl_bits |= MAGICPKT; 2104 if (wol->wolopts & WAKE_PHY) 2105 pmctrl_bits |= LINKON; 2106 2107 sw32(pmctrl, pmctrl_bits); 2108 2109 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2110 cfgpmcsr |= PME_EN; 2111 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2112 if (netif_msg_wol(sis_priv)) 2113 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2114 2115 return 0; 2116 } 2117 2118 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2119 { 2120 struct sis900_private *sp = netdev_priv(net_dev); 2121 void __iomem *ioaddr = sp->ioaddr; 2122 u32 pmctrl_bits; 2123 2124 pmctrl_bits = sr32(pmctrl); 2125 if (pmctrl_bits & MAGICPKT) 2126 wol->wolopts |= WAKE_MAGIC; 2127 if (pmctrl_bits & LINKON) 2128 wol->wolopts |= WAKE_PHY; 2129 2130 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2131 } 2132 2133 static const struct ethtool_ops sis900_ethtool_ops = { 2134 .get_drvinfo = sis900_get_drvinfo, 2135 .get_msglevel = sis900_get_msglevel, 2136 .set_msglevel = sis900_set_msglevel, 2137 .get_link = sis900_get_link, 2138 .get_settings = sis900_get_settings, 2139 .set_settings = sis900_set_settings, 2140 .nway_reset = sis900_nway_reset, 2141 .get_wol = sis900_get_wol, 2142 .set_wol = sis900_set_wol 2143 }; 2144 2145 /** 2146 * mii_ioctl - process MII i/o control command 2147 * @net_dev: the net device to command for 2148 * @rq: parameter for command 2149 * @cmd: the i/o command 2150 * 2151 * Process MII command like read/write MII register 2152 */ 2153 2154 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2155 { 2156 struct sis900_private *sis_priv = netdev_priv(net_dev); 2157 struct mii_ioctl_data *data = if_mii(rq); 2158 2159 switch(cmd) { 2160 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2161 data->phy_id = sis_priv->mii->phy_addr; 2162 /* Fall Through */ 2163 2164 case SIOCGMIIREG: /* Read MII PHY register. */ 2165 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2166 return 0; 2167 2168 case SIOCSMIIREG: /* Write MII PHY register. */ 2169 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2170 return 0; 2171 default: 2172 return -EOPNOTSUPP; 2173 } 2174 } 2175 2176 /** 2177 * sis900_set_config - Set media type by net_device.set_config 2178 * @dev: the net device for media type change 2179 * @map: ifmap passed by ifconfig 2180 * 2181 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2182 * we support only port changes. All other runtime configuration 2183 * changes will be ignored 2184 */ 2185 2186 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2187 { 2188 struct sis900_private *sis_priv = netdev_priv(dev); 2189 struct mii_phy *mii_phy = sis_priv->mii; 2190 2191 u16 status; 2192 2193 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2194 /* we switch on the ifmap->port field. I couldn't find anything 2195 * like a definition or standard for the values of that field. 2196 * I think the meaning of those values is device specific. But 2197 * since I would like to change the media type via the ifconfig 2198 * command I use the definition from linux/netdevice.h 2199 * (which seems to be different from the ifport(pcmcia) definition) */ 2200 switch(map->port){ 2201 case IF_PORT_UNKNOWN: /* use auto here */ 2202 dev->if_port = map->port; 2203 /* we are going to change the media type, so the Link 2204 * will be temporary down and we need to reflect that 2205 * here. When the Link comes up again, it will be 2206 * sensed by the sis_timer procedure, which also does 2207 * all the rest for us */ 2208 netif_carrier_off(dev); 2209 2210 /* read current state */ 2211 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2212 2213 /* enable auto negotiation and reset the negotioation 2214 * (I don't really know what the auto negatiotiation 2215 * reset really means, but it sounds for me right to 2216 * do one here) */ 2217 mdio_write(dev, mii_phy->phy_addr, 2218 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2219 2220 break; 2221 2222 case IF_PORT_10BASET: /* 10BaseT */ 2223 dev->if_port = map->port; 2224 2225 /* we are going to change the media type, so the Link 2226 * will be temporary down and we need to reflect that 2227 * here. When the Link comes up again, it will be 2228 * sensed by the sis_timer procedure, which also does 2229 * all the rest for us */ 2230 netif_carrier_off(dev); 2231 2232 /* set Speed to 10Mbps */ 2233 /* read current state */ 2234 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2235 2236 /* disable auto negotiation and force 10MBit mode*/ 2237 mdio_write(dev, mii_phy->phy_addr, 2238 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2239 MII_CNTL_AUTO)); 2240 break; 2241 2242 case IF_PORT_100BASET: /* 100BaseT */ 2243 case IF_PORT_100BASETX: /* 100BaseTx */ 2244 dev->if_port = map->port; 2245 2246 /* we are going to change the media type, so the Link 2247 * will be temporary down and we need to reflect that 2248 * here. When the Link comes up again, it will be 2249 * sensed by the sis_timer procedure, which also does 2250 * all the rest for us */ 2251 netif_carrier_off(dev); 2252 2253 /* set Speed to 100Mbps */ 2254 /* disable auto negotiation and enable 100MBit Mode */ 2255 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2256 mdio_write(dev, mii_phy->phy_addr, 2257 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2258 MII_CNTL_SPEED); 2259 2260 break; 2261 2262 case IF_PORT_10BASE2: /* 10Base2 */ 2263 case IF_PORT_AUI: /* AUI */ 2264 case IF_PORT_100BASEFX: /* 100BaseFx */ 2265 /* These Modes are not supported (are they?)*/ 2266 return -EOPNOTSUPP; 2267 break; 2268 2269 default: 2270 return -EINVAL; 2271 } 2272 } 2273 return 0; 2274 } 2275 2276 /** 2277 * sis900_mcast_bitnr - compute hashtable index 2278 * @addr: multicast address 2279 * @revision: revision id of chip 2280 * 2281 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2282 * hash table, which makes this function a little bit different from other drivers 2283 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2284 * multicast hash table. 2285 */ 2286 2287 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2288 { 2289 2290 u32 crc = ether_crc(6, addr); 2291 2292 /* leave 8 or 7 most siginifant bits */ 2293 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2294 return (int)(crc >> 24); 2295 else 2296 return (int)(crc >> 25); 2297 } 2298 2299 /** 2300 * set_rx_mode - Set SiS900 receive mode 2301 * @net_dev: the net device to be set 2302 * 2303 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2304 * And set the appropriate multicast filter. 2305 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2306 */ 2307 2308 static void set_rx_mode(struct net_device *net_dev) 2309 { 2310 struct sis900_private *sis_priv = netdev_priv(net_dev); 2311 void __iomem *ioaddr = sis_priv->ioaddr; 2312 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2313 int i, table_entries; 2314 u32 rx_mode; 2315 2316 /* 635 Hash Table entries = 256(2^16) */ 2317 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2318 (sis_priv->chipset_rev == SIS900B_900_REV)) 2319 table_entries = 16; 2320 else 2321 table_entries = 8; 2322 2323 if (net_dev->flags & IFF_PROMISC) { 2324 /* Accept any kinds of packets */ 2325 rx_mode = RFPromiscuous; 2326 for (i = 0; i < table_entries; i++) 2327 mc_filter[i] = 0xffff; 2328 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2329 (net_dev->flags & IFF_ALLMULTI)) { 2330 /* too many multicast addresses or accept all multicast packet */ 2331 rx_mode = RFAAB | RFAAM; 2332 for (i = 0; i < table_entries; i++) 2333 mc_filter[i] = 0xffff; 2334 } else { 2335 /* Accept Broadcast packet, destination address matchs our 2336 * MAC address, use Receive Filter to reject unwanted MCAST 2337 * packets */ 2338 struct netdev_hw_addr *ha; 2339 rx_mode = RFAAB; 2340 2341 netdev_for_each_mc_addr(ha, net_dev) { 2342 unsigned int bit_nr; 2343 2344 bit_nr = sis900_mcast_bitnr(ha->addr, 2345 sis_priv->chipset_rev); 2346 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2347 } 2348 } 2349 2350 /* update Multicast Hash Table in Receive Filter */ 2351 for (i = 0; i < table_entries; i++) { 2352 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2353 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2354 sw32(rfdr, mc_filter[i]); 2355 } 2356 2357 sw32(rfcr, RFEN | rx_mode); 2358 2359 /* sis900 is capable of looping back packets at MAC level for 2360 * debugging purpose */ 2361 if (net_dev->flags & IFF_LOOPBACK) { 2362 u32 cr_saved; 2363 /* We must disable Tx/Rx before setting loopback mode */ 2364 cr_saved = sr32(cr); 2365 sw32(cr, cr_saved | TxDIS | RxDIS); 2366 /* enable loopback */ 2367 sw32(txcfg, sr32(txcfg) | TxMLB); 2368 sw32(rxcfg, sr32(rxcfg) | RxATX); 2369 /* restore cr */ 2370 sw32(cr, cr_saved); 2371 } 2372 } 2373 2374 /** 2375 * sis900_reset - Reset sis900 MAC 2376 * @net_dev: the net device to reset 2377 * 2378 * reset sis900 MAC and wait until finished 2379 * reset through command register 2380 * change backoff algorithm for 900B0 & 635 M/B 2381 */ 2382 2383 static void sis900_reset(struct net_device *net_dev) 2384 { 2385 struct sis900_private *sis_priv = netdev_priv(net_dev); 2386 void __iomem *ioaddr = sis_priv->ioaddr; 2387 u32 status = TxRCMP | RxRCMP; 2388 int i; 2389 2390 sw32(ier, 0); 2391 sw32(imr, 0); 2392 sw32(rfcr, 0); 2393 2394 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2395 2396 /* Check that the chip has finished the reset. */ 2397 for (i = 0; status && (i < 1000); i++) 2398 status ^= sr32(isr) & status; 2399 2400 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2401 sis_priv->chipset_rev == SIS900B_900_REV) 2402 sw32(cfg, PESEL | RND_CNT); 2403 else 2404 sw32(cfg, PESEL); 2405 } 2406 2407 /** 2408 * sis900_remove - Remove sis900 device 2409 * @pci_dev: the pci device to be removed 2410 * 2411 * remove and release SiS900 net device 2412 */ 2413 2414 static void sis900_remove(struct pci_dev *pci_dev) 2415 { 2416 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2417 struct sis900_private *sis_priv = netdev_priv(net_dev); 2418 2419 unregister_netdev(net_dev); 2420 2421 while (sis_priv->first_mii) { 2422 struct mii_phy *phy = sis_priv->first_mii; 2423 2424 sis_priv->first_mii = phy->next; 2425 kfree(phy); 2426 } 2427 2428 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2429 sis_priv->rx_ring_dma); 2430 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2431 sis_priv->tx_ring_dma); 2432 pci_iounmap(pci_dev, sis_priv->ioaddr); 2433 free_netdev(net_dev); 2434 pci_release_regions(pci_dev); 2435 pci_set_drvdata(pci_dev, NULL); 2436 } 2437 2438 #ifdef CONFIG_PM 2439 2440 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2441 { 2442 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2443 struct sis900_private *sis_priv = netdev_priv(net_dev); 2444 void __iomem *ioaddr = sis_priv->ioaddr; 2445 2446 if(!netif_running(net_dev)) 2447 return 0; 2448 2449 netif_stop_queue(net_dev); 2450 netif_device_detach(net_dev); 2451 2452 /* Stop the chip's Tx and Rx Status Machine */ 2453 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2454 2455 pci_set_power_state(pci_dev, PCI_D3hot); 2456 pci_save_state(pci_dev); 2457 2458 return 0; 2459 } 2460 2461 static int sis900_resume(struct pci_dev *pci_dev) 2462 { 2463 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2464 struct sis900_private *sis_priv = netdev_priv(net_dev); 2465 void __iomem *ioaddr = sis_priv->ioaddr; 2466 2467 if(!netif_running(net_dev)) 2468 return 0; 2469 pci_restore_state(pci_dev); 2470 pci_set_power_state(pci_dev, PCI_D0); 2471 2472 sis900_init_rxfilter(net_dev); 2473 2474 sis900_init_tx_ring(net_dev); 2475 sis900_init_rx_ring(net_dev); 2476 2477 set_rx_mode(net_dev); 2478 2479 netif_device_attach(net_dev); 2480 netif_start_queue(net_dev); 2481 2482 /* Workaround for EDB */ 2483 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2484 2485 /* Enable all known interrupts by setting the interrupt mask. */ 2486 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 2487 sw32(cr, RxENA | sr32(cr)); 2488 sw32(ier, IE); 2489 2490 sis900_check_mode(net_dev, sis_priv->mii); 2491 2492 return 0; 2493 } 2494 #endif /* CONFIG_PM */ 2495 2496 static struct pci_driver sis900_pci_driver = { 2497 .name = SIS900_MODULE_NAME, 2498 .id_table = sis900_pci_tbl, 2499 .probe = sis900_probe, 2500 .remove = sis900_remove, 2501 #ifdef CONFIG_PM 2502 .suspend = sis900_suspend, 2503 .resume = sis900_resume, 2504 #endif /* CONFIG_PM */ 2505 }; 2506 2507 static int __init sis900_init_module(void) 2508 { 2509 /* when a module, this is printed whether or not devices are found in probe */ 2510 #ifdef MODULE 2511 printk(version); 2512 #endif 2513 2514 return pci_register_driver(&sis900_pci_driver); 2515 } 2516 2517 static void __exit sis900_cleanup_module(void) 2518 { 2519 pci_unregister_driver(&sis900_pci_driver); 2520 } 2521 2522 module_init(sis900_init_module); 2523 module_exit(sis900_cleanup_module); 2524 2525