1 // SPDX-License-Identifier: GPL-2.0-only 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2018 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include "net_driver.h" 12 #include "efx.h" 13 #include "nic_common.h" 14 #include "tx_common.h" 15 #include <net/gso.h> 16 17 static unsigned int efx_tx_cb_page_count(struct efx_tx_queue *tx_queue) 18 { 19 return DIV_ROUND_UP(tx_queue->ptr_mask + 1, 20 PAGE_SIZE >> EFX_TX_CB_ORDER); 21 } 22 23 int efx_probe_tx_queue(struct efx_tx_queue *tx_queue) 24 { 25 struct efx_nic *efx = tx_queue->efx; 26 unsigned int entries; 27 int rc; 28 29 /* Create the smallest power-of-two aligned ring */ 30 entries = max(roundup_pow_of_two(efx->txq_entries), EFX_MIN_DMAQ_SIZE); 31 EFX_WARN_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE); 32 tx_queue->ptr_mask = entries - 1; 33 34 netif_dbg(efx, probe, efx->net_dev, 35 "creating TX queue %d size %#x mask %#x\n", 36 tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask); 37 38 /* Allocate software ring */ 39 tx_queue->buffer = kcalloc(entries, sizeof(*tx_queue->buffer), 40 GFP_KERNEL); 41 if (!tx_queue->buffer) 42 return -ENOMEM; 43 44 tx_queue->cb_page = kcalloc(efx_tx_cb_page_count(tx_queue), 45 sizeof(tx_queue->cb_page[0]), GFP_KERNEL); 46 if (!tx_queue->cb_page) { 47 rc = -ENOMEM; 48 goto fail1; 49 } 50 51 /* Allocate hardware ring, determine TXQ type */ 52 rc = efx_nic_probe_tx(tx_queue); 53 if (rc) 54 goto fail2; 55 56 tx_queue->channel->tx_queue_by_type[tx_queue->type] = tx_queue; 57 return 0; 58 59 fail2: 60 kfree(tx_queue->cb_page); 61 tx_queue->cb_page = NULL; 62 fail1: 63 kfree(tx_queue->buffer); 64 tx_queue->buffer = NULL; 65 return rc; 66 } 67 68 void efx_init_tx_queue(struct efx_tx_queue *tx_queue) 69 { 70 struct efx_nic *efx = tx_queue->efx; 71 72 netif_dbg(efx, drv, efx->net_dev, 73 "initialising TX queue %d\n", tx_queue->queue); 74 75 tx_queue->insert_count = 0; 76 tx_queue->notify_count = 0; 77 tx_queue->write_count = 0; 78 tx_queue->packet_write_count = 0; 79 tx_queue->old_write_count = 0; 80 tx_queue->read_count = 0; 81 tx_queue->old_read_count = 0; 82 tx_queue->empty_read_count = 0 | EFX_EMPTY_COUNT_VALID; 83 tx_queue->xmit_pending = false; 84 tx_queue->timestamping = (efx_ptp_use_mac_tx_timestamps(efx) && 85 tx_queue->channel == efx_ptp_channel(efx)); 86 tx_queue->completed_timestamp_major = 0; 87 tx_queue->completed_timestamp_minor = 0; 88 89 tx_queue->old_complete_packets = tx_queue->complete_packets; 90 tx_queue->old_complete_bytes = tx_queue->complete_bytes; 91 tx_queue->old_tso_bursts = tx_queue->tso_bursts; 92 tx_queue->old_tso_packets = tx_queue->tso_packets; 93 94 tx_queue->xdp_tx = efx_channel_is_xdp_tx(tx_queue->channel); 95 tx_queue->tso_version = 0; 96 97 /* Set up TX descriptor ring */ 98 efx_nic_init_tx(tx_queue); 99 100 tx_queue->initialised = true; 101 } 102 103 void efx_fini_tx_queue(struct efx_tx_queue *tx_queue) 104 { 105 struct efx_tx_buffer *buffer; 106 107 netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 108 "shutting down TX queue %d\n", tx_queue->queue); 109 110 tx_queue->initialised = false; 111 112 if (!tx_queue->buffer) 113 return; 114 115 /* Free any buffers left in the ring */ 116 while (tx_queue->read_count != tx_queue->write_count) { 117 unsigned int xdp_pkts_compl = 0, xdp_bytes_compl = 0; 118 unsigned int pkts_compl = 0, bytes_compl = 0; 119 unsigned int efv_pkts_compl = 0; 120 121 buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask]; 122 efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl, 123 &efv_pkts_compl, &xdp_pkts_compl, 124 &xdp_bytes_compl); 125 126 ++tx_queue->read_count; 127 } 128 tx_queue->xmit_pending = false; 129 netdev_tx_reset_queue(tx_queue->core_txq); 130 } 131 132 void efx_remove_tx_queue(struct efx_tx_queue *tx_queue) 133 { 134 int i; 135 136 if (!tx_queue->buffer) 137 return; 138 139 netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 140 "destroying TX queue %d\n", tx_queue->queue); 141 efx_nic_remove_tx(tx_queue); 142 143 if (tx_queue->cb_page) { 144 for (i = 0; i < efx_tx_cb_page_count(tx_queue); i++) 145 efx_nic_free_buffer(tx_queue->efx, 146 &tx_queue->cb_page[i]); 147 kfree(tx_queue->cb_page); 148 tx_queue->cb_page = NULL; 149 } 150 151 kfree(tx_queue->buffer); 152 tx_queue->buffer = NULL; 153 tx_queue->channel->tx_queue_by_type[tx_queue->type] = NULL; 154 } 155 156 void efx_dequeue_buffer(struct efx_tx_queue *tx_queue, 157 struct efx_tx_buffer *buffer, 158 unsigned int *pkts_compl, 159 unsigned int *bytes_compl, 160 unsigned int *efv_pkts_compl, 161 unsigned int *xdp_pkts, 162 unsigned int *xdp_bytes) 163 { 164 if (buffer->unmap_len) { 165 struct device *dma_dev = &tx_queue->efx->pci_dev->dev; 166 dma_addr_t unmap_addr = buffer->dma_addr - buffer->dma_offset; 167 168 if (buffer->flags & EFX_TX_BUF_MAP_SINGLE) 169 dma_unmap_single(dma_dev, unmap_addr, buffer->unmap_len, 170 DMA_TO_DEVICE); 171 else 172 dma_unmap_page(dma_dev, unmap_addr, buffer->unmap_len, 173 DMA_TO_DEVICE); 174 buffer->unmap_len = 0; 175 } 176 177 if (buffer->flags & EFX_TX_BUF_SKB) { 178 struct sk_buff *skb = (struct sk_buff *)buffer->skb; 179 180 if (unlikely(buffer->flags & EFX_TX_BUF_EFV)) { 181 EFX_WARN_ON_PARANOID(!efv_pkts_compl); 182 (*efv_pkts_compl)++; 183 } else { 184 EFX_WARN_ON_PARANOID(!pkts_compl || !bytes_compl); 185 (*pkts_compl)++; 186 (*bytes_compl) += skb->len; 187 } 188 189 if (tx_queue->timestamping && 190 (tx_queue->completed_timestamp_major || 191 tx_queue->completed_timestamp_minor)) { 192 struct skb_shared_hwtstamps hwtstamp; 193 194 hwtstamp.hwtstamp = 195 efx_ptp_nic_to_kernel_time(tx_queue); 196 skb_tstamp_tx(skb, &hwtstamp); 197 198 tx_queue->completed_timestamp_major = 0; 199 tx_queue->completed_timestamp_minor = 0; 200 } 201 dev_consume_skb_any((struct sk_buff *)buffer->skb); 202 netif_vdbg(tx_queue->efx, tx_done, tx_queue->efx->net_dev, 203 "TX queue %d transmission id %x complete\n", 204 tx_queue->queue, tx_queue->read_count); 205 } else if (buffer->flags & EFX_TX_BUF_XDP) { 206 xdp_return_frame_rx_napi(buffer->xdpf); 207 if (xdp_pkts) 208 (*xdp_pkts)++; 209 if (xdp_bytes) 210 (*xdp_bytes) += buffer->xdpf->len; 211 } 212 213 buffer->len = 0; 214 buffer->flags = 0; 215 } 216 217 /* Remove packets from the TX queue 218 * 219 * This removes packets from the TX queue, up to and including the 220 * specified index. 221 */ 222 static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue, 223 unsigned int index, 224 unsigned int *pkts_compl, 225 unsigned int *bytes_compl, 226 unsigned int *efv_pkts_compl, 227 unsigned int *xdp_pkts, 228 unsigned int *xdp_bytes) 229 { 230 struct efx_nic *efx = tx_queue->efx; 231 unsigned int stop_index, read_ptr; 232 233 stop_index = (index + 1) & tx_queue->ptr_mask; 234 read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 235 236 while (read_ptr != stop_index) { 237 struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr]; 238 239 if (!efx_tx_buffer_in_use(buffer)) { 240 netif_err(efx, tx_err, efx->net_dev, 241 "TX queue %d spurious TX completion id %d\n", 242 tx_queue->queue, read_ptr); 243 efx_schedule_reset(efx, RESET_TYPE_TX_SKIP); 244 return; 245 } 246 247 efx_dequeue_buffer(tx_queue, buffer, pkts_compl, bytes_compl, 248 efv_pkts_compl, xdp_pkts, xdp_bytes); 249 250 ++tx_queue->read_count; 251 read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 252 } 253 } 254 255 void efx_xmit_done_check_empty(struct efx_tx_queue *tx_queue) 256 { 257 if ((int)(tx_queue->read_count - tx_queue->old_write_count) >= 0) { 258 tx_queue->old_write_count = READ_ONCE(tx_queue->write_count); 259 if (tx_queue->read_count == tx_queue->old_write_count) { 260 /* Ensure that read_count is flushed. */ 261 smp_mb(); 262 tx_queue->empty_read_count = 263 tx_queue->read_count | EFX_EMPTY_COUNT_VALID; 264 } 265 } 266 } 267 268 int efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index) 269 { 270 unsigned int fill_level, pkts_compl = 0, bytes_compl = 0; 271 unsigned int xdp_pkts_compl = 0, xdp_bytes_compl = 0; 272 unsigned int efv_pkts_compl = 0; 273 struct efx_nic *efx = tx_queue->efx; 274 275 EFX_WARN_ON_ONCE_PARANOID(index > tx_queue->ptr_mask); 276 277 efx_dequeue_buffers(tx_queue, index, &pkts_compl, &bytes_compl, 278 &efv_pkts_compl, &xdp_pkts_compl, &xdp_bytes_compl); 279 tx_queue->pkts_compl += pkts_compl; 280 tx_queue->bytes_compl += bytes_compl; 281 tx_queue->complete_xdp_packets += xdp_pkts_compl; 282 tx_queue->complete_xdp_bytes += xdp_bytes_compl; 283 284 if (pkts_compl + efv_pkts_compl > 1) 285 ++tx_queue->merge_events; 286 287 /* See if we need to restart the netif queue. This memory 288 * barrier ensures that we write read_count (inside 289 * efx_dequeue_buffers()) before reading the queue status. 290 */ 291 smp_mb(); 292 if (unlikely(netif_tx_queue_stopped(tx_queue->core_txq)) && 293 likely(efx->port_enabled) && 294 likely(netif_device_present(efx->net_dev))) { 295 fill_level = efx_channel_tx_fill_level(tx_queue->channel); 296 if (fill_level <= efx->txq_wake_thresh) 297 netif_tx_wake_queue(tx_queue->core_txq); 298 } 299 300 efx_xmit_done_check_empty(tx_queue); 301 302 return pkts_compl + efv_pkts_compl; 303 } 304 305 /* Remove buffers put into a tx_queue for the current packet. 306 * None of the buffers must have an skb attached. 307 */ 308 void efx_enqueue_unwind(struct efx_tx_queue *tx_queue, 309 unsigned int insert_count) 310 { 311 unsigned int xdp_bytes_compl = 0; 312 unsigned int xdp_pkts_compl = 0; 313 unsigned int efv_pkts_compl = 0; 314 struct efx_tx_buffer *buffer; 315 unsigned int bytes_compl = 0; 316 unsigned int pkts_compl = 0; 317 318 /* Work backwards until we hit the original insert pointer value */ 319 while (tx_queue->insert_count != insert_count) { 320 --tx_queue->insert_count; 321 buffer = __efx_tx_queue_get_insert_buffer(tx_queue); 322 efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl, 323 &efv_pkts_compl, &xdp_pkts_compl, 324 &xdp_bytes_compl); 325 } 326 } 327 328 struct efx_tx_buffer *efx_tx_map_chunk(struct efx_tx_queue *tx_queue, 329 dma_addr_t dma_addr, size_t len) 330 { 331 const struct efx_nic_type *nic_type = tx_queue->efx->type; 332 struct efx_tx_buffer *buffer; 333 unsigned int dma_len; 334 335 /* Map the fragment taking account of NIC-dependent DMA limits. */ 336 do { 337 buffer = efx_tx_queue_get_insert_buffer(tx_queue); 338 339 if (nic_type->tx_limit_len) 340 dma_len = nic_type->tx_limit_len(tx_queue, dma_addr, len); 341 else 342 dma_len = len; 343 344 buffer->len = dma_len; 345 buffer->dma_addr = dma_addr; 346 buffer->flags = EFX_TX_BUF_CONT; 347 len -= dma_len; 348 dma_addr += dma_len; 349 ++tx_queue->insert_count; 350 } while (len); 351 352 return buffer; 353 } 354 355 int efx_tx_tso_header_length(struct sk_buff *skb) 356 { 357 size_t header_len; 358 359 if (skb->encapsulation) 360 header_len = skb_inner_transport_offset(skb) + 361 (inner_tcp_hdr(skb)->doff << 2u); 362 else 363 header_len = skb_transport_offset(skb) + 364 (tcp_hdr(skb)->doff << 2u); 365 return header_len; 366 } 367 368 /* Map all data from an SKB for DMA and create descriptors on the queue. */ 369 int efx_tx_map_data(struct efx_tx_queue *tx_queue, struct sk_buff *skb, 370 unsigned int segment_count) 371 { 372 struct efx_nic *efx = tx_queue->efx; 373 struct device *dma_dev = &efx->pci_dev->dev; 374 unsigned int frag_index, nr_frags; 375 dma_addr_t dma_addr, unmap_addr; 376 unsigned short dma_flags; 377 size_t len, unmap_len; 378 379 nr_frags = skb_shinfo(skb)->nr_frags; 380 frag_index = 0; 381 382 /* Map header data. */ 383 len = skb_headlen(skb); 384 dma_addr = dma_map_single(dma_dev, skb->data, len, DMA_TO_DEVICE); 385 dma_flags = EFX_TX_BUF_MAP_SINGLE; 386 unmap_len = len; 387 unmap_addr = dma_addr; 388 389 if (unlikely(dma_mapping_error(dma_dev, dma_addr))) 390 return -EIO; 391 392 if (segment_count) { 393 /* For TSO we need to put the header in to a separate 394 * descriptor. Map this separately if necessary. 395 */ 396 size_t header_len = efx_tx_tso_header_length(skb); 397 398 if (header_len != len) { 399 tx_queue->tso_long_headers++; 400 efx_tx_map_chunk(tx_queue, dma_addr, header_len); 401 len -= header_len; 402 dma_addr += header_len; 403 } 404 } 405 406 /* Add descriptors for each fragment. */ 407 do { 408 struct efx_tx_buffer *buffer; 409 skb_frag_t *fragment; 410 411 buffer = efx_tx_map_chunk(tx_queue, dma_addr, len); 412 413 /* The final descriptor for a fragment is responsible for 414 * unmapping the whole fragment. 415 */ 416 buffer->flags = EFX_TX_BUF_CONT | dma_flags; 417 buffer->unmap_len = unmap_len; 418 buffer->dma_offset = buffer->dma_addr - unmap_addr; 419 420 if (frag_index >= nr_frags) { 421 /* Store SKB details with the final buffer for 422 * the completion. 423 */ 424 buffer->skb = skb; 425 buffer->flags = EFX_TX_BUF_SKB | dma_flags; 426 return 0; 427 } 428 429 /* Move on to the next fragment. */ 430 fragment = &skb_shinfo(skb)->frags[frag_index++]; 431 len = skb_frag_size(fragment); 432 dma_addr = skb_frag_dma_map(dma_dev, fragment, 0, len, 433 DMA_TO_DEVICE); 434 dma_flags = 0; 435 unmap_len = len; 436 unmap_addr = dma_addr; 437 438 if (unlikely(dma_mapping_error(dma_dev, dma_addr))) 439 return -EIO; 440 } while (1); 441 } 442 443 unsigned int efx_tx_max_skb_descs(struct efx_nic *efx) 444 { 445 /* Header and payload descriptor for each output segment, plus 446 * one for every input fragment boundary within a segment 447 */ 448 unsigned int max_descs = EFX_TSO_MAX_SEGS * 2 + MAX_SKB_FRAGS; 449 450 /* Possibly one more per segment for option descriptors */ 451 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) 452 max_descs += EFX_TSO_MAX_SEGS; 453 454 /* Possibly more for PCIe page boundaries within input fragments */ 455 if (PAGE_SIZE > EFX_PAGE_SIZE) 456 max_descs += max_t(unsigned int, MAX_SKB_FRAGS, 457 DIV_ROUND_UP(GSO_LEGACY_MAX_SIZE, 458 EFX_PAGE_SIZE)); 459 460 return max_descs; 461 } 462 463 /* 464 * Fallback to software TSO. 465 * 466 * This is used if we are unable to send a GSO packet through hardware TSO. 467 * This should only ever happen due to per-queue restrictions - unsupported 468 * packets should first be filtered by the feature flags. 469 * 470 * Returns 0 on success, error code otherwise. 471 */ 472 int efx_tx_tso_fallback(struct efx_tx_queue *tx_queue, struct sk_buff *skb) 473 { 474 struct sk_buff *segments, *next; 475 476 segments = skb_gso_segment(skb, 0); 477 if (IS_ERR(segments)) 478 return PTR_ERR(segments); 479 480 dev_consume_skb_any(skb); 481 482 skb_list_walk_safe(segments, skb, next) { 483 skb_mark_not_on_list(skb); 484 efx_enqueue_skb(tx_queue, skb); 485 } 486 487 return 0; 488 } 489