125730d8bSEdward Cree // SPDX-License-Identifier: GPL-2.0-only 225730d8bSEdward Cree /**************************************************************************** 325730d8bSEdward Cree * Driver for Solarflare network controllers and boards 425730d8bSEdward Cree * Copyright 2022 Advanced Micro Devices, Inc. 525730d8bSEdward Cree * 625730d8bSEdward Cree * This program is free software; you can redistribute it and/or modify it 725730d8bSEdward Cree * under the terms of the GNU General Public License version 2 as published 825730d8bSEdward Cree * by the Free Software Foundation, incorporated herein by reference. 925730d8bSEdward Cree */ 1025730d8bSEdward Cree 1125730d8bSEdward Cree #include "tc_counters.h" 1225730d8bSEdward Cree #include "mae_counter_format.h" 1325730d8bSEdward Cree #include "mae.h" 1425730d8bSEdward Cree #include "rx_common.h" 1525730d8bSEdward Cree 1619a0c989SEdward Cree /* Counter-management hashtables */ 1719a0c989SEdward Cree 1819a0c989SEdward Cree static const struct rhashtable_params efx_tc_counter_id_ht_params = { 1919a0c989SEdward Cree .key_len = offsetof(struct efx_tc_counter_index, linkage), 2019a0c989SEdward Cree .key_offset = 0, 2119a0c989SEdward Cree .head_offset = offsetof(struct efx_tc_counter_index, linkage), 2219a0c989SEdward Cree }; 2319a0c989SEdward Cree 2419a0c989SEdward Cree static const struct rhashtable_params efx_tc_counter_ht_params = { 2519a0c989SEdward Cree .key_len = offsetof(struct efx_tc_counter, linkage), 2619a0c989SEdward Cree .key_offset = 0, 2719a0c989SEdward Cree .head_offset = offsetof(struct efx_tc_counter, linkage), 2819a0c989SEdward Cree }; 2919a0c989SEdward Cree 3019a0c989SEdward Cree static void efx_tc_counter_free(void *ptr, void *__unused) 3119a0c989SEdward Cree { 3219a0c989SEdward Cree struct efx_tc_counter *cnt = ptr; 3319a0c989SEdward Cree 3419a0c989SEdward Cree kfree(cnt); 3519a0c989SEdward Cree } 3619a0c989SEdward Cree 3719a0c989SEdward Cree static void efx_tc_counter_id_free(void *ptr, void *__unused) 3819a0c989SEdward Cree { 3919a0c989SEdward Cree struct efx_tc_counter_index *ctr = ptr; 4019a0c989SEdward Cree 4119a0c989SEdward Cree WARN_ON(refcount_read(&ctr->ref)); 4219a0c989SEdward Cree kfree(ctr); 4319a0c989SEdward Cree } 4419a0c989SEdward Cree 4519a0c989SEdward Cree int efx_tc_init_counters(struct efx_nic *efx) 4619a0c989SEdward Cree { 4719a0c989SEdward Cree int rc; 4819a0c989SEdward Cree 4919a0c989SEdward Cree rc = rhashtable_init(&efx->tc->counter_id_ht, &efx_tc_counter_id_ht_params); 5019a0c989SEdward Cree if (rc < 0) 5119a0c989SEdward Cree goto fail_counter_id_ht; 5219a0c989SEdward Cree rc = rhashtable_init(&efx->tc->counter_ht, &efx_tc_counter_ht_params); 5319a0c989SEdward Cree if (rc < 0) 5419a0c989SEdward Cree goto fail_counter_ht; 5519a0c989SEdward Cree return 0; 5619a0c989SEdward Cree fail_counter_ht: 5719a0c989SEdward Cree rhashtable_destroy(&efx->tc->counter_id_ht); 5819a0c989SEdward Cree fail_counter_id_ht: 5919a0c989SEdward Cree return rc; 6019a0c989SEdward Cree } 6119a0c989SEdward Cree 6219a0c989SEdward Cree /* Only call this in init failure teardown. 6319a0c989SEdward Cree * Normal exit should fini instead as there may be entries in the table. 6419a0c989SEdward Cree */ 6519a0c989SEdward Cree void efx_tc_destroy_counters(struct efx_nic *efx) 6619a0c989SEdward Cree { 6719a0c989SEdward Cree rhashtable_destroy(&efx->tc->counter_ht); 6819a0c989SEdward Cree rhashtable_destroy(&efx->tc->counter_id_ht); 6919a0c989SEdward Cree } 7019a0c989SEdward Cree 7119a0c989SEdward Cree void efx_tc_fini_counters(struct efx_nic *efx) 7219a0c989SEdward Cree { 7319a0c989SEdward Cree rhashtable_free_and_destroy(&efx->tc->counter_id_ht, efx_tc_counter_id_free, NULL); 7419a0c989SEdward Cree rhashtable_free_and_destroy(&efx->tc->counter_ht, efx_tc_counter_free, NULL); 7519a0c989SEdward Cree } 7619a0c989SEdward Cree 770363aa29SEdward Cree /* Counter allocation */ 780363aa29SEdward Cree 790363aa29SEdward Cree static struct efx_tc_counter *efx_tc_flower_allocate_counter(struct efx_nic *efx, 800363aa29SEdward Cree int type) 810363aa29SEdward Cree { 820363aa29SEdward Cree struct efx_tc_counter *cnt; 830363aa29SEdward Cree int rc, rc2; 840363aa29SEdward Cree 850363aa29SEdward Cree cnt = kzalloc(sizeof(*cnt), GFP_USER); 860363aa29SEdward Cree if (!cnt) 870363aa29SEdward Cree return ERR_PTR(-ENOMEM); 880363aa29SEdward Cree 89c4bad432SEdward Cree spin_lock_init(&cnt->lock); 90c4bad432SEdward Cree cnt->touched = jiffies; 910363aa29SEdward Cree cnt->type = type; 920363aa29SEdward Cree 930363aa29SEdward Cree rc = efx_mae_allocate_counter(efx, cnt); 940363aa29SEdward Cree if (rc) 950363aa29SEdward Cree goto fail1; 960363aa29SEdward Cree rc = rhashtable_insert_fast(&efx->tc->counter_ht, &cnt->linkage, 970363aa29SEdward Cree efx_tc_counter_ht_params); 980363aa29SEdward Cree if (rc) 990363aa29SEdward Cree goto fail2; 1000363aa29SEdward Cree return cnt; 1010363aa29SEdward Cree fail2: 1020363aa29SEdward Cree /* If we get here, it implies that we couldn't insert into the table, 1030363aa29SEdward Cree * which in turn probably means that the fw_id was already taken. 1040363aa29SEdward Cree * In that case, it's unclear whether we really 'own' the fw_id; but 1050363aa29SEdward Cree * the firmware seemed to think we did, so it's proper to free it. 1060363aa29SEdward Cree */ 1070363aa29SEdward Cree rc2 = efx_mae_free_counter(efx, cnt); 1080363aa29SEdward Cree if (rc2) 1090363aa29SEdward Cree netif_warn(efx, hw, efx->net_dev, 1100363aa29SEdward Cree "Failed to free MAE counter %u, rc %d\n", 1110363aa29SEdward Cree cnt->fw_id, rc2); 1120363aa29SEdward Cree fail1: 1130363aa29SEdward Cree kfree(cnt); 1140363aa29SEdward Cree return ERR_PTR(rc > 0 ? -EIO : rc); 1150363aa29SEdward Cree } 1160363aa29SEdward Cree 1170363aa29SEdward Cree static void efx_tc_flower_release_counter(struct efx_nic *efx, 1180363aa29SEdward Cree struct efx_tc_counter *cnt) 1190363aa29SEdward Cree { 1200363aa29SEdward Cree int rc; 1210363aa29SEdward Cree 1220363aa29SEdward Cree rhashtable_remove_fast(&efx->tc->counter_ht, &cnt->linkage, 1230363aa29SEdward Cree efx_tc_counter_ht_params); 1240363aa29SEdward Cree rc = efx_mae_free_counter(efx, cnt); 1250363aa29SEdward Cree if (rc) 1260363aa29SEdward Cree netif_warn(efx, hw, efx->net_dev, 1270363aa29SEdward Cree "Failed to free MAE counter %u, rc %d\n", 1280363aa29SEdward Cree cnt->fw_id, rc); 1290363aa29SEdward Cree /* This doesn't protect counter updates coming in arbitrarily long 1300363aa29SEdward Cree * after we deleted the counter. The RCU just ensures that we won't 1310363aa29SEdward Cree * free the counter while another thread has a pointer to it. 1320363aa29SEdward Cree * Ensuring we don't update the wrong counter if the ID gets re-used 1330363aa29SEdward Cree * is handled by the generation count. 1340363aa29SEdward Cree */ 1350363aa29SEdward Cree synchronize_rcu(); 136c4bad432SEdward Cree EFX_WARN_ON_PARANOID(spin_is_locked(&cnt->lock)); 1370363aa29SEdward Cree kfree(cnt); 1380363aa29SEdward Cree } 1390363aa29SEdward Cree 140c4bad432SEdward Cree static struct efx_tc_counter *efx_tc_flower_find_counter_by_fw_id( 141c4bad432SEdward Cree struct efx_nic *efx, int type, u32 fw_id) 142c4bad432SEdward Cree { 143c4bad432SEdward Cree struct efx_tc_counter key = {}; 144c4bad432SEdward Cree 145c4bad432SEdward Cree key.fw_id = fw_id; 146c4bad432SEdward Cree key.type = type; 147c4bad432SEdward Cree 148c4bad432SEdward Cree return rhashtable_lookup_fast(&efx->tc->counter_ht, &key, 149c4bad432SEdward Cree efx_tc_counter_ht_params); 150c4bad432SEdward Cree } 151c4bad432SEdward Cree 1520363aa29SEdward Cree /* TC cookie to counter mapping */ 1530363aa29SEdward Cree 1540363aa29SEdward Cree void efx_tc_flower_put_counter_index(struct efx_nic *efx, 1550363aa29SEdward Cree struct efx_tc_counter_index *ctr) 1560363aa29SEdward Cree { 1570363aa29SEdward Cree if (!refcount_dec_and_test(&ctr->ref)) 1580363aa29SEdward Cree return; /* still in use */ 1590363aa29SEdward Cree rhashtable_remove_fast(&efx->tc->counter_id_ht, &ctr->linkage, 1600363aa29SEdward Cree efx_tc_counter_id_ht_params); 1610363aa29SEdward Cree efx_tc_flower_release_counter(efx, ctr->cnt); 1620363aa29SEdward Cree kfree(ctr); 1630363aa29SEdward Cree } 1640363aa29SEdward Cree 1650363aa29SEdward Cree struct efx_tc_counter_index *efx_tc_flower_get_counter_index( 1660363aa29SEdward Cree struct efx_nic *efx, unsigned long cookie, 1670363aa29SEdward Cree enum efx_tc_counter_type type) 1680363aa29SEdward Cree { 1690363aa29SEdward Cree struct efx_tc_counter_index *ctr, *old; 1700363aa29SEdward Cree struct efx_tc_counter *cnt; 1710363aa29SEdward Cree 1720363aa29SEdward Cree ctr = kzalloc(sizeof(*ctr), GFP_USER); 1730363aa29SEdward Cree if (!ctr) 1740363aa29SEdward Cree return ERR_PTR(-ENOMEM); 1750363aa29SEdward Cree ctr->cookie = cookie; 1760363aa29SEdward Cree old = rhashtable_lookup_get_insert_fast(&efx->tc->counter_id_ht, 1770363aa29SEdward Cree &ctr->linkage, 1780363aa29SEdward Cree efx_tc_counter_id_ht_params); 1790363aa29SEdward Cree if (old) { 1800363aa29SEdward Cree /* don't need our new entry */ 1810363aa29SEdward Cree kfree(ctr); 1820363aa29SEdward Cree if (!refcount_inc_not_zero(&old->ref)) 1830363aa29SEdward Cree return ERR_PTR(-EAGAIN); 1840363aa29SEdward Cree /* existing entry found */ 1850363aa29SEdward Cree ctr = old; 1860363aa29SEdward Cree } else { 1870363aa29SEdward Cree cnt = efx_tc_flower_allocate_counter(efx, type); 1880363aa29SEdward Cree if (IS_ERR(cnt)) { 1890363aa29SEdward Cree rhashtable_remove_fast(&efx->tc->counter_id_ht, 1900363aa29SEdward Cree &ctr->linkage, 1910363aa29SEdward Cree efx_tc_counter_id_ht_params); 1920363aa29SEdward Cree kfree(ctr); 1930363aa29SEdward Cree return (void *)cnt; /* it's an ERR_PTR */ 1940363aa29SEdward Cree } 1950363aa29SEdward Cree ctr->cnt = cnt; 1960363aa29SEdward Cree refcount_set(&ctr->ref, 1); 1970363aa29SEdward Cree } 1980363aa29SEdward Cree return ctr; 1990363aa29SEdward Cree } 2000363aa29SEdward Cree 201*50f8f2f7SEdward Cree struct efx_tc_counter_index *efx_tc_flower_find_counter_index( 202*50f8f2f7SEdward Cree struct efx_nic *efx, unsigned long cookie) 203*50f8f2f7SEdward Cree { 204*50f8f2f7SEdward Cree struct efx_tc_counter_index key = {}; 205*50f8f2f7SEdward Cree 206*50f8f2f7SEdward Cree key.cookie = cookie; 207*50f8f2f7SEdward Cree return rhashtable_lookup_fast(&efx->tc->counter_id_ht, &key, 208*50f8f2f7SEdward Cree efx_tc_counter_id_ht_params); 209*50f8f2f7SEdward Cree } 210*50f8f2f7SEdward Cree 21125730d8bSEdward Cree /* TC Channel. Counter updates are delivered on this channel's RXQ. */ 21225730d8bSEdward Cree 21325730d8bSEdward Cree static void efx_tc_handle_no_channel(struct efx_nic *efx) 21425730d8bSEdward Cree { 21525730d8bSEdward Cree netif_warn(efx, drv, efx->net_dev, 21625730d8bSEdward Cree "MAE counters require MSI-X and 1 additional interrupt vector.\n"); 21725730d8bSEdward Cree } 21825730d8bSEdward Cree 21925730d8bSEdward Cree static int efx_tc_probe_channel(struct efx_channel *channel) 22025730d8bSEdward Cree { 22125730d8bSEdward Cree struct efx_rx_queue *rx_queue = &channel->rx_queue; 22225730d8bSEdward Cree 22325730d8bSEdward Cree channel->irq_moderation_us = 0; 22425730d8bSEdward Cree rx_queue->core_index = 0; 22525730d8bSEdward Cree 22625730d8bSEdward Cree INIT_WORK(&rx_queue->grant_work, efx_mae_counters_grant_credits); 22725730d8bSEdward Cree 22825730d8bSEdward Cree return 0; 22925730d8bSEdward Cree } 23025730d8bSEdward Cree 23125730d8bSEdward Cree static int efx_tc_start_channel(struct efx_channel *channel) 23225730d8bSEdward Cree { 23325730d8bSEdward Cree struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel); 23425730d8bSEdward Cree struct efx_nic *efx = channel->efx; 23525730d8bSEdward Cree 23625730d8bSEdward Cree return efx_mae_start_counters(efx, rx_queue); 23725730d8bSEdward Cree } 23825730d8bSEdward Cree 23925730d8bSEdward Cree static void efx_tc_stop_channel(struct efx_channel *channel) 24025730d8bSEdward Cree { 24125730d8bSEdward Cree struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel); 24225730d8bSEdward Cree struct efx_nic *efx = channel->efx; 24325730d8bSEdward Cree int rc; 24425730d8bSEdward Cree 24525730d8bSEdward Cree rc = efx_mae_stop_counters(efx, rx_queue); 24625730d8bSEdward Cree if (rc) 24725730d8bSEdward Cree netif_warn(efx, drv, efx->net_dev, 24825730d8bSEdward Cree "Failed to stop MAE counters streaming, rc=%d.\n", 24925730d8bSEdward Cree rc); 25025730d8bSEdward Cree rx_queue->grant_credits = false; 25125730d8bSEdward Cree flush_work(&rx_queue->grant_work); 25225730d8bSEdward Cree } 25325730d8bSEdward Cree 25425730d8bSEdward Cree static void efx_tc_remove_channel(struct efx_channel *channel) 25525730d8bSEdward Cree { 25625730d8bSEdward Cree } 25725730d8bSEdward Cree 25825730d8bSEdward Cree static void efx_tc_get_channel_name(struct efx_channel *channel, 25925730d8bSEdward Cree char *buf, size_t len) 26025730d8bSEdward Cree { 26125730d8bSEdward Cree snprintf(buf, len, "%s-mae", channel->efx->name); 26225730d8bSEdward Cree } 26325730d8bSEdward Cree 26425730d8bSEdward Cree static void efx_tc_counter_update(struct efx_nic *efx, 26525730d8bSEdward Cree enum efx_tc_counter_type counter_type, 26625730d8bSEdward Cree u32 counter_idx, u64 packets, u64 bytes, 26725730d8bSEdward Cree u32 mark) 26825730d8bSEdward Cree { 269c4bad432SEdward Cree struct efx_tc_counter *cnt; 270c4bad432SEdward Cree 271c4bad432SEdward Cree rcu_read_lock(); /* Protect against deletion of 'cnt' */ 272c4bad432SEdward Cree cnt = efx_tc_flower_find_counter_by_fw_id(efx, counter_type, counter_idx); 273c4bad432SEdward Cree if (!cnt) { 274c4bad432SEdward Cree /* This can legitimately happen when a counter is removed, 275c4bad432SEdward Cree * with updates for the counter still in-flight; however this 276c4bad432SEdward Cree * should be an infrequent occurrence. 277c4bad432SEdward Cree */ 278c4bad432SEdward Cree if (net_ratelimit()) 279c4bad432SEdward Cree netif_dbg(efx, drv, efx->net_dev, 280c4bad432SEdward Cree "Got update for unwanted MAE counter %u type %u\n", 281c4bad432SEdward Cree counter_idx, counter_type); 282c4bad432SEdward Cree goto out; 283c4bad432SEdward Cree } 284c4bad432SEdward Cree 285c4bad432SEdward Cree spin_lock_bh(&cnt->lock); 286c4bad432SEdward Cree if ((s32)mark - (s32)cnt->gen < 0) { 287c4bad432SEdward Cree /* This counter update packet is from before the counter was 288c4bad432SEdward Cree * allocated; thus it must be for a previous counter with 289c4bad432SEdward Cree * the same ID that has since been freed, and it should be 290c4bad432SEdward Cree * ignored. 291c4bad432SEdward Cree */ 292c4bad432SEdward Cree } else { 293c4bad432SEdward Cree /* Update latest seen generation count. This ensures that 294c4bad432SEdward Cree * even a long-lived counter won't start getting ignored if 295c4bad432SEdward Cree * the generation count wraps around, unless it somehow 296c4bad432SEdward Cree * manages to go 1<<31 generations without an update. 297c4bad432SEdward Cree */ 298c4bad432SEdward Cree cnt->gen = mark; 299c4bad432SEdward Cree /* update counter values */ 300c4bad432SEdward Cree cnt->packets += packets; 301c4bad432SEdward Cree cnt->bytes += bytes; 302c4bad432SEdward Cree cnt->touched = jiffies; 303c4bad432SEdward Cree } 304c4bad432SEdward Cree spin_unlock_bh(&cnt->lock); 305c4bad432SEdward Cree out: 306c4bad432SEdward Cree rcu_read_unlock(); 30725730d8bSEdward Cree } 30825730d8bSEdward Cree 30925730d8bSEdward Cree static void efx_tc_rx_version_1(struct efx_nic *efx, const u8 *data, u32 mark) 31025730d8bSEdward Cree { 31125730d8bSEdward Cree u16 n_counters, i; 31225730d8bSEdward Cree 31325730d8bSEdward Cree /* Header format: 31425730d8bSEdward Cree * + | 0 | 1 | 2 | 3 | 31525730d8bSEdward Cree * 0 |version | reserved | 31625730d8bSEdward Cree * 4 | seq_index | n_counters | 31725730d8bSEdward Cree */ 31825730d8bSEdward Cree 31925730d8bSEdward Cree n_counters = le16_to_cpu(*(const __le16 *)(data + 6)); 32025730d8bSEdward Cree 32125730d8bSEdward Cree /* Counter update entry format: 32225730d8bSEdward Cree * | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e | f | 32325730d8bSEdward Cree * | counter_idx | packet_count | byte_count | 32425730d8bSEdward Cree */ 32525730d8bSEdward Cree for (i = 0; i < n_counters; i++) { 32625730d8bSEdward Cree const void *entry = data + 8 + 16 * i; 32725730d8bSEdward Cree u64 packet_count, byte_count; 32825730d8bSEdward Cree u32 counter_idx; 32925730d8bSEdward Cree 33025730d8bSEdward Cree counter_idx = le32_to_cpu(*(const __le32 *)entry); 33125730d8bSEdward Cree packet_count = le32_to_cpu(*(const __le32 *)(entry + 4)) | 33225730d8bSEdward Cree ((u64)le16_to_cpu(*(const __le16 *)(entry + 8)) << 32); 33325730d8bSEdward Cree byte_count = le16_to_cpu(*(const __le16 *)(entry + 10)) | 33425730d8bSEdward Cree ((u64)le32_to_cpu(*(const __le32 *)(entry + 12)) << 16); 33525730d8bSEdward Cree efx_tc_counter_update(efx, EFX_TC_COUNTER_TYPE_AR, counter_idx, 33625730d8bSEdward Cree packet_count, byte_count, mark); 33725730d8bSEdward Cree } 33825730d8bSEdward Cree } 33925730d8bSEdward Cree 34025730d8bSEdward Cree #define TCV2_HDR_PTR(pkt, field) \ 34125730d8bSEdward Cree ((void)BUILD_BUG_ON_ZERO(ERF_SC_PACKETISER_HEADER_##field##_LBN & 7), \ 34225730d8bSEdward Cree (pkt) + ERF_SC_PACKETISER_HEADER_##field##_LBN / 8) 34325730d8bSEdward Cree #define TCV2_HDR_BYTE(pkt, field) \ 34425730d8bSEdward Cree ((void)BUILD_BUG_ON_ZERO(ERF_SC_PACKETISER_HEADER_##field##_WIDTH != 8),\ 34525730d8bSEdward Cree *TCV2_HDR_PTR(pkt, field)) 34625730d8bSEdward Cree #define TCV2_HDR_WORD(pkt, field) \ 34725730d8bSEdward Cree ((void)BUILD_BUG_ON_ZERO(ERF_SC_PACKETISER_HEADER_##field##_WIDTH != 16),\ 34825730d8bSEdward Cree (void)BUILD_BUG_ON_ZERO(ERF_SC_PACKETISER_HEADER_##field##_LBN & 15), \ 34925730d8bSEdward Cree *(__force const __le16 *)TCV2_HDR_PTR(pkt, field)) 35025730d8bSEdward Cree #define TCV2_PKT_PTR(pkt, poff, i, field) \ 35125730d8bSEdward Cree ((void)BUILD_BUG_ON_ZERO(ERF_SC_PACKETISER_PAYLOAD_##field##_LBN & 7), \ 35225730d8bSEdward Cree (pkt) + ERF_SC_PACKETISER_PAYLOAD_##field##_LBN/8 + poff + \ 35325730d8bSEdward Cree i * ER_RX_SL_PACKETISER_PAYLOAD_WORD_SIZE) 35425730d8bSEdward Cree 35525730d8bSEdward Cree /* Read a little-endian 48-bit field with 16-bit alignment */ 35625730d8bSEdward Cree static u64 efx_tc_read48(const __le16 *field) 35725730d8bSEdward Cree { 35825730d8bSEdward Cree u64 out = 0; 35925730d8bSEdward Cree int i; 36025730d8bSEdward Cree 36125730d8bSEdward Cree for (i = 0; i < 3; i++) 36225730d8bSEdward Cree out |= (u64)le16_to_cpu(field[i]) << (i * 16); 36325730d8bSEdward Cree return out; 36425730d8bSEdward Cree } 36525730d8bSEdward Cree 36625730d8bSEdward Cree static enum efx_tc_counter_type efx_tc_rx_version_2(struct efx_nic *efx, 36725730d8bSEdward Cree const u8 *data, u32 mark) 36825730d8bSEdward Cree { 36925730d8bSEdward Cree u8 payload_offset, header_offset, ident; 37025730d8bSEdward Cree enum efx_tc_counter_type type; 37125730d8bSEdward Cree u16 n_counters, i; 37225730d8bSEdward Cree 37325730d8bSEdward Cree ident = TCV2_HDR_BYTE(data, IDENTIFIER); 37425730d8bSEdward Cree switch (ident) { 37525730d8bSEdward Cree case ERF_SC_PACKETISER_HEADER_IDENTIFIER_AR: 37625730d8bSEdward Cree type = EFX_TC_COUNTER_TYPE_AR; 37725730d8bSEdward Cree break; 37825730d8bSEdward Cree case ERF_SC_PACKETISER_HEADER_IDENTIFIER_CT: 37925730d8bSEdward Cree type = EFX_TC_COUNTER_TYPE_CT; 38025730d8bSEdward Cree break; 38125730d8bSEdward Cree case ERF_SC_PACKETISER_HEADER_IDENTIFIER_OR: 38225730d8bSEdward Cree type = EFX_TC_COUNTER_TYPE_OR; 38325730d8bSEdward Cree break; 38425730d8bSEdward Cree default: 38525730d8bSEdward Cree if (net_ratelimit()) 38625730d8bSEdward Cree netif_err(efx, drv, efx->net_dev, 38725730d8bSEdward Cree "ignored v2 MAE counter packet (bad identifier %u" 38825730d8bSEdward Cree "), counters may be inaccurate\n", ident); 38925730d8bSEdward Cree return EFX_TC_COUNTER_TYPE_MAX; 39025730d8bSEdward Cree } 39125730d8bSEdward Cree header_offset = TCV2_HDR_BYTE(data, HEADER_OFFSET); 39225730d8bSEdward Cree /* mae_counter_format.h implies that this offset is fixed, since it 39325730d8bSEdward Cree * carries on with SOP-based LBNs for the fields in this header 39425730d8bSEdward Cree */ 39525730d8bSEdward Cree if (header_offset != ERF_SC_PACKETISER_HEADER_HEADER_OFFSET_DEFAULT) { 39625730d8bSEdward Cree if (net_ratelimit()) 39725730d8bSEdward Cree netif_err(efx, drv, efx->net_dev, 39825730d8bSEdward Cree "choked on v2 MAE counter packet (bad header_offset %u" 39925730d8bSEdward Cree "), counters may be inaccurate\n", header_offset); 40025730d8bSEdward Cree return EFX_TC_COUNTER_TYPE_MAX; 40125730d8bSEdward Cree } 40225730d8bSEdward Cree payload_offset = TCV2_HDR_BYTE(data, PAYLOAD_OFFSET); 40325730d8bSEdward Cree n_counters = le16_to_cpu(TCV2_HDR_WORD(data, COUNT)); 40425730d8bSEdward Cree 40525730d8bSEdward Cree for (i = 0; i < n_counters; i++) { 40625730d8bSEdward Cree const void *counter_idx_p, *packet_count_p, *byte_count_p; 40725730d8bSEdward Cree u64 packet_count, byte_count; 40825730d8bSEdward Cree u32 counter_idx; 40925730d8bSEdward Cree 41025730d8bSEdward Cree /* 24-bit field with 32-bit alignment */ 41125730d8bSEdward Cree counter_idx_p = TCV2_PKT_PTR(data, payload_offset, i, COUNTER_INDEX); 41225730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_COUNTER_INDEX_WIDTH != 24); 41325730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_COUNTER_INDEX_LBN & 31); 41425730d8bSEdward Cree counter_idx = le32_to_cpu(*(const __le32 *)counter_idx_p) & 0xffffff; 41525730d8bSEdward Cree /* 48-bit field with 16-bit alignment */ 41625730d8bSEdward Cree packet_count_p = TCV2_PKT_PTR(data, payload_offset, i, PACKET_COUNT); 41725730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_PACKET_COUNT_WIDTH != 48); 41825730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_PACKET_COUNT_LBN & 15); 41925730d8bSEdward Cree packet_count = efx_tc_read48((const __le16 *)packet_count_p); 42025730d8bSEdward Cree /* 48-bit field with 16-bit alignment */ 42125730d8bSEdward Cree byte_count_p = TCV2_PKT_PTR(data, payload_offset, i, BYTE_COUNT); 42225730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_BYTE_COUNT_WIDTH != 48); 42325730d8bSEdward Cree BUILD_BUG_ON(ERF_SC_PACKETISER_PAYLOAD_BYTE_COUNT_LBN & 15); 42425730d8bSEdward Cree byte_count = efx_tc_read48((const __le16 *)byte_count_p); 42525730d8bSEdward Cree 42625730d8bSEdward Cree if (type == EFX_TC_COUNTER_TYPE_CT) { 42725730d8bSEdward Cree /* CT counters are 1-bit saturating counters to update 42825730d8bSEdward Cree * the lastuse time in CT stats. A received CT counter 42925730d8bSEdward Cree * should have packet counter to 0 and only LSB bit on 43025730d8bSEdward Cree * in byte counter. 43125730d8bSEdward Cree */ 43225730d8bSEdward Cree if (packet_count || byte_count != 1) 43325730d8bSEdward Cree netdev_warn_once(efx->net_dev, 43425730d8bSEdward Cree "CT counter with inconsistent state (%llu, %llu)\n", 43525730d8bSEdward Cree packet_count, byte_count); 43625730d8bSEdward Cree /* Do not increment the driver's byte counter */ 43725730d8bSEdward Cree byte_count = 0; 43825730d8bSEdward Cree } 43925730d8bSEdward Cree 44025730d8bSEdward Cree efx_tc_counter_update(efx, type, counter_idx, packet_count, 44125730d8bSEdward Cree byte_count, mark); 44225730d8bSEdward Cree } 44325730d8bSEdward Cree return type; 44425730d8bSEdward Cree } 44525730d8bSEdward Cree 44625730d8bSEdward Cree /* We always swallow the packet, whether successful or not, since it's not 44725730d8bSEdward Cree * a network packet and shouldn't ever be forwarded to the stack. 44825730d8bSEdward Cree * @mark is the generation count for counter allocations. 44925730d8bSEdward Cree */ 45025730d8bSEdward Cree static bool efx_tc_rx(struct efx_rx_queue *rx_queue, u32 mark) 45125730d8bSEdward Cree { 45225730d8bSEdward Cree struct efx_channel *channel = efx_rx_queue_channel(rx_queue); 45325730d8bSEdward Cree struct efx_rx_buffer *rx_buf = efx_rx_buffer(rx_queue, 45425730d8bSEdward Cree channel->rx_pkt_index); 45525730d8bSEdward Cree const u8 *data = efx_rx_buf_va(rx_buf); 45625730d8bSEdward Cree struct efx_nic *efx = rx_queue->efx; 45725730d8bSEdward Cree enum efx_tc_counter_type type; 45825730d8bSEdward Cree u8 version; 45925730d8bSEdward Cree 46025730d8bSEdward Cree /* version is always first byte of packet */ 46125730d8bSEdward Cree version = *data; 46225730d8bSEdward Cree switch (version) { 46325730d8bSEdward Cree case 1: 46425730d8bSEdward Cree type = EFX_TC_COUNTER_TYPE_AR; 46525730d8bSEdward Cree efx_tc_rx_version_1(efx, data, mark); 46625730d8bSEdward Cree break; 46725730d8bSEdward Cree case ERF_SC_PACKETISER_HEADER_VERSION_VALUE: // 2 46825730d8bSEdward Cree type = efx_tc_rx_version_2(efx, data, mark); 46925730d8bSEdward Cree break; 47025730d8bSEdward Cree default: 47125730d8bSEdward Cree if (net_ratelimit()) 47225730d8bSEdward Cree netif_err(efx, drv, efx->net_dev, 47325730d8bSEdward Cree "choked on MAE counter packet (bad version %u" 47425730d8bSEdward Cree "); counters may be inaccurate\n", 47525730d8bSEdward Cree version); 47625730d8bSEdward Cree goto out; 47725730d8bSEdward Cree } 47825730d8bSEdward Cree 47925730d8bSEdward Cree /* Update seen_gen unconditionally, to avoid a missed wakeup if 48025730d8bSEdward Cree * we race with efx_mae_stop_counters(). 48125730d8bSEdward Cree */ 48225730d8bSEdward Cree efx->tc->seen_gen[type] = mark; 48325730d8bSEdward Cree if (efx->tc->flush_counters && 48425730d8bSEdward Cree (s32)(efx->tc->flush_gen[type] - mark) <= 0) 48525730d8bSEdward Cree wake_up(&efx->tc->flush_wq); 48625730d8bSEdward Cree out: 48725730d8bSEdward Cree efx_free_rx_buffers(rx_queue, rx_buf, 1); 48825730d8bSEdward Cree channel->rx_pkt_n_frags = 0; 48925730d8bSEdward Cree return true; 49025730d8bSEdward Cree } 49125730d8bSEdward Cree 49225730d8bSEdward Cree const struct efx_channel_type efx_tc_channel_type = { 49325730d8bSEdward Cree .handle_no_channel = efx_tc_handle_no_channel, 49425730d8bSEdward Cree .pre_probe = efx_tc_probe_channel, 49525730d8bSEdward Cree .start = efx_tc_start_channel, 49625730d8bSEdward Cree .stop = efx_tc_stop_channel, 49725730d8bSEdward Cree .post_remove = efx_tc_remove_channel, 49825730d8bSEdward Cree .get_name = efx_tc_get_channel_name, 49925730d8bSEdward Cree .receive_raw = efx_tc_rx, 50025730d8bSEdward Cree .keep_eventq = true, 50125730d8bSEdward Cree }; 502