1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2019 Solarflare Communications Inc. 5 * Copyright 2020-2022 Xilinx Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation, incorporated herein by reference. 10 */ 11 12 #ifndef EFX_TC_H 13 #define EFX_TC_H 14 #include <net/flow_offload.h> 15 #include <linux/rhashtable.h> 16 #include "net_driver.h" 17 #include "tc_counters.h" 18 19 #define IS_ALL_ONES(v) (!(typeof (v))~(v)) 20 21 struct efx_tc_action_set { 22 u16 vlan_push:2; 23 u16 vlan_pop:2; 24 u16 deliver:1; 25 __be16 vlan_tci[2]; /* TCIs for vlan_push */ 26 __be16 vlan_proto[2]; /* Ethertypes for vlan_push */ 27 struct efx_tc_counter_index *count; 28 u32 dest_mport; 29 u32 fw_id; /* index of this entry in firmware actions table */ 30 struct list_head list; 31 }; 32 33 struct efx_tc_match_fields { 34 /* L1 */ 35 u32 ingress_port; 36 u8 recirc_id; 37 /* L2 (inner when encap) */ 38 __be16 eth_proto; 39 __be16 vlan_tci[2], vlan_proto[2]; 40 u8 eth_saddr[ETH_ALEN], eth_daddr[ETH_ALEN]; 41 /* L3 (when IP) */ 42 u8 ip_proto, ip_tos, ip_ttl; 43 __be32 src_ip, dst_ip; 44 #ifdef CONFIG_IPV6 45 struct in6_addr src_ip6, dst_ip6; 46 #endif 47 bool ip_frag, ip_firstfrag; 48 /* L4 */ 49 __be16 l4_sport, l4_dport; /* Ports (UDP, TCP) */ 50 __be16 tcp_flags; 51 }; 52 53 struct efx_tc_match { 54 struct efx_tc_match_fields value; 55 struct efx_tc_match_fields mask; 56 }; 57 58 struct efx_tc_action_set_list { 59 struct list_head list; 60 u32 fw_id; 61 }; 62 63 struct efx_tc_flow_rule { 64 unsigned long cookie; 65 struct rhash_head linkage; 66 struct efx_tc_match match; 67 struct efx_tc_action_set_list acts; 68 u32 fw_id; 69 }; 70 71 enum efx_tc_rule_prios { 72 EFX_TC_PRIO_TC, /* Rule inserted by TC */ 73 EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */ 74 EFX_TC_PRIO__NUM 75 }; 76 77 /** 78 * struct efx_tc_state - control plane data for TC offload 79 * 80 * @caps: MAE capabilities reported by MCDI 81 * @block_list: List of &struct efx_tc_block_binding 82 * @mutex: Used to serialise operations on TC hashtables 83 * @counter_ht: Hashtable of TC counters (FW IDs and counter values) 84 * @counter_id_ht: Hashtable mapping TC counter cookies to counters 85 * @match_action_ht: Hashtable of TC match-action rules 86 * @reps_mport_id: MAE port allocated for representor RX 87 * @reps_filter_uc: VNIC filter for representor unicast RX (promisc) 88 * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti) 89 * @reps_mport_vport_id: vport_id for representor RX filters 90 * @flush_counters: counters have been stopped, waiting for drain 91 * @flush_gen: final generation count per type array as reported by 92 * MC_CMD_MAE_COUNTERS_STREAM_STOP 93 * @seen_gen: most recent generation count per type as seen by efx_tc_rx() 94 * @flush_wq: wait queue used by efx_mae_stop_counters() to wait for 95 * MAE counters RXQ to finish draining 96 * @dflt: Match-action rules for default switching; at priority 97 * %EFX_TC_PRIO_DFLT. Named by *ingress* port 98 * @dflt.pf: rule for traffic ingressing from PF (egresses to wire) 99 * @dflt.wire: rule for traffic ingressing from wire (egresses to PF) 100 * @up: have TC datastructures been set up? 101 */ 102 struct efx_tc_state { 103 struct mae_caps *caps; 104 struct list_head block_list; 105 struct mutex mutex; 106 struct rhashtable counter_ht; 107 struct rhashtable counter_id_ht; 108 struct rhashtable match_action_ht; 109 u32 reps_mport_id, reps_mport_vport_id; 110 s32 reps_filter_uc, reps_filter_mc; 111 bool flush_counters; 112 u32 flush_gen[EFX_TC_COUNTER_TYPE_MAX]; 113 u32 seen_gen[EFX_TC_COUNTER_TYPE_MAX]; 114 wait_queue_head_t flush_wq; 115 struct { 116 struct efx_tc_flow_rule pf; 117 struct efx_tc_flow_rule wire; 118 } dflt; 119 bool up; 120 }; 121 122 struct efx_rep; 123 124 int efx_tc_configure_default_rule_rep(struct efx_rep *efv); 125 void efx_tc_deconfigure_default_rule(struct efx_nic *efx, 126 struct efx_tc_flow_rule *rule); 127 int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev, 128 struct flow_cls_offload *tc, struct efx_rep *efv); 129 130 int efx_tc_insert_rep_filters(struct efx_nic *efx); 131 void efx_tc_remove_rep_filters(struct efx_nic *efx); 132 133 int efx_init_tc(struct efx_nic *efx); 134 void efx_fini_tc(struct efx_nic *efx); 135 136 int efx_init_struct_tc(struct efx_nic *efx); 137 void efx_fini_struct_tc(struct efx_nic *efx); 138 139 #endif /* EFX_TC_H */ 140