xref: /linux/drivers/net/ethernet/sfc/rx.c (revision d91517839e5d95adc0cf4b28caa7af62a71de526)
1 /****************************************************************************
2  * Driver for Solarflare network controllers and boards
3  * Copyright 2005-2006 Fen Systems Ltd.
4  * Copyright 2005-2013 Solarflare Communications Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published
8  * by the Free Software Foundation, incorporated herein by reference.
9  */
10 
11 #include <linux/socket.h>
12 #include <linux/in.h>
13 #include <linux/slab.h>
14 #include <linux/ip.h>
15 #include <linux/ipv6.h>
16 #include <linux/tcp.h>
17 #include <linux/udp.h>
18 #include <linux/prefetch.h>
19 #include <linux/moduleparam.h>
20 #include <linux/iommu.h>
21 #include <net/ip.h>
22 #include <net/checksum.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "filter.h"
26 #include "nic.h"
27 #include "selftest.h"
28 #include "workarounds.h"
29 
30 /* Preferred number of descriptors to fill at once */
31 #define EFX_RX_PREFERRED_BATCH 8U
32 
33 /* Number of RX buffers to recycle pages for.  When creating the RX page recycle
34  * ring, this number is divided by the number of buffers per page to calculate
35  * the number of pages to store in the RX page recycle ring.
36  */
37 #define EFX_RECYCLE_RING_SIZE_IOMMU 4096
38 #define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
39 
40 /* Size of buffer allocated for skb header area. */
41 #define EFX_SKB_HEADERS  128u
42 
43 /* This is the percentage fill level below which new RX descriptors
44  * will be added to the RX descriptor ring.
45  */
46 static unsigned int rx_refill_threshold;
47 
48 /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49 #define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50 				      EFX_RX_USR_BUF_SIZE)
51 
52 /*
53  * RX maximum head room required.
54  *
55  * This must be at least 1 to prevent overflow, plus one packet-worth
56  * to allow pipelined receives.
57  */
58 #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
59 
60 static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
61 {
62 	return page_address(buf->page) + buf->page_offset;
63 }
64 
65 static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
66 {
67 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68 	return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
69 #else
70 	const u8 *data = eh + efx->rx_packet_hash_offset;
71 	return (u32)data[0]	  |
72 	       (u32)data[1] << 8  |
73 	       (u32)data[2] << 16 |
74 	       (u32)data[3] << 24;
75 #endif
76 }
77 
78 static inline struct efx_rx_buffer *
79 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
80 {
81 	if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82 		return efx_rx_buffer(rx_queue, 0);
83 	else
84 		return rx_buf + 1;
85 }
86 
87 static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88 				      struct efx_rx_buffer *rx_buf,
89 				      unsigned int len)
90 {
91 	dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92 				DMA_FROM_DEVICE);
93 }
94 
95 void efx_rx_config_page_split(struct efx_nic *efx)
96 {
97 	efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
98 				      EFX_RX_BUF_ALIGNMENT);
99 	efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100 		((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101 		 efx->rx_page_buf_step);
102 	efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103 		efx->rx_bufs_per_page;
104 	efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105 					       efx->rx_bufs_per_page);
106 }
107 
108 /* Check the RX page recycle ring for a page that can be reused. */
109 static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
110 {
111 	struct efx_nic *efx = rx_queue->efx;
112 	struct page *page;
113 	struct efx_rx_page_state *state;
114 	unsigned index;
115 
116 	index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117 	page = rx_queue->page_ring[index];
118 	if (page == NULL)
119 		return NULL;
120 
121 	rx_queue->page_ring[index] = NULL;
122 	/* page_remove cannot exceed page_add. */
123 	if (rx_queue->page_remove != rx_queue->page_add)
124 		++rx_queue->page_remove;
125 
126 	/* If page_count is 1 then we hold the only reference to this page. */
127 	if (page_count(page) == 1) {
128 		++rx_queue->page_recycle_count;
129 		return page;
130 	} else {
131 		state = page_address(page);
132 		dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133 			       PAGE_SIZE << efx->rx_buffer_order,
134 			       DMA_FROM_DEVICE);
135 		put_page(page);
136 		++rx_queue->page_recycle_failed;
137 	}
138 
139 	return NULL;
140 }
141 
142 /**
143  * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
144  *
145  * @rx_queue:		Efx RX queue
146  *
147  * This allocates a batch of pages, maps them for DMA, and populates
148  * struct efx_rx_buffers for each one. Return a negative error code or
149  * 0 on success. If a single page can be used for multiple buffers,
150  * then the page will either be inserted fully, or not at all.
151  */
152 static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
153 {
154 	struct efx_nic *efx = rx_queue->efx;
155 	struct efx_rx_buffer *rx_buf;
156 	struct page *page;
157 	unsigned int page_offset;
158 	struct efx_rx_page_state *state;
159 	dma_addr_t dma_addr;
160 	unsigned index, count;
161 
162 	count = 0;
163 	do {
164 		page = efx_reuse_page(rx_queue);
165 		if (page == NULL) {
166 			page = alloc_pages(__GFP_COLD | __GFP_COMP |
167 					   (atomic ? GFP_ATOMIC : GFP_KERNEL),
168 					   efx->rx_buffer_order);
169 			if (unlikely(page == NULL))
170 				return -ENOMEM;
171 			dma_addr =
172 				dma_map_page(&efx->pci_dev->dev, page, 0,
173 					     PAGE_SIZE << efx->rx_buffer_order,
174 					     DMA_FROM_DEVICE);
175 			if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176 						       dma_addr))) {
177 				__free_pages(page, efx->rx_buffer_order);
178 				return -EIO;
179 			}
180 			state = page_address(page);
181 			state->dma_addr = dma_addr;
182 		} else {
183 			state = page_address(page);
184 			dma_addr = state->dma_addr;
185 		}
186 
187 		dma_addr += sizeof(struct efx_rx_page_state);
188 		page_offset = sizeof(struct efx_rx_page_state);
189 
190 		do {
191 			index = rx_queue->added_count & rx_queue->ptr_mask;
192 			rx_buf = efx_rx_buffer(rx_queue, index);
193 			rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194 			rx_buf->page = page;
195 			rx_buf->page_offset = page_offset + efx->rx_ip_align;
196 			rx_buf->len = efx->rx_dma_len;
197 			rx_buf->flags = 0;
198 			++rx_queue->added_count;
199 			get_page(page);
200 			dma_addr += efx->rx_page_buf_step;
201 			page_offset += efx->rx_page_buf_step;
202 		} while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
203 
204 		rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
205 	} while (++count < efx->rx_pages_per_batch);
206 
207 	return 0;
208 }
209 
210 /* Unmap a DMA-mapped page.  This function is only called for the final RX
211  * buffer in a page.
212  */
213 static void efx_unmap_rx_buffer(struct efx_nic *efx,
214 				struct efx_rx_buffer *rx_buf)
215 {
216 	struct page *page = rx_buf->page;
217 
218 	if (page) {
219 		struct efx_rx_page_state *state = page_address(page);
220 		dma_unmap_page(&efx->pci_dev->dev,
221 			       state->dma_addr,
222 			       PAGE_SIZE << efx->rx_buffer_order,
223 			       DMA_FROM_DEVICE);
224 	}
225 }
226 
227 static void efx_free_rx_buffer(struct efx_rx_buffer *rx_buf)
228 {
229 	if (rx_buf->page) {
230 		put_page(rx_buf->page);
231 		rx_buf->page = NULL;
232 	}
233 }
234 
235 /* Attempt to recycle the page if there is an RX recycle ring; the page can
236  * only be added if this is the final RX buffer, to prevent pages being used in
237  * the descriptor ring and appearing in the recycle ring simultaneously.
238  */
239 static void efx_recycle_rx_page(struct efx_channel *channel,
240 				struct efx_rx_buffer *rx_buf)
241 {
242 	struct page *page = rx_buf->page;
243 	struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
244 	struct efx_nic *efx = rx_queue->efx;
245 	unsigned index;
246 
247 	/* Only recycle the page after processing the final buffer. */
248 	if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
249 		return;
250 
251 	index = rx_queue->page_add & rx_queue->page_ptr_mask;
252 	if (rx_queue->page_ring[index] == NULL) {
253 		unsigned read_index = rx_queue->page_remove &
254 			rx_queue->page_ptr_mask;
255 
256 		/* The next slot in the recycle ring is available, but
257 		 * increment page_remove if the read pointer currently
258 		 * points here.
259 		 */
260 		if (read_index == index)
261 			++rx_queue->page_remove;
262 		rx_queue->page_ring[index] = page;
263 		++rx_queue->page_add;
264 		return;
265 	}
266 	++rx_queue->page_recycle_full;
267 	efx_unmap_rx_buffer(efx, rx_buf);
268 	put_page(rx_buf->page);
269 }
270 
271 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
272 			       struct efx_rx_buffer *rx_buf)
273 {
274 	/* Release the page reference we hold for the buffer. */
275 	if (rx_buf->page)
276 		put_page(rx_buf->page);
277 
278 	/* If this is the last buffer in a page, unmap and free it. */
279 	if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
280 		efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
281 		efx_free_rx_buffer(rx_buf);
282 	}
283 	rx_buf->page = NULL;
284 }
285 
286 /* Recycle the pages that are used by buffers that have just been received. */
287 static void efx_recycle_rx_pages(struct efx_channel *channel,
288 				 struct efx_rx_buffer *rx_buf,
289 				 unsigned int n_frags)
290 {
291 	struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
292 
293 	do {
294 		efx_recycle_rx_page(channel, rx_buf);
295 		rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
296 	} while (--n_frags);
297 }
298 
299 static void efx_discard_rx_packet(struct efx_channel *channel,
300 				  struct efx_rx_buffer *rx_buf,
301 				  unsigned int n_frags)
302 {
303 	struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
304 
305 	efx_recycle_rx_pages(channel, rx_buf, n_frags);
306 
307 	do {
308 		efx_free_rx_buffer(rx_buf);
309 		rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
310 	} while (--n_frags);
311 }
312 
313 /**
314  * efx_fast_push_rx_descriptors - push new RX descriptors quickly
315  * @rx_queue:		RX descriptor queue
316  *
317  * This will aim to fill the RX descriptor queue up to
318  * @rx_queue->@max_fill. If there is insufficient atomic
319  * memory to do so, a slow fill will be scheduled.
320  *
321  * The caller must provide serialisation (none is used here). In practise,
322  * this means this function must run from the NAPI handler, or be called
323  * when NAPI is disabled.
324  */
325 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
326 {
327 	struct efx_nic *efx = rx_queue->efx;
328 	unsigned int fill_level, batch_size;
329 	int space, rc = 0;
330 
331 	if (!rx_queue->refill_enabled)
332 		return;
333 
334 	/* Calculate current fill level, and exit if we don't need to fill */
335 	fill_level = (rx_queue->added_count - rx_queue->removed_count);
336 	EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
337 	if (fill_level >= rx_queue->fast_fill_trigger)
338 		goto out;
339 
340 	/* Record minimum fill level */
341 	if (unlikely(fill_level < rx_queue->min_fill)) {
342 		if (fill_level)
343 			rx_queue->min_fill = fill_level;
344 	}
345 
346 	batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
347 	space = rx_queue->max_fill - fill_level;
348 	EFX_BUG_ON_PARANOID(space < batch_size);
349 
350 	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
351 		   "RX queue %d fast-filling descriptor ring from"
352 		   " level %d to level %d\n",
353 		   efx_rx_queue_index(rx_queue), fill_level,
354 		   rx_queue->max_fill);
355 
356 
357 	do {
358 		rc = efx_init_rx_buffers(rx_queue, atomic);
359 		if (unlikely(rc)) {
360 			/* Ensure that we don't leave the rx queue empty */
361 			if (rx_queue->added_count == rx_queue->removed_count)
362 				efx_schedule_slow_fill(rx_queue);
363 			goto out;
364 		}
365 	} while ((space -= batch_size) >= batch_size);
366 
367 	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
368 		   "RX queue %d fast-filled descriptor ring "
369 		   "to level %d\n", efx_rx_queue_index(rx_queue),
370 		   rx_queue->added_count - rx_queue->removed_count);
371 
372  out:
373 	if (rx_queue->notified_count != rx_queue->added_count)
374 		efx_nic_notify_rx_desc(rx_queue);
375 }
376 
377 void efx_rx_slow_fill(unsigned long context)
378 {
379 	struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
380 
381 	/* Post an event to cause NAPI to run and refill the queue */
382 	efx_nic_generate_fill_event(rx_queue);
383 	++rx_queue->slow_fill_count;
384 }
385 
386 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
387 				     struct efx_rx_buffer *rx_buf,
388 				     int len)
389 {
390 	struct efx_nic *efx = rx_queue->efx;
391 	unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
392 
393 	if (likely(len <= max_len))
394 		return;
395 
396 	/* The packet must be discarded, but this is only a fatal error
397 	 * if the caller indicated it was
398 	 */
399 	rx_buf->flags |= EFX_RX_PKT_DISCARD;
400 
401 	if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
402 		if (net_ratelimit())
403 			netif_err(efx, rx_err, efx->net_dev,
404 				  " RX queue %d seriously overlength "
405 				  "RX event (0x%x > 0x%x+0x%x). Leaking\n",
406 				  efx_rx_queue_index(rx_queue), len, max_len,
407 				  efx->type->rx_buffer_padding);
408 		efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
409 	} else {
410 		if (net_ratelimit())
411 			netif_err(efx, rx_err, efx->net_dev,
412 				  " RX queue %d overlength RX event "
413 				  "(0x%x > 0x%x)\n",
414 				  efx_rx_queue_index(rx_queue), len, max_len);
415 	}
416 
417 	efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
418 }
419 
420 /* Pass a received packet up through GRO.  GRO can handle pages
421  * regardless of checksum state and skbs with a good checksum.
422  */
423 static void
424 efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
425 		  unsigned int n_frags, u8 *eh)
426 {
427 	struct napi_struct *napi = &channel->napi_str;
428 	gro_result_t gro_result;
429 	struct efx_nic *efx = channel->efx;
430 	struct sk_buff *skb;
431 
432 	skb = napi_get_frags(napi);
433 	if (unlikely(!skb)) {
434 		while (n_frags--) {
435 			put_page(rx_buf->page);
436 			rx_buf->page = NULL;
437 			rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
438 		}
439 		return;
440 	}
441 
442 	if (efx->net_dev->features & NETIF_F_RXHASH)
443 		skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
444 			     PKT_HASH_TYPE_L3);
445 	skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
446 			  CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
447 
448 	for (;;) {
449 		skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
450 				   rx_buf->page, rx_buf->page_offset,
451 				   rx_buf->len);
452 		rx_buf->page = NULL;
453 		skb->len += rx_buf->len;
454 		if (skb_shinfo(skb)->nr_frags == n_frags)
455 			break;
456 
457 		rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
458 	}
459 
460 	skb->data_len = skb->len;
461 	skb->truesize += n_frags * efx->rx_buffer_truesize;
462 
463 	skb_record_rx_queue(skb, channel->rx_queue.core_index);
464 
465 	gro_result = napi_gro_frags(napi);
466 	if (gro_result != GRO_DROP)
467 		channel->irq_mod_score += 2;
468 }
469 
470 /* Allocate and construct an SKB around page fragments */
471 static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
472 				     struct efx_rx_buffer *rx_buf,
473 				     unsigned int n_frags,
474 				     u8 *eh, int hdr_len)
475 {
476 	struct efx_nic *efx = channel->efx;
477 	struct sk_buff *skb;
478 
479 	/* Allocate an SKB to store the headers */
480 	skb = netdev_alloc_skb(efx->net_dev,
481 			       efx->rx_ip_align + efx->rx_prefix_size +
482 			       hdr_len);
483 	if (unlikely(skb == NULL))
484 		return NULL;
485 
486 	EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
487 
488 	memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
489 	       efx->rx_prefix_size + hdr_len);
490 	skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
491 	__skb_put(skb, hdr_len);
492 
493 	/* Append the remaining page(s) onto the frag list */
494 	if (rx_buf->len > hdr_len) {
495 		rx_buf->page_offset += hdr_len;
496 		rx_buf->len -= hdr_len;
497 
498 		for (;;) {
499 			skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
500 					   rx_buf->page, rx_buf->page_offset,
501 					   rx_buf->len);
502 			rx_buf->page = NULL;
503 			skb->len += rx_buf->len;
504 			skb->data_len += rx_buf->len;
505 			if (skb_shinfo(skb)->nr_frags == n_frags)
506 				break;
507 
508 			rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
509 		}
510 	} else {
511 		__free_pages(rx_buf->page, efx->rx_buffer_order);
512 		rx_buf->page = NULL;
513 		n_frags = 0;
514 	}
515 
516 	skb->truesize += n_frags * efx->rx_buffer_truesize;
517 
518 	/* Move past the ethernet header */
519 	skb->protocol = eth_type_trans(skb, efx->net_dev);
520 
521 	return skb;
522 }
523 
524 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
525 		   unsigned int n_frags, unsigned int len, u16 flags)
526 {
527 	struct efx_nic *efx = rx_queue->efx;
528 	struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
529 	struct efx_rx_buffer *rx_buf;
530 
531 	rx_buf = efx_rx_buffer(rx_queue, index);
532 	rx_buf->flags |= flags;
533 
534 	/* Validate the number of fragments and completed length */
535 	if (n_frags == 1) {
536 		if (!(flags & EFX_RX_PKT_PREFIX_LEN))
537 			efx_rx_packet__check_len(rx_queue, rx_buf, len);
538 	} else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
539 		   unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
540 		   unlikely(len > n_frags * efx->rx_dma_len) ||
541 		   unlikely(!efx->rx_scatter)) {
542 		/* If this isn't an explicit discard request, either
543 		 * the hardware or the driver is broken.
544 		 */
545 		WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
546 		rx_buf->flags |= EFX_RX_PKT_DISCARD;
547 	}
548 
549 	netif_vdbg(efx, rx_status, efx->net_dev,
550 		   "RX queue %d received ids %x-%x len %d %s%s\n",
551 		   efx_rx_queue_index(rx_queue), index,
552 		   (index + n_frags - 1) & rx_queue->ptr_mask, len,
553 		   (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
554 		   (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
555 
556 	/* Discard packet, if instructed to do so.  Process the
557 	 * previous receive first.
558 	 */
559 	if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
560 		efx_rx_flush_packet(channel);
561 		efx_discard_rx_packet(channel, rx_buf, n_frags);
562 		return;
563 	}
564 
565 	if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
566 		rx_buf->len = len;
567 
568 	/* Release and/or sync the DMA mapping - assumes all RX buffers
569 	 * consumed in-order per RX queue.
570 	 */
571 	efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
572 
573 	/* Prefetch nice and early so data will (hopefully) be in cache by
574 	 * the time we look at it.
575 	 */
576 	prefetch(efx_rx_buf_va(rx_buf));
577 
578 	rx_buf->page_offset += efx->rx_prefix_size;
579 	rx_buf->len -= efx->rx_prefix_size;
580 
581 	if (n_frags > 1) {
582 		/* Release/sync DMA mapping for additional fragments.
583 		 * Fix length for last fragment.
584 		 */
585 		unsigned int tail_frags = n_frags - 1;
586 
587 		for (;;) {
588 			rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
589 			if (--tail_frags == 0)
590 				break;
591 			efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
592 		}
593 		rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
594 		efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
595 	}
596 
597 	/* All fragments have been DMA-synced, so recycle pages. */
598 	rx_buf = efx_rx_buffer(rx_queue, index);
599 	efx_recycle_rx_pages(channel, rx_buf, n_frags);
600 
601 	/* Pipeline receives so that we give time for packet headers to be
602 	 * prefetched into cache.
603 	 */
604 	efx_rx_flush_packet(channel);
605 	channel->rx_pkt_n_frags = n_frags;
606 	channel->rx_pkt_index = index;
607 }
608 
609 static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
610 			   struct efx_rx_buffer *rx_buf,
611 			   unsigned int n_frags)
612 {
613 	struct sk_buff *skb;
614 	u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
615 
616 	skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
617 	if (unlikely(skb == NULL)) {
618 		efx_free_rx_buffer(rx_buf);
619 		return;
620 	}
621 	skb_record_rx_queue(skb, channel->rx_queue.core_index);
622 
623 	/* Set the SKB flags */
624 	skb_checksum_none_assert(skb);
625 	if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
626 		skb->ip_summed = CHECKSUM_UNNECESSARY;
627 
628 	efx_rx_skb_attach_timestamp(channel, skb);
629 
630 	if (channel->type->receive_skb)
631 		if (channel->type->receive_skb(channel, skb))
632 			return;
633 
634 	/* Pass the packet up */
635 	netif_receive_skb(skb);
636 }
637 
638 /* Handle a received packet.  Second half: Touches packet payload. */
639 void __efx_rx_packet(struct efx_channel *channel)
640 {
641 	struct efx_nic *efx = channel->efx;
642 	struct efx_rx_buffer *rx_buf =
643 		efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
644 	u8 *eh = efx_rx_buf_va(rx_buf);
645 
646 	/* Read length from the prefix if necessary.  This already
647 	 * excludes the length of the prefix itself.
648 	 */
649 	if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
650 		rx_buf->len = le16_to_cpup((__le16 *)
651 					   (eh + efx->rx_packet_len_offset));
652 
653 	/* If we're in loopback test, then pass the packet directly to the
654 	 * loopback layer, and free the rx_buf here
655 	 */
656 	if (unlikely(efx->loopback_selftest)) {
657 		efx_loopback_rx_packet(efx, eh, rx_buf->len);
658 		efx_free_rx_buffer(rx_buf);
659 		goto out;
660 	}
661 
662 	if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
663 		rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
664 
665 	if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb)
666 		efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
667 	else
668 		efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
669 out:
670 	channel->rx_pkt_n_frags = 0;
671 }
672 
673 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
674 {
675 	struct efx_nic *efx = rx_queue->efx;
676 	unsigned int entries;
677 	int rc;
678 
679 	/* Create the smallest power-of-two aligned ring */
680 	entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
681 	EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
682 	rx_queue->ptr_mask = entries - 1;
683 
684 	netif_dbg(efx, probe, efx->net_dev,
685 		  "creating RX queue %d size %#x mask %#x\n",
686 		  efx_rx_queue_index(rx_queue), efx->rxq_entries,
687 		  rx_queue->ptr_mask);
688 
689 	/* Allocate RX buffers */
690 	rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
691 				   GFP_KERNEL);
692 	if (!rx_queue->buffer)
693 		return -ENOMEM;
694 
695 	rc = efx_nic_probe_rx(rx_queue);
696 	if (rc) {
697 		kfree(rx_queue->buffer);
698 		rx_queue->buffer = NULL;
699 	}
700 
701 	return rc;
702 }
703 
704 static void efx_init_rx_recycle_ring(struct efx_nic *efx,
705 				     struct efx_rx_queue *rx_queue)
706 {
707 	unsigned int bufs_in_recycle_ring, page_ring_size;
708 
709 	/* Set the RX recycle ring size */
710 #ifdef CONFIG_PPC64
711 	bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
712 #else
713 	if (iommu_present(&pci_bus_type))
714 		bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
715 	else
716 		bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
717 #endif /* CONFIG_PPC64 */
718 
719 	page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
720 					    efx->rx_bufs_per_page);
721 	rx_queue->page_ring = kcalloc(page_ring_size,
722 				      sizeof(*rx_queue->page_ring), GFP_KERNEL);
723 	rx_queue->page_ptr_mask = page_ring_size - 1;
724 }
725 
726 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
727 {
728 	struct efx_nic *efx = rx_queue->efx;
729 	unsigned int max_fill, trigger, max_trigger;
730 
731 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
732 		  "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
733 
734 	/* Initialise ptr fields */
735 	rx_queue->added_count = 0;
736 	rx_queue->notified_count = 0;
737 	rx_queue->removed_count = 0;
738 	rx_queue->min_fill = -1U;
739 	efx_init_rx_recycle_ring(efx, rx_queue);
740 
741 	rx_queue->page_remove = 0;
742 	rx_queue->page_add = rx_queue->page_ptr_mask + 1;
743 	rx_queue->page_recycle_count = 0;
744 	rx_queue->page_recycle_failed = 0;
745 	rx_queue->page_recycle_full = 0;
746 
747 	/* Initialise limit fields */
748 	max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
749 	max_trigger =
750 		max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
751 	if (rx_refill_threshold != 0) {
752 		trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
753 		if (trigger > max_trigger)
754 			trigger = max_trigger;
755 	} else {
756 		trigger = max_trigger;
757 	}
758 
759 	rx_queue->max_fill = max_fill;
760 	rx_queue->fast_fill_trigger = trigger;
761 	rx_queue->refill_enabled = true;
762 
763 	/* Set up RX descriptor ring */
764 	efx_nic_init_rx(rx_queue);
765 }
766 
767 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
768 {
769 	int i;
770 	struct efx_nic *efx = rx_queue->efx;
771 	struct efx_rx_buffer *rx_buf;
772 
773 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
774 		  "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
775 
776 	del_timer_sync(&rx_queue->slow_fill);
777 
778 	/* Release RX buffers from the current read ptr to the write ptr */
779 	if (rx_queue->buffer) {
780 		for (i = rx_queue->removed_count; i < rx_queue->added_count;
781 		     i++) {
782 			unsigned index = i & rx_queue->ptr_mask;
783 			rx_buf = efx_rx_buffer(rx_queue, index);
784 			efx_fini_rx_buffer(rx_queue, rx_buf);
785 		}
786 	}
787 
788 	/* Unmap and release the pages in the recycle ring. Remove the ring. */
789 	for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
790 		struct page *page = rx_queue->page_ring[i];
791 		struct efx_rx_page_state *state;
792 
793 		if (page == NULL)
794 			continue;
795 
796 		state = page_address(page);
797 		dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
798 			       PAGE_SIZE << efx->rx_buffer_order,
799 			       DMA_FROM_DEVICE);
800 		put_page(page);
801 	}
802 	kfree(rx_queue->page_ring);
803 	rx_queue->page_ring = NULL;
804 }
805 
806 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
807 {
808 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
809 		  "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
810 
811 	efx_nic_remove_rx(rx_queue);
812 
813 	kfree(rx_queue->buffer);
814 	rx_queue->buffer = NULL;
815 }
816 
817 
818 module_param(rx_refill_threshold, uint, 0444);
819 MODULE_PARM_DESC(rx_refill_threshold,
820 		 "RX descriptor ring refill threshold (%)");
821 
822 #ifdef CONFIG_RFS_ACCEL
823 
824 int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
825 		   u16 rxq_index, u32 flow_id)
826 {
827 	struct efx_nic *efx = netdev_priv(net_dev);
828 	struct efx_channel *channel;
829 	struct efx_filter_spec spec;
830 	const __be16 *ports;
831 	__be16 ether_type;
832 	int nhoff;
833 	int rc;
834 
835 	/* The core RPS/RFS code has already parsed and validated
836 	 * VLAN, IP and transport headers.  We assume they are in the
837 	 * header area.
838 	 */
839 
840 	if (skb->protocol == htons(ETH_P_8021Q)) {
841 		const struct vlan_hdr *vh =
842 			(const struct vlan_hdr *)skb->data;
843 
844 		/* We can't filter on the IP 5-tuple and the vlan
845 		 * together, so just strip the vlan header and filter
846 		 * on the IP part.
847 		 */
848 		EFX_BUG_ON_PARANOID(skb_headlen(skb) < sizeof(*vh));
849 		ether_type = vh->h_vlan_encapsulated_proto;
850 		nhoff = sizeof(struct vlan_hdr);
851 	} else {
852 		ether_type = skb->protocol;
853 		nhoff = 0;
854 	}
855 
856 	if (ether_type != htons(ETH_P_IP) && ether_type != htons(ETH_P_IPV6))
857 		return -EPROTONOSUPPORT;
858 
859 	efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
860 			   efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
861 			   rxq_index);
862 	spec.match_flags =
863 		EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
864 		EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
865 		EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
866 	spec.ether_type = ether_type;
867 
868 	if (ether_type == htons(ETH_P_IP)) {
869 		const struct iphdr *ip =
870 			(const struct iphdr *)(skb->data + nhoff);
871 
872 		EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + sizeof(*ip));
873 		if (ip_is_fragment(ip))
874 			return -EPROTONOSUPPORT;
875 		spec.ip_proto = ip->protocol;
876 		spec.rem_host[0] = ip->saddr;
877 		spec.loc_host[0] = ip->daddr;
878 		EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + 4 * ip->ihl + 4);
879 		ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
880 	} else {
881 		const struct ipv6hdr *ip6 =
882 			(const struct ipv6hdr *)(skb->data + nhoff);
883 
884 		EFX_BUG_ON_PARANOID(skb_headlen(skb) <
885 				    nhoff + sizeof(*ip6) + 4);
886 		spec.ip_proto = ip6->nexthdr;
887 		memcpy(spec.rem_host, &ip6->saddr, sizeof(ip6->saddr));
888 		memcpy(spec.loc_host, &ip6->daddr, sizeof(ip6->daddr));
889 		ports = (const __be16 *)(ip6 + 1);
890 	}
891 
892 	spec.rem_port = ports[0];
893 	spec.loc_port = ports[1];
894 
895 	rc = efx->type->filter_rfs_insert(efx, &spec);
896 	if (rc < 0)
897 		return rc;
898 
899 	/* Remember this so we can check whether to expire the filter later */
900 	efx->rps_flow_id[rc] = flow_id;
901 	channel = efx_get_channel(efx, skb_get_rx_queue(skb));
902 	++channel->rfs_filters_added;
903 
904 	if (ether_type == htons(ETH_P_IP))
905 		netif_info(efx, rx_status, efx->net_dev,
906 			   "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
907 			   (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
908 			   spec.rem_host, ntohs(ports[0]), spec.loc_host,
909 			   ntohs(ports[1]), rxq_index, flow_id, rc);
910 	else
911 		netif_info(efx, rx_status, efx->net_dev,
912 			   "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
913 			   (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
914 			   spec.rem_host, ntohs(ports[0]), spec.loc_host,
915 			   ntohs(ports[1]), rxq_index, flow_id, rc);
916 
917 	return rc;
918 }
919 
920 bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
921 {
922 	bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
923 	unsigned int index, size;
924 	u32 flow_id;
925 
926 	if (!spin_trylock_bh(&efx->filter_lock))
927 		return false;
928 
929 	expire_one = efx->type->filter_rfs_expire_one;
930 	index = efx->rps_expire_index;
931 	size = efx->type->max_rx_ip_filters;
932 	while (quota--) {
933 		flow_id = efx->rps_flow_id[index];
934 		if (expire_one(efx, flow_id, index))
935 			netif_info(efx, rx_status, efx->net_dev,
936 				   "expired filter %d [flow %u]\n",
937 				   index, flow_id);
938 		if (++index == size)
939 			index = 0;
940 	}
941 	efx->rps_expire_index = index;
942 
943 	spin_unlock_bh(&efx->filter_lock);
944 	return true;
945 }
946 
947 #endif /* CONFIG_RFS_ACCEL */
948 
949 /**
950  * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
951  * @spec: Specification to test
952  *
953  * Return: %true if the specification is a non-drop RX filter that
954  * matches a local MAC address I/G bit value of 1 or matches a local
955  * IPv4 or IPv6 address value in the respective multicast address
956  * range.  Otherwise %false.
957  */
958 bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
959 {
960 	if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
961 	    spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
962 		return false;
963 
964 	if (spec->match_flags &
965 	    (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
966 	    is_multicast_ether_addr(spec->loc_mac))
967 		return true;
968 
969 	if ((spec->match_flags &
970 	     (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
971 	    (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
972 		if (spec->ether_type == htons(ETH_P_IP) &&
973 		    ipv4_is_multicast(spec->loc_host[0]))
974 			return true;
975 		if (spec->ether_type == htons(ETH_P_IPV6) &&
976 		    ((const u8 *)spec->loc_host)[0] == 0xff)
977 			return true;
978 	}
979 
980 	return false;
981 }
982