1 /**************************************************************************** 2 * Driver for Solarflare Solarstorm network controllers and boards 3 * Copyright 2008-2011 Solarflare Communications Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published 7 * by the Free Software Foundation, incorporated herein by reference. 8 */ 9 10 #include <linux/delay.h> 11 #include "net_driver.h" 12 #include "nic.h" 13 #include "io.h" 14 #include "regs.h" 15 #include "mcdi_pcol.h" 16 #include "phy.h" 17 18 /************************************************************************** 19 * 20 * Management-Controller-to-Driver Interface 21 * 22 ************************************************************************** 23 */ 24 25 #define MCDI_RPC_TIMEOUT 10 /*seconds */ 26 27 #define MCDI_PDU(efx) \ 28 (efx_port_num(efx) ? MC_SMEM_P1_PDU_OFST : MC_SMEM_P0_PDU_OFST) 29 #define MCDI_DOORBELL(efx) \ 30 (efx_port_num(efx) ? MC_SMEM_P1_DOORBELL_OFST : MC_SMEM_P0_DOORBELL_OFST) 31 #define MCDI_STATUS(efx) \ 32 (efx_port_num(efx) ? MC_SMEM_P1_STATUS_OFST : MC_SMEM_P0_STATUS_OFST) 33 34 /* A reboot/assertion causes the MCDI status word to be set after the 35 * command word is set or a REBOOT event is sent. If we notice a reboot 36 * via these mechanisms then wait 10ms for the status word to be set. */ 37 #define MCDI_STATUS_DELAY_US 100 38 #define MCDI_STATUS_DELAY_COUNT 100 39 #define MCDI_STATUS_SLEEP_MS \ 40 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) 41 42 #define SEQ_MASK \ 43 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) 44 45 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx) 46 { 47 struct siena_nic_data *nic_data; 48 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0); 49 nic_data = efx->nic_data; 50 return &nic_data->mcdi; 51 } 52 53 void efx_mcdi_init(struct efx_nic *efx) 54 { 55 struct efx_mcdi_iface *mcdi; 56 57 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) 58 return; 59 60 mcdi = efx_mcdi(efx); 61 init_waitqueue_head(&mcdi->wq); 62 spin_lock_init(&mcdi->iface_lock); 63 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT); 64 mcdi->mode = MCDI_MODE_POLL; 65 66 (void) efx_mcdi_poll_reboot(efx); 67 } 68 69 static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd, 70 const u8 *inbuf, size_t inlen) 71 { 72 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 73 unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); 74 unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx); 75 unsigned int i; 76 efx_dword_t hdr; 77 u32 xflags, seqno; 78 79 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); 80 BUG_ON(inlen & 3 || inlen >= MC_SMEM_PDU_LEN); 81 82 seqno = mcdi->seqno & SEQ_MASK; 83 xflags = 0; 84 if (mcdi->mode == MCDI_MODE_EVENTS) 85 xflags |= MCDI_HEADER_XFLAGS_EVREQ; 86 87 EFX_POPULATE_DWORD_6(hdr, 88 MCDI_HEADER_RESPONSE, 0, 89 MCDI_HEADER_RESYNC, 1, 90 MCDI_HEADER_CODE, cmd, 91 MCDI_HEADER_DATALEN, inlen, 92 MCDI_HEADER_SEQ, seqno, 93 MCDI_HEADER_XFLAGS, xflags); 94 95 efx_writed(efx, &hdr, pdu); 96 97 for (i = 0; i < inlen; i += 4) 98 _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i); 99 100 /* Ensure the payload is written out before the header */ 101 wmb(); 102 103 /* ring the doorbell with a distinctive value */ 104 _efx_writed(efx, (__force __le32) 0x45789abc, doorbell); 105 } 106 107 static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen) 108 { 109 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 110 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); 111 int i; 112 113 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); 114 BUG_ON(outlen & 3 || outlen >= MC_SMEM_PDU_LEN); 115 116 for (i = 0; i < outlen; i += 4) 117 *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i); 118 } 119 120 static int efx_mcdi_poll(struct efx_nic *efx) 121 { 122 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 123 unsigned int time, finish; 124 unsigned int respseq, respcmd, error; 125 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); 126 unsigned int rc, spins; 127 efx_dword_t reg; 128 129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ 130 rc = -efx_mcdi_poll_reboot(efx); 131 if (rc) 132 goto out; 133 134 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, 135 * because generally mcdi responses are fast. After that, back off 136 * and poll once a jiffy (approximately) 137 */ 138 spins = TICK_USEC; 139 finish = get_seconds() + MCDI_RPC_TIMEOUT; 140 141 while (1) { 142 if (spins != 0) { 143 --spins; 144 udelay(1); 145 } else { 146 schedule_timeout_uninterruptible(1); 147 } 148 149 time = get_seconds(); 150 151 rmb(); 152 efx_readd(efx, ®, pdu); 153 154 /* All 1's indicates that shared memory is in reset (and is 155 * not a valid header). Wait for it to come out reset before 156 * completing the command */ 157 if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff && 158 EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE)) 159 break; 160 161 if (time >= finish) 162 return -ETIMEDOUT; 163 } 164 165 mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN); 166 respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ); 167 respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE); 168 error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR); 169 170 if (error && mcdi->resplen == 0) { 171 netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); 172 rc = EIO; 173 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { 174 netif_err(efx, hw, efx->net_dev, 175 "MC response mismatch tx seq 0x%x rx seq 0x%x\n", 176 respseq, mcdi->seqno); 177 rc = EIO; 178 } else if (error) { 179 efx_readd(efx, ®, pdu + 4); 180 switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) { 181 #define TRANSLATE_ERROR(name) \ 182 case MC_CMD_ERR_ ## name: \ 183 rc = name; \ 184 break 185 TRANSLATE_ERROR(ENOENT); 186 TRANSLATE_ERROR(EINTR); 187 TRANSLATE_ERROR(EACCES); 188 TRANSLATE_ERROR(EBUSY); 189 TRANSLATE_ERROR(EINVAL); 190 TRANSLATE_ERROR(EDEADLK); 191 TRANSLATE_ERROR(ENOSYS); 192 TRANSLATE_ERROR(ETIME); 193 #undef TRANSLATE_ERROR 194 default: 195 rc = EIO; 196 break; 197 } 198 } else 199 rc = 0; 200 201 out: 202 mcdi->resprc = rc; 203 if (rc) 204 mcdi->resplen = 0; 205 206 /* Return rc=0 like wait_event_timeout() */ 207 return 0; 208 } 209 210 /* Test and clear MC-rebooted flag for this port/function */ 211 int efx_mcdi_poll_reboot(struct efx_nic *efx) 212 { 213 unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_STATUS(efx); 214 efx_dword_t reg; 215 uint32_t value; 216 217 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) 218 return false; 219 220 efx_readd(efx, ®, addr); 221 value = EFX_DWORD_FIELD(reg, EFX_DWORD_0); 222 223 if (value == 0) 224 return 0; 225 226 EFX_ZERO_DWORD(reg); 227 efx_writed(efx, ®, addr); 228 229 if (value == MC_STATUS_DWORD_ASSERT) 230 return -EINTR; 231 else 232 return -EIO; 233 } 234 235 static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi) 236 { 237 /* Wait until the interface becomes QUIESCENT and we win the race 238 * to mark it RUNNING. */ 239 wait_event(mcdi->wq, 240 atomic_cmpxchg(&mcdi->state, 241 MCDI_STATE_QUIESCENT, 242 MCDI_STATE_RUNNING) 243 == MCDI_STATE_QUIESCENT); 244 } 245 246 static int efx_mcdi_await_completion(struct efx_nic *efx) 247 { 248 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 249 250 if (wait_event_timeout( 251 mcdi->wq, 252 atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED, 253 msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0) 254 return -ETIMEDOUT; 255 256 /* Check if efx_mcdi_set_mode() switched us back to polled completions. 257 * In which case, poll for completions directly. If efx_mcdi_ev_cpl() 258 * completed the request first, then we'll just end up completing the 259 * request again, which is safe. 260 * 261 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which 262 * wait_event_timeout() implicitly provides. 263 */ 264 if (mcdi->mode == MCDI_MODE_POLL) 265 return efx_mcdi_poll(efx); 266 267 return 0; 268 } 269 270 static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi) 271 { 272 /* If the interface is RUNNING, then move to COMPLETED and wake any 273 * waiters. If the interface isn't in RUNNING then we've received a 274 * duplicate completion after we've already transitioned back to 275 * QUIESCENT. [A subsequent invocation would increment seqno, so would 276 * have failed the seqno check]. 277 */ 278 if (atomic_cmpxchg(&mcdi->state, 279 MCDI_STATE_RUNNING, 280 MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) { 281 wake_up(&mcdi->wq); 282 return true; 283 } 284 285 return false; 286 } 287 288 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) 289 { 290 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT); 291 wake_up(&mcdi->wq); 292 } 293 294 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, 295 unsigned int datalen, unsigned int errno) 296 { 297 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 298 bool wake = false; 299 300 spin_lock(&mcdi->iface_lock); 301 302 if ((seqno ^ mcdi->seqno) & SEQ_MASK) { 303 if (mcdi->credits) 304 /* The request has been cancelled */ 305 --mcdi->credits; 306 else 307 netif_err(efx, hw, efx->net_dev, 308 "MC response mismatch tx seq 0x%x rx " 309 "seq 0x%x\n", seqno, mcdi->seqno); 310 } else { 311 mcdi->resprc = errno; 312 mcdi->resplen = datalen; 313 314 wake = true; 315 } 316 317 spin_unlock(&mcdi->iface_lock); 318 319 if (wake) 320 efx_mcdi_complete(mcdi); 321 } 322 323 /* Issue the given command by writing the data into the shared memory PDU, 324 * ring the doorbell and wait for completion. Copyout the result. */ 325 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, 326 const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen, 327 size_t *outlen_actual) 328 { 329 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 330 int rc; 331 BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0); 332 333 efx_mcdi_acquire(mcdi); 334 335 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ 336 spin_lock_bh(&mcdi->iface_lock); 337 ++mcdi->seqno; 338 spin_unlock_bh(&mcdi->iface_lock); 339 340 efx_mcdi_copyin(efx, cmd, inbuf, inlen); 341 342 if (mcdi->mode == MCDI_MODE_POLL) 343 rc = efx_mcdi_poll(efx); 344 else 345 rc = efx_mcdi_await_completion(efx); 346 347 if (rc != 0) { 348 /* Close the race with efx_mcdi_ev_cpl() executing just too late 349 * and completing a request we've just cancelled, by ensuring 350 * that the seqno check therein fails. 351 */ 352 spin_lock_bh(&mcdi->iface_lock); 353 ++mcdi->seqno; 354 ++mcdi->credits; 355 spin_unlock_bh(&mcdi->iface_lock); 356 357 netif_err(efx, hw, efx->net_dev, 358 "MC command 0x%x inlen %d mode %d timed out\n", 359 cmd, (int)inlen, mcdi->mode); 360 } else { 361 size_t resplen; 362 363 /* At the very least we need a memory barrier here to ensure 364 * we pick up changes from efx_mcdi_ev_cpl(). Protect against 365 * a spurious efx_mcdi_ev_cpl() running concurrently by 366 * acquiring the iface_lock. */ 367 spin_lock_bh(&mcdi->iface_lock); 368 rc = -mcdi->resprc; 369 resplen = mcdi->resplen; 370 spin_unlock_bh(&mcdi->iface_lock); 371 372 if (rc == 0) { 373 efx_mcdi_copyout(efx, outbuf, 374 min(outlen, mcdi->resplen + 3) & ~0x3); 375 if (outlen_actual != NULL) 376 *outlen_actual = resplen; 377 } else if (cmd == MC_CMD_REBOOT && rc == -EIO) 378 ; /* Don't reset if MC_CMD_REBOOT returns EIO */ 379 else if (rc == -EIO || rc == -EINTR) { 380 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", 381 -rc); 382 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 383 } else 384 netif_dbg(efx, hw, efx->net_dev, 385 "MC command 0x%x inlen %d failed rc=%d\n", 386 cmd, (int)inlen, -rc); 387 388 if (rc == -EIO || rc == -EINTR) { 389 msleep(MCDI_STATUS_SLEEP_MS); 390 efx_mcdi_poll_reboot(efx); 391 } 392 } 393 394 efx_mcdi_release(mcdi); 395 return rc; 396 } 397 398 void efx_mcdi_mode_poll(struct efx_nic *efx) 399 { 400 struct efx_mcdi_iface *mcdi; 401 402 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) 403 return; 404 405 mcdi = efx_mcdi(efx); 406 if (mcdi->mode == MCDI_MODE_POLL) 407 return; 408 409 /* We can switch from event completion to polled completion, because 410 * mcdi requests are always completed in shared memory. We do this by 411 * switching the mode to POLL'd then completing the request. 412 * efx_mcdi_await_completion() will then call efx_mcdi_poll(). 413 * 414 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), 415 * which efx_mcdi_complete() provides for us. 416 */ 417 mcdi->mode = MCDI_MODE_POLL; 418 419 efx_mcdi_complete(mcdi); 420 } 421 422 void efx_mcdi_mode_event(struct efx_nic *efx) 423 { 424 struct efx_mcdi_iface *mcdi; 425 426 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) 427 return; 428 429 mcdi = efx_mcdi(efx); 430 431 if (mcdi->mode == MCDI_MODE_EVENTS) 432 return; 433 434 /* We can't switch from polled to event completion in the middle of a 435 * request, because the completion method is specified in the request. 436 * So acquire the interface to serialise the requestors. We don't need 437 * to acquire the iface_lock to change the mode here, but we do need a 438 * write memory barrier ensure that efx_mcdi_rpc() sees it, which 439 * efx_mcdi_acquire() provides. 440 */ 441 efx_mcdi_acquire(mcdi); 442 mcdi->mode = MCDI_MODE_EVENTS; 443 efx_mcdi_release(mcdi); 444 } 445 446 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) 447 { 448 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 449 450 /* If there is an outstanding MCDI request, it has been terminated 451 * either by a BADASSERT or REBOOT event. If the mcdi interface is 452 * in polled mode, then do nothing because the MC reboot handler will 453 * set the header correctly. However, if the mcdi interface is waiting 454 * for a CMDDONE event it won't receive it [and since all MCDI events 455 * are sent to the same queue, we can't be racing with 456 * efx_mcdi_ev_cpl()] 457 * 458 * There's a race here with efx_mcdi_rpc(), because we might receive 459 * a REBOOT event *before* the request has been copied out. In polled 460 * mode (during startup) this is irrelevant, because efx_mcdi_complete() 461 * is ignored. In event mode, this condition is just an edge-case of 462 * receiving a REBOOT event after posting the MCDI request. Did the mc 463 * reboot before or after the copyout? The best we can do always is 464 * just return failure. 465 */ 466 spin_lock(&mcdi->iface_lock); 467 if (efx_mcdi_complete(mcdi)) { 468 if (mcdi->mode == MCDI_MODE_EVENTS) { 469 mcdi->resprc = rc; 470 mcdi->resplen = 0; 471 ++mcdi->credits; 472 } 473 } else { 474 int count; 475 476 /* Nobody was waiting for an MCDI request, so trigger a reset */ 477 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 478 479 /* Consume the status word since efx_mcdi_rpc_finish() won't */ 480 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { 481 if (efx_mcdi_poll_reboot(efx)) 482 break; 483 udelay(MCDI_STATUS_DELAY_US); 484 } 485 } 486 487 spin_unlock(&mcdi->iface_lock); 488 } 489 490 static unsigned int efx_mcdi_event_link_speed[] = { 491 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100, 492 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000, 493 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000, 494 }; 495 496 497 static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev) 498 { 499 u32 flags, fcntl, speed, lpa; 500 501 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED); 502 EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed)); 503 speed = efx_mcdi_event_link_speed[speed]; 504 505 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS); 506 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL); 507 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP); 508 509 /* efx->link_state is only modified by efx_mcdi_phy_get_link(), 510 * which is only run after flushing the event queues. Therefore, it 511 * is safe to modify the link state outside of the mac_lock here. 512 */ 513 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl); 514 515 efx_mcdi_phy_check_fcntl(efx, lpa); 516 517 efx_link_status_changed(efx); 518 } 519 520 /* Called from falcon_process_eventq for MCDI events */ 521 void efx_mcdi_process_event(struct efx_channel *channel, 522 efx_qword_t *event) 523 { 524 struct efx_nic *efx = channel->efx; 525 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); 526 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); 527 528 switch (code) { 529 case MCDI_EVENT_CODE_BADSSERT: 530 netif_err(efx, hw, efx->net_dev, 531 "MC watchdog or assertion failure at 0x%x\n", data); 532 efx_mcdi_ev_death(efx, EINTR); 533 break; 534 535 case MCDI_EVENT_CODE_PMNOTICE: 536 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); 537 break; 538 539 case MCDI_EVENT_CODE_CMDDONE: 540 efx_mcdi_ev_cpl(efx, 541 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), 542 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), 543 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); 544 break; 545 546 case MCDI_EVENT_CODE_LINKCHANGE: 547 efx_mcdi_process_link_change(efx, event); 548 break; 549 case MCDI_EVENT_CODE_SENSOREVT: 550 efx_mcdi_sensor_event(efx, event); 551 break; 552 case MCDI_EVENT_CODE_SCHEDERR: 553 netif_info(efx, hw, efx->net_dev, 554 "MC Scheduler error address=0x%x\n", data); 555 break; 556 case MCDI_EVENT_CODE_REBOOT: 557 netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); 558 efx_mcdi_ev_death(efx, EIO); 559 break; 560 case MCDI_EVENT_CODE_MAC_STATS_DMA: 561 /* MAC stats are gather lazily. We can ignore this. */ 562 break; 563 564 default: 565 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", 566 code); 567 } 568 } 569 570 /************************************************************************** 571 * 572 * Specific request functions 573 * 574 ************************************************************************** 575 */ 576 577 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) 578 { 579 u8 outbuf[ALIGN(MC_CMD_GET_VERSION_OUT_LEN, 4)]; 580 size_t outlength; 581 const __le16 *ver_words; 582 int rc; 583 584 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); 585 586 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, 587 outbuf, sizeof(outbuf), &outlength); 588 if (rc) 589 goto fail; 590 591 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { 592 rc = -EIO; 593 goto fail; 594 } 595 596 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); 597 snprintf(buf, len, "%u.%u.%u.%u", 598 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), 599 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); 600 return; 601 602 fail: 603 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 604 buf[0] = 0; 605 } 606 607 int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 608 bool *was_attached) 609 { 610 u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN]; 611 u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN]; 612 size_t outlen; 613 int rc; 614 615 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, 616 driver_operating ? 1 : 0); 617 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); 618 619 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), 620 outbuf, sizeof(outbuf), &outlen); 621 if (rc) 622 goto fail; 623 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { 624 rc = -EIO; 625 goto fail; 626 } 627 628 if (was_attached != NULL) 629 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); 630 return 0; 631 632 fail: 633 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 634 return rc; 635 } 636 637 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, 638 u16 *fw_subtype_list, u32 *capabilities) 639 { 640 uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LENMIN]; 641 size_t outlen; 642 int port_num = efx_port_num(efx); 643 int offset; 644 int rc; 645 646 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); 647 648 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, 649 outbuf, sizeof(outbuf), &outlen); 650 if (rc) 651 goto fail; 652 653 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 654 rc = -EIO; 655 goto fail; 656 } 657 658 offset = (port_num) 659 ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST 660 : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST; 661 if (mac_address) 662 memcpy(mac_address, outbuf + offset, ETH_ALEN); 663 if (fw_subtype_list) 664 memcpy(fw_subtype_list, 665 outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST, 666 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM * 667 sizeof(fw_subtype_list[0])); 668 if (capabilities) { 669 if (port_num) 670 *capabilities = MCDI_DWORD(outbuf, 671 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); 672 else 673 *capabilities = MCDI_DWORD(outbuf, 674 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); 675 } 676 677 return 0; 678 679 fail: 680 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", 681 __func__, rc, (int)outlen); 682 683 return rc; 684 } 685 686 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) 687 { 688 u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN]; 689 u32 dest = 0; 690 int rc; 691 692 if (uart) 693 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; 694 if (evq) 695 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; 696 697 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); 698 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); 699 700 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); 701 702 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), 703 NULL, 0, NULL); 704 if (rc) 705 goto fail; 706 707 return 0; 708 709 fail: 710 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 711 return rc; 712 } 713 714 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) 715 { 716 u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN]; 717 size_t outlen; 718 int rc; 719 720 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); 721 722 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, 723 outbuf, sizeof(outbuf), &outlen); 724 if (rc) 725 goto fail; 726 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { 727 rc = -EIO; 728 goto fail; 729 } 730 731 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); 732 return 0; 733 734 fail: 735 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 736 __func__, rc); 737 return rc; 738 } 739 740 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, 741 size_t *size_out, size_t *erase_size_out, 742 bool *protected_out) 743 { 744 u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN]; 745 u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN]; 746 size_t outlen; 747 int rc; 748 749 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); 750 751 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), 752 outbuf, sizeof(outbuf), &outlen); 753 if (rc) 754 goto fail; 755 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { 756 rc = -EIO; 757 goto fail; 758 } 759 760 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); 761 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); 762 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & 763 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); 764 return 0; 765 766 fail: 767 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 768 return rc; 769 } 770 771 int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) 772 { 773 u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN]; 774 int rc; 775 776 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); 777 778 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); 779 780 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), 781 NULL, 0, NULL); 782 if (rc) 783 goto fail; 784 785 return 0; 786 787 fail: 788 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 789 return rc; 790 } 791 792 int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, 793 loff_t offset, u8 *buffer, size_t length) 794 { 795 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN]; 796 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)]; 797 size_t outlen; 798 int rc; 799 800 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); 801 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); 802 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); 803 804 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), 805 outbuf, sizeof(outbuf), &outlen); 806 if (rc) 807 goto fail; 808 809 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); 810 return 0; 811 812 fail: 813 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 814 return rc; 815 } 816 817 int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 818 loff_t offset, const u8 *buffer, size_t length) 819 { 820 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)]; 821 int rc; 822 823 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); 824 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); 825 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); 826 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); 827 828 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); 829 830 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, 831 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), 832 NULL, 0, NULL); 833 if (rc) 834 goto fail; 835 836 return 0; 837 838 fail: 839 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 840 return rc; 841 } 842 843 int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, 844 loff_t offset, size_t length) 845 { 846 u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN]; 847 int rc; 848 849 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); 850 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); 851 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); 852 853 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); 854 855 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), 856 NULL, 0, NULL); 857 if (rc) 858 goto fail; 859 860 return 0; 861 862 fail: 863 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 864 return rc; 865 } 866 867 int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) 868 { 869 u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN]; 870 int rc; 871 872 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); 873 874 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); 875 876 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), 877 NULL, 0, NULL); 878 if (rc) 879 goto fail; 880 881 return 0; 882 883 fail: 884 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 885 return rc; 886 } 887 888 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) 889 { 890 u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN]; 891 u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN]; 892 int rc; 893 894 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); 895 896 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), 897 outbuf, sizeof(outbuf), NULL); 898 if (rc) 899 return rc; 900 901 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { 902 case MC_CMD_NVRAM_TEST_PASS: 903 case MC_CMD_NVRAM_TEST_NOTSUPP: 904 return 0; 905 default: 906 return -EIO; 907 } 908 } 909 910 int efx_mcdi_nvram_test_all(struct efx_nic *efx) 911 { 912 u32 nvram_types; 913 unsigned int type; 914 int rc; 915 916 rc = efx_mcdi_nvram_types(efx, &nvram_types); 917 if (rc) 918 goto fail1; 919 920 type = 0; 921 while (nvram_types != 0) { 922 if (nvram_types & 1) { 923 rc = efx_mcdi_nvram_test(efx, type); 924 if (rc) 925 goto fail2; 926 } 927 type++; 928 nvram_types >>= 1; 929 } 930 931 return 0; 932 933 fail2: 934 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", 935 __func__, type); 936 fail1: 937 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 938 return rc; 939 } 940 941 static int efx_mcdi_read_assertion(struct efx_nic *efx) 942 { 943 u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN]; 944 u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN]; 945 unsigned int flags, index, ofst; 946 const char *reason; 947 size_t outlen; 948 int retry; 949 int rc; 950 951 /* Attempt to read any stored assertion state before we reboot 952 * the mcfw out of the assertion handler. Retry twice, once 953 * because a boot-time assertion might cause this command to fail 954 * with EINTR. And once again because GET_ASSERTS can race with 955 * MC_CMD_REBOOT running on the other port. */ 956 retry = 2; 957 do { 958 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); 959 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS, 960 inbuf, MC_CMD_GET_ASSERTS_IN_LEN, 961 outbuf, sizeof(outbuf), &outlen); 962 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); 963 964 if (rc) 965 return rc; 966 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) 967 return -EIO; 968 969 /* Print out any recorded assertion state */ 970 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); 971 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) 972 return 0; 973 974 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) 975 ? "system-level assertion" 976 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) 977 ? "thread-level assertion" 978 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) 979 ? "watchdog reset" 980 : "unknown assertion"; 981 netif_err(efx, hw, efx->net_dev, 982 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, 983 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), 984 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); 985 986 /* Print out the registers */ 987 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST; 988 for (index = 1; index < 32; index++) { 989 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index, 990 MCDI_DWORD2(outbuf, ofst)); 991 ofst += sizeof(efx_dword_t); 992 } 993 994 return 0; 995 } 996 997 static void efx_mcdi_exit_assertion(struct efx_nic *efx) 998 { 999 u8 inbuf[MC_CMD_REBOOT_IN_LEN]; 1000 1001 /* Atomically reboot the mcfw out of the assertion handler */ 1002 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1003 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 1004 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); 1005 efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, 1006 NULL, 0, NULL); 1007 } 1008 1009 int efx_mcdi_handle_assertion(struct efx_nic *efx) 1010 { 1011 int rc; 1012 1013 rc = efx_mcdi_read_assertion(efx); 1014 if (rc) 1015 return rc; 1016 1017 efx_mcdi_exit_assertion(efx); 1018 1019 return 0; 1020 } 1021 1022 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) 1023 { 1024 u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN]; 1025 int rc; 1026 1027 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); 1028 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); 1029 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); 1030 1031 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); 1032 1033 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); 1034 1035 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), 1036 NULL, 0, NULL); 1037 if (rc) 1038 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1039 __func__, rc); 1040 } 1041 1042 int efx_mcdi_reset_port(struct efx_nic *efx) 1043 { 1044 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL); 1045 if (rc) 1046 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1047 __func__, rc); 1048 return rc; 1049 } 1050 1051 int efx_mcdi_reset_mc(struct efx_nic *efx) 1052 { 1053 u8 inbuf[MC_CMD_REBOOT_IN_LEN]; 1054 int rc; 1055 1056 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1057 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); 1058 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), 1059 NULL, 0, NULL); 1060 /* White is black, and up is down */ 1061 if (rc == -EIO) 1062 return 0; 1063 if (rc == 0) 1064 rc = -EIO; 1065 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1066 return rc; 1067 } 1068 1069 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, 1070 const u8 *mac, int *id_out) 1071 { 1072 u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN]; 1073 u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN]; 1074 size_t outlen; 1075 int rc; 1076 1077 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); 1078 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, 1079 MC_CMD_FILTER_MODE_SIMPLE); 1080 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN); 1081 1082 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), 1083 outbuf, sizeof(outbuf), &outlen); 1084 if (rc) 1085 goto fail; 1086 1087 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { 1088 rc = -EIO; 1089 goto fail; 1090 } 1091 1092 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); 1093 1094 return 0; 1095 1096 fail: 1097 *id_out = -1; 1098 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1099 return rc; 1100 1101 } 1102 1103 1104 int 1105 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) 1106 { 1107 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); 1108 } 1109 1110 1111 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) 1112 { 1113 u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN]; 1114 size_t outlen; 1115 int rc; 1116 1117 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, 1118 outbuf, sizeof(outbuf), &outlen); 1119 if (rc) 1120 goto fail; 1121 1122 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { 1123 rc = -EIO; 1124 goto fail; 1125 } 1126 1127 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); 1128 1129 return 0; 1130 1131 fail: 1132 *id_out = -1; 1133 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1134 return rc; 1135 } 1136 1137 1138 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) 1139 { 1140 u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN]; 1141 int rc; 1142 1143 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); 1144 1145 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), 1146 NULL, 0, NULL); 1147 if (rc) 1148 goto fail; 1149 1150 return 0; 1151 1152 fail: 1153 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1154 return rc; 1155 } 1156 1157 1158 int efx_mcdi_wol_filter_reset(struct efx_nic *efx) 1159 { 1160 int rc; 1161 1162 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); 1163 if (rc) 1164 goto fail; 1165 1166 return 0; 1167 1168 fail: 1169 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1170 return rc; 1171 } 1172 1173