1 // SPDX-License-Identifier: GPL-2.0-only 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2018 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include "net_driver.h" 12 #include <linux/module.h> 13 #include <linux/netdevice.h> 14 #include "efx_common.h" 15 #include "efx_channels.h" 16 #include "efx.h" 17 #include "mcdi.h" 18 #include "selftest.h" 19 #include "rx_common.h" 20 #include "tx_common.h" 21 #include "nic.h" 22 #include "io.h" 23 #include "mcdi_pcol.h" 24 25 static unsigned int debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 26 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 27 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 28 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 29 module_param(debug, uint, 0); 30 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 31 32 /* This is the time (in jiffies) between invocations of the hardware 33 * monitor. 34 * On Falcon-based NICs, this will: 35 * - Check the on-board hardware monitor; 36 * - Poll the link state and reconfigure the hardware as necessary. 37 * On Siena-based NICs for power systems with EEH support, this will give EEH a 38 * chance to start. 39 */ 40 static unsigned int efx_monitor_interval = 1 * HZ; 41 42 /* How often and how many times to poll for a reset while waiting for a 43 * BIST that another function started to complete. 44 */ 45 #define BIST_WAIT_DELAY_MS 100 46 #define BIST_WAIT_DELAY_COUNT 100 47 48 /* Default stats update time */ 49 #define STATS_PERIOD_MS_DEFAULT 1000 50 51 const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 52 const char *const efx_reset_type_names[] = { 53 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 54 [RESET_TYPE_ALL] = "ALL", 55 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 56 [RESET_TYPE_WORLD] = "WORLD", 57 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 58 [RESET_TYPE_DATAPATH] = "DATAPATH", 59 [RESET_TYPE_MC_BIST] = "MC_BIST", 60 [RESET_TYPE_DISABLE] = "DISABLE", 61 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 62 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 63 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 64 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 65 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 66 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)", 67 }; 68 69 #define RESET_TYPE(type) \ 70 STRING_TABLE_LOOKUP(type, efx_reset_type) 71 72 /* Loopback mode names (see LOOPBACK_MODE()) */ 73 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 74 const char *const efx_loopback_mode_names[] = { 75 [LOOPBACK_NONE] = "NONE", 76 [LOOPBACK_DATA] = "DATAPATH", 77 [LOOPBACK_GMAC] = "GMAC", 78 [LOOPBACK_XGMII] = "XGMII", 79 [LOOPBACK_XGXS] = "XGXS", 80 [LOOPBACK_XAUI] = "XAUI", 81 [LOOPBACK_GMII] = "GMII", 82 [LOOPBACK_SGMII] = "SGMII", 83 [LOOPBACK_XGBR] = "XGBR", 84 [LOOPBACK_XFI] = "XFI", 85 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 86 [LOOPBACK_GMII_FAR] = "GMII_FAR", 87 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 88 [LOOPBACK_XFI_FAR] = "XFI_FAR", 89 [LOOPBACK_GPHY] = "GPHY", 90 [LOOPBACK_PHYXS] = "PHYXS", 91 [LOOPBACK_PCS] = "PCS", 92 [LOOPBACK_PMAPMD] = "PMA/PMD", 93 [LOOPBACK_XPORT] = "XPORT", 94 [LOOPBACK_XGMII_WS] = "XGMII_WS", 95 [LOOPBACK_XAUI_WS] = "XAUI_WS", 96 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 97 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 98 [LOOPBACK_GMII_WS] = "GMII_WS", 99 [LOOPBACK_XFI_WS] = "XFI_WS", 100 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 101 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 102 }; 103 104 /* Reset workqueue. If any NIC has a hardware failure then a reset will be 105 * queued onto this work queue. This is not a per-nic work queue, because 106 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 107 */ 108 static struct workqueue_struct *reset_workqueue; 109 110 int efx_create_reset_workqueue(void) 111 { 112 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 113 if (!reset_workqueue) { 114 printk(KERN_ERR "Failed to create reset workqueue\n"); 115 return -ENOMEM; 116 } 117 118 return 0; 119 } 120 121 void efx_queue_reset_work(struct efx_nic *efx) 122 { 123 queue_work(reset_workqueue, &efx->reset_work); 124 } 125 126 void efx_flush_reset_workqueue(struct efx_nic *efx) 127 { 128 cancel_work_sync(&efx->reset_work); 129 } 130 131 void efx_destroy_reset_workqueue(void) 132 { 133 if (reset_workqueue) { 134 destroy_workqueue(reset_workqueue); 135 reset_workqueue = NULL; 136 } 137 } 138 139 /* We assume that efx->type->reconfigure_mac will always try to sync RX 140 * filters and therefore needs to read-lock the filter table against freeing 141 */ 142 void efx_mac_reconfigure(struct efx_nic *efx, bool mtu_only) 143 { 144 if (efx->type->reconfigure_mac) { 145 down_read(&efx->filter_sem); 146 efx->type->reconfigure_mac(efx, mtu_only); 147 up_read(&efx->filter_sem); 148 } 149 } 150 151 /* Asynchronous work item for changing MAC promiscuity and multicast 152 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 153 * MAC directly. 154 */ 155 static void efx_mac_work(struct work_struct *data) 156 { 157 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 158 159 mutex_lock(&efx->mac_lock); 160 if (efx->port_enabled) 161 efx_mac_reconfigure(efx, false); 162 mutex_unlock(&efx->mac_lock); 163 } 164 165 int efx_set_mac_address(struct net_device *net_dev, void *data) 166 { 167 struct efx_nic *efx = netdev_priv(net_dev); 168 struct sockaddr *addr = data; 169 u8 *new_addr = addr->sa_data; 170 u8 old_addr[6]; 171 int rc; 172 173 if (!is_valid_ether_addr(new_addr)) { 174 netif_err(efx, drv, efx->net_dev, 175 "invalid ethernet MAC address requested: %pM\n", 176 new_addr); 177 return -EADDRNOTAVAIL; 178 } 179 180 /* save old address */ 181 ether_addr_copy(old_addr, net_dev->dev_addr); 182 ether_addr_copy(net_dev->dev_addr, new_addr); 183 if (efx->type->set_mac_address) { 184 rc = efx->type->set_mac_address(efx); 185 if (rc) { 186 ether_addr_copy(net_dev->dev_addr, old_addr); 187 return rc; 188 } 189 } 190 191 /* Reconfigure the MAC */ 192 mutex_lock(&efx->mac_lock); 193 efx_mac_reconfigure(efx, false); 194 mutex_unlock(&efx->mac_lock); 195 196 return 0; 197 } 198 199 /* Context: netif_addr_lock held, BHs disabled. */ 200 void efx_set_rx_mode(struct net_device *net_dev) 201 { 202 struct efx_nic *efx = netdev_priv(net_dev); 203 204 if (efx->port_enabled) 205 queue_work(efx->workqueue, &efx->mac_work); 206 /* Otherwise efx_start_port() will do this */ 207 } 208 209 int efx_set_features(struct net_device *net_dev, netdev_features_t data) 210 { 211 struct efx_nic *efx = netdev_priv(net_dev); 212 int rc; 213 214 /* If disabling RX n-tuple filtering, clear existing filters */ 215 if (net_dev->features & ~data & NETIF_F_NTUPLE) { 216 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 217 if (rc) 218 return rc; 219 } 220 221 /* If Rx VLAN filter is changed, update filters via mac_reconfigure. 222 * If rx-fcs is changed, mac_reconfigure updates that too. 223 */ 224 if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER | 225 NETIF_F_RXFCS)) { 226 /* efx_set_rx_mode() will schedule MAC work to update filters 227 * when a new features are finally set in net_dev. 228 */ 229 efx_set_rx_mode(net_dev); 230 } 231 232 return 0; 233 } 234 235 /* This ensures that the kernel is kept informed (via 236 * netif_carrier_on/off) of the link status, and also maintains the 237 * link status's stop on the port's TX queue. 238 */ 239 void efx_link_status_changed(struct efx_nic *efx) 240 { 241 struct efx_link_state *link_state = &efx->link_state; 242 243 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 244 * that no events are triggered between unregister_netdev() and the 245 * driver unloading. A more general condition is that NETDEV_CHANGE 246 * can only be generated between NETDEV_UP and NETDEV_DOWN 247 */ 248 if (!netif_running(efx->net_dev)) 249 return; 250 251 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 252 efx->n_link_state_changes++; 253 254 if (link_state->up) 255 netif_carrier_on(efx->net_dev); 256 else 257 netif_carrier_off(efx->net_dev); 258 } 259 260 /* Status message for kernel log */ 261 if (link_state->up) 262 netif_info(efx, link, efx->net_dev, 263 "link up at %uMbps %s-duplex (MTU %d)\n", 264 link_state->speed, link_state->fd ? "full" : "half", 265 efx->net_dev->mtu); 266 else 267 netif_info(efx, link, efx->net_dev, "link down\n"); 268 } 269 270 unsigned int efx_xdp_max_mtu(struct efx_nic *efx) 271 { 272 /* The maximum MTU that we can fit in a single page, allowing for 273 * framing, overhead and XDP headroom + tailroom. 274 */ 275 int overhead = EFX_MAX_FRAME_LEN(0) + sizeof(struct efx_rx_page_state) + 276 efx->rx_prefix_size + efx->type->rx_buffer_padding + 277 efx->rx_ip_align + EFX_XDP_HEADROOM + EFX_XDP_TAILROOM; 278 279 return PAGE_SIZE - overhead; 280 } 281 282 /* Context: process, rtnl_lock() held. */ 283 int efx_change_mtu(struct net_device *net_dev, int new_mtu) 284 { 285 struct efx_nic *efx = netdev_priv(net_dev); 286 int rc; 287 288 rc = efx_check_disabled(efx); 289 if (rc) 290 return rc; 291 292 if (rtnl_dereference(efx->xdp_prog) && 293 new_mtu > efx_xdp_max_mtu(efx)) { 294 netif_err(efx, drv, efx->net_dev, 295 "Requested MTU of %d too big for XDP (max: %d)\n", 296 new_mtu, efx_xdp_max_mtu(efx)); 297 return -EINVAL; 298 } 299 300 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 301 302 efx_device_detach_sync(efx); 303 efx_stop_all(efx); 304 305 mutex_lock(&efx->mac_lock); 306 net_dev->mtu = new_mtu; 307 efx_mac_reconfigure(efx, true); 308 mutex_unlock(&efx->mac_lock); 309 310 efx_start_all(efx); 311 efx_device_attach_if_not_resetting(efx); 312 return 0; 313 } 314 315 /************************************************************************** 316 * 317 * Hardware monitor 318 * 319 **************************************************************************/ 320 321 /* Run periodically off the general workqueue */ 322 static void efx_monitor(struct work_struct *data) 323 { 324 struct efx_nic *efx = container_of(data, struct efx_nic, 325 monitor_work.work); 326 327 netif_vdbg(efx, timer, efx->net_dev, 328 "hardware monitor executing on CPU %d\n", 329 raw_smp_processor_id()); 330 BUG_ON(efx->type->monitor == NULL); 331 332 /* If the mac_lock is already held then it is likely a port 333 * reconfiguration is already in place, which will likely do 334 * most of the work of monitor() anyway. 335 */ 336 if (mutex_trylock(&efx->mac_lock)) { 337 if (efx->port_enabled && efx->type->monitor) 338 efx->type->monitor(efx); 339 mutex_unlock(&efx->mac_lock); 340 } 341 342 efx_start_monitor(efx); 343 } 344 345 void efx_start_monitor(struct efx_nic *efx) 346 { 347 if (efx->type->monitor) 348 queue_delayed_work(efx->workqueue, &efx->monitor_work, 349 efx_monitor_interval); 350 } 351 352 /************************************************************************** 353 * 354 * Event queue processing 355 * 356 *************************************************************************/ 357 358 /* Channels are shutdown and reinitialised whilst the NIC is running 359 * to propagate configuration changes (mtu, checksum offload), or 360 * to clear hardware error conditions 361 */ 362 static void efx_start_datapath(struct efx_nic *efx) 363 { 364 netdev_features_t old_features = efx->net_dev->features; 365 bool old_rx_scatter = efx->rx_scatter; 366 size_t rx_buf_len; 367 368 /* Calculate the rx buffer allocation parameters required to 369 * support the current MTU, including padding for header 370 * alignment and overruns. 371 */ 372 efx->rx_dma_len = (efx->rx_prefix_size + 373 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 374 efx->type->rx_buffer_padding); 375 rx_buf_len = (sizeof(struct efx_rx_page_state) + EFX_XDP_HEADROOM + 376 efx->rx_ip_align + efx->rx_dma_len + EFX_XDP_TAILROOM); 377 378 if (rx_buf_len <= PAGE_SIZE) { 379 efx->rx_scatter = efx->type->always_rx_scatter; 380 efx->rx_buffer_order = 0; 381 } else if (efx->type->can_rx_scatter) { 382 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 383 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 384 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 385 EFX_RX_BUF_ALIGNMENT) > 386 PAGE_SIZE); 387 efx->rx_scatter = true; 388 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 389 efx->rx_buffer_order = 0; 390 } else { 391 efx->rx_scatter = false; 392 efx->rx_buffer_order = get_order(rx_buf_len); 393 } 394 395 efx_rx_config_page_split(efx); 396 if (efx->rx_buffer_order) 397 netif_dbg(efx, drv, efx->net_dev, 398 "RX buf len=%u; page order=%u batch=%u\n", 399 efx->rx_dma_len, efx->rx_buffer_order, 400 efx->rx_pages_per_batch); 401 else 402 netif_dbg(efx, drv, efx->net_dev, 403 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 404 efx->rx_dma_len, efx->rx_page_buf_step, 405 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 406 407 /* Restore previously fixed features in hw_features and remove 408 * features which are fixed now 409 */ 410 efx->net_dev->hw_features |= efx->net_dev->features; 411 efx->net_dev->hw_features &= ~efx->fixed_features; 412 efx->net_dev->features |= efx->fixed_features; 413 if (efx->net_dev->features != old_features) 414 netdev_features_change(efx->net_dev); 415 416 /* RX filters may also have scatter-enabled flags */ 417 if ((efx->rx_scatter != old_rx_scatter) && 418 efx->type->filter_update_rx_scatter) 419 efx->type->filter_update_rx_scatter(efx); 420 421 /* We must keep at least one descriptor in a TX ring empty. 422 * We could avoid this when the queue size does not exactly 423 * match the hardware ring size, but it's not that important. 424 * Therefore we stop the queue when one more skb might fill 425 * the ring completely. We wake it when half way back to 426 * empty. 427 */ 428 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 429 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 430 431 /* Initialise the channels */ 432 efx_start_channels(efx); 433 434 efx_ptp_start_datapath(efx); 435 436 if (netif_device_present(efx->net_dev)) 437 netif_tx_wake_all_queues(efx->net_dev); 438 } 439 440 static void efx_stop_datapath(struct efx_nic *efx) 441 { 442 EFX_ASSERT_RESET_SERIALISED(efx); 443 BUG_ON(efx->port_enabled); 444 445 efx_ptp_stop_datapath(efx); 446 447 efx_stop_channels(efx); 448 } 449 450 /************************************************************************** 451 * 452 * Port handling 453 * 454 **************************************************************************/ 455 456 /* Equivalent to efx_link_set_advertising with all-zeroes, except does not 457 * force the Autoneg bit on. 458 */ 459 void efx_link_clear_advertising(struct efx_nic *efx) 460 { 461 bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS); 462 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 463 } 464 465 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 466 { 467 efx->wanted_fc = wanted_fc; 468 if (efx->link_advertising[0]) { 469 if (wanted_fc & EFX_FC_RX) 470 efx->link_advertising[0] |= (ADVERTISED_Pause | 471 ADVERTISED_Asym_Pause); 472 else 473 efx->link_advertising[0] &= ~(ADVERTISED_Pause | 474 ADVERTISED_Asym_Pause); 475 if (wanted_fc & EFX_FC_TX) 476 efx->link_advertising[0] ^= ADVERTISED_Asym_Pause; 477 } 478 } 479 480 static void efx_start_port(struct efx_nic *efx) 481 { 482 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 483 BUG_ON(efx->port_enabled); 484 485 mutex_lock(&efx->mac_lock); 486 efx->port_enabled = true; 487 488 /* Ensure MAC ingress/egress is enabled */ 489 efx_mac_reconfigure(efx, false); 490 491 mutex_unlock(&efx->mac_lock); 492 } 493 494 /* Cancel work for MAC reconfiguration, periodic hardware monitoring 495 * and the async self-test, wait for them to finish and prevent them 496 * being scheduled again. This doesn't cover online resets, which 497 * should only be cancelled when removing the device. 498 */ 499 static void efx_stop_port(struct efx_nic *efx) 500 { 501 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 502 503 EFX_ASSERT_RESET_SERIALISED(efx); 504 505 mutex_lock(&efx->mac_lock); 506 efx->port_enabled = false; 507 mutex_unlock(&efx->mac_lock); 508 509 /* Serialise against efx_set_multicast_list() */ 510 netif_addr_lock_bh(efx->net_dev); 511 netif_addr_unlock_bh(efx->net_dev); 512 513 cancel_delayed_work_sync(&efx->monitor_work); 514 efx_selftest_async_cancel(efx); 515 cancel_work_sync(&efx->mac_work); 516 } 517 518 /* If the interface is supposed to be running but is not, start 519 * the hardware and software data path, regular activity for the port 520 * (MAC statistics, link polling, etc.) and schedule the port to be 521 * reconfigured. Interrupts must already be enabled. This function 522 * is safe to call multiple times, so long as the NIC is not disabled. 523 * Requires the RTNL lock. 524 */ 525 void efx_start_all(struct efx_nic *efx) 526 { 527 EFX_ASSERT_RESET_SERIALISED(efx); 528 BUG_ON(efx->state == STATE_DISABLED); 529 530 /* Check that it is appropriate to restart the interface. All 531 * of these flags are safe to read under just the rtnl lock 532 */ 533 if (efx->port_enabled || !netif_running(efx->net_dev) || 534 efx->reset_pending) 535 return; 536 537 efx_start_port(efx); 538 efx_start_datapath(efx); 539 540 /* Start the hardware monitor if there is one */ 541 efx_start_monitor(efx); 542 543 /* Link state detection is normally event-driven; we have 544 * to poll now because we could have missed a change 545 */ 546 mutex_lock(&efx->mac_lock); 547 if (efx->phy_op->poll(efx)) 548 efx_link_status_changed(efx); 549 mutex_unlock(&efx->mac_lock); 550 551 if (efx->type->start_stats) { 552 efx->type->start_stats(efx); 553 efx->type->pull_stats(efx); 554 spin_lock_bh(&efx->stats_lock); 555 efx->type->update_stats(efx, NULL, NULL); 556 spin_unlock_bh(&efx->stats_lock); 557 } 558 } 559 560 /* Quiesce the hardware and software data path, and regular activity 561 * for the port without bringing the link down. Safe to call multiple 562 * times with the NIC in almost any state, but interrupts should be 563 * enabled. Requires the RTNL lock. 564 */ 565 void efx_stop_all(struct efx_nic *efx) 566 { 567 EFX_ASSERT_RESET_SERIALISED(efx); 568 569 /* port_enabled can be read safely under the rtnl lock */ 570 if (!efx->port_enabled) 571 return; 572 573 if (efx->type->update_stats) { 574 /* update stats before we go down so we can accurately count 575 * rx_nodesc_drops 576 */ 577 efx->type->pull_stats(efx); 578 spin_lock_bh(&efx->stats_lock); 579 efx->type->update_stats(efx, NULL, NULL); 580 spin_unlock_bh(&efx->stats_lock); 581 efx->type->stop_stats(efx); 582 } 583 584 efx_stop_port(efx); 585 586 /* Stop the kernel transmit interface. This is only valid if 587 * the device is stopped or detached; otherwise the watchdog 588 * may fire immediately. 589 */ 590 WARN_ON(netif_running(efx->net_dev) && 591 netif_device_present(efx->net_dev)); 592 netif_tx_disable(efx->net_dev); 593 594 efx_stop_datapath(efx); 595 } 596 597 /* Context: process, dev_base_lock or RTNL held, non-blocking. */ 598 void efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats) 599 { 600 struct efx_nic *efx = netdev_priv(net_dev); 601 602 spin_lock_bh(&efx->stats_lock); 603 efx->type->update_stats(efx, NULL, stats); 604 spin_unlock_bh(&efx->stats_lock); 605 } 606 607 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure 608 * the MAC appropriately. All other PHY configuration changes are pushed 609 * through phy_op->set_settings(), and pushed asynchronously to the MAC 610 * through efx_monitor(). 611 * 612 * Callers must hold the mac_lock 613 */ 614 int __efx_reconfigure_port(struct efx_nic *efx) 615 { 616 enum efx_phy_mode phy_mode; 617 int rc = 0; 618 619 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 620 621 /* Disable PHY transmit in mac level loopbacks */ 622 phy_mode = efx->phy_mode; 623 if (LOOPBACK_INTERNAL(efx)) 624 efx->phy_mode |= PHY_MODE_TX_DISABLED; 625 else 626 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 627 628 if (efx->type->reconfigure_port) 629 rc = efx->type->reconfigure_port(efx); 630 631 if (rc) 632 efx->phy_mode = phy_mode; 633 634 return rc; 635 } 636 637 /* Reinitialise the MAC to pick up new PHY settings, even if the port is 638 * disabled. 639 */ 640 int efx_reconfigure_port(struct efx_nic *efx) 641 { 642 int rc; 643 644 EFX_ASSERT_RESET_SERIALISED(efx); 645 646 mutex_lock(&efx->mac_lock); 647 rc = __efx_reconfigure_port(efx); 648 mutex_unlock(&efx->mac_lock); 649 650 return rc; 651 } 652 653 /************************************************************************** 654 * 655 * Device reset and suspend 656 * 657 **************************************************************************/ 658 659 static void efx_wait_for_bist_end(struct efx_nic *efx) 660 { 661 int i; 662 663 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) { 664 if (efx_mcdi_poll_reboot(efx)) 665 goto out; 666 msleep(BIST_WAIT_DELAY_MS); 667 } 668 669 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n"); 670 out: 671 /* Either way unset the BIST flag. If we found no reboot we probably 672 * won't recover, but we should try. 673 */ 674 efx->mc_bist_for_other_fn = false; 675 } 676 677 /* Try recovery mechanisms. 678 * For now only EEH is supported. 679 * Returns 0 if the recovery mechanisms are unsuccessful. 680 * Returns a non-zero value otherwise. 681 */ 682 int efx_try_recovery(struct efx_nic *efx) 683 { 684 #ifdef CONFIG_EEH 685 /* A PCI error can occur and not be seen by EEH because nothing 686 * happens on the PCI bus. In this case the driver may fail and 687 * schedule a 'recover or reset', leading to this recovery handler. 688 * Manually call the eeh failure check function. 689 */ 690 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev); 691 if (eeh_dev_check_failure(eehdev)) { 692 /* The EEH mechanisms will handle the error and reset the 693 * device if necessary. 694 */ 695 return 1; 696 } 697 #endif 698 return 0; 699 } 700 701 /* Tears down the entire software state and most of the hardware state 702 * before reset. 703 */ 704 void efx_reset_down(struct efx_nic *efx, enum reset_type method) 705 { 706 EFX_ASSERT_RESET_SERIALISED(efx); 707 708 if (method == RESET_TYPE_MCDI_TIMEOUT) 709 efx->type->prepare_flr(efx); 710 711 efx_stop_all(efx); 712 efx_disable_interrupts(efx); 713 714 mutex_lock(&efx->mac_lock); 715 down_write(&efx->filter_sem); 716 mutex_lock(&efx->rss_lock); 717 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 718 method != RESET_TYPE_DATAPATH) 719 efx->phy_op->fini(efx); 720 efx->type->fini(efx); 721 } 722 723 /* Context: netif_tx_lock held, BHs disabled. */ 724 void efx_watchdog(struct net_device *net_dev, unsigned int txqueue) 725 { 726 struct efx_nic *efx = netdev_priv(net_dev); 727 728 netif_err(efx, tx_err, efx->net_dev, 729 "TX stuck with port_enabled=%d: resetting channels\n", 730 efx->port_enabled); 731 732 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 733 } 734 735 /* This function will always ensure that the locks acquired in 736 * efx_reset_down() are released. A failure return code indicates 737 * that we were unable to reinitialise the hardware, and the 738 * driver should be disabled. If ok is false, then the rx and tx 739 * engines are not restarted, pending a RESET_DISABLE. 740 */ 741 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 742 { 743 int rc; 744 745 EFX_ASSERT_RESET_SERIALISED(efx); 746 747 if (method == RESET_TYPE_MCDI_TIMEOUT) 748 efx->type->finish_flr(efx); 749 750 /* Ensure that SRAM is initialised even if we're disabling the device */ 751 rc = efx->type->init(efx); 752 if (rc) { 753 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 754 goto fail; 755 } 756 757 if (!ok) 758 goto fail; 759 760 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 761 method != RESET_TYPE_DATAPATH) { 762 rc = efx->phy_op->init(efx); 763 if (rc) 764 goto fail; 765 rc = efx->phy_op->reconfigure(efx); 766 if (rc && rc != -EPERM) 767 netif_err(efx, drv, efx->net_dev, 768 "could not restore PHY settings\n"); 769 } 770 771 rc = efx_enable_interrupts(efx); 772 if (rc) 773 goto fail; 774 775 #ifdef CONFIG_SFC_SRIOV 776 rc = efx->type->vswitching_restore(efx); 777 if (rc) /* not fatal; the PF will still work fine */ 778 netif_warn(efx, probe, efx->net_dev, 779 "failed to restore vswitching rc=%d;" 780 " VFs may not function\n", rc); 781 #endif 782 783 if (efx->type->rx_restore_rss_contexts) 784 efx->type->rx_restore_rss_contexts(efx); 785 mutex_unlock(&efx->rss_lock); 786 efx->type->filter_table_restore(efx); 787 up_write(&efx->filter_sem); 788 if (efx->type->sriov_reset) 789 efx->type->sriov_reset(efx); 790 791 mutex_unlock(&efx->mac_lock); 792 793 efx_start_all(efx); 794 795 if (efx->type->udp_tnl_push_ports) 796 efx->type->udp_tnl_push_ports(efx); 797 798 return 0; 799 800 fail: 801 efx->port_initialized = false; 802 803 mutex_unlock(&efx->rss_lock); 804 up_write(&efx->filter_sem); 805 mutex_unlock(&efx->mac_lock); 806 807 return rc; 808 } 809 810 /* Reset the NIC using the specified method. Note that the reset may 811 * fail, in which case the card will be left in an unusable state. 812 * 813 * Caller must hold the rtnl_lock. 814 */ 815 int efx_reset(struct efx_nic *efx, enum reset_type method) 816 { 817 bool disabled; 818 int rc, rc2; 819 820 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 821 RESET_TYPE(method)); 822 823 efx_device_detach_sync(efx); 824 efx_reset_down(efx, method); 825 826 rc = efx->type->reset(efx, method); 827 if (rc) { 828 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 829 goto out; 830 } 831 832 /* Clear flags for the scopes we covered. We assume the NIC and 833 * driver are now quiescent so that there is no race here. 834 */ 835 if (method < RESET_TYPE_MAX_METHOD) 836 efx->reset_pending &= -(1 << (method + 1)); 837 else /* it doesn't fit into the well-ordered scope hierarchy */ 838 __clear_bit(method, &efx->reset_pending); 839 840 /* Reinitialise bus-mastering, which may have been turned off before 841 * the reset was scheduled. This is still appropriate, even in the 842 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 843 * can respond to requests. 844 */ 845 pci_set_master(efx->pci_dev); 846 847 out: 848 /* Leave device stopped if necessary */ 849 disabled = rc || 850 method == RESET_TYPE_DISABLE || 851 method == RESET_TYPE_RECOVER_OR_DISABLE; 852 rc2 = efx_reset_up(efx, method, !disabled); 853 if (rc2) { 854 disabled = true; 855 if (!rc) 856 rc = rc2; 857 } 858 859 if (disabled) { 860 dev_close(efx->net_dev); 861 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 862 efx->state = STATE_DISABLED; 863 } else { 864 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 865 efx_device_attach_if_not_resetting(efx); 866 } 867 return rc; 868 } 869 870 /* The worker thread exists so that code that cannot sleep can 871 * schedule a reset for later. 872 */ 873 static void efx_reset_work(struct work_struct *data) 874 { 875 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 876 unsigned long pending; 877 enum reset_type method; 878 879 pending = READ_ONCE(efx->reset_pending); 880 method = fls(pending) - 1; 881 882 if (method == RESET_TYPE_MC_BIST) 883 efx_wait_for_bist_end(efx); 884 885 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 886 method == RESET_TYPE_RECOVER_OR_ALL) && 887 efx_try_recovery(efx)) 888 return; 889 890 if (!pending) 891 return; 892 893 rtnl_lock(); 894 895 /* We checked the state in efx_schedule_reset() but it may 896 * have changed by now. Now that we have the RTNL lock, 897 * it cannot change again. 898 */ 899 if (efx->state == STATE_READY) 900 (void)efx_reset(efx, method); 901 902 rtnl_unlock(); 903 } 904 905 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 906 { 907 enum reset_type method; 908 909 if (efx->state == STATE_RECOVERY) { 910 netif_dbg(efx, drv, efx->net_dev, 911 "recovering: skip scheduling %s reset\n", 912 RESET_TYPE(type)); 913 return; 914 } 915 916 switch (type) { 917 case RESET_TYPE_INVISIBLE: 918 case RESET_TYPE_ALL: 919 case RESET_TYPE_RECOVER_OR_ALL: 920 case RESET_TYPE_WORLD: 921 case RESET_TYPE_DISABLE: 922 case RESET_TYPE_RECOVER_OR_DISABLE: 923 case RESET_TYPE_DATAPATH: 924 case RESET_TYPE_MC_BIST: 925 case RESET_TYPE_MCDI_TIMEOUT: 926 method = type; 927 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 928 RESET_TYPE(method)); 929 break; 930 default: 931 method = efx->type->map_reset_reason(type); 932 netif_dbg(efx, drv, efx->net_dev, 933 "scheduling %s reset for %s\n", 934 RESET_TYPE(method), RESET_TYPE(type)); 935 break; 936 } 937 938 set_bit(method, &efx->reset_pending); 939 smp_mb(); /* ensure we change reset_pending before checking state */ 940 941 /* If we're not READY then just leave the flags set as the cue 942 * to abort probing or reschedule the reset later. 943 */ 944 if (READ_ONCE(efx->state) != STATE_READY) 945 return; 946 947 /* efx_process_channel() will no longer read events once a 948 * reset is scheduled. So switch back to poll'd MCDI completions. 949 */ 950 efx_mcdi_mode_poll(efx); 951 952 efx_queue_reset_work(efx); 953 } 954 955 /************************************************************************** 956 * 957 * Dummy PHY/MAC operations 958 * 959 * Can be used for some unimplemented operations 960 * Needed so all function pointers are valid and do not have to be tested 961 * before use 962 * 963 **************************************************************************/ 964 int efx_port_dummy_op_int(struct efx_nic *efx) 965 { 966 return 0; 967 } 968 void efx_port_dummy_op_void(struct efx_nic *efx) {} 969 970 static bool efx_port_dummy_op_poll(struct efx_nic *efx) 971 { 972 return false; 973 } 974 975 static const struct efx_phy_operations efx_dummy_phy_operations = { 976 .init = efx_port_dummy_op_int, 977 .reconfigure = efx_port_dummy_op_int, 978 .poll = efx_port_dummy_op_poll, 979 .fini = efx_port_dummy_op_void, 980 }; 981 982 /************************************************************************** 983 * 984 * Data housekeeping 985 * 986 **************************************************************************/ 987 988 /* This zeroes out and then fills in the invariants in a struct 989 * efx_nic (including all sub-structures). 990 */ 991 int efx_init_struct(struct efx_nic *efx, 992 struct pci_dev *pci_dev, struct net_device *net_dev) 993 { 994 int rc = -ENOMEM; 995 996 /* Initialise common structures */ 997 INIT_LIST_HEAD(&efx->node); 998 INIT_LIST_HEAD(&efx->secondary_list); 999 spin_lock_init(&efx->biu_lock); 1000 #ifdef CONFIG_SFC_MTD 1001 INIT_LIST_HEAD(&efx->mtd_list); 1002 #endif 1003 INIT_WORK(&efx->reset_work, efx_reset_work); 1004 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 1005 efx_selftest_async_init(efx); 1006 efx->pci_dev = pci_dev; 1007 efx->msg_enable = debug; 1008 efx->state = STATE_UNINIT; 1009 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 1010 1011 efx->net_dev = net_dev; 1012 efx->rx_prefix_size = efx->type->rx_prefix_size; 1013 efx->rx_ip_align = 1014 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; 1015 efx->rx_packet_hash_offset = 1016 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 1017 efx->rx_packet_ts_offset = 1018 efx->type->rx_ts_offset - efx->type->rx_prefix_size; 1019 INIT_LIST_HEAD(&efx->rss_context.list); 1020 efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID; 1021 mutex_init(&efx->rss_lock); 1022 efx->vport_id = EVB_PORT_ID_ASSIGNED; 1023 spin_lock_init(&efx->stats_lock); 1024 efx->vi_stride = EFX_DEFAULT_VI_STRIDE; 1025 efx->num_mac_stats = MC_CMD_MAC_NSTATS; 1026 BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END); 1027 mutex_init(&efx->mac_lock); 1028 #ifdef CONFIG_RFS_ACCEL 1029 mutex_init(&efx->rps_mutex); 1030 spin_lock_init(&efx->rps_hash_lock); 1031 /* Failure to allocate is not fatal, but may degrade ARFS performance */ 1032 efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE, 1033 sizeof(*efx->rps_hash_table), GFP_KERNEL); 1034 #endif 1035 efx->phy_op = &efx_dummy_phy_operations; 1036 efx->mdio.dev = net_dev; 1037 INIT_WORK(&efx->mac_work, efx_mac_work); 1038 init_waitqueue_head(&efx->flush_wq); 1039 1040 efx->tx_queues_per_channel = 1; 1041 efx->rxq_entries = EFX_DEFAULT_DMAQ_SIZE; 1042 efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1043 1044 efx->mem_bar = UINT_MAX; 1045 1046 rc = efx_init_channels(efx); 1047 if (rc) 1048 goto fail; 1049 1050 /* Would be good to use the net_dev name, but we're too early */ 1051 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 1052 pci_name(pci_dev)); 1053 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 1054 if (!efx->workqueue) { 1055 rc = -ENOMEM; 1056 goto fail; 1057 } 1058 1059 return 0; 1060 1061 fail: 1062 efx_fini_struct(efx); 1063 return rc; 1064 } 1065 1066 void efx_fini_struct(struct efx_nic *efx) 1067 { 1068 #ifdef CONFIG_RFS_ACCEL 1069 kfree(efx->rps_hash_table); 1070 #endif 1071 1072 efx_fini_channels(efx); 1073 1074 kfree(efx->vpd_sn); 1075 1076 if (efx->workqueue) { 1077 destroy_workqueue(efx->workqueue); 1078 efx->workqueue = NULL; 1079 } 1080 } 1081 1082 /* This configures the PCI device to enable I/O and DMA. */ 1083 int efx_init_io(struct efx_nic *efx, int bar, dma_addr_t dma_mask, 1084 unsigned int mem_map_size) 1085 { 1086 struct pci_dev *pci_dev = efx->pci_dev; 1087 int rc; 1088 1089 efx->mem_bar = UINT_MAX; 1090 1091 netif_dbg(efx, probe, efx->net_dev, "initialising I/O bar=%d\n", bar); 1092 1093 rc = pci_enable_device(pci_dev); 1094 if (rc) { 1095 netif_err(efx, probe, efx->net_dev, 1096 "failed to enable PCI device\n"); 1097 goto fail1; 1098 } 1099 1100 pci_set_master(pci_dev); 1101 1102 /* Set the PCI DMA mask. Try all possibilities from our 1103 * genuine mask down to 32 bits, because some architectures 1104 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1105 * masks event though they reject 46 bit masks. 1106 */ 1107 while (dma_mask > 0x7fffffffUL) { 1108 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1109 if (rc == 0) 1110 break; 1111 dma_mask >>= 1; 1112 } 1113 if (rc) { 1114 netif_err(efx, probe, efx->net_dev, 1115 "could not find a suitable DMA mask\n"); 1116 goto fail2; 1117 } 1118 netif_dbg(efx, probe, efx->net_dev, 1119 "using DMA mask %llx\n", (unsigned long long)dma_mask); 1120 1121 efx->membase_phys = pci_resource_start(efx->pci_dev, bar); 1122 if (!efx->membase_phys) { 1123 netif_err(efx, probe, efx->net_dev, 1124 "ERROR: No BAR%d mapping from the BIOS. " 1125 "Try pci=realloc on the kernel command line\n", bar); 1126 rc = -ENODEV; 1127 goto fail3; 1128 } 1129 1130 rc = pci_request_region(pci_dev, bar, "sfc"); 1131 if (rc) { 1132 netif_err(efx, probe, efx->net_dev, 1133 "request for memory BAR[%d] failed\n", bar); 1134 rc = -EIO; 1135 goto fail3; 1136 } 1137 efx->mem_bar = bar; 1138 efx->membase = ioremap(efx->membase_phys, mem_map_size); 1139 if (!efx->membase) { 1140 netif_err(efx, probe, efx->net_dev, 1141 "could not map memory BAR[%d] at %llx+%x\n", bar, 1142 (unsigned long long)efx->membase_phys, mem_map_size); 1143 rc = -ENOMEM; 1144 goto fail4; 1145 } 1146 netif_dbg(efx, probe, efx->net_dev, 1147 "memory BAR[%d] at %llx+%x (virtual %p)\n", bar, 1148 (unsigned long long)efx->membase_phys, mem_map_size, 1149 efx->membase); 1150 1151 return 0; 1152 1153 fail4: 1154 pci_release_region(efx->pci_dev, bar); 1155 fail3: 1156 efx->membase_phys = 0; 1157 fail2: 1158 pci_disable_device(efx->pci_dev); 1159 fail1: 1160 return rc; 1161 } 1162 1163 void efx_fini_io(struct efx_nic *efx) 1164 { 1165 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1166 1167 if (efx->membase) { 1168 iounmap(efx->membase); 1169 efx->membase = NULL; 1170 } 1171 1172 if (efx->membase_phys) { 1173 pci_release_region(efx->pci_dev, efx->mem_bar); 1174 efx->membase_phys = 0; 1175 efx->mem_bar = UINT_MAX; 1176 } 1177 1178 /* Don't disable bus-mastering if VFs are assigned */ 1179 if (!pci_vfs_assigned(efx->pci_dev)) 1180 pci_disable_device(efx->pci_dev); 1181 } 1182 1183 #ifdef CONFIG_SFC_MCDI_LOGGING 1184 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr, 1185 char *buf) 1186 { 1187 struct efx_nic *efx = dev_get_drvdata(dev); 1188 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1189 1190 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled); 1191 } 1192 1193 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr, 1194 const char *buf, size_t count) 1195 { 1196 struct efx_nic *efx = dev_get_drvdata(dev); 1197 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1198 bool enable = count > 0 && *buf != '0'; 1199 1200 mcdi->logging_enabled = enable; 1201 return count; 1202 } 1203 1204 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log); 1205 1206 void efx_init_mcdi_logging(struct efx_nic *efx) 1207 { 1208 int rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 1209 1210 if (rc) { 1211 netif_warn(efx, drv, efx->net_dev, 1212 "failed to init net dev attributes\n"); 1213 } 1214 } 1215 1216 void efx_fini_mcdi_logging(struct efx_nic *efx) 1217 { 1218 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 1219 } 1220 #endif 1221 1222 /* A PCI error affecting this device was detected. 1223 * At this point MMIO and DMA may be disabled. 1224 * Stop the software path and request a slot reset. 1225 */ 1226 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 1227 enum pci_channel_state state) 1228 { 1229 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 1230 struct efx_nic *efx = pci_get_drvdata(pdev); 1231 1232 if (state == pci_channel_io_perm_failure) 1233 return PCI_ERS_RESULT_DISCONNECT; 1234 1235 rtnl_lock(); 1236 1237 if (efx->state != STATE_DISABLED) { 1238 efx->state = STATE_RECOVERY; 1239 efx->reset_pending = 0; 1240 1241 efx_device_detach_sync(efx); 1242 1243 efx_stop_all(efx); 1244 efx_disable_interrupts(efx); 1245 1246 status = PCI_ERS_RESULT_NEED_RESET; 1247 } else { 1248 /* If the interface is disabled we don't want to do anything 1249 * with it. 1250 */ 1251 status = PCI_ERS_RESULT_RECOVERED; 1252 } 1253 1254 rtnl_unlock(); 1255 1256 pci_disable_device(pdev); 1257 1258 return status; 1259 } 1260 1261 /* Fake a successful reset, which will be performed later in efx_io_resume. */ 1262 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 1263 { 1264 struct efx_nic *efx = pci_get_drvdata(pdev); 1265 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 1266 1267 if (pci_enable_device(pdev)) { 1268 netif_err(efx, hw, efx->net_dev, 1269 "Cannot re-enable PCI device after reset.\n"); 1270 status = PCI_ERS_RESULT_DISCONNECT; 1271 } 1272 1273 return status; 1274 } 1275 1276 /* Perform the actual reset and resume I/O operations. */ 1277 static void efx_io_resume(struct pci_dev *pdev) 1278 { 1279 struct efx_nic *efx = pci_get_drvdata(pdev); 1280 int rc; 1281 1282 rtnl_lock(); 1283 1284 if (efx->state == STATE_DISABLED) 1285 goto out; 1286 1287 rc = efx_reset(efx, RESET_TYPE_ALL); 1288 if (rc) { 1289 netif_err(efx, hw, efx->net_dev, 1290 "efx_reset failed after PCI error (%d)\n", rc); 1291 } else { 1292 efx->state = STATE_READY; 1293 netif_dbg(efx, hw, efx->net_dev, 1294 "Done resetting and resuming IO after PCI error.\n"); 1295 } 1296 1297 out: 1298 rtnl_unlock(); 1299 } 1300 1301 /* For simplicity and reliability, we always require a slot reset and try to 1302 * reset the hardware when a pci error affecting the device is detected. 1303 * We leave both the link_reset and mmio_enabled callback unimplemented: 1304 * with our request for slot reset the mmio_enabled callback will never be 1305 * called, and the link_reset callback is not used by AER or EEH mechanisms. 1306 */ 1307 const struct pci_error_handlers efx_err_handlers = { 1308 .error_detected = efx_io_error_detected, 1309 .slot_reset = efx_io_slot_reset, 1310 .resume = efx_io_resume, 1311 }; 1312 1313 int efx_get_phys_port_id(struct net_device *net_dev, 1314 struct netdev_phys_item_id *ppid) 1315 { 1316 struct efx_nic *efx = netdev_priv(net_dev); 1317 1318 if (efx->type->get_phys_port_id) 1319 return efx->type->get_phys_port_id(efx, ppid); 1320 else 1321 return -EOPNOTSUPP; 1322 } 1323 1324 int efx_get_phys_port_name(struct net_device *net_dev, char *name, size_t len) 1325 { 1326 struct efx_nic *efx = netdev_priv(net_dev); 1327 1328 if (snprintf(name, len, "p%u", efx->port_num) >= len) 1329 return -EINVAL; 1330 return 0; 1331 } 1332