1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2 /* 3 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 4 * Copyright (c) 2014, I2SE GmbH 5 */ 6 7 /* This module implements the Qualcomm Atheros SPI protocol for 8 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 9 * serial converter; 10 */ 11 12 #include <linux/errno.h> 13 #include <linux/etherdevice.h> 14 #include <linux/if_arp.h> 15 #include <linux/if_ether.h> 16 #include <linux/init.h> 17 #include <linux/interrupt.h> 18 #include <linux/jiffies.h> 19 #include <linux/kernel.h> 20 #include <linux/kthread.h> 21 #include <linux/module.h> 22 #include <linux/moduleparam.h> 23 #include <linux/netdevice.h> 24 #include <linux/of.h> 25 #include <linux/of_net.h> 26 #include <linux/sched.h> 27 #include <linux/skbuff.h> 28 #include <linux/spi/spi.h> 29 #include <linux/types.h> 30 31 #include "qca_7k.h" 32 #include "qca_7k_common.h" 33 #include "qca_debug.h" 34 #include "qca_spi.h" 35 36 #define MAX_DMA_BURST_LEN 5000 37 38 #define SPI_INTR 0 39 40 /* Modules parameters */ 41 #define QCASPI_CLK_SPEED_MIN 1000000 42 #define QCASPI_CLK_SPEED_MAX 16000000 43 #define QCASPI_CLK_SPEED 8000000 44 static int qcaspi_clkspeed; 45 module_param(qcaspi_clkspeed, int, 0); 46 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 47 48 #define QCASPI_BURST_LEN_MIN 1 49 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 50 static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 51 module_param(qcaspi_burst_len, int, 0); 52 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 53 54 #define QCASPI_PLUGGABLE_MIN 0 55 #define QCASPI_PLUGGABLE_MAX 1 56 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 57 module_param(qcaspi_pluggable, int, 0); 58 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 59 60 #define QCASPI_WRITE_VERIFY_MIN 0 61 #define QCASPI_WRITE_VERIFY_MAX 3 62 static int wr_verify = QCASPI_WRITE_VERIFY_MIN; 63 module_param(wr_verify, int, 0); 64 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3."); 65 66 #define QCASPI_TX_TIMEOUT (1 * HZ) 67 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000 68 69 static void 70 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 71 { 72 *intr_cause = 0; 73 74 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 75 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 76 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 77 } 78 79 static void 80 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 81 { 82 u16 intr_enable = (SPI_INT_CPU_ON | 83 SPI_INT_PKT_AVLBL | 84 SPI_INT_RDBUF_ERR | 85 SPI_INT_WRBUF_ERR); 86 87 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0); 88 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify); 89 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 90 } 91 92 static u32 93 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 94 { 95 __be16 cmd; 96 struct spi_message msg; 97 struct spi_transfer transfer[2]; 98 int ret; 99 100 memset(&transfer, 0, sizeof(transfer)); 101 spi_message_init(&msg); 102 103 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 104 transfer[0].tx_buf = &cmd; 105 transfer[0].len = QCASPI_CMD_LEN; 106 transfer[1].tx_buf = src; 107 transfer[1].len = len; 108 109 spi_message_add_tail(&transfer[0], &msg); 110 spi_message_add_tail(&transfer[1], &msg); 111 ret = spi_sync(qca->spi_dev, &msg); 112 113 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 114 qcaspi_spi_error(qca); 115 return 0; 116 } 117 118 return len; 119 } 120 121 static u32 122 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 123 { 124 struct spi_message msg; 125 struct spi_transfer transfer; 126 int ret; 127 128 memset(&transfer, 0, sizeof(transfer)); 129 spi_message_init(&msg); 130 131 transfer.tx_buf = src; 132 transfer.len = len; 133 134 spi_message_add_tail(&transfer, &msg); 135 ret = spi_sync(qca->spi_dev, &msg); 136 137 if (ret || (msg.actual_length != len)) { 138 qcaspi_spi_error(qca); 139 return 0; 140 } 141 142 return len; 143 } 144 145 static u32 146 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 147 { 148 struct spi_message msg; 149 __be16 cmd; 150 struct spi_transfer transfer[2]; 151 int ret; 152 153 memset(&transfer, 0, sizeof(transfer)); 154 spi_message_init(&msg); 155 156 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 157 transfer[0].tx_buf = &cmd; 158 transfer[0].len = QCASPI_CMD_LEN; 159 transfer[1].rx_buf = dst; 160 transfer[1].len = len; 161 162 spi_message_add_tail(&transfer[0], &msg); 163 spi_message_add_tail(&transfer[1], &msg); 164 ret = spi_sync(qca->spi_dev, &msg); 165 166 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 167 qcaspi_spi_error(qca); 168 return 0; 169 } 170 171 return len; 172 } 173 174 static u32 175 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 176 { 177 struct spi_message msg; 178 struct spi_transfer transfer; 179 int ret; 180 181 memset(&transfer, 0, sizeof(transfer)); 182 spi_message_init(&msg); 183 184 transfer.rx_buf = dst; 185 transfer.len = len; 186 187 spi_message_add_tail(&transfer, &msg); 188 ret = spi_sync(qca->spi_dev, &msg); 189 190 if (ret || (msg.actual_length != len)) { 191 qcaspi_spi_error(qca); 192 return 0; 193 } 194 195 return len; 196 } 197 198 static int 199 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 200 { 201 __be16 tx_data; 202 struct spi_message msg; 203 struct spi_transfer transfer; 204 int ret; 205 206 memset(&transfer, 0, sizeof(transfer)); 207 208 spi_message_init(&msg); 209 210 tx_data = cpu_to_be16(cmd); 211 transfer.len = sizeof(cmd); 212 transfer.tx_buf = &tx_data; 213 spi_message_add_tail(&transfer, &msg); 214 215 ret = spi_sync(qca->spi_dev, &msg); 216 217 if (!ret) 218 ret = msg.status; 219 220 if (ret) 221 qcaspi_spi_error(qca); 222 223 return ret; 224 } 225 226 static int 227 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 228 { 229 u32 count; 230 u32 written; 231 u32 offset; 232 u32 len; 233 234 len = skb->len; 235 236 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify); 237 if (qca->legacy_mode) 238 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 239 240 offset = 0; 241 while (len) { 242 count = len; 243 if (count > qca->burst_len) 244 count = qca->burst_len; 245 246 if (qca->legacy_mode) { 247 written = qcaspi_write_legacy(qca, 248 skb->data + offset, 249 count); 250 } else { 251 written = qcaspi_write_burst(qca, 252 skb->data + offset, 253 count); 254 } 255 256 if (written != count) 257 return -1; 258 259 offset += count; 260 len -= count; 261 } 262 263 return 0; 264 } 265 266 static int 267 qcaspi_transmit(struct qcaspi *qca) 268 { 269 struct net_device_stats *n_stats = &qca->net_dev->stats; 270 u16 available = 0; 271 u32 pkt_len; 272 u16 new_head; 273 u16 packets = 0; 274 275 if (qca->txr.skb[qca->txr.head] == NULL) 276 return 0; 277 278 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 279 280 if (available > QCASPI_HW_BUF_LEN) { 281 /* This could only happen by interferences on the SPI line. 282 * So retry later ... 283 */ 284 qca->stats.buf_avail_err++; 285 return -1; 286 } 287 288 while (qca->txr.skb[qca->txr.head]) { 289 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 290 291 if (available < pkt_len) { 292 if (packets == 0) 293 qca->stats.write_buf_miss++; 294 break; 295 } 296 297 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 298 qca->stats.write_err++; 299 return -1; 300 } 301 302 packets++; 303 n_stats->tx_packets++; 304 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 305 available -= pkt_len; 306 307 /* remove the skb from the queue */ 308 /* XXX After inconsistent lock states netif_tx_lock() 309 * has been replaced by netif_tx_lock_bh() and so on. 310 */ 311 netif_tx_lock_bh(qca->net_dev); 312 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 313 qca->txr.skb[qca->txr.head] = NULL; 314 qca->txr.size -= pkt_len; 315 new_head = qca->txr.head + 1; 316 if (new_head >= qca->txr.count) 317 new_head = 0; 318 qca->txr.head = new_head; 319 if (netif_queue_stopped(qca->net_dev)) 320 netif_wake_queue(qca->net_dev); 321 netif_tx_unlock_bh(qca->net_dev); 322 } 323 324 return 0; 325 } 326 327 static int 328 qcaspi_receive(struct qcaspi *qca) 329 { 330 struct net_device *net_dev = qca->net_dev; 331 struct net_device_stats *n_stats = &net_dev->stats; 332 u16 available = 0; 333 u32 bytes_read; 334 u8 *cp; 335 336 /* Allocate rx SKB if we don't have one available. */ 337 if (!qca->rx_skb) { 338 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 339 net_dev->mtu + 340 VLAN_ETH_HLEN); 341 if (!qca->rx_skb) { 342 netdev_dbg(net_dev, "out of RX resources\n"); 343 qca->stats.out_of_mem++; 344 return -1; 345 } 346 } 347 348 /* Read the packet size. */ 349 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 350 351 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %04x\n", 352 available); 353 354 if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) { 355 /* This could only happen by interferences on the SPI line. 356 * So retry later ... 357 */ 358 qca->stats.buf_avail_err++; 359 return -1; 360 } else if (available == 0) { 361 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 362 return -1; 363 } 364 365 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify); 366 367 if (qca->legacy_mode) 368 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 369 370 while (available) { 371 u32 count = available; 372 373 if (count > qca->burst_len) 374 count = qca->burst_len; 375 376 if (qca->legacy_mode) { 377 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 378 count); 379 } else { 380 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 381 count); 382 } 383 384 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 385 available, bytes_read); 386 387 if (bytes_read) { 388 available -= bytes_read; 389 } else { 390 qca->stats.read_err++; 391 return -1; 392 } 393 394 cp = qca->rx_buffer; 395 396 while ((bytes_read--) && (qca->rx_skb)) { 397 s32 retcode; 398 399 retcode = qcafrm_fsm_decode(&qca->frm_handle, 400 qca->rx_skb->data, 401 skb_tailroom(qca->rx_skb), 402 *cp); 403 cp++; 404 switch (retcode) { 405 case QCAFRM_GATHER: 406 case QCAFRM_NOHEAD: 407 break; 408 case QCAFRM_NOTAIL: 409 netdev_dbg(net_dev, "no RX tail\n"); 410 n_stats->rx_errors++; 411 n_stats->rx_dropped++; 412 break; 413 case QCAFRM_INVLEN: 414 netdev_dbg(net_dev, "invalid RX length\n"); 415 n_stats->rx_errors++; 416 n_stats->rx_dropped++; 417 break; 418 default: 419 qca->rx_skb->dev = qca->net_dev; 420 n_stats->rx_packets++; 421 n_stats->rx_bytes += retcode; 422 skb_put(qca->rx_skb, retcode); 423 qca->rx_skb->protocol = eth_type_trans( 424 qca->rx_skb, qca->rx_skb->dev); 425 skb_checksum_none_assert(qca->rx_skb); 426 netif_rx(qca->rx_skb); 427 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 428 net_dev->mtu + VLAN_ETH_HLEN); 429 if (!qca->rx_skb) { 430 netdev_dbg(net_dev, "out of RX resources\n"); 431 n_stats->rx_errors++; 432 qca->stats.out_of_mem++; 433 break; 434 } 435 } 436 } 437 } 438 439 return 0; 440 } 441 442 /* Check that tx ring stores only so much bytes 443 * that fit into the internal QCA buffer. 444 */ 445 446 static int 447 qcaspi_tx_ring_has_space(struct tx_ring *txr) 448 { 449 if (txr->skb[txr->tail]) 450 return 0; 451 452 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 453 } 454 455 /* Flush the tx ring. This function is only safe to 456 * call from the qcaspi_spi_thread. 457 */ 458 459 static void 460 qcaspi_flush_tx_ring(struct qcaspi *qca) 461 { 462 int i; 463 464 /* XXX After inconsistent lock states netif_tx_lock() 465 * has been replaced by netif_tx_lock_bh() and so on. 466 */ 467 netif_tx_lock_bh(qca->net_dev); 468 for (i = 0; i < QCASPI_TX_RING_MAX_LEN; i++) { 469 if (qca->txr.skb[i]) { 470 dev_kfree_skb(qca->txr.skb[i]); 471 qca->txr.skb[i] = NULL; 472 qca->net_dev->stats.tx_dropped++; 473 } 474 } 475 qca->txr.tail = 0; 476 qca->txr.head = 0; 477 qca->txr.size = 0; 478 netif_tx_unlock_bh(qca->net_dev); 479 } 480 481 static void 482 qcaspi_qca7k_sync(struct qcaspi *qca, int event) 483 { 484 u16 signature = 0; 485 u16 spi_config; 486 u16 wrbuf_space = 0; 487 488 if (event == QCASPI_EVENT_CPUON) { 489 /* Read signature twice, if not valid 490 * go back to unknown state. 491 */ 492 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 493 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 494 if (signature != QCASPI_GOOD_SIGNATURE) { 495 if (qca->sync == QCASPI_SYNC_READY) 496 qca->stats.bad_signature++; 497 498 qca->sync = QCASPI_SYNC_UNKNOWN; 499 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 500 return; 501 } else { 502 /* ensure that the WRBUF is empty */ 503 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 504 &wrbuf_space); 505 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 506 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 507 qca->sync = QCASPI_SYNC_UNKNOWN; 508 } else { 509 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 510 qca->sync = QCASPI_SYNC_READY; 511 return; 512 } 513 } 514 } 515 516 switch (qca->sync) { 517 case QCASPI_SYNC_READY: 518 /* Check signature twice, if not valid go to unknown state. */ 519 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 520 if (signature != QCASPI_GOOD_SIGNATURE) 521 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 522 523 if (signature != QCASPI_GOOD_SIGNATURE) { 524 qca->sync = QCASPI_SYNC_UNKNOWN; 525 qca->stats.bad_signature++; 526 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 527 /* don't reset right away */ 528 return; 529 } 530 break; 531 case QCASPI_SYNC_UNKNOWN: 532 /* Read signature, if not valid stay in unknown state */ 533 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 534 if (signature != QCASPI_GOOD_SIGNATURE) { 535 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 536 return; 537 } 538 539 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 540 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 541 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 542 spi_config |= QCASPI_SLAVE_RESET_BIT; 543 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0); 544 545 qca->sync = QCASPI_SYNC_RESET; 546 qca->stats.trig_reset++; 547 qca->reset_count = 0; 548 break; 549 case QCASPI_SYNC_RESET: 550 qca->reset_count++; 551 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 552 qca->reset_count); 553 if (qca->reset_count >= QCASPI_RESET_TIMEOUT) { 554 /* reset did not seem to take place, try again */ 555 qca->sync = QCASPI_SYNC_UNKNOWN; 556 qca->stats.reset_timeout++; 557 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 558 } 559 break; 560 } 561 } 562 563 static int 564 qcaspi_spi_thread(void *data) 565 { 566 struct qcaspi *qca = data; 567 u16 intr_cause = 0; 568 569 netdev_info(qca->net_dev, "SPI thread created\n"); 570 while (!kthread_should_stop()) { 571 set_current_state(TASK_INTERRUPTIBLE); 572 if (kthread_should_park()) { 573 netif_tx_disable(qca->net_dev); 574 netif_carrier_off(qca->net_dev); 575 qcaspi_flush_tx_ring(qca); 576 kthread_parkme(); 577 if (qca->sync == QCASPI_SYNC_READY) { 578 netif_carrier_on(qca->net_dev); 579 netif_wake_queue(qca->net_dev); 580 } 581 continue; 582 } 583 584 if (!test_bit(SPI_INTR, &qca->intr) && 585 !qca->txr.skb[qca->txr.head]) 586 schedule(); 587 588 set_current_state(TASK_RUNNING); 589 590 netdev_dbg(qca->net_dev, "have work to do. int: %lu, tx_skb: %p\n", 591 qca->intr, 592 qca->txr.skb[qca->txr.head]); 593 594 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 595 596 if (qca->sync != QCASPI_SYNC_READY) { 597 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 598 (unsigned int)qca->sync); 599 netif_stop_queue(qca->net_dev); 600 netif_carrier_off(qca->net_dev); 601 qcaspi_flush_tx_ring(qca); 602 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 603 } 604 605 if (test_and_clear_bit(SPI_INTR, &qca->intr)) { 606 start_spi_intr_handling(qca, &intr_cause); 607 608 if (intr_cause & SPI_INT_CPU_ON) { 609 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 610 611 /* Frame decoding in progress */ 612 if (qca->frm_handle.state != qca->frm_handle.init) 613 qca->net_dev->stats.rx_dropped++; 614 615 qcafrm_fsm_init_spi(&qca->frm_handle); 616 qca->stats.device_reset++; 617 618 /* not synced. */ 619 if (qca->sync != QCASPI_SYNC_READY) 620 continue; 621 622 netif_wake_queue(qca->net_dev); 623 netif_carrier_on(qca->net_dev); 624 } 625 626 if (intr_cause & SPI_INT_RDBUF_ERR) { 627 /* restart sync */ 628 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 629 qca->stats.read_buf_err++; 630 qca->sync = QCASPI_SYNC_UNKNOWN; 631 continue; 632 } 633 634 if (intr_cause & SPI_INT_WRBUF_ERR) { 635 /* restart sync */ 636 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 637 qca->stats.write_buf_err++; 638 qca->sync = QCASPI_SYNC_UNKNOWN; 639 continue; 640 } 641 642 /* can only handle other interrupts 643 * if sync has occurred 644 */ 645 if (qca->sync == QCASPI_SYNC_READY) { 646 if (intr_cause & SPI_INT_PKT_AVLBL) 647 qcaspi_receive(qca); 648 } 649 650 end_spi_intr_handling(qca, intr_cause); 651 } 652 653 if (qca->sync == QCASPI_SYNC_READY) 654 qcaspi_transmit(qca); 655 } 656 set_current_state(TASK_RUNNING); 657 netdev_info(qca->net_dev, "SPI thread exit\n"); 658 659 return 0; 660 } 661 662 static irqreturn_t 663 qcaspi_intr_handler(int irq, void *data) 664 { 665 struct qcaspi *qca = data; 666 667 set_bit(SPI_INTR, &qca->intr); 668 if (qca->spi_thread) 669 wake_up_process(qca->spi_thread); 670 671 return IRQ_HANDLED; 672 } 673 674 static int 675 qcaspi_netdev_open(struct net_device *dev) 676 { 677 struct qcaspi *qca = netdev_priv(dev); 678 struct task_struct *thread; 679 680 if (!qca) 681 return -EINVAL; 682 683 set_bit(SPI_INTR, &qca->intr); 684 qca->sync = QCASPI_SYNC_UNKNOWN; 685 qcafrm_fsm_init_spi(&qca->frm_handle); 686 687 thread = kthread_run((void *)qcaspi_spi_thread, 688 qca, "%s", dev->name); 689 690 if (IS_ERR(thread)) { 691 netdev_err(dev, "%s: unable to start kernel thread.\n", 692 QCASPI_DRV_NAME); 693 return PTR_ERR(thread); 694 } 695 696 qca->spi_thread = thread; 697 698 enable_irq(qca->spi_dev->irq); 699 700 /* SPI thread takes care of TX queue */ 701 702 return 0; 703 } 704 705 static int 706 qcaspi_netdev_close(struct net_device *dev) 707 { 708 struct qcaspi *qca = netdev_priv(dev); 709 710 netif_stop_queue(dev); 711 712 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 713 disable_irq(qca->spi_dev->irq); 714 715 if (qca->spi_thread) { 716 kthread_stop(qca->spi_thread); 717 qca->spi_thread = NULL; 718 } 719 qcaspi_flush_tx_ring(qca); 720 721 return 0; 722 } 723 724 static netdev_tx_t 725 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 726 { 727 u32 frame_len; 728 u8 *ptmp; 729 struct qcaspi *qca = netdev_priv(dev); 730 u16 new_tail; 731 struct sk_buff *tskb; 732 u8 pad_len = 0; 733 734 if (skb->len < QCAFRM_MIN_LEN) 735 pad_len = QCAFRM_MIN_LEN - skb->len; 736 737 if (qca->txr.skb[qca->txr.tail]) { 738 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 739 netif_stop_queue(qca->net_dev); 740 qca->stats.ring_full++; 741 return NETDEV_TX_BUSY; 742 } 743 744 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 745 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 746 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 747 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 748 if (!tskb) { 749 qca->stats.out_of_mem++; 750 return NETDEV_TX_BUSY; 751 } 752 dev_kfree_skb(skb); 753 skb = tskb; 754 } 755 756 frame_len = skb->len + pad_len; 757 758 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 759 qcafrm_create_header(ptmp, frame_len); 760 761 if (pad_len) { 762 ptmp = skb_put_zero(skb, pad_len); 763 } 764 765 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 766 qcafrm_create_footer(ptmp); 767 768 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 769 skb->len); 770 771 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 772 773 new_tail = qca->txr.tail + 1; 774 if (new_tail >= qca->txr.count) 775 new_tail = 0; 776 777 qca->txr.skb[qca->txr.tail] = skb; 778 qca->txr.tail = new_tail; 779 780 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 781 netif_stop_queue(qca->net_dev); 782 qca->stats.ring_full++; 783 } 784 785 netif_trans_update(dev); 786 787 if (qca->spi_thread) 788 wake_up_process(qca->spi_thread); 789 790 return NETDEV_TX_OK; 791 } 792 793 static void 794 qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue) 795 { 796 struct qcaspi *qca = netdev_priv(dev); 797 798 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 799 jiffies, jiffies - dev_trans_start(dev)); 800 qca->net_dev->stats.tx_errors++; 801 /* Trigger tx queue flush and QCA7000 reset */ 802 qca->sync = QCASPI_SYNC_UNKNOWN; 803 804 if (qca->spi_thread) 805 wake_up_process(qca->spi_thread); 806 } 807 808 static int 809 qcaspi_netdev_init(struct net_device *dev) 810 { 811 struct qcaspi *qca = netdev_priv(dev); 812 813 dev->mtu = QCAFRM_MAX_MTU; 814 dev->type = ARPHRD_ETHER; 815 qca->clkspeed = qcaspi_clkspeed; 816 qca->burst_len = qcaspi_burst_len; 817 qca->spi_thread = NULL; 818 qca->buffer_size = (QCAFRM_MAX_MTU + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 819 QCAFRM_FOOTER_LEN + QCASPI_HW_PKT_LEN) * QCASPI_RX_MAX_FRAMES; 820 821 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 822 823 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 824 if (!qca->rx_buffer) 825 return -ENOBUFS; 826 827 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 828 VLAN_ETH_HLEN); 829 if (!qca->rx_skb) { 830 kfree(qca->rx_buffer); 831 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 832 return -ENOBUFS; 833 } 834 835 return 0; 836 } 837 838 static void 839 qcaspi_netdev_uninit(struct net_device *dev) 840 { 841 struct qcaspi *qca = netdev_priv(dev); 842 843 kfree(qca->rx_buffer); 844 qca->buffer_size = 0; 845 dev_kfree_skb(qca->rx_skb); 846 } 847 848 static const struct net_device_ops qcaspi_netdev_ops = { 849 .ndo_init = qcaspi_netdev_init, 850 .ndo_uninit = qcaspi_netdev_uninit, 851 .ndo_open = qcaspi_netdev_open, 852 .ndo_stop = qcaspi_netdev_close, 853 .ndo_start_xmit = qcaspi_netdev_xmit, 854 .ndo_set_mac_address = eth_mac_addr, 855 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 856 .ndo_validate_addr = eth_validate_addr, 857 }; 858 859 static void 860 qcaspi_netdev_setup(struct net_device *dev) 861 { 862 struct qcaspi *qca = NULL; 863 864 dev->netdev_ops = &qcaspi_netdev_ops; 865 qcaspi_set_ethtool_ops(dev); 866 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 867 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 868 dev->needed_tailroom = ALIGN(QCAFRM_FOOTER_LEN + QCAFRM_MIN_LEN, 4); 869 dev->needed_headroom = ALIGN(QCAFRM_HEADER_LEN, 4); 870 dev->tx_queue_len = 100; 871 872 /* MTU range: 46 - 1500 */ 873 dev->min_mtu = QCAFRM_MIN_MTU; 874 dev->max_mtu = QCAFRM_MAX_MTU; 875 876 qca = netdev_priv(dev); 877 memset(qca, 0, sizeof(struct qcaspi)); 878 879 memset(&qca->txr, 0, sizeof(qca->txr)); 880 qca->txr.count = QCASPI_TX_RING_MAX_LEN; 881 } 882 883 static const struct of_device_id qca_spi_of_match[] = { 884 { .compatible = "qca,qca7000" }, 885 { /* sentinel */ } 886 }; 887 MODULE_DEVICE_TABLE(of, qca_spi_of_match); 888 889 static int 890 qca_spi_probe(struct spi_device *spi) 891 { 892 struct qcaspi *qca = NULL; 893 struct net_device *qcaspi_devs = NULL; 894 u8 legacy_mode = 0; 895 u16 signature; 896 int ret; 897 898 if (!spi->dev.of_node) { 899 dev_err(&spi->dev, "Missing device tree\n"); 900 return -EINVAL; 901 } 902 903 legacy_mode = of_property_read_bool(spi->dev.of_node, 904 "qca,legacy-mode"); 905 906 if (qcaspi_clkspeed == 0) { 907 if (spi->max_speed_hz) 908 qcaspi_clkspeed = spi->max_speed_hz; 909 else 910 qcaspi_clkspeed = QCASPI_CLK_SPEED; 911 } 912 913 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 914 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 915 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 916 qcaspi_clkspeed); 917 return -EINVAL; 918 } 919 920 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 921 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 922 dev_err(&spi->dev, "Invalid burst len: %d\n", 923 qcaspi_burst_len); 924 return -EINVAL; 925 } 926 927 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 928 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 929 dev_err(&spi->dev, "Invalid pluggable: %d\n", 930 qcaspi_pluggable); 931 return -EINVAL; 932 } 933 934 if (wr_verify < QCASPI_WRITE_VERIFY_MIN || 935 wr_verify > QCASPI_WRITE_VERIFY_MAX) { 936 dev_err(&spi->dev, "Invalid write verify: %d\n", 937 wr_verify); 938 return -EINVAL; 939 } 940 941 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 942 QCASPI_DRV_VERSION, 943 qcaspi_clkspeed, 944 qcaspi_burst_len, 945 qcaspi_pluggable); 946 947 spi->mode = SPI_MODE_3; 948 spi->max_speed_hz = qcaspi_clkspeed; 949 if (spi_setup(spi) < 0) { 950 dev_err(&spi->dev, "Unable to setup SPI device\n"); 951 return -EFAULT; 952 } 953 954 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 955 if (!qcaspi_devs) 956 return -ENOMEM; 957 958 qcaspi_netdev_setup(qcaspi_devs); 959 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 960 961 qca = netdev_priv(qcaspi_devs); 962 if (!qca) { 963 free_netdev(qcaspi_devs); 964 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 965 return -ENOMEM; 966 } 967 qca->net_dev = qcaspi_devs; 968 qca->spi_dev = spi; 969 qca->legacy_mode = legacy_mode; 970 971 spi_set_drvdata(spi, qcaspi_devs); 972 973 ret = devm_request_irq(&spi->dev, spi->irq, qcaspi_intr_handler, 974 IRQF_NO_AUTOEN, qca->net_dev->name, qca); 975 if (ret) { 976 dev_err(&spi->dev, "Unable to get IRQ %d (irqval=%d).\n", 977 spi->irq, ret); 978 free_netdev(qcaspi_devs); 979 return ret; 980 } 981 982 ret = of_get_ethdev_address(spi->dev.of_node, qca->net_dev); 983 if (ret) { 984 eth_hw_addr_random(qca->net_dev); 985 dev_info(&spi->dev, "Using random MAC address: %pM\n", 986 qca->net_dev->dev_addr); 987 } 988 989 netif_carrier_off(qca->net_dev); 990 991 if (!qcaspi_pluggable) { 992 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 993 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 994 995 if (signature != QCASPI_GOOD_SIGNATURE) { 996 dev_err(&spi->dev, "Invalid signature (expected 0x%04x, read 0x%04x)\n", 997 QCASPI_GOOD_SIGNATURE, signature); 998 free_netdev(qcaspi_devs); 999 return -EFAULT; 1000 } 1001 } 1002 1003 if (register_netdev(qcaspi_devs)) { 1004 dev_err(&spi->dev, "Unable to register net device %s\n", 1005 qcaspi_devs->name); 1006 free_netdev(qcaspi_devs); 1007 return -EFAULT; 1008 } 1009 1010 qcaspi_init_device_debugfs(qca); 1011 1012 return 0; 1013 } 1014 1015 static void 1016 qca_spi_remove(struct spi_device *spi) 1017 { 1018 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 1019 struct qcaspi *qca = netdev_priv(qcaspi_devs); 1020 1021 qcaspi_remove_device_debugfs(qca); 1022 1023 unregister_netdev(qcaspi_devs); 1024 free_netdev(qcaspi_devs); 1025 } 1026 1027 static const struct spi_device_id qca_spi_id[] = { 1028 { "qca7000", 0 }, 1029 { /* sentinel */ } 1030 }; 1031 MODULE_DEVICE_TABLE(spi, qca_spi_id); 1032 1033 static struct spi_driver qca_spi_driver = { 1034 .driver = { 1035 .name = QCASPI_DRV_NAME, 1036 .of_match_table = qca_spi_of_match, 1037 }, 1038 .id_table = qca_spi_id, 1039 .probe = qca_spi_probe, 1040 .remove = qca_spi_remove, 1041 }; 1042 module_spi_driver(qca_spi_driver); 1043 1044 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1045 MODULE_AUTHOR("Qualcomm Atheros Communications"); 1046 MODULE_AUTHOR("Stefan Wahren <wahrenst@gmx.net>"); 1047 MODULE_LICENSE("Dual BSD/GPL"); 1048 MODULE_VERSION(QCASPI_DRV_VERSION); 1049