1 /* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25 #include <linux/errno.h> 26 #include <linux/etherdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/jiffies.h> 32 #include <linux/kernel.h> 33 #include <linux/kthread.h> 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/netdevice.h> 37 #include <linux/of.h> 38 #include <linux/of_device.h> 39 #include <linux/of_net.h> 40 #include <linux/sched.h> 41 #include <linux/skbuff.h> 42 #include <linux/spi/spi.h> 43 #include <linux/types.h> 44 45 #include "qca_7k.h" 46 #include "qca_7k_common.h" 47 #include "qca_debug.h" 48 #include "qca_spi.h" 49 50 #define MAX_DMA_BURST_LEN 5000 51 52 /* Modules parameters */ 53 #define QCASPI_CLK_SPEED_MIN 1000000 54 #define QCASPI_CLK_SPEED_MAX 16000000 55 #define QCASPI_CLK_SPEED 8000000 56 static int qcaspi_clkspeed; 57 module_param(qcaspi_clkspeed, int, 0); 58 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 59 60 #define QCASPI_BURST_LEN_MIN 1 61 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 62 static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 63 module_param(qcaspi_burst_len, int, 0); 64 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 65 66 #define QCASPI_PLUGGABLE_MIN 0 67 #define QCASPI_PLUGGABLE_MAX 1 68 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 69 module_param(qcaspi_pluggable, int, 0); 70 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 71 72 #define QCASPI_TX_TIMEOUT (1 * HZ) 73 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000 74 75 static void 76 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 77 { 78 *intr_cause = 0; 79 80 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0); 81 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 82 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 83 } 84 85 static void 86 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 87 { 88 u16 intr_enable = (SPI_INT_CPU_ON | 89 SPI_INT_PKT_AVLBL | 90 SPI_INT_RDBUF_ERR | 91 SPI_INT_WRBUF_ERR); 92 93 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 94 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable); 95 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 96 } 97 98 static u32 99 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 100 { 101 __be16 cmd; 102 struct spi_message *msg = &qca->spi_msg2; 103 struct spi_transfer *transfer = &qca->spi_xfer2[0]; 104 int ret; 105 106 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 107 transfer->tx_buf = &cmd; 108 transfer->rx_buf = NULL; 109 transfer->len = QCASPI_CMD_LEN; 110 transfer = &qca->spi_xfer2[1]; 111 transfer->tx_buf = src; 112 transfer->rx_buf = NULL; 113 transfer->len = len; 114 115 ret = spi_sync(qca->spi_dev, msg); 116 117 if (ret || (msg->actual_length != QCASPI_CMD_LEN + len)) { 118 qcaspi_spi_error(qca); 119 return 0; 120 } 121 122 return len; 123 } 124 125 static u32 126 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 127 { 128 struct spi_message *msg = &qca->spi_msg1; 129 struct spi_transfer *transfer = &qca->spi_xfer1; 130 int ret; 131 132 transfer->tx_buf = src; 133 transfer->rx_buf = NULL; 134 transfer->len = len; 135 136 ret = spi_sync(qca->spi_dev, msg); 137 138 if (ret || (msg->actual_length != len)) { 139 qcaspi_spi_error(qca); 140 return 0; 141 } 142 143 return len; 144 } 145 146 static u32 147 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 148 { 149 struct spi_message *msg = &qca->spi_msg2; 150 __be16 cmd; 151 struct spi_transfer *transfer = &qca->spi_xfer2[0]; 152 int ret; 153 154 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 155 transfer->tx_buf = &cmd; 156 transfer->rx_buf = NULL; 157 transfer->len = QCASPI_CMD_LEN; 158 transfer = &qca->spi_xfer2[1]; 159 transfer->tx_buf = NULL; 160 transfer->rx_buf = dst; 161 transfer->len = len; 162 163 ret = spi_sync(qca->spi_dev, msg); 164 165 if (ret || (msg->actual_length != QCASPI_CMD_LEN + len)) { 166 qcaspi_spi_error(qca); 167 return 0; 168 } 169 170 return len; 171 } 172 173 static u32 174 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 175 { 176 struct spi_message *msg = &qca->spi_msg1; 177 struct spi_transfer *transfer = &qca->spi_xfer1; 178 int ret; 179 180 transfer->tx_buf = NULL; 181 transfer->rx_buf = dst; 182 transfer->len = len; 183 184 ret = spi_sync(qca->spi_dev, msg); 185 186 if (ret || (msg->actual_length != len)) { 187 qcaspi_spi_error(qca); 188 return 0; 189 } 190 191 return len; 192 } 193 194 static int 195 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 196 { 197 __be16 tx_data; 198 struct spi_message *msg = &qca->spi_msg1; 199 struct spi_transfer *transfer = &qca->spi_xfer1; 200 int ret; 201 202 tx_data = cpu_to_be16(cmd); 203 transfer->len = sizeof(tx_data); 204 transfer->tx_buf = &tx_data; 205 transfer->rx_buf = NULL; 206 207 ret = spi_sync(qca->spi_dev, msg); 208 209 if (!ret) 210 ret = msg->status; 211 212 if (ret) 213 qcaspi_spi_error(qca); 214 215 return ret; 216 } 217 218 static int 219 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 220 { 221 u32 count; 222 u32 written; 223 u32 offset; 224 u32 len; 225 226 len = skb->len; 227 228 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len); 229 if (qca->legacy_mode) 230 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 231 232 offset = 0; 233 while (len) { 234 count = len; 235 if (count > qca->burst_len) 236 count = qca->burst_len; 237 238 if (qca->legacy_mode) { 239 written = qcaspi_write_legacy(qca, 240 skb->data + offset, 241 count); 242 } else { 243 written = qcaspi_write_burst(qca, 244 skb->data + offset, 245 count); 246 } 247 248 if (written != count) 249 return -1; 250 251 offset += count; 252 len -= count; 253 } 254 255 return 0; 256 } 257 258 static int 259 qcaspi_transmit(struct qcaspi *qca) 260 { 261 struct net_device_stats *n_stats = &qca->net_dev->stats; 262 u16 available = 0; 263 u32 pkt_len; 264 u16 new_head; 265 u16 packets = 0; 266 267 if (qca->txr.skb[qca->txr.head] == NULL) 268 return 0; 269 270 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 271 272 while (qca->txr.skb[qca->txr.head]) { 273 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 274 275 if (available < pkt_len) { 276 if (packets == 0) 277 qca->stats.write_buf_miss++; 278 break; 279 } 280 281 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 282 qca->stats.write_err++; 283 return -1; 284 } 285 286 packets++; 287 n_stats->tx_packets++; 288 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 289 available -= pkt_len; 290 291 /* remove the skb from the queue */ 292 /* XXX After inconsistent lock states netif_tx_lock() 293 * has been replaced by netif_tx_lock_bh() and so on. 294 */ 295 netif_tx_lock_bh(qca->net_dev); 296 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 297 qca->txr.skb[qca->txr.head] = NULL; 298 qca->txr.size -= pkt_len; 299 new_head = qca->txr.head + 1; 300 if (new_head >= qca->txr.count) 301 new_head = 0; 302 qca->txr.head = new_head; 303 if (netif_queue_stopped(qca->net_dev)) 304 netif_wake_queue(qca->net_dev); 305 netif_tx_unlock_bh(qca->net_dev); 306 } 307 308 return 0; 309 } 310 311 static int 312 qcaspi_receive(struct qcaspi *qca) 313 { 314 struct net_device *net_dev = qca->net_dev; 315 struct net_device_stats *n_stats = &net_dev->stats; 316 u16 available = 0; 317 u32 bytes_read; 318 u8 *cp; 319 320 /* Allocate rx SKB if we don't have one available. */ 321 if (!qca->rx_skb) { 322 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 323 net_dev->mtu + 324 VLAN_ETH_HLEN); 325 if (!qca->rx_skb) { 326 netdev_dbg(net_dev, "out of RX resources\n"); 327 qca->stats.out_of_mem++; 328 return -1; 329 } 330 } 331 332 /* Read the packet size. */ 333 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 334 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 335 available); 336 337 if (available == 0) { 338 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 339 return -1; 340 } 341 342 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available); 343 344 if (qca->legacy_mode) 345 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 346 347 while (available) { 348 u32 count = available; 349 350 if (count > qca->burst_len) 351 count = qca->burst_len; 352 353 if (qca->legacy_mode) { 354 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 355 count); 356 } else { 357 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 358 count); 359 } 360 361 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 362 available, bytes_read); 363 364 if (bytes_read) { 365 available -= bytes_read; 366 } else { 367 qca->stats.read_err++; 368 return -1; 369 } 370 371 cp = qca->rx_buffer; 372 373 while ((bytes_read--) && (qca->rx_skb)) { 374 s32 retcode; 375 376 retcode = qcafrm_fsm_decode(&qca->frm_handle, 377 qca->rx_skb->data, 378 skb_tailroom(qca->rx_skb), 379 *cp); 380 cp++; 381 switch (retcode) { 382 case QCAFRM_GATHER: 383 case QCAFRM_NOHEAD: 384 break; 385 case QCAFRM_NOTAIL: 386 netdev_dbg(net_dev, "no RX tail\n"); 387 n_stats->rx_errors++; 388 n_stats->rx_dropped++; 389 break; 390 case QCAFRM_INVLEN: 391 netdev_dbg(net_dev, "invalid RX length\n"); 392 n_stats->rx_errors++; 393 n_stats->rx_dropped++; 394 break; 395 default: 396 qca->rx_skb->dev = qca->net_dev; 397 n_stats->rx_packets++; 398 n_stats->rx_bytes += retcode; 399 skb_put(qca->rx_skb, retcode); 400 qca->rx_skb->protocol = eth_type_trans( 401 qca->rx_skb, qca->rx_skb->dev); 402 qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY; 403 netif_rx_ni(qca->rx_skb); 404 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 405 net_dev->mtu + VLAN_ETH_HLEN); 406 if (!qca->rx_skb) { 407 netdev_dbg(net_dev, "out of RX resources\n"); 408 n_stats->rx_errors++; 409 qca->stats.out_of_mem++; 410 break; 411 } 412 } 413 } 414 } 415 416 return 0; 417 } 418 419 /* Check that tx ring stores only so much bytes 420 * that fit into the internal QCA buffer. 421 */ 422 423 static int 424 qcaspi_tx_ring_has_space(struct tx_ring *txr) 425 { 426 if (txr->skb[txr->tail]) 427 return 0; 428 429 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 430 } 431 432 /* Flush the tx ring. This function is only safe to 433 * call from the qcaspi_spi_thread. 434 */ 435 436 static void 437 qcaspi_flush_tx_ring(struct qcaspi *qca) 438 { 439 int i; 440 441 /* XXX After inconsistent lock states netif_tx_lock() 442 * has been replaced by netif_tx_lock_bh() and so on. 443 */ 444 netif_tx_lock_bh(qca->net_dev); 445 for (i = 0; i < TX_RING_MAX_LEN; i++) { 446 if (qca->txr.skb[i]) { 447 dev_kfree_skb(qca->txr.skb[i]); 448 qca->txr.skb[i] = NULL; 449 qca->net_dev->stats.tx_dropped++; 450 } 451 } 452 qca->txr.tail = 0; 453 qca->txr.head = 0; 454 qca->txr.size = 0; 455 netif_tx_unlock_bh(qca->net_dev); 456 } 457 458 static void 459 qcaspi_qca7k_sync(struct qcaspi *qca, int event) 460 { 461 u16 signature = 0; 462 u16 spi_config; 463 u16 wrbuf_space = 0; 464 static u16 reset_count; 465 466 if (event == QCASPI_EVENT_CPUON) { 467 /* Read signature twice, if not valid 468 * go back to unknown state. 469 */ 470 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 471 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 472 if (signature != QCASPI_GOOD_SIGNATURE) { 473 qca->sync = QCASPI_SYNC_UNKNOWN; 474 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 475 } else { 476 /* ensure that the WRBUF is empty */ 477 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 478 &wrbuf_space); 479 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 480 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 481 qca->sync = QCASPI_SYNC_UNKNOWN; 482 } else { 483 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 484 qca->sync = QCASPI_SYNC_READY; 485 return; 486 } 487 } 488 } 489 490 switch (qca->sync) { 491 case QCASPI_SYNC_READY: 492 /* Read signature, if not valid go to unknown state. */ 493 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 494 if (signature != QCASPI_GOOD_SIGNATURE) { 495 qca->sync = QCASPI_SYNC_UNKNOWN; 496 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 497 /* don't reset right away */ 498 return; 499 } 500 break; 501 case QCASPI_SYNC_UNKNOWN: 502 /* Read signature, if not valid stay in unknown state */ 503 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 504 if (signature != QCASPI_GOOD_SIGNATURE) { 505 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 506 return; 507 } 508 509 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 510 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 511 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 512 spi_config |= QCASPI_SLAVE_RESET_BIT; 513 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config); 514 515 qca->sync = QCASPI_SYNC_RESET; 516 qca->stats.trig_reset++; 517 reset_count = 0; 518 break; 519 case QCASPI_SYNC_RESET: 520 reset_count++; 521 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 522 reset_count); 523 if (reset_count >= QCASPI_RESET_TIMEOUT) { 524 /* reset did not seem to take place, try again */ 525 qca->sync = QCASPI_SYNC_UNKNOWN; 526 qca->stats.reset_timeout++; 527 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 528 } 529 break; 530 } 531 } 532 533 static int 534 qcaspi_spi_thread(void *data) 535 { 536 struct qcaspi *qca = data; 537 u16 intr_cause = 0; 538 539 netdev_info(qca->net_dev, "SPI thread created\n"); 540 while (!kthread_should_stop()) { 541 set_current_state(TASK_INTERRUPTIBLE); 542 if ((qca->intr_req == qca->intr_svc) && 543 (qca->txr.skb[qca->txr.head] == NULL) && 544 (qca->sync == QCASPI_SYNC_READY)) 545 schedule(); 546 547 set_current_state(TASK_RUNNING); 548 549 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n", 550 qca->intr_req - qca->intr_svc, 551 qca->txr.skb[qca->txr.head]); 552 553 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 554 555 if (qca->sync != QCASPI_SYNC_READY) { 556 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 557 (unsigned int)qca->sync); 558 netif_stop_queue(qca->net_dev); 559 netif_carrier_off(qca->net_dev); 560 qcaspi_flush_tx_ring(qca); 561 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 562 } 563 564 if (qca->intr_svc != qca->intr_req) { 565 qca->intr_svc = qca->intr_req; 566 start_spi_intr_handling(qca, &intr_cause); 567 568 if (intr_cause & SPI_INT_CPU_ON) { 569 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 570 571 /* not synced. */ 572 if (qca->sync != QCASPI_SYNC_READY) 573 continue; 574 575 qca->stats.device_reset++; 576 netif_wake_queue(qca->net_dev); 577 netif_carrier_on(qca->net_dev); 578 } 579 580 if (intr_cause & SPI_INT_RDBUF_ERR) { 581 /* restart sync */ 582 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 583 qca->stats.read_buf_err++; 584 qca->sync = QCASPI_SYNC_UNKNOWN; 585 continue; 586 } 587 588 if (intr_cause & SPI_INT_WRBUF_ERR) { 589 /* restart sync */ 590 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 591 qca->stats.write_buf_err++; 592 qca->sync = QCASPI_SYNC_UNKNOWN; 593 continue; 594 } 595 596 /* can only handle other interrupts 597 * if sync has occurred 598 */ 599 if (qca->sync == QCASPI_SYNC_READY) { 600 if (intr_cause & SPI_INT_PKT_AVLBL) 601 qcaspi_receive(qca); 602 } 603 604 end_spi_intr_handling(qca, intr_cause); 605 } 606 607 if (qca->sync == QCASPI_SYNC_READY) 608 qcaspi_transmit(qca); 609 } 610 set_current_state(TASK_RUNNING); 611 netdev_info(qca->net_dev, "SPI thread exit\n"); 612 613 return 0; 614 } 615 616 static irqreturn_t 617 qcaspi_intr_handler(int irq, void *data) 618 { 619 struct qcaspi *qca = data; 620 621 qca->intr_req++; 622 if (qca->spi_thread && 623 qca->spi_thread->state != TASK_RUNNING) 624 wake_up_process(qca->spi_thread); 625 626 return IRQ_HANDLED; 627 } 628 629 static int 630 qcaspi_netdev_open(struct net_device *dev) 631 { 632 struct qcaspi *qca = netdev_priv(dev); 633 int ret = 0; 634 635 if (!qca) 636 return -EINVAL; 637 638 qca->intr_req = 1; 639 qca->intr_svc = 0; 640 qca->sync = QCASPI_SYNC_UNKNOWN; 641 qcafrm_fsm_init_spi(&qca->frm_handle); 642 643 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 644 qca, "%s", dev->name); 645 646 if (IS_ERR(qca->spi_thread)) { 647 netdev_err(dev, "%s: unable to start kernel thread.\n", 648 QCASPI_DRV_NAME); 649 return PTR_ERR(qca->spi_thread); 650 } 651 652 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 653 dev->name, qca); 654 if (ret) { 655 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 656 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 657 kthread_stop(qca->spi_thread); 658 return ret; 659 } 660 661 /* SPI thread takes care of TX queue */ 662 663 return 0; 664 } 665 666 static int 667 qcaspi_netdev_close(struct net_device *dev) 668 { 669 struct qcaspi *qca = netdev_priv(dev); 670 671 netif_stop_queue(dev); 672 673 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0); 674 free_irq(qca->spi_dev->irq, qca); 675 676 kthread_stop(qca->spi_thread); 677 qca->spi_thread = NULL; 678 qcaspi_flush_tx_ring(qca); 679 680 return 0; 681 } 682 683 static netdev_tx_t 684 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 685 { 686 u32 frame_len; 687 u8 *ptmp; 688 struct qcaspi *qca = netdev_priv(dev); 689 u16 new_tail; 690 struct sk_buff *tskb; 691 u8 pad_len = 0; 692 693 if (skb->len < QCAFRM_MIN_LEN) 694 pad_len = QCAFRM_MIN_LEN - skb->len; 695 696 if (qca->txr.skb[qca->txr.tail]) { 697 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 698 netif_stop_queue(qca->net_dev); 699 qca->stats.ring_full++; 700 return NETDEV_TX_BUSY; 701 } 702 703 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 704 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 705 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 706 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 707 if (!tskb) { 708 qca->stats.out_of_mem++; 709 return NETDEV_TX_BUSY; 710 } 711 dev_kfree_skb(skb); 712 skb = tskb; 713 } 714 715 frame_len = skb->len + pad_len; 716 717 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 718 qcafrm_create_header(ptmp, frame_len); 719 720 if (pad_len) { 721 ptmp = skb_put_zero(skb, pad_len); 722 } 723 724 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 725 qcafrm_create_footer(ptmp); 726 727 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 728 skb->len); 729 730 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 731 732 new_tail = qca->txr.tail + 1; 733 if (new_tail >= qca->txr.count) 734 new_tail = 0; 735 736 qca->txr.skb[qca->txr.tail] = skb; 737 qca->txr.tail = new_tail; 738 739 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 740 netif_stop_queue(qca->net_dev); 741 qca->stats.ring_full++; 742 } 743 744 netif_trans_update(dev); 745 746 if (qca->spi_thread && 747 qca->spi_thread->state != TASK_RUNNING) 748 wake_up_process(qca->spi_thread); 749 750 return NETDEV_TX_OK; 751 } 752 753 static void 754 qcaspi_netdev_tx_timeout(struct net_device *dev) 755 { 756 struct qcaspi *qca = netdev_priv(dev); 757 758 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 759 jiffies, jiffies - dev_trans_start(dev)); 760 qca->net_dev->stats.tx_errors++; 761 /* Trigger tx queue flush and QCA7000 reset */ 762 qca->sync = QCASPI_SYNC_UNKNOWN; 763 764 if (qca->spi_thread) 765 wake_up_process(qca->spi_thread); 766 } 767 768 static int 769 qcaspi_netdev_init(struct net_device *dev) 770 { 771 struct qcaspi *qca = netdev_priv(dev); 772 773 dev->mtu = QCAFRM_MAX_MTU; 774 dev->type = ARPHRD_ETHER; 775 qca->clkspeed = qcaspi_clkspeed; 776 qca->burst_len = qcaspi_burst_len; 777 qca->spi_thread = NULL; 778 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 779 QCAFRM_FOOTER_LEN + 4) * 4; 780 781 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 782 783 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 784 if (!qca->rx_buffer) 785 return -ENOBUFS; 786 787 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 788 VLAN_ETH_HLEN); 789 if (!qca->rx_skb) { 790 kfree(qca->rx_buffer); 791 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 792 return -ENOBUFS; 793 } 794 795 return 0; 796 } 797 798 static void 799 qcaspi_netdev_uninit(struct net_device *dev) 800 { 801 struct qcaspi *qca = netdev_priv(dev); 802 803 kfree(qca->rx_buffer); 804 qca->buffer_size = 0; 805 if (qca->rx_skb) 806 dev_kfree_skb(qca->rx_skb); 807 } 808 809 static const struct net_device_ops qcaspi_netdev_ops = { 810 .ndo_init = qcaspi_netdev_init, 811 .ndo_uninit = qcaspi_netdev_uninit, 812 .ndo_open = qcaspi_netdev_open, 813 .ndo_stop = qcaspi_netdev_close, 814 .ndo_start_xmit = qcaspi_netdev_xmit, 815 .ndo_set_mac_address = eth_mac_addr, 816 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 817 .ndo_validate_addr = eth_validate_addr, 818 }; 819 820 static void 821 qcaspi_netdev_setup(struct net_device *dev) 822 { 823 struct qcaspi *qca = NULL; 824 825 dev->netdev_ops = &qcaspi_netdev_ops; 826 qcaspi_set_ethtool_ops(dev); 827 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 828 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 829 dev->tx_queue_len = 100; 830 831 /* MTU range: 46 - 1500 */ 832 dev->min_mtu = QCAFRM_MIN_MTU; 833 dev->max_mtu = QCAFRM_MAX_MTU; 834 835 qca = netdev_priv(dev); 836 memset(qca, 0, sizeof(struct qcaspi)); 837 838 memset(&qca->spi_xfer1, 0, sizeof(struct spi_transfer)); 839 memset(&qca->spi_xfer2, 0, sizeof(struct spi_transfer) * 2); 840 841 spi_message_init(&qca->spi_msg1); 842 spi_message_add_tail(&qca->spi_xfer1, &qca->spi_msg1); 843 844 spi_message_init(&qca->spi_msg2); 845 spi_message_add_tail(&qca->spi_xfer2[0], &qca->spi_msg2); 846 spi_message_add_tail(&qca->spi_xfer2[1], &qca->spi_msg2); 847 848 memset(&qca->txr, 0, sizeof(qca->txr)); 849 qca->txr.count = TX_RING_MAX_LEN; 850 } 851 852 static const struct of_device_id qca_spi_of_match[] = { 853 { .compatible = "qca,qca7000" }, 854 { /* sentinel */ } 855 }; 856 MODULE_DEVICE_TABLE(of, qca_spi_of_match); 857 858 static int 859 qca_spi_probe(struct spi_device *spi) 860 { 861 struct qcaspi *qca = NULL; 862 struct net_device *qcaspi_devs = NULL; 863 u8 legacy_mode = 0; 864 u16 signature; 865 const char *mac; 866 867 if (!spi->dev.of_node) { 868 dev_err(&spi->dev, "Missing device tree\n"); 869 return -EINVAL; 870 } 871 872 legacy_mode = of_property_read_bool(spi->dev.of_node, 873 "qca,legacy-mode"); 874 875 if (qcaspi_clkspeed == 0) { 876 if (spi->max_speed_hz) 877 qcaspi_clkspeed = spi->max_speed_hz; 878 else 879 qcaspi_clkspeed = QCASPI_CLK_SPEED; 880 } 881 882 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 883 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 884 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 885 qcaspi_clkspeed); 886 return -EINVAL; 887 } 888 889 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 890 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 891 dev_err(&spi->dev, "Invalid burst len: %d\n", 892 qcaspi_burst_len); 893 return -EINVAL; 894 } 895 896 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 897 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 898 dev_err(&spi->dev, "Invalid pluggable: %d\n", 899 qcaspi_pluggable); 900 return -EINVAL; 901 } 902 903 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 904 QCASPI_DRV_VERSION, 905 qcaspi_clkspeed, 906 qcaspi_burst_len, 907 qcaspi_pluggable); 908 909 spi->mode = SPI_MODE_3; 910 spi->max_speed_hz = qcaspi_clkspeed; 911 if (spi_setup(spi) < 0) { 912 dev_err(&spi->dev, "Unable to setup SPI device\n"); 913 return -EFAULT; 914 } 915 916 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 917 if (!qcaspi_devs) 918 return -ENOMEM; 919 920 qcaspi_netdev_setup(qcaspi_devs); 921 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 922 923 qca = netdev_priv(qcaspi_devs); 924 if (!qca) { 925 free_netdev(qcaspi_devs); 926 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 927 return -ENOMEM; 928 } 929 qca->net_dev = qcaspi_devs; 930 qca->spi_dev = spi; 931 qca->legacy_mode = legacy_mode; 932 933 spi_set_drvdata(spi, qcaspi_devs); 934 935 mac = of_get_mac_address(spi->dev.of_node); 936 937 if (mac) 938 ether_addr_copy(qca->net_dev->dev_addr, mac); 939 940 if (!is_valid_ether_addr(qca->net_dev->dev_addr)) { 941 eth_hw_addr_random(qca->net_dev); 942 dev_info(&spi->dev, "Using random MAC address: %pM\n", 943 qca->net_dev->dev_addr); 944 } 945 946 netif_carrier_off(qca->net_dev); 947 948 if (!qcaspi_pluggable) { 949 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 950 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 951 952 if (signature != QCASPI_GOOD_SIGNATURE) { 953 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 954 signature); 955 free_netdev(qcaspi_devs); 956 return -EFAULT; 957 } 958 } 959 960 if (register_netdev(qcaspi_devs)) { 961 dev_err(&spi->dev, "Unable to register net device %s\n", 962 qcaspi_devs->name); 963 free_netdev(qcaspi_devs); 964 return -EFAULT; 965 } 966 967 qcaspi_init_device_debugfs(qca); 968 969 return 0; 970 } 971 972 static int 973 qca_spi_remove(struct spi_device *spi) 974 { 975 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 976 struct qcaspi *qca = netdev_priv(qcaspi_devs); 977 978 qcaspi_remove_device_debugfs(qca); 979 980 unregister_netdev(qcaspi_devs); 981 free_netdev(qcaspi_devs); 982 983 return 0; 984 } 985 986 static const struct spi_device_id qca_spi_id[] = { 987 { "qca7000", 0 }, 988 { /* sentinel */ } 989 }; 990 MODULE_DEVICE_TABLE(spi, qca_spi_id); 991 992 static struct spi_driver qca_spi_driver = { 993 .driver = { 994 .name = QCASPI_DRV_NAME, 995 .of_match_table = qca_spi_of_match, 996 }, 997 .id_table = qca_spi_id, 998 .probe = qca_spi_probe, 999 .remove = qca_spi_remove, 1000 }; 1001 module_spi_driver(qca_spi_driver); 1002 1003 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1004 MODULE_AUTHOR("Qualcomm Atheros Communications"); 1005 MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1006 MODULE_LICENSE("Dual BSD/GPL"); 1007 MODULE_VERSION(QCASPI_DRV_VERSION); 1008