1 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 /* Qualcomm Technologies, Inc. EMAC PHY Controller driver. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_net.h> 19 #include <linux/of_mdio.h> 20 #include <linux/phy.h> 21 #include <linux/iopoll.h> 22 #include "emac.h" 23 #include "emac-mac.h" 24 #include "emac-phy.h" 25 #include "emac-sgmii.h" 26 27 /* EMAC base register offsets */ 28 #define EMAC_MDIO_CTRL 0x001414 29 #define EMAC_PHY_STS 0x001418 30 #define EMAC_MDIO_EX_CTRL 0x001440 31 32 /* EMAC_MDIO_CTRL */ 33 #define MDIO_MODE BIT(30) 34 #define MDIO_PR BIT(29) 35 #define MDIO_AP_EN BIT(28) 36 #define MDIO_BUSY BIT(27) 37 #define MDIO_CLK_SEL_BMSK 0x7000000 38 #define MDIO_CLK_SEL_SHFT 24 39 #define MDIO_START BIT(23) 40 #define SUP_PREAMBLE BIT(22) 41 #define MDIO_RD_NWR BIT(21) 42 #define MDIO_REG_ADDR_BMSK 0x1f0000 43 #define MDIO_REG_ADDR_SHFT 16 44 #define MDIO_DATA_BMSK 0xffff 45 #define MDIO_DATA_SHFT 0 46 47 /* EMAC_PHY_STS */ 48 #define PHY_ADDR_BMSK 0x1f0000 49 #define PHY_ADDR_SHFT 16 50 51 #define MDIO_CLK_25_4 0 52 #define MDIO_CLK_25_28 7 53 54 #define MDIO_WAIT_TIMES 1000 55 56 #define EMAC_LINK_SPEED_DEFAULT (\ 57 EMAC_LINK_SPEED_10_HALF |\ 58 EMAC_LINK_SPEED_10_FULL |\ 59 EMAC_LINK_SPEED_100_HALF |\ 60 EMAC_LINK_SPEED_100_FULL |\ 61 EMAC_LINK_SPEED_1GB_FULL) 62 63 /** 64 * emac_phy_mdio_autopoll_disable() - disable mdio autopoll 65 * @adpt: the emac adapter 66 * 67 * The autopoll feature takes over the MDIO bus. In order for 68 * the PHY driver to be able to talk to the PHY over the MDIO 69 * bus, we need to temporarily disable the autopoll feature. 70 */ 71 static int emac_phy_mdio_autopoll_disable(struct emac_adapter *adpt) 72 { 73 u32 val; 74 75 /* disable autopoll */ 76 emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, MDIO_AP_EN, 0); 77 78 /* wait for any mdio polling to complete */ 79 if (!readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, val, 80 !(val & MDIO_BUSY), 100, MDIO_WAIT_TIMES * 100)) 81 return 0; 82 83 /* failed to disable; ensure it is enabled before returning */ 84 emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN); 85 86 return -EBUSY; 87 } 88 89 /** 90 * emac_phy_mdio_autopoll_disable() - disable mdio autopoll 91 * @adpt: the emac adapter 92 * 93 * The EMAC has the ability to poll the external PHY on the MDIO 94 * bus for link state changes. This eliminates the need for the 95 * driver to poll the phy. If if the link state does change, 96 * the EMAC issues an interrupt on behalf of the PHY. 97 */ 98 static void emac_phy_mdio_autopoll_enable(struct emac_adapter *adpt) 99 { 100 emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN); 101 } 102 103 static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) 104 { 105 struct emac_adapter *adpt = bus->priv; 106 u32 reg; 107 int ret; 108 109 ret = emac_phy_mdio_autopoll_disable(adpt); 110 if (ret) 111 return ret; 112 113 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK, 114 (addr << PHY_ADDR_SHFT)); 115 116 reg = SUP_PREAMBLE | 117 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | 118 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | 119 MDIO_START | MDIO_RD_NWR; 120 121 writel(reg, adpt->base + EMAC_MDIO_CTRL); 122 123 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg, 124 !(reg & (MDIO_START | MDIO_BUSY)), 125 100, MDIO_WAIT_TIMES * 100)) 126 ret = -EIO; 127 else 128 ret = (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK; 129 130 emac_phy_mdio_autopoll_enable(adpt); 131 132 return ret; 133 } 134 135 static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) 136 { 137 struct emac_adapter *adpt = bus->priv; 138 u32 reg; 139 int ret; 140 141 ret = emac_phy_mdio_autopoll_disable(adpt); 142 if (ret) 143 return ret; 144 145 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK, 146 (addr << PHY_ADDR_SHFT)); 147 148 reg = SUP_PREAMBLE | 149 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | 150 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | 151 ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) | 152 MDIO_START; 153 154 writel(reg, adpt->base + EMAC_MDIO_CTRL); 155 156 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg, 157 !(reg & (MDIO_START | MDIO_BUSY)), 100, 158 MDIO_WAIT_TIMES * 100)) 159 ret = -EIO; 160 161 emac_phy_mdio_autopoll_enable(adpt); 162 163 return ret; 164 } 165 166 /* Configure the MDIO bus and connect the external PHY */ 167 int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt) 168 { 169 struct device_node *np = pdev->dev.of_node; 170 struct device_node *phy_np; 171 struct mii_bus *mii_bus; 172 int ret; 173 174 /* Create the mii_bus object for talking to the MDIO bus */ 175 adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev); 176 if (!mii_bus) 177 return -ENOMEM; 178 179 mii_bus->name = "emac-mdio"; 180 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); 181 mii_bus->read = emac_mdio_read; 182 mii_bus->write = emac_mdio_write; 183 mii_bus->parent = &pdev->dev; 184 mii_bus->priv = adpt; 185 186 ret = of_mdiobus_register(mii_bus, np); 187 if (ret) { 188 dev_err(&pdev->dev, "could not register mdio bus\n"); 189 return ret; 190 } 191 192 phy_np = of_parse_phandle(np, "phy-handle", 0); 193 adpt->phydev = of_phy_find_device(phy_np); 194 if (!adpt->phydev) { 195 dev_err(&pdev->dev, "could not find external phy\n"); 196 mdiobus_unregister(mii_bus); 197 return -ENODEV; 198 } 199 200 if (adpt->phydev->drv) 201 phy_attached_print(adpt->phydev, NULL); 202 203 return 0; 204 } 205