xref: /linux/drivers/net/ethernet/qlogic/qede/qede_main.c (revision c19b05b84ddece7708ed0537a92d1dfabdfd98fb)
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3  * Copyright (c) 2015-2017  QLogic Corporation
4  * Copyright (c) 2019-2020 Marvell International Ltd.
5  */
6 
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/version.h>
11 #include <linux/device.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/skbuff.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/string.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/interrupt.h>
20 #include <asm/byteorder.h>
21 #include <asm/param.h>
22 #include <linux/io.h>
23 #include <linux/netdev_features.h>
24 #include <linux/udp.h>
25 #include <linux/tcp.h>
26 #include <net/udp_tunnel.h>
27 #include <linux/ip.h>
28 #include <net/ipv6.h>
29 #include <net/tcp.h>
30 #include <linux/if_ether.h>
31 #include <linux/if_vlan.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/ethtool.h>
34 #include <linux/in.h>
35 #include <linux/random.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/bitops.h>
38 #include <linux/vmalloc.h>
39 #include <linux/aer.h>
40 #include "qede.h"
41 #include "qede_ptp.h"
42 
43 static char version[] =
44 	"QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
45 
46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
47 MODULE_LICENSE("GPL");
48 MODULE_VERSION(DRV_MODULE_VERSION);
49 
50 static uint debug;
51 module_param(debug, uint, 0);
52 MODULE_PARM_DESC(debug, " Default debug msglevel");
53 
54 static const struct qed_eth_ops *qed_ops;
55 
56 #define CHIP_NUM_57980S_40		0x1634
57 #define CHIP_NUM_57980S_10		0x1666
58 #define CHIP_NUM_57980S_MF		0x1636
59 #define CHIP_NUM_57980S_100		0x1644
60 #define CHIP_NUM_57980S_50		0x1654
61 #define CHIP_NUM_57980S_25		0x1656
62 #define CHIP_NUM_57980S_IOV		0x1664
63 #define CHIP_NUM_AH			0x8070
64 #define CHIP_NUM_AH_IOV			0x8090
65 
66 #ifndef PCI_DEVICE_ID_NX2_57980E
67 #define PCI_DEVICE_ID_57980S_40		CHIP_NUM_57980S_40
68 #define PCI_DEVICE_ID_57980S_10		CHIP_NUM_57980S_10
69 #define PCI_DEVICE_ID_57980S_MF		CHIP_NUM_57980S_MF
70 #define PCI_DEVICE_ID_57980S_100	CHIP_NUM_57980S_100
71 #define PCI_DEVICE_ID_57980S_50		CHIP_NUM_57980S_50
72 #define PCI_DEVICE_ID_57980S_25		CHIP_NUM_57980S_25
73 #define PCI_DEVICE_ID_57980S_IOV	CHIP_NUM_57980S_IOV
74 #define PCI_DEVICE_ID_AH		CHIP_NUM_AH
75 #define PCI_DEVICE_ID_AH_IOV		CHIP_NUM_AH_IOV
76 
77 #endif
78 
79 enum qede_pci_private {
80 	QEDE_PRIVATE_PF,
81 	QEDE_PRIVATE_VF
82 };
83 
84 static const struct pci_device_id qede_pci_tbl[] = {
85 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
86 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
87 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
88 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
89 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
90 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
91 #ifdef CONFIG_QED_SRIOV
92 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
93 #endif
94 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
95 #ifdef CONFIG_QED_SRIOV
96 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
97 #endif
98 	{ 0 }
99 };
100 
101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
102 
103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
104 static pci_ers_result_t
105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
106 
107 #define TX_TIMEOUT		(5 * HZ)
108 
109 /* Utilize last protocol index for XDP */
110 #define XDP_PI	11
111 
112 static void qede_remove(struct pci_dev *pdev);
113 static void qede_shutdown(struct pci_dev *pdev);
114 static void qede_link_update(void *dev, struct qed_link_output *link);
115 static void qede_schedule_recovery_handler(void *dev);
116 static void qede_recovery_handler(struct qede_dev *edev);
117 static void qede_schedule_hw_err_handler(void *dev,
118 					 enum qed_hw_err_type err_type);
119 static void qede_get_eth_tlv_data(void *edev, void *data);
120 static void qede_get_generic_tlv_data(void *edev,
121 				      struct qed_generic_tlvs *data);
122 static void qede_generic_hw_err_handler(struct qede_dev *edev);
123 #ifdef CONFIG_QED_SRIOV
124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
125 			    __be16 vlan_proto)
126 {
127 	struct qede_dev *edev = netdev_priv(ndev);
128 
129 	if (vlan > 4095) {
130 		DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
131 		return -EINVAL;
132 	}
133 
134 	if (vlan_proto != htons(ETH_P_8021Q))
135 		return -EPROTONOSUPPORT;
136 
137 	DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
138 		   vlan, vf);
139 
140 	return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
141 }
142 
143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
144 {
145 	struct qede_dev *edev = netdev_priv(ndev);
146 
147 	DP_VERBOSE(edev, QED_MSG_IOV,
148 		   "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
149 		   mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
150 
151 	if (!is_valid_ether_addr(mac)) {
152 		DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
153 		return -EINVAL;
154 	}
155 
156 	return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
157 }
158 
159 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
160 {
161 	struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
162 	struct qed_dev_info *qed_info = &edev->dev_info.common;
163 	struct qed_update_vport_params *vport_params;
164 	int rc;
165 
166 	vport_params = vzalloc(sizeof(*vport_params));
167 	if (!vport_params)
168 		return -ENOMEM;
169 	DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
170 
171 	rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
172 
173 	/* Enable/Disable Tx switching for PF */
174 	if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
175 	    !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
176 		vport_params->vport_id = 0;
177 		vport_params->update_tx_switching_flg = 1;
178 		vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
179 		edev->ops->vport_update(edev->cdev, vport_params);
180 	}
181 
182 	vfree(vport_params);
183 	return rc;
184 }
185 #endif
186 
187 static const struct pci_error_handlers qede_err_handler = {
188 	.error_detected = qede_io_error_detected,
189 };
190 
191 static struct pci_driver qede_pci_driver = {
192 	.name = "qede",
193 	.id_table = qede_pci_tbl,
194 	.probe = qede_probe,
195 	.remove = qede_remove,
196 	.shutdown = qede_shutdown,
197 #ifdef CONFIG_QED_SRIOV
198 	.sriov_configure = qede_sriov_configure,
199 #endif
200 	.err_handler = &qede_err_handler,
201 };
202 
203 static struct qed_eth_cb_ops qede_ll_ops = {
204 	{
205 #ifdef CONFIG_RFS_ACCEL
206 		.arfs_filter_op = qede_arfs_filter_op,
207 #endif
208 		.link_update = qede_link_update,
209 		.schedule_recovery_handler = qede_schedule_recovery_handler,
210 		.schedule_hw_err_handler = qede_schedule_hw_err_handler,
211 		.get_generic_tlv_data = qede_get_generic_tlv_data,
212 		.get_protocol_tlv_data = qede_get_eth_tlv_data,
213 	},
214 	.force_mac = qede_force_mac,
215 	.ports_update = qede_udp_ports_update,
216 };
217 
218 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
219 			     void *ptr)
220 {
221 	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
222 	struct ethtool_drvinfo drvinfo;
223 	struct qede_dev *edev;
224 
225 	if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
226 		goto done;
227 
228 	/* Check whether this is a qede device */
229 	if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
230 		goto done;
231 
232 	memset(&drvinfo, 0, sizeof(drvinfo));
233 	ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
234 	if (strcmp(drvinfo.driver, "qede"))
235 		goto done;
236 	edev = netdev_priv(ndev);
237 
238 	switch (event) {
239 	case NETDEV_CHANGENAME:
240 		/* Notify qed of the name change */
241 		if (!edev->ops || !edev->ops->common)
242 			goto done;
243 		edev->ops->common->set_name(edev->cdev, edev->ndev->name);
244 		break;
245 	case NETDEV_CHANGEADDR:
246 		edev = netdev_priv(ndev);
247 		qede_rdma_event_changeaddr(edev);
248 		break;
249 	}
250 
251 done:
252 	return NOTIFY_DONE;
253 }
254 
255 static struct notifier_block qede_netdev_notifier = {
256 	.notifier_call = qede_netdev_event,
257 };
258 
259 static
260 int __init qede_init(void)
261 {
262 	int ret;
263 
264 	pr_info("qede_init: %s\n", version);
265 
266 	qed_ops = qed_get_eth_ops();
267 	if (!qed_ops) {
268 		pr_notice("Failed to get qed ethtool operations\n");
269 		return -EINVAL;
270 	}
271 
272 	/* Must register notifier before pci ops, since we might miss
273 	 * interface rename after pci probe and netdev registration.
274 	 */
275 	ret = register_netdevice_notifier(&qede_netdev_notifier);
276 	if (ret) {
277 		pr_notice("Failed to register netdevice_notifier\n");
278 		qed_put_eth_ops();
279 		return -EINVAL;
280 	}
281 
282 	ret = pci_register_driver(&qede_pci_driver);
283 	if (ret) {
284 		pr_notice("Failed to register driver\n");
285 		unregister_netdevice_notifier(&qede_netdev_notifier);
286 		qed_put_eth_ops();
287 		return -EINVAL;
288 	}
289 
290 	return 0;
291 }
292 
293 static void __exit qede_cleanup(void)
294 {
295 	if (debug & QED_LOG_INFO_MASK)
296 		pr_info("qede_cleanup called\n");
297 
298 	unregister_netdevice_notifier(&qede_netdev_notifier);
299 	pci_unregister_driver(&qede_pci_driver);
300 	qed_put_eth_ops();
301 }
302 
303 module_init(qede_init);
304 module_exit(qede_cleanup);
305 
306 static int qede_open(struct net_device *ndev);
307 static int qede_close(struct net_device *ndev);
308 
309 void qede_fill_by_demand_stats(struct qede_dev *edev)
310 {
311 	struct qede_stats_common *p_common = &edev->stats.common;
312 	struct qed_eth_stats stats;
313 
314 	edev->ops->get_vport_stats(edev->cdev, &stats);
315 
316 	p_common->no_buff_discards = stats.common.no_buff_discards;
317 	p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
318 	p_common->ttl0_discard = stats.common.ttl0_discard;
319 	p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
320 	p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
321 	p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
322 	p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
323 	p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
324 	p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
325 	p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
326 	p_common->mac_filter_discards = stats.common.mac_filter_discards;
327 	p_common->gft_filter_drop = stats.common.gft_filter_drop;
328 
329 	p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
330 	p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
331 	p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
332 	p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
333 	p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
334 	p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
335 	p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
336 	p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
337 	p_common->coalesced_events = stats.common.tpa_coalesced_events;
338 	p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
339 	p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
340 	p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
341 
342 	p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
343 	p_common->rx_65_to_127_byte_packets =
344 	    stats.common.rx_65_to_127_byte_packets;
345 	p_common->rx_128_to_255_byte_packets =
346 	    stats.common.rx_128_to_255_byte_packets;
347 	p_common->rx_256_to_511_byte_packets =
348 	    stats.common.rx_256_to_511_byte_packets;
349 	p_common->rx_512_to_1023_byte_packets =
350 	    stats.common.rx_512_to_1023_byte_packets;
351 	p_common->rx_1024_to_1518_byte_packets =
352 	    stats.common.rx_1024_to_1518_byte_packets;
353 	p_common->rx_crc_errors = stats.common.rx_crc_errors;
354 	p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
355 	p_common->rx_pause_frames = stats.common.rx_pause_frames;
356 	p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
357 	p_common->rx_align_errors = stats.common.rx_align_errors;
358 	p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
359 	p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
360 	p_common->rx_jabbers = stats.common.rx_jabbers;
361 	p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
362 	p_common->rx_fragments = stats.common.rx_fragments;
363 	p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
364 	p_common->tx_65_to_127_byte_packets =
365 	    stats.common.tx_65_to_127_byte_packets;
366 	p_common->tx_128_to_255_byte_packets =
367 	    stats.common.tx_128_to_255_byte_packets;
368 	p_common->tx_256_to_511_byte_packets =
369 	    stats.common.tx_256_to_511_byte_packets;
370 	p_common->tx_512_to_1023_byte_packets =
371 	    stats.common.tx_512_to_1023_byte_packets;
372 	p_common->tx_1024_to_1518_byte_packets =
373 	    stats.common.tx_1024_to_1518_byte_packets;
374 	p_common->tx_pause_frames = stats.common.tx_pause_frames;
375 	p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
376 	p_common->brb_truncates = stats.common.brb_truncates;
377 	p_common->brb_discards = stats.common.brb_discards;
378 	p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
379 	p_common->link_change_count = stats.common.link_change_count;
380 	p_common->ptp_skip_txts = edev->ptp_skip_txts;
381 
382 	if (QEDE_IS_BB(edev)) {
383 		struct qede_stats_bb *p_bb = &edev->stats.bb;
384 
385 		p_bb->rx_1519_to_1522_byte_packets =
386 		    stats.bb.rx_1519_to_1522_byte_packets;
387 		p_bb->rx_1519_to_2047_byte_packets =
388 		    stats.bb.rx_1519_to_2047_byte_packets;
389 		p_bb->rx_2048_to_4095_byte_packets =
390 		    stats.bb.rx_2048_to_4095_byte_packets;
391 		p_bb->rx_4096_to_9216_byte_packets =
392 		    stats.bb.rx_4096_to_9216_byte_packets;
393 		p_bb->rx_9217_to_16383_byte_packets =
394 		    stats.bb.rx_9217_to_16383_byte_packets;
395 		p_bb->tx_1519_to_2047_byte_packets =
396 		    stats.bb.tx_1519_to_2047_byte_packets;
397 		p_bb->tx_2048_to_4095_byte_packets =
398 		    stats.bb.tx_2048_to_4095_byte_packets;
399 		p_bb->tx_4096_to_9216_byte_packets =
400 		    stats.bb.tx_4096_to_9216_byte_packets;
401 		p_bb->tx_9217_to_16383_byte_packets =
402 		    stats.bb.tx_9217_to_16383_byte_packets;
403 		p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
404 		p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
405 	} else {
406 		struct qede_stats_ah *p_ah = &edev->stats.ah;
407 
408 		p_ah->rx_1519_to_max_byte_packets =
409 		    stats.ah.rx_1519_to_max_byte_packets;
410 		p_ah->tx_1519_to_max_byte_packets =
411 		    stats.ah.tx_1519_to_max_byte_packets;
412 	}
413 }
414 
415 static void qede_get_stats64(struct net_device *dev,
416 			     struct rtnl_link_stats64 *stats)
417 {
418 	struct qede_dev *edev = netdev_priv(dev);
419 	struct qede_stats_common *p_common;
420 
421 	qede_fill_by_demand_stats(edev);
422 	p_common = &edev->stats.common;
423 
424 	stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
425 			    p_common->rx_bcast_pkts;
426 	stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
427 			    p_common->tx_bcast_pkts;
428 
429 	stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
430 			  p_common->rx_bcast_bytes;
431 	stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
432 			  p_common->tx_bcast_bytes;
433 
434 	stats->tx_errors = p_common->tx_err_drop_pkts;
435 	stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
436 
437 	stats->rx_fifo_errors = p_common->no_buff_discards;
438 
439 	if (QEDE_IS_BB(edev))
440 		stats->collisions = edev->stats.bb.tx_total_collisions;
441 	stats->rx_crc_errors = p_common->rx_crc_errors;
442 	stats->rx_frame_errors = p_common->rx_align_errors;
443 }
444 
445 #ifdef CONFIG_QED_SRIOV
446 static int qede_get_vf_config(struct net_device *dev, int vfidx,
447 			      struct ifla_vf_info *ivi)
448 {
449 	struct qede_dev *edev = netdev_priv(dev);
450 
451 	if (!edev->ops)
452 		return -EINVAL;
453 
454 	return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
455 }
456 
457 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
458 			    int min_tx_rate, int max_tx_rate)
459 {
460 	struct qede_dev *edev = netdev_priv(dev);
461 
462 	return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
463 					max_tx_rate);
464 }
465 
466 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
467 {
468 	struct qede_dev *edev = netdev_priv(dev);
469 
470 	if (!edev->ops)
471 		return -EINVAL;
472 
473 	return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
474 }
475 
476 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
477 				  int link_state)
478 {
479 	struct qede_dev *edev = netdev_priv(dev);
480 
481 	if (!edev->ops)
482 		return -EINVAL;
483 
484 	return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
485 }
486 
487 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
488 {
489 	struct qede_dev *edev = netdev_priv(dev);
490 
491 	if (!edev->ops)
492 		return -EINVAL;
493 
494 	return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
495 }
496 #endif
497 
498 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
499 {
500 	struct qede_dev *edev = netdev_priv(dev);
501 
502 	if (!netif_running(dev))
503 		return -EAGAIN;
504 
505 	switch (cmd) {
506 	case SIOCSHWTSTAMP:
507 		return qede_ptp_hw_ts(edev, ifr);
508 	default:
509 		DP_VERBOSE(edev, QED_MSG_DEBUG,
510 			   "default IOCTL cmd 0x%x\n", cmd);
511 		return -EOPNOTSUPP;
512 	}
513 
514 	return 0;
515 }
516 
517 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)
518 {
519 	DP_NOTICE(edev,
520 		  "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
521 		  txq->index, le16_to_cpu(*txq->hw_cons_ptr),
522 		  qed_chain_get_cons_idx(&txq->tx_pbl),
523 		  qed_chain_get_prod_idx(&txq->tx_pbl),
524 		  jiffies);
525 }
526 
527 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
528 {
529 	struct qede_dev *edev = netdev_priv(dev);
530 	struct qede_tx_queue *txq;
531 	int cos;
532 
533 	netif_carrier_off(dev);
534 	DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
535 
536 	if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX))
537 		return;
538 
539 	for_each_cos_in_txq(edev, cos) {
540 		txq = &edev->fp_array[txqueue].txq[cos];
541 
542 		if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
543 		    qed_chain_get_prod_idx(&txq->tx_pbl))
544 			qede_tx_log_print(edev, txq);
545 	}
546 
547 	if (IS_VF(edev))
548 		return;
549 
550 	if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
551 	    edev->state == QEDE_STATE_RECOVERY) {
552 		DP_INFO(edev,
553 			"Avoid handling a Tx timeout while another HW error is being handled\n");
554 		return;
555 	}
556 
557 	set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
558 	set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
559 	schedule_delayed_work(&edev->sp_task, 0);
560 }
561 
562 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
563 {
564 	struct qede_dev *edev = netdev_priv(ndev);
565 	int cos, count, offset;
566 
567 	if (num_tc > edev->dev_info.num_tc)
568 		return -EINVAL;
569 
570 	netdev_reset_tc(ndev);
571 	netdev_set_num_tc(ndev, num_tc);
572 
573 	for_each_cos_in_txq(edev, cos) {
574 		count = QEDE_TSS_COUNT(edev);
575 		offset = cos * QEDE_TSS_COUNT(edev);
576 		netdev_set_tc_queue(ndev, cos, count, offset);
577 	}
578 
579 	return 0;
580 }
581 
582 static int
583 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
584 		__be16 proto)
585 {
586 	switch (f->command) {
587 	case FLOW_CLS_REPLACE:
588 		return qede_add_tc_flower_fltr(edev, proto, f);
589 	case FLOW_CLS_DESTROY:
590 		return qede_delete_flow_filter(edev, f->cookie);
591 	default:
592 		return -EOPNOTSUPP;
593 	}
594 }
595 
596 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
597 				  void *cb_priv)
598 {
599 	struct flow_cls_offload *f;
600 	struct qede_dev *edev = cb_priv;
601 
602 	if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
603 		return -EOPNOTSUPP;
604 
605 	switch (type) {
606 	case TC_SETUP_CLSFLOWER:
607 		f = type_data;
608 		return qede_set_flower(edev, f, f->common.protocol);
609 	default:
610 		return -EOPNOTSUPP;
611 	}
612 }
613 
614 static LIST_HEAD(qede_block_cb_list);
615 
616 static int
617 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
618 		      void *type_data)
619 {
620 	struct qede_dev *edev = netdev_priv(dev);
621 	struct tc_mqprio_qopt *mqprio;
622 
623 	switch (type) {
624 	case TC_SETUP_BLOCK:
625 		return flow_block_cb_setup_simple(type_data,
626 						  &qede_block_cb_list,
627 						  qede_setup_tc_block_cb,
628 						  edev, edev, true);
629 	case TC_SETUP_QDISC_MQPRIO:
630 		mqprio = type_data;
631 
632 		mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
633 		return qede_setup_tc(dev, mqprio->num_tc);
634 	default:
635 		return -EOPNOTSUPP;
636 	}
637 }
638 
639 static const struct net_device_ops qede_netdev_ops = {
640 	.ndo_open = qede_open,
641 	.ndo_stop = qede_close,
642 	.ndo_start_xmit = qede_start_xmit,
643 	.ndo_select_queue = qede_select_queue,
644 	.ndo_set_rx_mode = qede_set_rx_mode,
645 	.ndo_set_mac_address = qede_set_mac_addr,
646 	.ndo_validate_addr = eth_validate_addr,
647 	.ndo_change_mtu = qede_change_mtu,
648 	.ndo_do_ioctl = qede_ioctl,
649 	.ndo_tx_timeout = qede_tx_timeout,
650 #ifdef CONFIG_QED_SRIOV
651 	.ndo_set_vf_mac = qede_set_vf_mac,
652 	.ndo_set_vf_vlan = qede_set_vf_vlan,
653 	.ndo_set_vf_trust = qede_set_vf_trust,
654 #endif
655 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
656 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
657 	.ndo_fix_features = qede_fix_features,
658 	.ndo_set_features = qede_set_features,
659 	.ndo_get_stats64 = qede_get_stats64,
660 #ifdef CONFIG_QED_SRIOV
661 	.ndo_set_vf_link_state = qede_set_vf_link_state,
662 	.ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
663 	.ndo_get_vf_config = qede_get_vf_config,
664 	.ndo_set_vf_rate = qede_set_vf_rate,
665 #endif
666 	.ndo_udp_tunnel_add = qede_udp_tunnel_add,
667 	.ndo_udp_tunnel_del = qede_udp_tunnel_del,
668 	.ndo_features_check = qede_features_check,
669 	.ndo_bpf = qede_xdp,
670 #ifdef CONFIG_RFS_ACCEL
671 	.ndo_rx_flow_steer = qede_rx_flow_steer,
672 #endif
673 	.ndo_setup_tc = qede_setup_tc_offload,
674 };
675 
676 static const struct net_device_ops qede_netdev_vf_ops = {
677 	.ndo_open = qede_open,
678 	.ndo_stop = qede_close,
679 	.ndo_start_xmit = qede_start_xmit,
680 	.ndo_select_queue = qede_select_queue,
681 	.ndo_set_rx_mode = qede_set_rx_mode,
682 	.ndo_set_mac_address = qede_set_mac_addr,
683 	.ndo_validate_addr = eth_validate_addr,
684 	.ndo_change_mtu = qede_change_mtu,
685 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
686 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
687 	.ndo_fix_features = qede_fix_features,
688 	.ndo_set_features = qede_set_features,
689 	.ndo_get_stats64 = qede_get_stats64,
690 	.ndo_udp_tunnel_add = qede_udp_tunnel_add,
691 	.ndo_udp_tunnel_del = qede_udp_tunnel_del,
692 	.ndo_features_check = qede_features_check,
693 };
694 
695 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
696 	.ndo_open = qede_open,
697 	.ndo_stop = qede_close,
698 	.ndo_start_xmit = qede_start_xmit,
699 	.ndo_select_queue = qede_select_queue,
700 	.ndo_set_rx_mode = qede_set_rx_mode,
701 	.ndo_set_mac_address = qede_set_mac_addr,
702 	.ndo_validate_addr = eth_validate_addr,
703 	.ndo_change_mtu = qede_change_mtu,
704 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
705 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
706 	.ndo_fix_features = qede_fix_features,
707 	.ndo_set_features = qede_set_features,
708 	.ndo_get_stats64 = qede_get_stats64,
709 	.ndo_udp_tunnel_add = qede_udp_tunnel_add,
710 	.ndo_udp_tunnel_del = qede_udp_tunnel_del,
711 	.ndo_features_check = qede_features_check,
712 	.ndo_bpf = qede_xdp,
713 };
714 
715 /* -------------------------------------------------------------------------
716  * START OF PROBE / REMOVE
717  * -------------------------------------------------------------------------
718  */
719 
720 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
721 					    struct pci_dev *pdev,
722 					    struct qed_dev_eth_info *info,
723 					    u32 dp_module, u8 dp_level)
724 {
725 	struct net_device *ndev;
726 	struct qede_dev *edev;
727 
728 	ndev = alloc_etherdev_mqs(sizeof(*edev),
729 				  info->num_queues * info->num_tc,
730 				  info->num_queues);
731 	if (!ndev) {
732 		pr_err("etherdev allocation failed\n");
733 		return NULL;
734 	}
735 
736 	edev = netdev_priv(ndev);
737 	edev->ndev = ndev;
738 	edev->cdev = cdev;
739 	edev->pdev = pdev;
740 	edev->dp_module = dp_module;
741 	edev->dp_level = dp_level;
742 	edev->ops = qed_ops;
743 
744 	if (is_kdump_kernel()) {
745 		edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
746 		edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
747 	} else {
748 		edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
749 		edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
750 	}
751 
752 	DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
753 		info->num_queues, info->num_queues);
754 
755 	SET_NETDEV_DEV(ndev, &pdev->dev);
756 
757 	memset(&edev->stats, 0, sizeof(edev->stats));
758 	memcpy(&edev->dev_info, info, sizeof(*info));
759 
760 	/* As ethtool doesn't have the ability to show WoL behavior as
761 	 * 'default', if device supports it declare it's enabled.
762 	 */
763 	if (edev->dev_info.common.wol_support)
764 		edev->wol_enabled = true;
765 
766 	INIT_LIST_HEAD(&edev->vlan_list);
767 
768 	return edev;
769 }
770 
771 static void qede_init_ndev(struct qede_dev *edev)
772 {
773 	struct net_device *ndev = edev->ndev;
774 	struct pci_dev *pdev = edev->pdev;
775 	bool udp_tunnel_enable = false;
776 	netdev_features_t hw_features;
777 
778 	pci_set_drvdata(pdev, ndev);
779 
780 	ndev->mem_start = edev->dev_info.common.pci_mem_start;
781 	ndev->base_addr = ndev->mem_start;
782 	ndev->mem_end = edev->dev_info.common.pci_mem_end;
783 	ndev->irq = edev->dev_info.common.pci_irq;
784 
785 	ndev->watchdog_timeo = TX_TIMEOUT;
786 
787 	if (IS_VF(edev)) {
788 		if (edev->dev_info.xdp_supported)
789 			ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
790 		else
791 			ndev->netdev_ops = &qede_netdev_vf_ops;
792 	} else {
793 		ndev->netdev_ops = &qede_netdev_ops;
794 	}
795 
796 	qede_set_ethtool_ops(ndev);
797 
798 	ndev->priv_flags |= IFF_UNICAST_FLT;
799 
800 	/* user-changeble features */
801 	hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
802 		      NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
803 		      NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
804 
805 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
806 		hw_features |= NETIF_F_NTUPLE;
807 
808 	if (edev->dev_info.common.vxlan_enable ||
809 	    edev->dev_info.common.geneve_enable)
810 		udp_tunnel_enable = true;
811 
812 	if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
813 		hw_features |= NETIF_F_TSO_ECN;
814 		ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
815 					NETIF_F_SG | NETIF_F_TSO |
816 					NETIF_F_TSO_ECN | NETIF_F_TSO6 |
817 					NETIF_F_RXCSUM;
818 	}
819 
820 	if (udp_tunnel_enable) {
821 		hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
822 				NETIF_F_GSO_UDP_TUNNEL_CSUM);
823 		ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
824 					  NETIF_F_GSO_UDP_TUNNEL_CSUM);
825 	}
826 
827 	if (edev->dev_info.common.gre_enable) {
828 		hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
829 		ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
830 					  NETIF_F_GSO_GRE_CSUM);
831 	}
832 
833 	ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
834 			      NETIF_F_HIGHDMA;
835 	ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
836 			 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
837 			 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
838 
839 	ndev->hw_features = hw_features;
840 
841 	/* MTU range: 46 - 9600 */
842 	ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
843 	ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
844 
845 	/* Set network device HW mac */
846 	ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
847 
848 	ndev->mtu = edev->dev_info.common.mtu;
849 }
850 
851 /* This function converts from 32b param to two params of level and module
852  * Input 32b decoding:
853  * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
854  * 'happy' flow, e.g. memory allocation failed.
855  * b30 - enable all INFO prints. INFO prints are for major steps in the flow
856  * and provide important parameters.
857  * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
858  * module. VERBOSE prints are for tracking the specific flow in low level.
859  *
860  * Notice that the level should be that of the lowest required logs.
861  */
862 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
863 {
864 	*p_dp_level = QED_LEVEL_NOTICE;
865 	*p_dp_module = 0;
866 
867 	if (debug & QED_LOG_VERBOSE_MASK) {
868 		*p_dp_level = QED_LEVEL_VERBOSE;
869 		*p_dp_module = (debug & 0x3FFFFFFF);
870 	} else if (debug & QED_LOG_INFO_MASK) {
871 		*p_dp_level = QED_LEVEL_INFO;
872 	} else if (debug & QED_LOG_NOTICE_MASK) {
873 		*p_dp_level = QED_LEVEL_NOTICE;
874 	}
875 }
876 
877 static void qede_free_fp_array(struct qede_dev *edev)
878 {
879 	if (edev->fp_array) {
880 		struct qede_fastpath *fp;
881 		int i;
882 
883 		for_each_queue(i) {
884 			fp = &edev->fp_array[i];
885 
886 			kfree(fp->sb_info);
887 			/* Handle mem alloc failure case where qede_init_fp
888 			 * didn't register xdp_rxq_info yet.
889 			 * Implicit only (fp->type & QEDE_FASTPATH_RX)
890 			 */
891 			if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
892 				xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
893 			kfree(fp->rxq);
894 			kfree(fp->xdp_tx);
895 			kfree(fp->txq);
896 		}
897 		kfree(edev->fp_array);
898 	}
899 
900 	edev->num_queues = 0;
901 	edev->fp_num_tx = 0;
902 	edev->fp_num_rx = 0;
903 }
904 
905 static int qede_alloc_fp_array(struct qede_dev *edev)
906 {
907 	u8 fp_combined, fp_rx = edev->fp_num_rx;
908 	struct qede_fastpath *fp;
909 	int i;
910 
911 	edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
912 				 sizeof(*edev->fp_array), GFP_KERNEL);
913 	if (!edev->fp_array) {
914 		DP_NOTICE(edev, "fp array allocation failed\n");
915 		goto err;
916 	}
917 
918 	fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
919 
920 	/* Allocate the FP elements for Rx queues followed by combined and then
921 	 * the Tx. This ordering should be maintained so that the respective
922 	 * queues (Rx or Tx) will be together in the fastpath array and the
923 	 * associated ids will be sequential.
924 	 */
925 	for_each_queue(i) {
926 		fp = &edev->fp_array[i];
927 
928 		fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
929 		if (!fp->sb_info) {
930 			DP_NOTICE(edev, "sb info struct allocation failed\n");
931 			goto err;
932 		}
933 
934 		if (fp_rx) {
935 			fp->type = QEDE_FASTPATH_RX;
936 			fp_rx--;
937 		} else if (fp_combined) {
938 			fp->type = QEDE_FASTPATH_COMBINED;
939 			fp_combined--;
940 		} else {
941 			fp->type = QEDE_FASTPATH_TX;
942 		}
943 
944 		if (fp->type & QEDE_FASTPATH_TX) {
945 			fp->txq = kcalloc(edev->dev_info.num_tc,
946 					  sizeof(*fp->txq), GFP_KERNEL);
947 			if (!fp->txq)
948 				goto err;
949 		}
950 
951 		if (fp->type & QEDE_FASTPATH_RX) {
952 			fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
953 			if (!fp->rxq)
954 				goto err;
955 
956 			if (edev->xdp_prog) {
957 				fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
958 						     GFP_KERNEL);
959 				if (!fp->xdp_tx)
960 					goto err;
961 				fp->type |= QEDE_FASTPATH_XDP;
962 			}
963 		}
964 	}
965 
966 	return 0;
967 err:
968 	qede_free_fp_array(edev);
969 	return -ENOMEM;
970 }
971 
972 /* The qede lock is used to protect driver state change and driver flows that
973  * are not reentrant.
974  */
975 void __qede_lock(struct qede_dev *edev)
976 {
977 	mutex_lock(&edev->qede_lock);
978 }
979 
980 void __qede_unlock(struct qede_dev *edev)
981 {
982 	mutex_unlock(&edev->qede_lock);
983 }
984 
985 /* This version of the lock should be used when acquiring the RTNL lock is also
986  * needed in addition to the internal qede lock.
987  */
988 static void qede_lock(struct qede_dev *edev)
989 {
990 	rtnl_lock();
991 	__qede_lock(edev);
992 }
993 
994 static void qede_unlock(struct qede_dev *edev)
995 {
996 	__qede_unlock(edev);
997 	rtnl_unlock();
998 }
999 
1000 static void qede_sp_task(struct work_struct *work)
1001 {
1002 	struct qede_dev *edev = container_of(work, struct qede_dev,
1003 					     sp_task.work);
1004 
1005 	/* The locking scheme depends on the specific flag:
1006 	 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1007 	 * ensure that ongoing flows are ended and new ones are not started.
1008 	 * In other cases - only the internal qede lock should be acquired.
1009 	 */
1010 
1011 	if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1012 #ifdef CONFIG_QED_SRIOV
1013 		/* SRIOV must be disabled outside the lock to avoid a deadlock.
1014 		 * The recovery of the active VFs is currently not supported.
1015 		 */
1016 		if (pci_num_vf(edev->pdev))
1017 			qede_sriov_configure(edev->pdev, 0);
1018 #endif
1019 		qede_lock(edev);
1020 		qede_recovery_handler(edev);
1021 		qede_unlock(edev);
1022 	}
1023 
1024 	__qede_lock(edev);
1025 
1026 	if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1027 		if (edev->state == QEDE_STATE_OPEN)
1028 			qede_config_rx_mode(edev->ndev);
1029 
1030 #ifdef CONFIG_RFS_ACCEL
1031 	if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1032 		if (edev->state == QEDE_STATE_OPEN)
1033 			qede_process_arfs_filters(edev, false);
1034 	}
1035 #endif
1036 	if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1037 		qede_generic_hw_err_handler(edev);
1038 	__qede_unlock(edev);
1039 
1040 	if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1041 #ifdef CONFIG_QED_SRIOV
1042 		/* SRIOV must be disabled outside the lock to avoid a deadlock.
1043 		 * The recovery of the active VFs is currently not supported.
1044 		 */
1045 		if (pci_num_vf(edev->pdev))
1046 			qede_sriov_configure(edev->pdev, 0);
1047 #endif
1048 		edev->ops->common->recovery_process(edev->cdev);
1049 	}
1050 }
1051 
1052 static void qede_update_pf_params(struct qed_dev *cdev)
1053 {
1054 	struct qed_pf_params pf_params;
1055 	u16 num_cons;
1056 
1057 	/* 64 rx + 64 tx + 64 XDP */
1058 	memset(&pf_params, 0, sizeof(struct qed_pf_params));
1059 
1060 	/* 1 rx + 1 xdp + max tx cos */
1061 	num_cons = QED_MIN_L2_CONS;
1062 
1063 	pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1064 
1065 	/* Same for VFs - make sure they'll have sufficient connections
1066 	 * to support XDP Tx queues.
1067 	 */
1068 	pf_params.eth_pf_params.num_vf_cons = 48;
1069 
1070 	pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1071 	qed_ops->common->update_pf_params(cdev, &pf_params);
1072 }
1073 
1074 #define QEDE_FW_VER_STR_SIZE	80
1075 
1076 static void qede_log_probe(struct qede_dev *edev)
1077 {
1078 	struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1079 	u8 buf[QEDE_FW_VER_STR_SIZE];
1080 	size_t left_size;
1081 
1082 	snprintf(buf, QEDE_FW_VER_STR_SIZE,
1083 		 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1084 		 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1085 		 p_dev_info->fw_eng,
1086 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1087 		 QED_MFW_VERSION_3_OFFSET,
1088 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1089 		 QED_MFW_VERSION_2_OFFSET,
1090 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1091 		 QED_MFW_VERSION_1_OFFSET,
1092 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1093 		 QED_MFW_VERSION_0_OFFSET);
1094 
1095 	left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1096 	if (p_dev_info->mbi_version && left_size)
1097 		snprintf(buf + strlen(buf), left_size,
1098 			 " [MBI %d.%d.%d]",
1099 			 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1100 			 QED_MBI_VERSION_2_OFFSET,
1101 			 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1102 			 QED_MBI_VERSION_1_OFFSET,
1103 			 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1104 			 QED_MBI_VERSION_0_OFFSET);
1105 
1106 	pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1107 		PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1108 		buf, edev->ndev->name);
1109 }
1110 
1111 enum qede_probe_mode {
1112 	QEDE_PROBE_NORMAL,
1113 	QEDE_PROBE_RECOVERY,
1114 };
1115 
1116 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1117 			bool is_vf, enum qede_probe_mode mode)
1118 {
1119 	struct qed_probe_params probe_params;
1120 	struct qed_slowpath_params sp_params;
1121 	struct qed_dev_eth_info dev_info;
1122 	struct qede_dev *edev;
1123 	struct qed_dev *cdev;
1124 	int rc;
1125 
1126 	if (unlikely(dp_level & QED_LEVEL_INFO))
1127 		pr_notice("Starting qede probe\n");
1128 
1129 	memset(&probe_params, 0, sizeof(probe_params));
1130 	probe_params.protocol = QED_PROTOCOL_ETH;
1131 	probe_params.dp_module = dp_module;
1132 	probe_params.dp_level = dp_level;
1133 	probe_params.is_vf = is_vf;
1134 	probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1135 	cdev = qed_ops->common->probe(pdev, &probe_params);
1136 	if (!cdev) {
1137 		rc = -ENODEV;
1138 		goto err0;
1139 	}
1140 
1141 	qede_update_pf_params(cdev);
1142 
1143 	/* Start the Slowpath-process */
1144 	memset(&sp_params, 0, sizeof(sp_params));
1145 	sp_params.int_mode = QED_INT_MODE_MSIX;
1146 	sp_params.drv_major = QEDE_MAJOR_VERSION;
1147 	sp_params.drv_minor = QEDE_MINOR_VERSION;
1148 	sp_params.drv_rev = QEDE_REVISION_VERSION;
1149 	sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1150 	strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1151 	rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1152 	if (rc) {
1153 		pr_notice("Cannot start slowpath\n");
1154 		goto err1;
1155 	}
1156 
1157 	/* Learn information crucial for qede to progress */
1158 	rc = qed_ops->fill_dev_info(cdev, &dev_info);
1159 	if (rc)
1160 		goto err2;
1161 
1162 	if (mode != QEDE_PROBE_RECOVERY) {
1163 		edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1164 					   dp_level);
1165 		if (!edev) {
1166 			rc = -ENOMEM;
1167 			goto err2;
1168 		}
1169 	} else {
1170 		struct net_device *ndev = pci_get_drvdata(pdev);
1171 
1172 		edev = netdev_priv(ndev);
1173 		edev->cdev = cdev;
1174 		memset(&edev->stats, 0, sizeof(edev->stats));
1175 		memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1176 	}
1177 
1178 	if (is_vf)
1179 		set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1180 
1181 	qede_init_ndev(edev);
1182 
1183 	rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1184 	if (rc)
1185 		goto err3;
1186 
1187 	if (mode != QEDE_PROBE_RECOVERY) {
1188 		/* Prepare the lock prior to the registration of the netdev,
1189 		 * as once it's registered we might reach flows requiring it
1190 		 * [it's even possible to reach a flow needing it directly
1191 		 * from there, although it's unlikely].
1192 		 */
1193 		INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1194 		mutex_init(&edev->qede_lock);
1195 
1196 		rc = register_netdev(edev->ndev);
1197 		if (rc) {
1198 			DP_NOTICE(edev, "Cannot register net-device\n");
1199 			goto err4;
1200 		}
1201 	}
1202 
1203 	edev->ops->common->set_name(cdev, edev->ndev->name);
1204 
1205 	/* PTP not supported on VFs */
1206 	if (!is_vf)
1207 		qede_ptp_enable(edev);
1208 
1209 	edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1210 
1211 #ifdef CONFIG_DCB
1212 	if (!IS_VF(edev))
1213 		qede_set_dcbnl_ops(edev->ndev);
1214 #endif
1215 
1216 	edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1217 
1218 	qede_log_probe(edev);
1219 	return 0;
1220 
1221 err4:
1222 	qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1223 err3:
1224 	free_netdev(edev->ndev);
1225 err2:
1226 	qed_ops->common->slowpath_stop(cdev);
1227 err1:
1228 	qed_ops->common->remove(cdev);
1229 err0:
1230 	return rc;
1231 }
1232 
1233 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1234 {
1235 	bool is_vf = false;
1236 	u32 dp_module = 0;
1237 	u8 dp_level = 0;
1238 
1239 	switch ((enum qede_pci_private)id->driver_data) {
1240 	case QEDE_PRIVATE_VF:
1241 		if (debug & QED_LOG_VERBOSE_MASK)
1242 			dev_err(&pdev->dev, "Probing a VF\n");
1243 		is_vf = true;
1244 		break;
1245 	default:
1246 		if (debug & QED_LOG_VERBOSE_MASK)
1247 			dev_err(&pdev->dev, "Probing a PF\n");
1248 	}
1249 
1250 	qede_config_debug(debug, &dp_module, &dp_level);
1251 
1252 	return __qede_probe(pdev, dp_module, dp_level, is_vf,
1253 			    QEDE_PROBE_NORMAL);
1254 }
1255 
1256 enum qede_remove_mode {
1257 	QEDE_REMOVE_NORMAL,
1258 	QEDE_REMOVE_RECOVERY,
1259 };
1260 
1261 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1262 {
1263 	struct net_device *ndev = pci_get_drvdata(pdev);
1264 	struct qede_dev *edev;
1265 	struct qed_dev *cdev;
1266 
1267 	if (!ndev) {
1268 		dev_info(&pdev->dev, "Device has already been removed\n");
1269 		return;
1270 	}
1271 
1272 	edev = netdev_priv(ndev);
1273 	cdev = edev->cdev;
1274 
1275 	DP_INFO(edev, "Starting qede_remove\n");
1276 
1277 	qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1278 
1279 	if (mode != QEDE_REMOVE_RECOVERY) {
1280 		unregister_netdev(ndev);
1281 
1282 		cancel_delayed_work_sync(&edev->sp_task);
1283 
1284 		edev->ops->common->set_power_state(cdev, PCI_D0);
1285 
1286 		pci_set_drvdata(pdev, NULL);
1287 	}
1288 
1289 	qede_ptp_disable(edev);
1290 
1291 	/* Use global ops since we've freed edev */
1292 	qed_ops->common->slowpath_stop(cdev);
1293 	if (system_state == SYSTEM_POWER_OFF)
1294 		return;
1295 	qed_ops->common->remove(cdev);
1296 	edev->cdev = NULL;
1297 
1298 	/* Since this can happen out-of-sync with other flows,
1299 	 * don't release the netdevice until after slowpath stop
1300 	 * has been called to guarantee various other contexts
1301 	 * [e.g., QED register callbacks] won't break anything when
1302 	 * accessing the netdevice.
1303 	 */
1304 	if (mode != QEDE_REMOVE_RECOVERY)
1305 		free_netdev(ndev);
1306 
1307 	dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1308 }
1309 
1310 static void qede_remove(struct pci_dev *pdev)
1311 {
1312 	__qede_remove(pdev, QEDE_REMOVE_NORMAL);
1313 }
1314 
1315 static void qede_shutdown(struct pci_dev *pdev)
1316 {
1317 	__qede_remove(pdev, QEDE_REMOVE_NORMAL);
1318 }
1319 
1320 /* -------------------------------------------------------------------------
1321  * START OF LOAD / UNLOAD
1322  * -------------------------------------------------------------------------
1323  */
1324 
1325 static int qede_set_num_queues(struct qede_dev *edev)
1326 {
1327 	int rc;
1328 	u16 rss_num;
1329 
1330 	/* Setup queues according to possible resources*/
1331 	if (edev->req_queues)
1332 		rss_num = edev->req_queues;
1333 	else
1334 		rss_num = netif_get_num_default_rss_queues() *
1335 			  edev->dev_info.common.num_hwfns;
1336 
1337 	rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1338 
1339 	rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1340 	if (rc > 0) {
1341 		/* Managed to request interrupts for our queues */
1342 		edev->num_queues = rc;
1343 		DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1344 			QEDE_QUEUE_CNT(edev), rss_num);
1345 		rc = 0;
1346 	}
1347 
1348 	edev->fp_num_tx = edev->req_num_tx;
1349 	edev->fp_num_rx = edev->req_num_rx;
1350 
1351 	return rc;
1352 }
1353 
1354 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1355 			     u16 sb_id)
1356 {
1357 	if (sb_info->sb_virt) {
1358 		edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1359 					      QED_SB_TYPE_L2_QUEUE);
1360 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1361 				  (void *)sb_info->sb_virt, sb_info->sb_phys);
1362 		memset(sb_info, 0, sizeof(*sb_info));
1363 	}
1364 }
1365 
1366 /* This function allocates fast-path status block memory */
1367 static int qede_alloc_mem_sb(struct qede_dev *edev,
1368 			     struct qed_sb_info *sb_info, u16 sb_id)
1369 {
1370 	struct status_block_e4 *sb_virt;
1371 	dma_addr_t sb_phys;
1372 	int rc;
1373 
1374 	sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1375 				     sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1376 	if (!sb_virt) {
1377 		DP_ERR(edev, "Status block allocation failed\n");
1378 		return -ENOMEM;
1379 	}
1380 
1381 	rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1382 					sb_virt, sb_phys, sb_id,
1383 					QED_SB_TYPE_L2_QUEUE);
1384 	if (rc) {
1385 		DP_ERR(edev, "Status block initialization failed\n");
1386 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1387 				  sb_virt, sb_phys);
1388 		return rc;
1389 	}
1390 
1391 	return 0;
1392 }
1393 
1394 static void qede_free_rx_buffers(struct qede_dev *edev,
1395 				 struct qede_rx_queue *rxq)
1396 {
1397 	u16 i;
1398 
1399 	for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1400 		struct sw_rx_data *rx_buf;
1401 		struct page *data;
1402 
1403 		rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1404 		data = rx_buf->data;
1405 
1406 		dma_unmap_page(&edev->pdev->dev,
1407 			       rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1408 
1409 		rx_buf->data = NULL;
1410 		__free_page(data);
1411 	}
1412 }
1413 
1414 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1415 {
1416 	/* Free rx buffers */
1417 	qede_free_rx_buffers(edev, rxq);
1418 
1419 	/* Free the parallel SW ring */
1420 	kfree(rxq->sw_rx_ring);
1421 
1422 	/* Free the real RQ ring used by FW */
1423 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1424 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1425 }
1426 
1427 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1428 {
1429 	int i;
1430 
1431 	for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1432 		struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1433 
1434 		tpa_info->state = QEDE_AGG_STATE_NONE;
1435 	}
1436 }
1437 
1438 /* This function allocates all memory needed per Rx queue */
1439 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1440 {
1441 	int i, rc, size;
1442 
1443 	rxq->num_rx_buffers = edev->q_num_rx_buffers;
1444 
1445 	rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1446 
1447 	rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1448 	size = rxq->rx_headroom +
1449 	       SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1450 
1451 	/* Make sure that the headroom and  payload fit in a single page */
1452 	if (rxq->rx_buf_size + size > PAGE_SIZE)
1453 		rxq->rx_buf_size = PAGE_SIZE - size;
1454 
1455 	/* Segment size to split a page in multiple equal parts,
1456 	 * unless XDP is used in which case we'd use the entire page.
1457 	 */
1458 	if (!edev->xdp_prog) {
1459 		size = size + rxq->rx_buf_size;
1460 		rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1461 	} else {
1462 		rxq->rx_buf_seg_size = PAGE_SIZE;
1463 		edev->ndev->features &= ~NETIF_F_GRO_HW;
1464 	}
1465 
1466 	/* Allocate the parallel driver ring for Rx buffers */
1467 	size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1468 	rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1469 	if (!rxq->sw_rx_ring) {
1470 		DP_ERR(edev, "Rx buffers ring allocation failed\n");
1471 		rc = -ENOMEM;
1472 		goto err;
1473 	}
1474 
1475 	/* Allocate FW Rx ring  */
1476 	rc = edev->ops->common->chain_alloc(edev->cdev,
1477 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1478 					    QED_CHAIN_MODE_NEXT_PTR,
1479 					    QED_CHAIN_CNT_TYPE_U16,
1480 					    RX_RING_SIZE,
1481 					    sizeof(struct eth_rx_bd),
1482 					    &rxq->rx_bd_ring, NULL);
1483 	if (rc)
1484 		goto err;
1485 
1486 	/* Allocate FW completion ring */
1487 	rc = edev->ops->common->chain_alloc(edev->cdev,
1488 					    QED_CHAIN_USE_TO_CONSUME,
1489 					    QED_CHAIN_MODE_PBL,
1490 					    QED_CHAIN_CNT_TYPE_U16,
1491 					    RX_RING_SIZE,
1492 					    sizeof(union eth_rx_cqe),
1493 					    &rxq->rx_comp_ring, NULL);
1494 	if (rc)
1495 		goto err;
1496 
1497 	/* Allocate buffers for the Rx ring */
1498 	rxq->filled_buffers = 0;
1499 	for (i = 0; i < rxq->num_rx_buffers; i++) {
1500 		rc = qede_alloc_rx_buffer(rxq, false);
1501 		if (rc) {
1502 			DP_ERR(edev,
1503 			       "Rx buffers allocation failed at index %d\n", i);
1504 			goto err;
1505 		}
1506 	}
1507 
1508 	edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1509 	if (!edev->gro_disable)
1510 		qede_set_tpa_param(rxq);
1511 err:
1512 	return rc;
1513 }
1514 
1515 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1516 {
1517 	/* Free the parallel SW ring */
1518 	if (txq->is_xdp)
1519 		kfree(txq->sw_tx_ring.xdp);
1520 	else
1521 		kfree(txq->sw_tx_ring.skbs);
1522 
1523 	/* Free the real RQ ring used by FW */
1524 	edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1525 }
1526 
1527 /* This function allocates all memory needed per Tx queue */
1528 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1529 {
1530 	union eth_tx_bd_types *p_virt;
1531 	int size, rc;
1532 
1533 	txq->num_tx_buffers = edev->q_num_tx_buffers;
1534 
1535 	/* Allocate the parallel driver ring for Tx buffers */
1536 	if (txq->is_xdp) {
1537 		size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1538 		txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1539 		if (!txq->sw_tx_ring.xdp)
1540 			goto err;
1541 	} else {
1542 		size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1543 		txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1544 		if (!txq->sw_tx_ring.skbs)
1545 			goto err;
1546 	}
1547 
1548 	rc = edev->ops->common->chain_alloc(edev->cdev,
1549 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1550 					    QED_CHAIN_MODE_PBL,
1551 					    QED_CHAIN_CNT_TYPE_U16,
1552 					    txq->num_tx_buffers,
1553 					    sizeof(*p_virt),
1554 					    &txq->tx_pbl, NULL);
1555 	if (rc)
1556 		goto err;
1557 
1558 	return 0;
1559 
1560 err:
1561 	qede_free_mem_txq(edev, txq);
1562 	return -ENOMEM;
1563 }
1564 
1565 /* This function frees all memory of a single fp */
1566 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1567 {
1568 	qede_free_mem_sb(edev, fp->sb_info, fp->id);
1569 
1570 	if (fp->type & QEDE_FASTPATH_RX)
1571 		qede_free_mem_rxq(edev, fp->rxq);
1572 
1573 	if (fp->type & QEDE_FASTPATH_XDP)
1574 		qede_free_mem_txq(edev, fp->xdp_tx);
1575 
1576 	if (fp->type & QEDE_FASTPATH_TX) {
1577 		int cos;
1578 
1579 		for_each_cos_in_txq(edev, cos)
1580 			qede_free_mem_txq(edev, &fp->txq[cos]);
1581 	}
1582 }
1583 
1584 /* This function allocates all memory needed for a single fp (i.e. an entity
1585  * which contains status block, one rx queue and/or multiple per-TC tx queues.
1586  */
1587 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1588 {
1589 	int rc = 0;
1590 
1591 	rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1592 	if (rc)
1593 		goto out;
1594 
1595 	if (fp->type & QEDE_FASTPATH_RX) {
1596 		rc = qede_alloc_mem_rxq(edev, fp->rxq);
1597 		if (rc)
1598 			goto out;
1599 	}
1600 
1601 	if (fp->type & QEDE_FASTPATH_XDP) {
1602 		rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1603 		if (rc)
1604 			goto out;
1605 	}
1606 
1607 	if (fp->type & QEDE_FASTPATH_TX) {
1608 		int cos;
1609 
1610 		for_each_cos_in_txq(edev, cos) {
1611 			rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1612 			if (rc)
1613 				goto out;
1614 		}
1615 	}
1616 
1617 out:
1618 	return rc;
1619 }
1620 
1621 static void qede_free_mem_load(struct qede_dev *edev)
1622 {
1623 	int i;
1624 
1625 	for_each_queue(i) {
1626 		struct qede_fastpath *fp = &edev->fp_array[i];
1627 
1628 		qede_free_mem_fp(edev, fp);
1629 	}
1630 }
1631 
1632 /* This function allocates all qede memory at NIC load. */
1633 static int qede_alloc_mem_load(struct qede_dev *edev)
1634 {
1635 	int rc = 0, queue_id;
1636 
1637 	for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1638 		struct qede_fastpath *fp = &edev->fp_array[queue_id];
1639 
1640 		rc = qede_alloc_mem_fp(edev, fp);
1641 		if (rc) {
1642 			DP_ERR(edev,
1643 			       "Failed to allocate memory for fastpath - rss id = %d\n",
1644 			       queue_id);
1645 			qede_free_mem_load(edev);
1646 			return rc;
1647 		}
1648 	}
1649 
1650 	return 0;
1651 }
1652 
1653 static void qede_empty_tx_queue(struct qede_dev *edev,
1654 				struct qede_tx_queue *txq)
1655 {
1656 	unsigned int pkts_compl = 0, bytes_compl = 0;
1657 	struct netdev_queue *netdev_txq;
1658 	int rc, len = 0;
1659 
1660 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1661 
1662 	while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1663 	       qed_chain_get_prod_idx(&txq->tx_pbl)) {
1664 		DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1665 			   "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1666 			   txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1667 			   qed_chain_get_prod_idx(&txq->tx_pbl));
1668 
1669 		rc = qede_free_tx_pkt(edev, txq, &len);
1670 		if (rc) {
1671 			DP_NOTICE(edev,
1672 				  "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1673 				  txq->index,
1674 				  qed_chain_get_cons_idx(&txq->tx_pbl),
1675 				  qed_chain_get_prod_idx(&txq->tx_pbl));
1676 			break;
1677 		}
1678 
1679 		bytes_compl += len;
1680 		pkts_compl++;
1681 		txq->sw_tx_cons++;
1682 	}
1683 
1684 	netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1685 }
1686 
1687 static void qede_empty_tx_queues(struct qede_dev *edev)
1688 {
1689 	int i;
1690 
1691 	for_each_queue(i)
1692 		if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1693 			int cos;
1694 
1695 			for_each_cos_in_txq(edev, cos) {
1696 				struct qede_fastpath *fp;
1697 
1698 				fp = &edev->fp_array[i];
1699 				qede_empty_tx_queue(edev,
1700 						    &fp->txq[cos]);
1701 			}
1702 		}
1703 }
1704 
1705 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
1706 static void qede_init_fp(struct qede_dev *edev)
1707 {
1708 	int queue_id, rxq_index = 0, txq_index = 0;
1709 	struct qede_fastpath *fp;
1710 
1711 	for_each_queue(queue_id) {
1712 		fp = &edev->fp_array[queue_id];
1713 
1714 		fp->edev = edev;
1715 		fp->id = queue_id;
1716 
1717 		if (fp->type & QEDE_FASTPATH_XDP) {
1718 			fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1719 								rxq_index);
1720 			fp->xdp_tx->is_xdp = 1;
1721 		}
1722 
1723 		if (fp->type & QEDE_FASTPATH_RX) {
1724 			fp->rxq->rxq_id = rxq_index++;
1725 
1726 			/* Determine how to map buffers for this queue */
1727 			if (fp->type & QEDE_FASTPATH_XDP)
1728 				fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1729 			else
1730 				fp->rxq->data_direction = DMA_FROM_DEVICE;
1731 			fp->rxq->dev = &edev->pdev->dev;
1732 
1733 			/* Driver have no error path from here */
1734 			WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1735 						 fp->rxq->rxq_id) < 0);
1736 		}
1737 
1738 		if (fp->type & QEDE_FASTPATH_TX) {
1739 			int cos;
1740 
1741 			for_each_cos_in_txq(edev, cos) {
1742 				struct qede_tx_queue *txq = &fp->txq[cos];
1743 				u16 ndev_tx_id;
1744 
1745 				txq->cos = cos;
1746 				txq->index = txq_index;
1747 				ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1748 				txq->ndev_txq_id = ndev_tx_id;
1749 
1750 				if (edev->dev_info.is_legacy)
1751 					txq->is_legacy = true;
1752 				txq->dev = &edev->pdev->dev;
1753 			}
1754 
1755 			txq_index++;
1756 		}
1757 
1758 		snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1759 			 edev->ndev->name, queue_id);
1760 	}
1761 }
1762 
1763 static int qede_set_real_num_queues(struct qede_dev *edev)
1764 {
1765 	int rc = 0;
1766 
1767 	rc = netif_set_real_num_tx_queues(edev->ndev,
1768 					  QEDE_TSS_COUNT(edev) *
1769 					  edev->dev_info.num_tc);
1770 	if (rc) {
1771 		DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1772 		return rc;
1773 	}
1774 
1775 	rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1776 	if (rc) {
1777 		DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1778 		return rc;
1779 	}
1780 
1781 	return 0;
1782 }
1783 
1784 static void qede_napi_disable_remove(struct qede_dev *edev)
1785 {
1786 	int i;
1787 
1788 	for_each_queue(i) {
1789 		napi_disable(&edev->fp_array[i].napi);
1790 
1791 		netif_napi_del(&edev->fp_array[i].napi);
1792 	}
1793 }
1794 
1795 static void qede_napi_add_enable(struct qede_dev *edev)
1796 {
1797 	int i;
1798 
1799 	/* Add NAPI objects */
1800 	for_each_queue(i) {
1801 		netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1802 			       qede_poll, NAPI_POLL_WEIGHT);
1803 		napi_enable(&edev->fp_array[i].napi);
1804 	}
1805 }
1806 
1807 static void qede_sync_free_irqs(struct qede_dev *edev)
1808 {
1809 	int i;
1810 
1811 	for (i = 0; i < edev->int_info.used_cnt; i++) {
1812 		if (edev->int_info.msix_cnt) {
1813 			synchronize_irq(edev->int_info.msix[i].vector);
1814 			free_irq(edev->int_info.msix[i].vector,
1815 				 &edev->fp_array[i]);
1816 		} else {
1817 			edev->ops->common->simd_handler_clean(edev->cdev, i);
1818 		}
1819 	}
1820 
1821 	edev->int_info.used_cnt = 0;
1822 }
1823 
1824 static int qede_req_msix_irqs(struct qede_dev *edev)
1825 {
1826 	int i, rc;
1827 
1828 	/* Sanitize number of interrupts == number of prepared RSS queues */
1829 	if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1830 		DP_ERR(edev,
1831 		       "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1832 		       QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1833 		return -EINVAL;
1834 	}
1835 
1836 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1837 #ifdef CONFIG_RFS_ACCEL
1838 		struct qede_fastpath *fp = &edev->fp_array[i];
1839 
1840 		if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1841 			rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1842 					      edev->int_info.msix[i].vector);
1843 			if (rc) {
1844 				DP_ERR(edev, "Failed to add CPU rmap\n");
1845 				qede_free_arfs(edev);
1846 			}
1847 		}
1848 #endif
1849 		rc = request_irq(edev->int_info.msix[i].vector,
1850 				 qede_msix_fp_int, 0, edev->fp_array[i].name,
1851 				 &edev->fp_array[i]);
1852 		if (rc) {
1853 			DP_ERR(edev, "Request fp %d irq failed\n", i);
1854 			qede_sync_free_irqs(edev);
1855 			return rc;
1856 		}
1857 		DP_VERBOSE(edev, NETIF_MSG_INTR,
1858 			   "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1859 			   edev->fp_array[i].name, i,
1860 			   &edev->fp_array[i]);
1861 		edev->int_info.used_cnt++;
1862 	}
1863 
1864 	return 0;
1865 }
1866 
1867 static void qede_simd_fp_handler(void *cookie)
1868 {
1869 	struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1870 
1871 	napi_schedule_irqoff(&fp->napi);
1872 }
1873 
1874 static int qede_setup_irqs(struct qede_dev *edev)
1875 {
1876 	int i, rc = 0;
1877 
1878 	/* Learn Interrupt configuration */
1879 	rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1880 	if (rc)
1881 		return rc;
1882 
1883 	if (edev->int_info.msix_cnt) {
1884 		rc = qede_req_msix_irqs(edev);
1885 		if (rc)
1886 			return rc;
1887 		edev->ndev->irq = edev->int_info.msix[0].vector;
1888 	} else {
1889 		const struct qed_common_ops *ops;
1890 
1891 		/* qed should learn receive the RSS ids and callbacks */
1892 		ops = edev->ops->common;
1893 		for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1894 			ops->simd_handler_config(edev->cdev,
1895 						 &edev->fp_array[i], i,
1896 						 qede_simd_fp_handler);
1897 		edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1898 	}
1899 	return 0;
1900 }
1901 
1902 static int qede_drain_txq(struct qede_dev *edev,
1903 			  struct qede_tx_queue *txq, bool allow_drain)
1904 {
1905 	int rc, cnt = 1000;
1906 
1907 	while (txq->sw_tx_cons != txq->sw_tx_prod) {
1908 		if (!cnt) {
1909 			if (allow_drain) {
1910 				DP_NOTICE(edev,
1911 					  "Tx queue[%d] is stuck, requesting MCP to drain\n",
1912 					  txq->index);
1913 				rc = edev->ops->common->drain(edev->cdev);
1914 				if (rc)
1915 					return rc;
1916 				return qede_drain_txq(edev, txq, false);
1917 			}
1918 			DP_NOTICE(edev,
1919 				  "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1920 				  txq->index, txq->sw_tx_prod,
1921 				  txq->sw_tx_cons);
1922 			return -ENODEV;
1923 		}
1924 		cnt--;
1925 		usleep_range(1000, 2000);
1926 		barrier();
1927 	}
1928 
1929 	/* FW finished processing, wait for HW to transmit all tx packets */
1930 	usleep_range(1000, 2000);
1931 
1932 	return 0;
1933 }
1934 
1935 static int qede_stop_txq(struct qede_dev *edev,
1936 			 struct qede_tx_queue *txq, int rss_id)
1937 {
1938 	/* delete doorbell from doorbell recovery mechanism */
1939 	edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
1940 					   &txq->tx_db);
1941 
1942 	return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
1943 }
1944 
1945 static int qede_stop_queues(struct qede_dev *edev)
1946 {
1947 	struct qed_update_vport_params *vport_update_params;
1948 	struct qed_dev *cdev = edev->cdev;
1949 	struct qede_fastpath *fp;
1950 	int rc, i;
1951 
1952 	/* Disable the vport */
1953 	vport_update_params = vzalloc(sizeof(*vport_update_params));
1954 	if (!vport_update_params)
1955 		return -ENOMEM;
1956 
1957 	vport_update_params->vport_id = 0;
1958 	vport_update_params->update_vport_active_flg = 1;
1959 	vport_update_params->vport_active_flg = 0;
1960 	vport_update_params->update_rss_flg = 0;
1961 
1962 	rc = edev->ops->vport_update(cdev, vport_update_params);
1963 	vfree(vport_update_params);
1964 
1965 	if (rc) {
1966 		DP_ERR(edev, "Failed to update vport\n");
1967 		return rc;
1968 	}
1969 
1970 	/* Flush Tx queues. If needed, request drain from MCP */
1971 	for_each_queue(i) {
1972 		fp = &edev->fp_array[i];
1973 
1974 		if (fp->type & QEDE_FASTPATH_TX) {
1975 			int cos;
1976 
1977 			for_each_cos_in_txq(edev, cos) {
1978 				rc = qede_drain_txq(edev, &fp->txq[cos], true);
1979 				if (rc)
1980 					return rc;
1981 			}
1982 		}
1983 
1984 		if (fp->type & QEDE_FASTPATH_XDP) {
1985 			rc = qede_drain_txq(edev, fp->xdp_tx, true);
1986 			if (rc)
1987 				return rc;
1988 		}
1989 	}
1990 
1991 	/* Stop all Queues in reverse order */
1992 	for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
1993 		fp = &edev->fp_array[i];
1994 
1995 		/* Stop the Tx Queue(s) */
1996 		if (fp->type & QEDE_FASTPATH_TX) {
1997 			int cos;
1998 
1999 			for_each_cos_in_txq(edev, cos) {
2000 				rc = qede_stop_txq(edev, &fp->txq[cos], i);
2001 				if (rc)
2002 					return rc;
2003 			}
2004 		}
2005 
2006 		/* Stop the Rx Queue */
2007 		if (fp->type & QEDE_FASTPATH_RX) {
2008 			rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2009 			if (rc) {
2010 				DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2011 				return rc;
2012 			}
2013 		}
2014 
2015 		/* Stop the XDP forwarding queue */
2016 		if (fp->type & QEDE_FASTPATH_XDP) {
2017 			rc = qede_stop_txq(edev, fp->xdp_tx, i);
2018 			if (rc)
2019 				return rc;
2020 
2021 			bpf_prog_put(fp->rxq->xdp_prog);
2022 		}
2023 	}
2024 
2025 	/* Stop the vport */
2026 	rc = edev->ops->vport_stop(cdev, 0);
2027 	if (rc)
2028 		DP_ERR(edev, "Failed to stop VPORT\n");
2029 
2030 	return rc;
2031 }
2032 
2033 static int qede_start_txq(struct qede_dev *edev,
2034 			  struct qede_fastpath *fp,
2035 			  struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2036 {
2037 	dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2038 	u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2039 	struct qed_queue_start_common_params params;
2040 	struct qed_txq_start_ret_params ret_params;
2041 	int rc;
2042 
2043 	memset(&params, 0, sizeof(params));
2044 	memset(&ret_params, 0, sizeof(ret_params));
2045 
2046 	/* Let the XDP queue share the queue-zone with one of the regular txq.
2047 	 * We don't really care about its coalescing.
2048 	 */
2049 	if (txq->is_xdp)
2050 		params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2051 	else
2052 		params.queue_id = txq->index;
2053 
2054 	params.p_sb = fp->sb_info;
2055 	params.sb_idx = sb_idx;
2056 	params.tc = txq->cos;
2057 
2058 	rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
2059 				   page_cnt, &ret_params);
2060 	if (rc) {
2061 		DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2062 		return rc;
2063 	}
2064 
2065 	txq->doorbell_addr = ret_params.p_doorbell;
2066 	txq->handle = ret_params.p_handle;
2067 
2068 	/* Determine the FW consumer address associated */
2069 	txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2070 
2071 	/* Prepare the doorbell parameters */
2072 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2073 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2074 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2075 		  DQ_XCM_ETH_TX_BD_PROD_CMD);
2076 	txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2077 
2078 	/* register doorbell with doorbell recovery mechanism */
2079 	rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2080 						&txq->tx_db, DB_REC_WIDTH_32B,
2081 						DB_REC_KERNEL);
2082 
2083 	return rc;
2084 }
2085 
2086 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2087 {
2088 	int vlan_removal_en = 1;
2089 	struct qed_dev *cdev = edev->cdev;
2090 	struct qed_dev_info *qed_info = &edev->dev_info.common;
2091 	struct qed_update_vport_params *vport_update_params;
2092 	struct qed_queue_start_common_params q_params;
2093 	struct qed_start_vport_params start = {0};
2094 	int rc, i;
2095 
2096 	if (!edev->num_queues) {
2097 		DP_ERR(edev,
2098 		       "Cannot update V-VPORT as active as there are no Rx queues\n");
2099 		return -EINVAL;
2100 	}
2101 
2102 	vport_update_params = vzalloc(sizeof(*vport_update_params));
2103 	if (!vport_update_params)
2104 		return -ENOMEM;
2105 
2106 	start.handle_ptp_pkts = !!(edev->ptp);
2107 	start.gro_enable = !edev->gro_disable;
2108 	start.mtu = edev->ndev->mtu;
2109 	start.vport_id = 0;
2110 	start.drop_ttl0 = true;
2111 	start.remove_inner_vlan = vlan_removal_en;
2112 	start.clear_stats = clear_stats;
2113 
2114 	rc = edev->ops->vport_start(cdev, &start);
2115 
2116 	if (rc) {
2117 		DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2118 		goto out;
2119 	}
2120 
2121 	DP_VERBOSE(edev, NETIF_MSG_IFUP,
2122 		   "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2123 		   start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2124 
2125 	for_each_queue(i) {
2126 		struct qede_fastpath *fp = &edev->fp_array[i];
2127 		dma_addr_t p_phys_table;
2128 		u32 page_cnt;
2129 
2130 		if (fp->type & QEDE_FASTPATH_RX) {
2131 			struct qed_rxq_start_ret_params ret_params;
2132 			struct qede_rx_queue *rxq = fp->rxq;
2133 			__le16 *val;
2134 
2135 			memset(&ret_params, 0, sizeof(ret_params));
2136 			memset(&q_params, 0, sizeof(q_params));
2137 			q_params.queue_id = rxq->rxq_id;
2138 			q_params.vport_id = 0;
2139 			q_params.p_sb = fp->sb_info;
2140 			q_params.sb_idx = RX_PI;
2141 
2142 			p_phys_table =
2143 			    qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2144 			page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2145 
2146 			rc = edev->ops->q_rx_start(cdev, i, &q_params,
2147 						   rxq->rx_buf_size,
2148 						   rxq->rx_bd_ring.p_phys_addr,
2149 						   p_phys_table,
2150 						   page_cnt, &ret_params);
2151 			if (rc) {
2152 				DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2153 				       rc);
2154 				goto out;
2155 			}
2156 
2157 			/* Use the return parameters */
2158 			rxq->hw_rxq_prod_addr = ret_params.p_prod;
2159 			rxq->handle = ret_params.p_handle;
2160 
2161 			val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2162 			rxq->hw_cons_ptr = val;
2163 
2164 			qede_update_rx_prod(edev, rxq);
2165 		}
2166 
2167 		if (fp->type & QEDE_FASTPATH_XDP) {
2168 			rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2169 			if (rc)
2170 				goto out;
2171 
2172 			bpf_prog_add(edev->xdp_prog, 1);
2173 			fp->rxq->xdp_prog = edev->xdp_prog;
2174 		}
2175 
2176 		if (fp->type & QEDE_FASTPATH_TX) {
2177 			int cos;
2178 
2179 			for_each_cos_in_txq(edev, cos) {
2180 				rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2181 						    TX_PI(cos));
2182 				if (rc)
2183 					goto out;
2184 			}
2185 		}
2186 	}
2187 
2188 	/* Prepare and send the vport enable */
2189 	vport_update_params->vport_id = start.vport_id;
2190 	vport_update_params->update_vport_active_flg = 1;
2191 	vport_update_params->vport_active_flg = 1;
2192 
2193 	if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2194 	    qed_info->tx_switching) {
2195 		vport_update_params->update_tx_switching_flg = 1;
2196 		vport_update_params->tx_switching_flg = 1;
2197 	}
2198 
2199 	qede_fill_rss_params(edev, &vport_update_params->rss_params,
2200 			     &vport_update_params->update_rss_flg);
2201 
2202 	rc = edev->ops->vport_update(cdev, vport_update_params);
2203 	if (rc)
2204 		DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2205 
2206 out:
2207 	vfree(vport_update_params);
2208 	return rc;
2209 }
2210 
2211 enum qede_unload_mode {
2212 	QEDE_UNLOAD_NORMAL,
2213 	QEDE_UNLOAD_RECOVERY,
2214 };
2215 
2216 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2217 			bool is_locked)
2218 {
2219 	struct qed_link_params link_params;
2220 	int rc;
2221 
2222 	DP_INFO(edev, "Starting qede unload\n");
2223 
2224 	if (!is_locked)
2225 		__qede_lock(edev);
2226 
2227 	clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2228 
2229 	if (mode != QEDE_UNLOAD_RECOVERY)
2230 		edev->state = QEDE_STATE_CLOSED;
2231 
2232 	qede_rdma_dev_event_close(edev);
2233 
2234 	/* Close OS Tx */
2235 	netif_tx_disable(edev->ndev);
2236 	netif_carrier_off(edev->ndev);
2237 
2238 	if (mode != QEDE_UNLOAD_RECOVERY) {
2239 		/* Reset the link */
2240 		memset(&link_params, 0, sizeof(link_params));
2241 		link_params.link_up = false;
2242 		edev->ops->common->set_link(edev->cdev, &link_params);
2243 
2244 		rc = qede_stop_queues(edev);
2245 		if (rc) {
2246 			qede_sync_free_irqs(edev);
2247 			goto out;
2248 		}
2249 
2250 		DP_INFO(edev, "Stopped Queues\n");
2251 	}
2252 
2253 	qede_vlan_mark_nonconfigured(edev);
2254 	edev->ops->fastpath_stop(edev->cdev);
2255 
2256 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2257 		qede_poll_for_freeing_arfs_filters(edev);
2258 		qede_free_arfs(edev);
2259 	}
2260 
2261 	/* Release the interrupts */
2262 	qede_sync_free_irqs(edev);
2263 	edev->ops->common->set_fp_int(edev->cdev, 0);
2264 
2265 	qede_napi_disable_remove(edev);
2266 
2267 	if (mode == QEDE_UNLOAD_RECOVERY)
2268 		qede_empty_tx_queues(edev);
2269 
2270 	qede_free_mem_load(edev);
2271 	qede_free_fp_array(edev);
2272 
2273 out:
2274 	if (!is_locked)
2275 		__qede_unlock(edev);
2276 
2277 	if (mode != QEDE_UNLOAD_RECOVERY)
2278 		DP_NOTICE(edev, "Link is down\n");
2279 
2280 	edev->ptp_skip_txts = 0;
2281 
2282 	DP_INFO(edev, "Ending qede unload\n");
2283 }
2284 
2285 enum qede_load_mode {
2286 	QEDE_LOAD_NORMAL,
2287 	QEDE_LOAD_RELOAD,
2288 	QEDE_LOAD_RECOVERY,
2289 };
2290 
2291 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2292 		     bool is_locked)
2293 {
2294 	struct qed_link_params link_params;
2295 	u8 num_tc;
2296 	int rc;
2297 
2298 	DP_INFO(edev, "Starting qede load\n");
2299 
2300 	if (!is_locked)
2301 		__qede_lock(edev);
2302 
2303 	rc = qede_set_num_queues(edev);
2304 	if (rc)
2305 		goto out;
2306 
2307 	rc = qede_alloc_fp_array(edev);
2308 	if (rc)
2309 		goto out;
2310 
2311 	qede_init_fp(edev);
2312 
2313 	rc = qede_alloc_mem_load(edev);
2314 	if (rc)
2315 		goto err1;
2316 	DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2317 		QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2318 
2319 	rc = qede_set_real_num_queues(edev);
2320 	if (rc)
2321 		goto err2;
2322 
2323 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2324 		rc = qede_alloc_arfs(edev);
2325 		if (rc)
2326 			DP_NOTICE(edev, "aRFS memory allocation failed\n");
2327 	}
2328 
2329 	qede_napi_add_enable(edev);
2330 	DP_INFO(edev, "Napi added and enabled\n");
2331 
2332 	rc = qede_setup_irqs(edev);
2333 	if (rc)
2334 		goto err3;
2335 	DP_INFO(edev, "Setup IRQs succeeded\n");
2336 
2337 	rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2338 	if (rc)
2339 		goto err4;
2340 	DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2341 
2342 	num_tc = netdev_get_num_tc(edev->ndev);
2343 	num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2344 	qede_setup_tc(edev->ndev, num_tc);
2345 
2346 	/* Program un-configured VLANs */
2347 	qede_configure_vlan_filters(edev);
2348 
2349 	set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2350 
2351 	/* Ask for link-up using current configuration */
2352 	memset(&link_params, 0, sizeof(link_params));
2353 	link_params.link_up = true;
2354 	edev->ops->common->set_link(edev->cdev, &link_params);
2355 
2356 	edev->state = QEDE_STATE_OPEN;
2357 
2358 	DP_INFO(edev, "Ending successfully qede load\n");
2359 
2360 	goto out;
2361 err4:
2362 	qede_sync_free_irqs(edev);
2363 	memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2364 err3:
2365 	qede_napi_disable_remove(edev);
2366 err2:
2367 	qede_free_mem_load(edev);
2368 err1:
2369 	edev->ops->common->set_fp_int(edev->cdev, 0);
2370 	qede_free_fp_array(edev);
2371 	edev->num_queues = 0;
2372 	edev->fp_num_tx = 0;
2373 	edev->fp_num_rx = 0;
2374 out:
2375 	if (!is_locked)
2376 		__qede_unlock(edev);
2377 
2378 	return rc;
2379 }
2380 
2381 /* 'func' should be able to run between unload and reload assuming interface
2382  * is actually running, or afterwards in case it's currently DOWN.
2383  */
2384 void qede_reload(struct qede_dev *edev,
2385 		 struct qede_reload_args *args, bool is_locked)
2386 {
2387 	if (!is_locked)
2388 		__qede_lock(edev);
2389 
2390 	/* Since qede_lock is held, internal state wouldn't change even
2391 	 * if netdev state would start transitioning. Check whether current
2392 	 * internal configuration indicates device is up, then reload.
2393 	 */
2394 	if (edev->state == QEDE_STATE_OPEN) {
2395 		qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2396 		if (args)
2397 			args->func(edev, args);
2398 		qede_load(edev, QEDE_LOAD_RELOAD, true);
2399 
2400 		/* Since no one is going to do it for us, re-configure */
2401 		qede_config_rx_mode(edev->ndev);
2402 	} else if (args) {
2403 		args->func(edev, args);
2404 	}
2405 
2406 	if (!is_locked)
2407 		__qede_unlock(edev);
2408 }
2409 
2410 /* called with rtnl_lock */
2411 static int qede_open(struct net_device *ndev)
2412 {
2413 	struct qede_dev *edev = netdev_priv(ndev);
2414 	int rc;
2415 
2416 	netif_carrier_off(ndev);
2417 
2418 	edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2419 
2420 	rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2421 	if (rc)
2422 		return rc;
2423 
2424 	udp_tunnel_get_rx_info(ndev);
2425 
2426 	edev->ops->common->update_drv_state(edev->cdev, true);
2427 
2428 	return 0;
2429 }
2430 
2431 static int qede_close(struct net_device *ndev)
2432 {
2433 	struct qede_dev *edev = netdev_priv(ndev);
2434 
2435 	qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2436 
2437 	edev->ops->common->update_drv_state(edev->cdev, false);
2438 
2439 	return 0;
2440 }
2441 
2442 static void qede_link_update(void *dev, struct qed_link_output *link)
2443 {
2444 	struct qede_dev *edev = dev;
2445 
2446 	if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2447 		DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2448 		return;
2449 	}
2450 
2451 	if (link->link_up) {
2452 		if (!netif_carrier_ok(edev->ndev)) {
2453 			DP_NOTICE(edev, "Link is up\n");
2454 			netif_tx_start_all_queues(edev->ndev);
2455 			netif_carrier_on(edev->ndev);
2456 			qede_rdma_dev_event_open(edev);
2457 		}
2458 	} else {
2459 		if (netif_carrier_ok(edev->ndev)) {
2460 			DP_NOTICE(edev, "Link is down\n");
2461 			netif_tx_disable(edev->ndev);
2462 			netif_carrier_off(edev->ndev);
2463 			qede_rdma_dev_event_close(edev);
2464 		}
2465 	}
2466 }
2467 
2468 static void qede_schedule_recovery_handler(void *dev)
2469 {
2470 	struct qede_dev *edev = dev;
2471 
2472 	if (edev->state == QEDE_STATE_RECOVERY) {
2473 		DP_NOTICE(edev,
2474 			  "Avoid scheduling a recovery handling since already in recovery state\n");
2475 		return;
2476 	}
2477 
2478 	set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2479 	schedule_delayed_work(&edev->sp_task, 0);
2480 
2481 	DP_INFO(edev, "Scheduled a recovery handler\n");
2482 }
2483 
2484 static void qede_recovery_failed(struct qede_dev *edev)
2485 {
2486 	netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2487 
2488 	netif_device_detach(edev->ndev);
2489 
2490 	if (edev->cdev)
2491 		edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2492 }
2493 
2494 static void qede_recovery_handler(struct qede_dev *edev)
2495 {
2496 	u32 curr_state = edev->state;
2497 	int rc;
2498 
2499 	DP_NOTICE(edev, "Starting a recovery process\n");
2500 
2501 	/* No need to acquire first the qede_lock since is done by qede_sp_task
2502 	 * before calling this function.
2503 	 */
2504 	edev->state = QEDE_STATE_RECOVERY;
2505 
2506 	edev->ops->common->recovery_prolog(edev->cdev);
2507 
2508 	if (curr_state == QEDE_STATE_OPEN)
2509 		qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2510 
2511 	__qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2512 
2513 	rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2514 			  IS_VF(edev), QEDE_PROBE_RECOVERY);
2515 	if (rc) {
2516 		edev->cdev = NULL;
2517 		goto err;
2518 	}
2519 
2520 	if (curr_state == QEDE_STATE_OPEN) {
2521 		rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2522 		if (rc)
2523 			goto err;
2524 
2525 		qede_config_rx_mode(edev->ndev);
2526 		udp_tunnel_get_rx_info(edev->ndev);
2527 	}
2528 
2529 	edev->state = curr_state;
2530 
2531 	DP_NOTICE(edev, "Recovery handling is done\n");
2532 
2533 	return;
2534 
2535 err:
2536 	qede_recovery_failed(edev);
2537 }
2538 
2539 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2540 {
2541 	struct qed_dev *cdev = edev->cdev;
2542 
2543 	DP_NOTICE(edev,
2544 		  "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2545 		  edev->err_flags);
2546 
2547 	/* Get a call trace of the flow that led to the error */
2548 	WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2549 
2550 	/* Prevent HW attentions from being reasserted */
2551 	if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2552 		edev->ops->common->attn_clr_enable(cdev, true);
2553 
2554 	DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2555 }
2556 
2557 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2558 {
2559 	struct qed_dev *cdev = edev->cdev;
2560 
2561 	DP_NOTICE(edev,
2562 		  "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2563 		  edev->err_flags);
2564 
2565 	/* Trigger a recovery process.
2566 	 * This is placed in the sleep requiring section just to make
2567 	 * sure it is the last one, and that all the other operations
2568 	 * were completed.
2569 	 */
2570 	if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags))
2571 		edev->ops->common->recovery_process(cdev);
2572 
2573 	clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2574 
2575 	DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2576 }
2577 
2578 static void qede_set_hw_err_flags(struct qede_dev *edev,
2579 				  enum qed_hw_err_type err_type)
2580 {
2581 	unsigned long err_flags = 0;
2582 
2583 	switch (err_type) {
2584 	case QED_HW_ERR_DMAE_FAIL:
2585 		set_bit(QEDE_ERR_WARN, &err_flags);
2586 		fallthrough;
2587 	case QED_HW_ERR_MFW_RESP_FAIL:
2588 	case QED_HW_ERR_HW_ATTN:
2589 	case QED_HW_ERR_RAMROD_FAIL:
2590 	case QED_HW_ERR_FW_ASSERT:
2591 		set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2592 		set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2593 		break;
2594 
2595 	default:
2596 		DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2597 		break;
2598 	}
2599 
2600 	edev->err_flags |= err_flags;
2601 }
2602 
2603 static void qede_schedule_hw_err_handler(void *dev,
2604 					 enum qed_hw_err_type err_type)
2605 {
2606 	struct qede_dev *edev = dev;
2607 
2608 	/* Fan failure cannot be masked by handling of another HW error or by a
2609 	 * concurrent recovery process.
2610 	 */
2611 	if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2612 	     edev->state == QEDE_STATE_RECOVERY) &&
2613 	     err_type != QED_HW_ERR_FAN_FAIL) {
2614 		DP_INFO(edev,
2615 			"Avoid scheduling an error handling while another HW error is being handled\n");
2616 		return;
2617 	}
2618 
2619 	if (err_type >= QED_HW_ERR_LAST) {
2620 		DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2621 		clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2622 		return;
2623 	}
2624 
2625 	qede_set_hw_err_flags(edev, err_type);
2626 	qede_atomic_hw_err_handler(edev);
2627 	set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2628 	schedule_delayed_work(&edev->sp_task, 0);
2629 
2630 	DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2631 }
2632 
2633 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2634 {
2635 	struct netdev_queue *netdev_txq;
2636 
2637 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2638 	if (netif_xmit_stopped(netdev_txq))
2639 		return true;
2640 
2641 	return false;
2642 }
2643 
2644 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2645 {
2646 	struct qede_dev *edev = dev;
2647 	struct netdev_hw_addr *ha;
2648 	int i;
2649 
2650 	if (edev->ndev->features & NETIF_F_IP_CSUM)
2651 		data->feat_flags |= QED_TLV_IP_CSUM;
2652 	if (edev->ndev->features & NETIF_F_TSO)
2653 		data->feat_flags |= QED_TLV_LSO;
2654 
2655 	ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2656 	memset(data->mac[1], 0, ETH_ALEN);
2657 	memset(data->mac[2], 0, ETH_ALEN);
2658 	/* Copy the first two UC macs */
2659 	netif_addr_lock_bh(edev->ndev);
2660 	i = 1;
2661 	netdev_for_each_uc_addr(ha, edev->ndev) {
2662 		ether_addr_copy(data->mac[i++], ha->addr);
2663 		if (i == QED_TLV_MAC_COUNT)
2664 			break;
2665 	}
2666 
2667 	netif_addr_unlock_bh(edev->ndev);
2668 }
2669 
2670 static void qede_get_eth_tlv_data(void *dev, void *data)
2671 {
2672 	struct qed_mfw_tlv_eth *etlv = data;
2673 	struct qede_dev *edev = dev;
2674 	struct qede_fastpath *fp;
2675 	int i;
2676 
2677 	etlv->lso_maxoff_size = 0XFFFF;
2678 	etlv->lso_maxoff_size_set = true;
2679 	etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2680 	etlv->lso_minseg_size_set = true;
2681 	etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2682 	etlv->prom_mode_set = true;
2683 	etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2684 	etlv->tx_descr_size_set = true;
2685 	etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2686 	etlv->rx_descr_size_set = true;
2687 	etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2688 	etlv->iov_offload_set = true;
2689 
2690 	/* Fill information regarding queues; Should be done under the qede
2691 	 * lock to guarantee those don't change beneath our feet.
2692 	 */
2693 	etlv->txqs_empty = true;
2694 	etlv->rxqs_empty = true;
2695 	etlv->num_txqs_full = 0;
2696 	etlv->num_rxqs_full = 0;
2697 
2698 	__qede_lock(edev);
2699 	for_each_queue(i) {
2700 		fp = &edev->fp_array[i];
2701 		if (fp->type & QEDE_FASTPATH_TX) {
2702 			struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2703 
2704 			if (txq->sw_tx_cons != txq->sw_tx_prod)
2705 				etlv->txqs_empty = false;
2706 			if (qede_is_txq_full(edev, txq))
2707 				etlv->num_txqs_full++;
2708 		}
2709 		if (fp->type & QEDE_FASTPATH_RX) {
2710 			if (qede_has_rx_work(fp->rxq))
2711 				etlv->rxqs_empty = false;
2712 
2713 			/* This one is a bit tricky; Firmware might stop
2714 			 * placing packets if ring is not yet full.
2715 			 * Give an approximation.
2716 			 */
2717 			if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2718 			    qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2719 			    RX_RING_SIZE - 100)
2720 				etlv->num_rxqs_full++;
2721 		}
2722 	}
2723 	__qede_unlock(edev);
2724 
2725 	etlv->txqs_empty_set = true;
2726 	etlv->rxqs_empty_set = true;
2727 	etlv->num_txqs_full_set = true;
2728 	etlv->num_rxqs_full_set = true;
2729 }
2730 
2731 /**
2732  * qede_io_error_detected - called when PCI error is detected
2733  * @pdev: Pointer to PCI device
2734  * @state: The current pci connection state
2735  *
2736  * This function is called after a PCI bus error affecting
2737  * this device has been detected.
2738  */
2739 static pci_ers_result_t
2740 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2741 {
2742 	struct net_device *dev = pci_get_drvdata(pdev);
2743 	struct qede_dev *edev = netdev_priv(dev);
2744 
2745 	if (!edev)
2746 		return PCI_ERS_RESULT_NONE;
2747 
2748 	DP_NOTICE(edev, "IO error detected [%d]\n", state);
2749 
2750 	__qede_lock(edev);
2751 	if (edev->state == QEDE_STATE_RECOVERY) {
2752 		DP_NOTICE(edev, "Device already in the recovery state\n");
2753 		__qede_unlock(edev);
2754 		return PCI_ERS_RESULT_NONE;
2755 	}
2756 
2757 	/* PF handles the recovery of its VFs */
2758 	if (IS_VF(edev)) {
2759 		DP_VERBOSE(edev, QED_MSG_IOV,
2760 			   "VF recovery is handled by its PF\n");
2761 		__qede_unlock(edev);
2762 		return PCI_ERS_RESULT_RECOVERED;
2763 	}
2764 
2765 	/* Close OS Tx */
2766 	netif_tx_disable(edev->ndev);
2767 	netif_carrier_off(edev->ndev);
2768 
2769 	set_bit(QEDE_SP_AER, &edev->sp_flags);
2770 	schedule_delayed_work(&edev->sp_task, 0);
2771 
2772 	__qede_unlock(edev);
2773 
2774 	return PCI_ERS_RESULT_CAN_RECOVER;
2775 }
2776