1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/version.h> 11 #include <linux/device.h> 12 #include <linux/netdevice.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/errno.h> 16 #include <linux/list.h> 17 #include <linux/string.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/interrupt.h> 20 #include <asm/byteorder.h> 21 #include <asm/param.h> 22 #include <linux/io.h> 23 #include <linux/netdev_features.h> 24 #include <linux/udp.h> 25 #include <linux/tcp.h> 26 #include <net/udp_tunnel.h> 27 #include <linux/ip.h> 28 #include <net/ipv6.h> 29 #include <net/tcp.h> 30 #include <linux/if_ether.h> 31 #include <linux/if_vlan.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/ethtool.h> 34 #include <linux/in.h> 35 #include <linux/random.h> 36 #include <net/ip6_checksum.h> 37 #include <linux/bitops.h> 38 #include <linux/vmalloc.h> 39 #include <linux/aer.h> 40 #include "qede.h" 41 #include "qede_ptp.h" 42 43 static char version[] = 44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 45 46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 47 MODULE_LICENSE("GPL"); 48 MODULE_VERSION(DRV_MODULE_VERSION); 49 50 static uint debug; 51 module_param(debug, uint, 0); 52 MODULE_PARM_DESC(debug, " Default debug msglevel"); 53 54 static const struct qed_eth_ops *qed_ops; 55 56 #define CHIP_NUM_57980S_40 0x1634 57 #define CHIP_NUM_57980S_10 0x1666 58 #define CHIP_NUM_57980S_MF 0x1636 59 #define CHIP_NUM_57980S_100 0x1644 60 #define CHIP_NUM_57980S_50 0x1654 61 #define CHIP_NUM_57980S_25 0x1656 62 #define CHIP_NUM_57980S_IOV 0x1664 63 #define CHIP_NUM_AH 0x8070 64 #define CHIP_NUM_AH_IOV 0x8090 65 66 #ifndef PCI_DEVICE_ID_NX2_57980E 67 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 68 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 69 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 70 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 71 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 72 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 73 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 74 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 75 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 76 77 #endif 78 79 enum qede_pci_private { 80 QEDE_PRIVATE_PF, 81 QEDE_PRIVATE_VF 82 }; 83 84 static const struct pci_device_id qede_pci_tbl[] = { 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 91 #ifdef CONFIG_QED_SRIOV 92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 93 #endif 94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 95 #ifdef CONFIG_QED_SRIOV 96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 97 #endif 98 { 0 } 99 }; 100 101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 102 103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 104 static pci_ers_result_t 105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 106 107 #define TX_TIMEOUT (5 * HZ) 108 109 /* Utilize last protocol index for XDP */ 110 #define XDP_PI 11 111 112 static void qede_remove(struct pci_dev *pdev); 113 static void qede_shutdown(struct pci_dev *pdev); 114 static void qede_link_update(void *dev, struct qed_link_output *link); 115 static void qede_schedule_recovery_handler(void *dev); 116 static void qede_recovery_handler(struct qede_dev *edev); 117 static void qede_schedule_hw_err_handler(void *dev, 118 enum qed_hw_err_type err_type); 119 static void qede_get_eth_tlv_data(void *edev, void *data); 120 static void qede_get_generic_tlv_data(void *edev, 121 struct qed_generic_tlvs *data); 122 static void qede_generic_hw_err_handler(struct qede_dev *edev); 123 #ifdef CONFIG_QED_SRIOV 124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 125 __be16 vlan_proto) 126 { 127 struct qede_dev *edev = netdev_priv(ndev); 128 129 if (vlan > 4095) { 130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 131 return -EINVAL; 132 } 133 134 if (vlan_proto != htons(ETH_P_8021Q)) 135 return -EPROTONOSUPPORT; 136 137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 138 vlan, vf); 139 140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 141 } 142 143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 144 { 145 struct qede_dev *edev = netdev_priv(ndev); 146 147 DP_VERBOSE(edev, QED_MSG_IOV, 148 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 149 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 150 151 if (!is_valid_ether_addr(mac)) { 152 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 153 return -EINVAL; 154 } 155 156 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 157 } 158 159 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 160 { 161 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 162 struct qed_dev_info *qed_info = &edev->dev_info.common; 163 struct qed_update_vport_params *vport_params; 164 int rc; 165 166 vport_params = vzalloc(sizeof(*vport_params)); 167 if (!vport_params) 168 return -ENOMEM; 169 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 170 171 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 172 173 /* Enable/Disable Tx switching for PF */ 174 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 175 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 176 vport_params->vport_id = 0; 177 vport_params->update_tx_switching_flg = 1; 178 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 179 edev->ops->vport_update(edev->cdev, vport_params); 180 } 181 182 vfree(vport_params); 183 return rc; 184 } 185 #endif 186 187 static const struct pci_error_handlers qede_err_handler = { 188 .error_detected = qede_io_error_detected, 189 }; 190 191 static struct pci_driver qede_pci_driver = { 192 .name = "qede", 193 .id_table = qede_pci_tbl, 194 .probe = qede_probe, 195 .remove = qede_remove, 196 .shutdown = qede_shutdown, 197 #ifdef CONFIG_QED_SRIOV 198 .sriov_configure = qede_sriov_configure, 199 #endif 200 .err_handler = &qede_err_handler, 201 }; 202 203 static struct qed_eth_cb_ops qede_ll_ops = { 204 { 205 #ifdef CONFIG_RFS_ACCEL 206 .arfs_filter_op = qede_arfs_filter_op, 207 #endif 208 .link_update = qede_link_update, 209 .schedule_recovery_handler = qede_schedule_recovery_handler, 210 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 211 .get_generic_tlv_data = qede_get_generic_tlv_data, 212 .get_protocol_tlv_data = qede_get_eth_tlv_data, 213 }, 214 .force_mac = qede_force_mac, 215 .ports_update = qede_udp_ports_update, 216 }; 217 218 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 219 void *ptr) 220 { 221 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 222 struct ethtool_drvinfo drvinfo; 223 struct qede_dev *edev; 224 225 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 226 goto done; 227 228 /* Check whether this is a qede device */ 229 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 230 goto done; 231 232 memset(&drvinfo, 0, sizeof(drvinfo)); 233 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 234 if (strcmp(drvinfo.driver, "qede")) 235 goto done; 236 edev = netdev_priv(ndev); 237 238 switch (event) { 239 case NETDEV_CHANGENAME: 240 /* Notify qed of the name change */ 241 if (!edev->ops || !edev->ops->common) 242 goto done; 243 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 244 break; 245 case NETDEV_CHANGEADDR: 246 edev = netdev_priv(ndev); 247 qede_rdma_event_changeaddr(edev); 248 break; 249 } 250 251 done: 252 return NOTIFY_DONE; 253 } 254 255 static struct notifier_block qede_netdev_notifier = { 256 .notifier_call = qede_netdev_event, 257 }; 258 259 static 260 int __init qede_init(void) 261 { 262 int ret; 263 264 pr_info("qede_init: %s\n", version); 265 266 qede_forced_speed_maps_init(); 267 268 qed_ops = qed_get_eth_ops(); 269 if (!qed_ops) { 270 pr_notice("Failed to get qed ethtool operations\n"); 271 return -EINVAL; 272 } 273 274 /* Must register notifier before pci ops, since we might miss 275 * interface rename after pci probe and netdev registration. 276 */ 277 ret = register_netdevice_notifier(&qede_netdev_notifier); 278 if (ret) { 279 pr_notice("Failed to register netdevice_notifier\n"); 280 qed_put_eth_ops(); 281 return -EINVAL; 282 } 283 284 ret = pci_register_driver(&qede_pci_driver); 285 if (ret) { 286 pr_notice("Failed to register driver\n"); 287 unregister_netdevice_notifier(&qede_netdev_notifier); 288 qed_put_eth_ops(); 289 return -EINVAL; 290 } 291 292 return 0; 293 } 294 295 static void __exit qede_cleanup(void) 296 { 297 if (debug & QED_LOG_INFO_MASK) 298 pr_info("qede_cleanup called\n"); 299 300 unregister_netdevice_notifier(&qede_netdev_notifier); 301 pci_unregister_driver(&qede_pci_driver); 302 qed_put_eth_ops(); 303 } 304 305 module_init(qede_init); 306 module_exit(qede_cleanup); 307 308 static int qede_open(struct net_device *ndev); 309 static int qede_close(struct net_device *ndev); 310 311 void qede_fill_by_demand_stats(struct qede_dev *edev) 312 { 313 struct qede_stats_common *p_common = &edev->stats.common; 314 struct qed_eth_stats stats; 315 316 edev->ops->get_vport_stats(edev->cdev, &stats); 317 318 p_common->no_buff_discards = stats.common.no_buff_discards; 319 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 320 p_common->ttl0_discard = stats.common.ttl0_discard; 321 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 322 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 323 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 324 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 325 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 326 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 327 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 328 p_common->mac_filter_discards = stats.common.mac_filter_discards; 329 p_common->gft_filter_drop = stats.common.gft_filter_drop; 330 331 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 332 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 333 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 334 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 335 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 336 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 337 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 338 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 339 p_common->coalesced_events = stats.common.tpa_coalesced_events; 340 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 341 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 342 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 343 344 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 345 p_common->rx_65_to_127_byte_packets = 346 stats.common.rx_65_to_127_byte_packets; 347 p_common->rx_128_to_255_byte_packets = 348 stats.common.rx_128_to_255_byte_packets; 349 p_common->rx_256_to_511_byte_packets = 350 stats.common.rx_256_to_511_byte_packets; 351 p_common->rx_512_to_1023_byte_packets = 352 stats.common.rx_512_to_1023_byte_packets; 353 p_common->rx_1024_to_1518_byte_packets = 354 stats.common.rx_1024_to_1518_byte_packets; 355 p_common->rx_crc_errors = stats.common.rx_crc_errors; 356 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 357 p_common->rx_pause_frames = stats.common.rx_pause_frames; 358 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 359 p_common->rx_align_errors = stats.common.rx_align_errors; 360 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 361 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 362 p_common->rx_jabbers = stats.common.rx_jabbers; 363 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 364 p_common->rx_fragments = stats.common.rx_fragments; 365 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 366 p_common->tx_65_to_127_byte_packets = 367 stats.common.tx_65_to_127_byte_packets; 368 p_common->tx_128_to_255_byte_packets = 369 stats.common.tx_128_to_255_byte_packets; 370 p_common->tx_256_to_511_byte_packets = 371 stats.common.tx_256_to_511_byte_packets; 372 p_common->tx_512_to_1023_byte_packets = 373 stats.common.tx_512_to_1023_byte_packets; 374 p_common->tx_1024_to_1518_byte_packets = 375 stats.common.tx_1024_to_1518_byte_packets; 376 p_common->tx_pause_frames = stats.common.tx_pause_frames; 377 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 378 p_common->brb_truncates = stats.common.brb_truncates; 379 p_common->brb_discards = stats.common.brb_discards; 380 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 381 p_common->link_change_count = stats.common.link_change_count; 382 p_common->ptp_skip_txts = edev->ptp_skip_txts; 383 384 if (QEDE_IS_BB(edev)) { 385 struct qede_stats_bb *p_bb = &edev->stats.bb; 386 387 p_bb->rx_1519_to_1522_byte_packets = 388 stats.bb.rx_1519_to_1522_byte_packets; 389 p_bb->rx_1519_to_2047_byte_packets = 390 stats.bb.rx_1519_to_2047_byte_packets; 391 p_bb->rx_2048_to_4095_byte_packets = 392 stats.bb.rx_2048_to_4095_byte_packets; 393 p_bb->rx_4096_to_9216_byte_packets = 394 stats.bb.rx_4096_to_9216_byte_packets; 395 p_bb->rx_9217_to_16383_byte_packets = 396 stats.bb.rx_9217_to_16383_byte_packets; 397 p_bb->tx_1519_to_2047_byte_packets = 398 stats.bb.tx_1519_to_2047_byte_packets; 399 p_bb->tx_2048_to_4095_byte_packets = 400 stats.bb.tx_2048_to_4095_byte_packets; 401 p_bb->tx_4096_to_9216_byte_packets = 402 stats.bb.tx_4096_to_9216_byte_packets; 403 p_bb->tx_9217_to_16383_byte_packets = 404 stats.bb.tx_9217_to_16383_byte_packets; 405 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 406 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 407 } else { 408 struct qede_stats_ah *p_ah = &edev->stats.ah; 409 410 p_ah->rx_1519_to_max_byte_packets = 411 stats.ah.rx_1519_to_max_byte_packets; 412 p_ah->tx_1519_to_max_byte_packets = 413 stats.ah.tx_1519_to_max_byte_packets; 414 } 415 } 416 417 static void qede_get_stats64(struct net_device *dev, 418 struct rtnl_link_stats64 *stats) 419 { 420 struct qede_dev *edev = netdev_priv(dev); 421 struct qede_stats_common *p_common; 422 423 qede_fill_by_demand_stats(edev); 424 p_common = &edev->stats.common; 425 426 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 427 p_common->rx_bcast_pkts; 428 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 429 p_common->tx_bcast_pkts; 430 431 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 432 p_common->rx_bcast_bytes; 433 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 434 p_common->tx_bcast_bytes; 435 436 stats->tx_errors = p_common->tx_err_drop_pkts; 437 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 438 439 stats->rx_fifo_errors = p_common->no_buff_discards; 440 441 if (QEDE_IS_BB(edev)) 442 stats->collisions = edev->stats.bb.tx_total_collisions; 443 stats->rx_crc_errors = p_common->rx_crc_errors; 444 stats->rx_frame_errors = p_common->rx_align_errors; 445 } 446 447 #ifdef CONFIG_QED_SRIOV 448 static int qede_get_vf_config(struct net_device *dev, int vfidx, 449 struct ifla_vf_info *ivi) 450 { 451 struct qede_dev *edev = netdev_priv(dev); 452 453 if (!edev->ops) 454 return -EINVAL; 455 456 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 457 } 458 459 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 460 int min_tx_rate, int max_tx_rate) 461 { 462 struct qede_dev *edev = netdev_priv(dev); 463 464 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 465 max_tx_rate); 466 } 467 468 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 469 { 470 struct qede_dev *edev = netdev_priv(dev); 471 472 if (!edev->ops) 473 return -EINVAL; 474 475 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 476 } 477 478 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 479 int link_state) 480 { 481 struct qede_dev *edev = netdev_priv(dev); 482 483 if (!edev->ops) 484 return -EINVAL; 485 486 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 487 } 488 489 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 490 { 491 struct qede_dev *edev = netdev_priv(dev); 492 493 if (!edev->ops) 494 return -EINVAL; 495 496 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 497 } 498 #endif 499 500 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 501 { 502 struct qede_dev *edev = netdev_priv(dev); 503 504 if (!netif_running(dev)) 505 return -EAGAIN; 506 507 switch (cmd) { 508 case SIOCSHWTSTAMP: 509 return qede_ptp_hw_ts(edev, ifr); 510 default: 511 DP_VERBOSE(edev, QED_MSG_DEBUG, 512 "default IOCTL cmd 0x%x\n", cmd); 513 return -EOPNOTSUPP; 514 } 515 516 return 0; 517 } 518 519 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 520 { 521 DP_NOTICE(edev, 522 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 523 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 524 qed_chain_get_cons_idx(&txq->tx_pbl), 525 qed_chain_get_prod_idx(&txq->tx_pbl), 526 jiffies); 527 } 528 529 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 530 { 531 struct qede_dev *edev = netdev_priv(dev); 532 struct qede_tx_queue *txq; 533 int cos; 534 535 netif_carrier_off(dev); 536 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 537 538 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 539 return; 540 541 for_each_cos_in_txq(edev, cos) { 542 txq = &edev->fp_array[txqueue].txq[cos]; 543 544 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 545 qed_chain_get_prod_idx(&txq->tx_pbl)) 546 qede_tx_log_print(edev, txq); 547 } 548 549 if (IS_VF(edev)) 550 return; 551 552 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 553 edev->state == QEDE_STATE_RECOVERY) { 554 DP_INFO(edev, 555 "Avoid handling a Tx timeout while another HW error is being handled\n"); 556 return; 557 } 558 559 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 560 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 561 schedule_delayed_work(&edev->sp_task, 0); 562 } 563 564 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 565 { 566 struct qede_dev *edev = netdev_priv(ndev); 567 int cos, count, offset; 568 569 if (num_tc > edev->dev_info.num_tc) 570 return -EINVAL; 571 572 netdev_reset_tc(ndev); 573 netdev_set_num_tc(ndev, num_tc); 574 575 for_each_cos_in_txq(edev, cos) { 576 count = QEDE_TSS_COUNT(edev); 577 offset = cos * QEDE_TSS_COUNT(edev); 578 netdev_set_tc_queue(ndev, cos, count, offset); 579 } 580 581 return 0; 582 } 583 584 static int 585 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 586 __be16 proto) 587 { 588 switch (f->command) { 589 case FLOW_CLS_REPLACE: 590 return qede_add_tc_flower_fltr(edev, proto, f); 591 case FLOW_CLS_DESTROY: 592 return qede_delete_flow_filter(edev, f->cookie); 593 default: 594 return -EOPNOTSUPP; 595 } 596 } 597 598 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 599 void *cb_priv) 600 { 601 struct flow_cls_offload *f; 602 struct qede_dev *edev = cb_priv; 603 604 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 605 return -EOPNOTSUPP; 606 607 switch (type) { 608 case TC_SETUP_CLSFLOWER: 609 f = type_data; 610 return qede_set_flower(edev, f, f->common.protocol); 611 default: 612 return -EOPNOTSUPP; 613 } 614 } 615 616 static LIST_HEAD(qede_block_cb_list); 617 618 static int 619 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 620 void *type_data) 621 { 622 struct qede_dev *edev = netdev_priv(dev); 623 struct tc_mqprio_qopt *mqprio; 624 625 switch (type) { 626 case TC_SETUP_BLOCK: 627 return flow_block_cb_setup_simple(type_data, 628 &qede_block_cb_list, 629 qede_setup_tc_block_cb, 630 edev, edev, true); 631 case TC_SETUP_QDISC_MQPRIO: 632 mqprio = type_data; 633 634 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 635 return qede_setup_tc(dev, mqprio->num_tc); 636 default: 637 return -EOPNOTSUPP; 638 } 639 } 640 641 static const struct net_device_ops qede_netdev_ops = { 642 .ndo_open = qede_open, 643 .ndo_stop = qede_close, 644 .ndo_start_xmit = qede_start_xmit, 645 .ndo_select_queue = qede_select_queue, 646 .ndo_set_rx_mode = qede_set_rx_mode, 647 .ndo_set_mac_address = qede_set_mac_addr, 648 .ndo_validate_addr = eth_validate_addr, 649 .ndo_change_mtu = qede_change_mtu, 650 .ndo_do_ioctl = qede_ioctl, 651 .ndo_tx_timeout = qede_tx_timeout, 652 #ifdef CONFIG_QED_SRIOV 653 .ndo_set_vf_mac = qede_set_vf_mac, 654 .ndo_set_vf_vlan = qede_set_vf_vlan, 655 .ndo_set_vf_trust = qede_set_vf_trust, 656 #endif 657 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 658 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 659 .ndo_fix_features = qede_fix_features, 660 .ndo_set_features = qede_set_features, 661 .ndo_get_stats64 = qede_get_stats64, 662 #ifdef CONFIG_QED_SRIOV 663 .ndo_set_vf_link_state = qede_set_vf_link_state, 664 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 665 .ndo_get_vf_config = qede_get_vf_config, 666 .ndo_set_vf_rate = qede_set_vf_rate, 667 #endif 668 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 669 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 670 .ndo_features_check = qede_features_check, 671 .ndo_bpf = qede_xdp, 672 #ifdef CONFIG_RFS_ACCEL 673 .ndo_rx_flow_steer = qede_rx_flow_steer, 674 #endif 675 .ndo_xdp_xmit = qede_xdp_transmit, 676 .ndo_setup_tc = qede_setup_tc_offload, 677 }; 678 679 static const struct net_device_ops qede_netdev_vf_ops = { 680 .ndo_open = qede_open, 681 .ndo_stop = qede_close, 682 .ndo_start_xmit = qede_start_xmit, 683 .ndo_select_queue = qede_select_queue, 684 .ndo_set_rx_mode = qede_set_rx_mode, 685 .ndo_set_mac_address = qede_set_mac_addr, 686 .ndo_validate_addr = eth_validate_addr, 687 .ndo_change_mtu = qede_change_mtu, 688 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 689 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 690 .ndo_fix_features = qede_fix_features, 691 .ndo_set_features = qede_set_features, 692 .ndo_get_stats64 = qede_get_stats64, 693 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 694 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 695 .ndo_features_check = qede_features_check, 696 }; 697 698 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 699 .ndo_open = qede_open, 700 .ndo_stop = qede_close, 701 .ndo_start_xmit = qede_start_xmit, 702 .ndo_select_queue = qede_select_queue, 703 .ndo_set_rx_mode = qede_set_rx_mode, 704 .ndo_set_mac_address = qede_set_mac_addr, 705 .ndo_validate_addr = eth_validate_addr, 706 .ndo_change_mtu = qede_change_mtu, 707 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 708 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 709 .ndo_fix_features = qede_fix_features, 710 .ndo_set_features = qede_set_features, 711 .ndo_get_stats64 = qede_get_stats64, 712 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 713 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 714 .ndo_features_check = qede_features_check, 715 .ndo_bpf = qede_xdp, 716 .ndo_xdp_xmit = qede_xdp_transmit, 717 }; 718 719 /* ------------------------------------------------------------------------- 720 * START OF PROBE / REMOVE 721 * ------------------------------------------------------------------------- 722 */ 723 724 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 725 struct pci_dev *pdev, 726 struct qed_dev_eth_info *info, 727 u32 dp_module, u8 dp_level) 728 { 729 struct net_device *ndev; 730 struct qede_dev *edev; 731 732 ndev = alloc_etherdev_mqs(sizeof(*edev), 733 info->num_queues * info->num_tc, 734 info->num_queues); 735 if (!ndev) { 736 pr_err("etherdev allocation failed\n"); 737 return NULL; 738 } 739 740 edev = netdev_priv(ndev); 741 edev->ndev = ndev; 742 edev->cdev = cdev; 743 edev->pdev = pdev; 744 edev->dp_module = dp_module; 745 edev->dp_level = dp_level; 746 edev->ops = qed_ops; 747 748 if (is_kdump_kernel()) { 749 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 750 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 751 } else { 752 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 753 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 754 } 755 756 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 757 info->num_queues, info->num_queues); 758 759 SET_NETDEV_DEV(ndev, &pdev->dev); 760 761 memset(&edev->stats, 0, sizeof(edev->stats)); 762 memcpy(&edev->dev_info, info, sizeof(*info)); 763 764 /* As ethtool doesn't have the ability to show WoL behavior as 765 * 'default', if device supports it declare it's enabled. 766 */ 767 if (edev->dev_info.common.wol_support) 768 edev->wol_enabled = true; 769 770 INIT_LIST_HEAD(&edev->vlan_list); 771 772 return edev; 773 } 774 775 static void qede_init_ndev(struct qede_dev *edev) 776 { 777 struct net_device *ndev = edev->ndev; 778 struct pci_dev *pdev = edev->pdev; 779 bool udp_tunnel_enable = false; 780 netdev_features_t hw_features; 781 782 pci_set_drvdata(pdev, ndev); 783 784 ndev->mem_start = edev->dev_info.common.pci_mem_start; 785 ndev->base_addr = ndev->mem_start; 786 ndev->mem_end = edev->dev_info.common.pci_mem_end; 787 ndev->irq = edev->dev_info.common.pci_irq; 788 789 ndev->watchdog_timeo = TX_TIMEOUT; 790 791 if (IS_VF(edev)) { 792 if (edev->dev_info.xdp_supported) 793 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 794 else 795 ndev->netdev_ops = &qede_netdev_vf_ops; 796 } else { 797 ndev->netdev_ops = &qede_netdev_ops; 798 } 799 800 qede_set_ethtool_ops(ndev); 801 802 ndev->priv_flags |= IFF_UNICAST_FLT; 803 804 /* user-changeble features */ 805 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 806 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 807 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 808 809 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) 810 hw_features |= NETIF_F_NTUPLE; 811 812 if (edev->dev_info.common.vxlan_enable || 813 edev->dev_info.common.geneve_enable) 814 udp_tunnel_enable = true; 815 816 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 817 hw_features |= NETIF_F_TSO_ECN; 818 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 819 NETIF_F_SG | NETIF_F_TSO | 820 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 821 NETIF_F_RXCSUM; 822 } 823 824 if (udp_tunnel_enable) { 825 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 826 NETIF_F_GSO_UDP_TUNNEL_CSUM); 827 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 828 NETIF_F_GSO_UDP_TUNNEL_CSUM); 829 830 qede_set_udp_tunnels(edev); 831 } 832 833 if (edev->dev_info.common.gre_enable) { 834 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 835 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 836 NETIF_F_GSO_GRE_CSUM); 837 } 838 839 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 840 NETIF_F_HIGHDMA; 841 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 842 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 843 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 844 845 ndev->hw_features = hw_features; 846 847 /* MTU range: 46 - 9600 */ 848 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 849 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 850 851 /* Set network device HW mac */ 852 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 853 854 ndev->mtu = edev->dev_info.common.mtu; 855 } 856 857 /* This function converts from 32b param to two params of level and module 858 * Input 32b decoding: 859 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 860 * 'happy' flow, e.g. memory allocation failed. 861 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 862 * and provide important parameters. 863 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 864 * module. VERBOSE prints are for tracking the specific flow in low level. 865 * 866 * Notice that the level should be that of the lowest required logs. 867 */ 868 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 869 { 870 *p_dp_level = QED_LEVEL_NOTICE; 871 *p_dp_module = 0; 872 873 if (debug & QED_LOG_VERBOSE_MASK) { 874 *p_dp_level = QED_LEVEL_VERBOSE; 875 *p_dp_module = (debug & 0x3FFFFFFF); 876 } else if (debug & QED_LOG_INFO_MASK) { 877 *p_dp_level = QED_LEVEL_INFO; 878 } else if (debug & QED_LOG_NOTICE_MASK) { 879 *p_dp_level = QED_LEVEL_NOTICE; 880 } 881 } 882 883 static void qede_free_fp_array(struct qede_dev *edev) 884 { 885 if (edev->fp_array) { 886 struct qede_fastpath *fp; 887 int i; 888 889 for_each_queue(i) { 890 fp = &edev->fp_array[i]; 891 892 kfree(fp->sb_info); 893 /* Handle mem alloc failure case where qede_init_fp 894 * didn't register xdp_rxq_info yet. 895 * Implicit only (fp->type & QEDE_FASTPATH_RX) 896 */ 897 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 898 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 899 kfree(fp->rxq); 900 kfree(fp->xdp_tx); 901 kfree(fp->txq); 902 } 903 kfree(edev->fp_array); 904 } 905 906 edev->num_queues = 0; 907 edev->fp_num_tx = 0; 908 edev->fp_num_rx = 0; 909 } 910 911 static int qede_alloc_fp_array(struct qede_dev *edev) 912 { 913 u8 fp_combined, fp_rx = edev->fp_num_rx; 914 struct qede_fastpath *fp; 915 int i; 916 917 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 918 sizeof(*edev->fp_array), GFP_KERNEL); 919 if (!edev->fp_array) { 920 DP_NOTICE(edev, "fp array allocation failed\n"); 921 goto err; 922 } 923 924 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 925 926 /* Allocate the FP elements for Rx queues followed by combined and then 927 * the Tx. This ordering should be maintained so that the respective 928 * queues (Rx or Tx) will be together in the fastpath array and the 929 * associated ids will be sequential. 930 */ 931 for_each_queue(i) { 932 fp = &edev->fp_array[i]; 933 934 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 935 if (!fp->sb_info) { 936 DP_NOTICE(edev, "sb info struct allocation failed\n"); 937 goto err; 938 } 939 940 if (fp_rx) { 941 fp->type = QEDE_FASTPATH_RX; 942 fp_rx--; 943 } else if (fp_combined) { 944 fp->type = QEDE_FASTPATH_COMBINED; 945 fp_combined--; 946 } else { 947 fp->type = QEDE_FASTPATH_TX; 948 } 949 950 if (fp->type & QEDE_FASTPATH_TX) { 951 fp->txq = kcalloc(edev->dev_info.num_tc, 952 sizeof(*fp->txq), GFP_KERNEL); 953 if (!fp->txq) 954 goto err; 955 } 956 957 if (fp->type & QEDE_FASTPATH_RX) { 958 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 959 if (!fp->rxq) 960 goto err; 961 962 if (edev->xdp_prog) { 963 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 964 GFP_KERNEL); 965 if (!fp->xdp_tx) 966 goto err; 967 fp->type |= QEDE_FASTPATH_XDP; 968 } 969 } 970 } 971 972 return 0; 973 err: 974 qede_free_fp_array(edev); 975 return -ENOMEM; 976 } 977 978 /* The qede lock is used to protect driver state change and driver flows that 979 * are not reentrant. 980 */ 981 void __qede_lock(struct qede_dev *edev) 982 { 983 mutex_lock(&edev->qede_lock); 984 } 985 986 void __qede_unlock(struct qede_dev *edev) 987 { 988 mutex_unlock(&edev->qede_lock); 989 } 990 991 /* This version of the lock should be used when acquiring the RTNL lock is also 992 * needed in addition to the internal qede lock. 993 */ 994 static void qede_lock(struct qede_dev *edev) 995 { 996 rtnl_lock(); 997 __qede_lock(edev); 998 } 999 1000 static void qede_unlock(struct qede_dev *edev) 1001 { 1002 __qede_unlock(edev); 1003 rtnl_unlock(); 1004 } 1005 1006 static void qede_sp_task(struct work_struct *work) 1007 { 1008 struct qede_dev *edev = container_of(work, struct qede_dev, 1009 sp_task.work); 1010 1011 /* The locking scheme depends on the specific flag: 1012 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1013 * ensure that ongoing flows are ended and new ones are not started. 1014 * In other cases - only the internal qede lock should be acquired. 1015 */ 1016 1017 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1018 #ifdef CONFIG_QED_SRIOV 1019 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1020 * The recovery of the active VFs is currently not supported. 1021 */ 1022 if (pci_num_vf(edev->pdev)) 1023 qede_sriov_configure(edev->pdev, 0); 1024 #endif 1025 qede_lock(edev); 1026 qede_recovery_handler(edev); 1027 qede_unlock(edev); 1028 } 1029 1030 __qede_lock(edev); 1031 1032 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1033 if (edev->state == QEDE_STATE_OPEN) 1034 qede_config_rx_mode(edev->ndev); 1035 1036 #ifdef CONFIG_RFS_ACCEL 1037 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1038 if (edev->state == QEDE_STATE_OPEN) 1039 qede_process_arfs_filters(edev, false); 1040 } 1041 #endif 1042 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1043 qede_generic_hw_err_handler(edev); 1044 __qede_unlock(edev); 1045 1046 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1047 #ifdef CONFIG_QED_SRIOV 1048 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1049 * The recovery of the active VFs is currently not supported. 1050 */ 1051 if (pci_num_vf(edev->pdev)) 1052 qede_sriov_configure(edev->pdev, 0); 1053 #endif 1054 edev->ops->common->recovery_process(edev->cdev); 1055 } 1056 } 1057 1058 static void qede_update_pf_params(struct qed_dev *cdev) 1059 { 1060 struct qed_pf_params pf_params; 1061 u16 num_cons; 1062 1063 /* 64 rx + 64 tx + 64 XDP */ 1064 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1065 1066 /* 1 rx + 1 xdp + max tx cos */ 1067 num_cons = QED_MIN_L2_CONS; 1068 1069 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1070 1071 /* Same for VFs - make sure they'll have sufficient connections 1072 * to support XDP Tx queues. 1073 */ 1074 pf_params.eth_pf_params.num_vf_cons = 48; 1075 1076 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1077 qed_ops->common->update_pf_params(cdev, &pf_params); 1078 } 1079 1080 #define QEDE_FW_VER_STR_SIZE 80 1081 1082 static void qede_log_probe(struct qede_dev *edev) 1083 { 1084 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1085 u8 buf[QEDE_FW_VER_STR_SIZE]; 1086 size_t left_size; 1087 1088 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1089 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1090 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1091 p_dev_info->fw_eng, 1092 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1093 QED_MFW_VERSION_3_OFFSET, 1094 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1095 QED_MFW_VERSION_2_OFFSET, 1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1097 QED_MFW_VERSION_1_OFFSET, 1098 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1099 QED_MFW_VERSION_0_OFFSET); 1100 1101 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1102 if (p_dev_info->mbi_version && left_size) 1103 snprintf(buf + strlen(buf), left_size, 1104 " [MBI %d.%d.%d]", 1105 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1106 QED_MBI_VERSION_2_OFFSET, 1107 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1108 QED_MBI_VERSION_1_OFFSET, 1109 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1110 QED_MBI_VERSION_0_OFFSET); 1111 1112 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1113 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1114 buf, edev->ndev->name); 1115 } 1116 1117 enum qede_probe_mode { 1118 QEDE_PROBE_NORMAL, 1119 QEDE_PROBE_RECOVERY, 1120 }; 1121 1122 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1123 bool is_vf, enum qede_probe_mode mode) 1124 { 1125 struct qed_probe_params probe_params; 1126 struct qed_slowpath_params sp_params; 1127 struct qed_dev_eth_info dev_info; 1128 struct qede_dev *edev; 1129 struct qed_dev *cdev; 1130 int rc; 1131 1132 if (unlikely(dp_level & QED_LEVEL_INFO)) 1133 pr_notice("Starting qede probe\n"); 1134 1135 memset(&probe_params, 0, sizeof(probe_params)); 1136 probe_params.protocol = QED_PROTOCOL_ETH; 1137 probe_params.dp_module = dp_module; 1138 probe_params.dp_level = dp_level; 1139 probe_params.is_vf = is_vf; 1140 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1141 cdev = qed_ops->common->probe(pdev, &probe_params); 1142 if (!cdev) { 1143 rc = -ENODEV; 1144 goto err0; 1145 } 1146 1147 qede_update_pf_params(cdev); 1148 1149 /* Start the Slowpath-process */ 1150 memset(&sp_params, 0, sizeof(sp_params)); 1151 sp_params.int_mode = QED_INT_MODE_MSIX; 1152 sp_params.drv_major = QEDE_MAJOR_VERSION; 1153 sp_params.drv_minor = QEDE_MINOR_VERSION; 1154 sp_params.drv_rev = QEDE_REVISION_VERSION; 1155 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1156 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1157 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1158 if (rc) { 1159 pr_notice("Cannot start slowpath\n"); 1160 goto err1; 1161 } 1162 1163 /* Learn information crucial for qede to progress */ 1164 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1165 if (rc) 1166 goto err2; 1167 1168 if (mode != QEDE_PROBE_RECOVERY) { 1169 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1170 dp_level); 1171 if (!edev) { 1172 rc = -ENOMEM; 1173 goto err2; 1174 } 1175 } else { 1176 struct net_device *ndev = pci_get_drvdata(pdev); 1177 1178 edev = netdev_priv(ndev); 1179 edev->cdev = cdev; 1180 memset(&edev->stats, 0, sizeof(edev->stats)); 1181 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1182 } 1183 1184 if (is_vf) 1185 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1186 1187 qede_init_ndev(edev); 1188 1189 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1190 if (rc) 1191 goto err3; 1192 1193 if (mode != QEDE_PROBE_RECOVERY) { 1194 /* Prepare the lock prior to the registration of the netdev, 1195 * as once it's registered we might reach flows requiring it 1196 * [it's even possible to reach a flow needing it directly 1197 * from there, although it's unlikely]. 1198 */ 1199 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1200 mutex_init(&edev->qede_lock); 1201 1202 rc = register_netdev(edev->ndev); 1203 if (rc) { 1204 DP_NOTICE(edev, "Cannot register net-device\n"); 1205 goto err4; 1206 } 1207 } 1208 1209 edev->ops->common->set_name(cdev, edev->ndev->name); 1210 1211 /* PTP not supported on VFs */ 1212 if (!is_vf) 1213 qede_ptp_enable(edev); 1214 1215 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1216 1217 #ifdef CONFIG_DCB 1218 if (!IS_VF(edev)) 1219 qede_set_dcbnl_ops(edev->ndev); 1220 #endif 1221 1222 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1223 1224 qede_log_probe(edev); 1225 return 0; 1226 1227 err4: 1228 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1229 err3: 1230 free_netdev(edev->ndev); 1231 err2: 1232 qed_ops->common->slowpath_stop(cdev); 1233 err1: 1234 qed_ops->common->remove(cdev); 1235 err0: 1236 return rc; 1237 } 1238 1239 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1240 { 1241 bool is_vf = false; 1242 u32 dp_module = 0; 1243 u8 dp_level = 0; 1244 1245 switch ((enum qede_pci_private)id->driver_data) { 1246 case QEDE_PRIVATE_VF: 1247 if (debug & QED_LOG_VERBOSE_MASK) 1248 dev_err(&pdev->dev, "Probing a VF\n"); 1249 is_vf = true; 1250 break; 1251 default: 1252 if (debug & QED_LOG_VERBOSE_MASK) 1253 dev_err(&pdev->dev, "Probing a PF\n"); 1254 } 1255 1256 qede_config_debug(debug, &dp_module, &dp_level); 1257 1258 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1259 QEDE_PROBE_NORMAL); 1260 } 1261 1262 enum qede_remove_mode { 1263 QEDE_REMOVE_NORMAL, 1264 QEDE_REMOVE_RECOVERY, 1265 }; 1266 1267 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1268 { 1269 struct net_device *ndev = pci_get_drvdata(pdev); 1270 struct qede_dev *edev; 1271 struct qed_dev *cdev; 1272 1273 if (!ndev) { 1274 dev_info(&pdev->dev, "Device has already been removed\n"); 1275 return; 1276 } 1277 1278 edev = netdev_priv(ndev); 1279 cdev = edev->cdev; 1280 1281 DP_INFO(edev, "Starting qede_remove\n"); 1282 1283 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1284 1285 if (mode != QEDE_REMOVE_RECOVERY) { 1286 unregister_netdev(ndev); 1287 1288 cancel_delayed_work_sync(&edev->sp_task); 1289 1290 edev->ops->common->set_power_state(cdev, PCI_D0); 1291 1292 pci_set_drvdata(pdev, NULL); 1293 } 1294 1295 qede_ptp_disable(edev); 1296 1297 /* Use global ops since we've freed edev */ 1298 qed_ops->common->slowpath_stop(cdev); 1299 if (system_state == SYSTEM_POWER_OFF) 1300 return; 1301 qed_ops->common->remove(cdev); 1302 edev->cdev = NULL; 1303 1304 /* Since this can happen out-of-sync with other flows, 1305 * don't release the netdevice until after slowpath stop 1306 * has been called to guarantee various other contexts 1307 * [e.g., QED register callbacks] won't break anything when 1308 * accessing the netdevice. 1309 */ 1310 if (mode != QEDE_REMOVE_RECOVERY) 1311 free_netdev(ndev); 1312 1313 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1314 } 1315 1316 static void qede_remove(struct pci_dev *pdev) 1317 { 1318 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1319 } 1320 1321 static void qede_shutdown(struct pci_dev *pdev) 1322 { 1323 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1324 } 1325 1326 /* ------------------------------------------------------------------------- 1327 * START OF LOAD / UNLOAD 1328 * ------------------------------------------------------------------------- 1329 */ 1330 1331 static int qede_set_num_queues(struct qede_dev *edev) 1332 { 1333 int rc; 1334 u16 rss_num; 1335 1336 /* Setup queues according to possible resources*/ 1337 if (edev->req_queues) 1338 rss_num = edev->req_queues; 1339 else 1340 rss_num = netif_get_num_default_rss_queues() * 1341 edev->dev_info.common.num_hwfns; 1342 1343 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1344 1345 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1346 if (rc > 0) { 1347 /* Managed to request interrupts for our queues */ 1348 edev->num_queues = rc; 1349 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1350 QEDE_QUEUE_CNT(edev), rss_num); 1351 rc = 0; 1352 } 1353 1354 edev->fp_num_tx = edev->req_num_tx; 1355 edev->fp_num_rx = edev->req_num_rx; 1356 1357 return rc; 1358 } 1359 1360 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1361 u16 sb_id) 1362 { 1363 if (sb_info->sb_virt) { 1364 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1365 QED_SB_TYPE_L2_QUEUE); 1366 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1367 (void *)sb_info->sb_virt, sb_info->sb_phys); 1368 memset(sb_info, 0, sizeof(*sb_info)); 1369 } 1370 } 1371 1372 /* This function allocates fast-path status block memory */ 1373 static int qede_alloc_mem_sb(struct qede_dev *edev, 1374 struct qed_sb_info *sb_info, u16 sb_id) 1375 { 1376 struct status_block_e4 *sb_virt; 1377 dma_addr_t sb_phys; 1378 int rc; 1379 1380 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1381 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1382 if (!sb_virt) { 1383 DP_ERR(edev, "Status block allocation failed\n"); 1384 return -ENOMEM; 1385 } 1386 1387 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1388 sb_virt, sb_phys, sb_id, 1389 QED_SB_TYPE_L2_QUEUE); 1390 if (rc) { 1391 DP_ERR(edev, "Status block initialization failed\n"); 1392 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1393 sb_virt, sb_phys); 1394 return rc; 1395 } 1396 1397 return 0; 1398 } 1399 1400 static void qede_free_rx_buffers(struct qede_dev *edev, 1401 struct qede_rx_queue *rxq) 1402 { 1403 u16 i; 1404 1405 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1406 struct sw_rx_data *rx_buf; 1407 struct page *data; 1408 1409 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1410 data = rx_buf->data; 1411 1412 dma_unmap_page(&edev->pdev->dev, 1413 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1414 1415 rx_buf->data = NULL; 1416 __free_page(data); 1417 } 1418 } 1419 1420 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1421 { 1422 /* Free rx buffers */ 1423 qede_free_rx_buffers(edev, rxq); 1424 1425 /* Free the parallel SW ring */ 1426 kfree(rxq->sw_rx_ring); 1427 1428 /* Free the real RQ ring used by FW */ 1429 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1430 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1431 } 1432 1433 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1434 { 1435 int i; 1436 1437 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1438 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1439 1440 tpa_info->state = QEDE_AGG_STATE_NONE; 1441 } 1442 } 1443 1444 /* This function allocates all memory needed per Rx queue */ 1445 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1446 { 1447 struct qed_chain_init_params params = { 1448 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1449 .num_elems = RX_RING_SIZE, 1450 }; 1451 struct qed_dev *cdev = edev->cdev; 1452 int i, rc, size; 1453 1454 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1455 1456 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1457 1458 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1459 size = rxq->rx_headroom + 1460 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1461 1462 /* Make sure that the headroom and payload fit in a single page */ 1463 if (rxq->rx_buf_size + size > PAGE_SIZE) 1464 rxq->rx_buf_size = PAGE_SIZE - size; 1465 1466 /* Segment size to split a page in multiple equal parts, 1467 * unless XDP is used in which case we'd use the entire page. 1468 */ 1469 if (!edev->xdp_prog) { 1470 size = size + rxq->rx_buf_size; 1471 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1472 } else { 1473 rxq->rx_buf_seg_size = PAGE_SIZE; 1474 edev->ndev->features &= ~NETIF_F_GRO_HW; 1475 } 1476 1477 /* Allocate the parallel driver ring for Rx buffers */ 1478 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1479 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1480 if (!rxq->sw_rx_ring) { 1481 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1482 rc = -ENOMEM; 1483 goto err; 1484 } 1485 1486 /* Allocate FW Rx ring */ 1487 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1488 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1489 params.elem_size = sizeof(struct eth_rx_bd); 1490 1491 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1492 if (rc) 1493 goto err; 1494 1495 /* Allocate FW completion ring */ 1496 params.mode = QED_CHAIN_MODE_PBL; 1497 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1498 params.elem_size = sizeof(union eth_rx_cqe); 1499 1500 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1501 if (rc) 1502 goto err; 1503 1504 /* Allocate buffers for the Rx ring */ 1505 rxq->filled_buffers = 0; 1506 for (i = 0; i < rxq->num_rx_buffers; i++) { 1507 rc = qede_alloc_rx_buffer(rxq, false); 1508 if (rc) { 1509 DP_ERR(edev, 1510 "Rx buffers allocation failed at index %d\n", i); 1511 goto err; 1512 } 1513 } 1514 1515 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1516 if (!edev->gro_disable) 1517 qede_set_tpa_param(rxq); 1518 err: 1519 return rc; 1520 } 1521 1522 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1523 { 1524 /* Free the parallel SW ring */ 1525 if (txq->is_xdp) 1526 kfree(txq->sw_tx_ring.xdp); 1527 else 1528 kfree(txq->sw_tx_ring.skbs); 1529 1530 /* Free the real RQ ring used by FW */ 1531 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1532 } 1533 1534 /* This function allocates all memory needed per Tx queue */ 1535 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1536 { 1537 struct qed_chain_init_params params = { 1538 .mode = QED_CHAIN_MODE_PBL, 1539 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1540 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1541 .num_elems = edev->q_num_tx_buffers, 1542 .elem_size = sizeof(union eth_tx_bd_types), 1543 }; 1544 int size, rc; 1545 1546 txq->num_tx_buffers = edev->q_num_tx_buffers; 1547 1548 /* Allocate the parallel driver ring for Tx buffers */ 1549 if (txq->is_xdp) { 1550 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1551 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1552 if (!txq->sw_tx_ring.xdp) 1553 goto err; 1554 } else { 1555 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1556 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1557 if (!txq->sw_tx_ring.skbs) 1558 goto err; 1559 } 1560 1561 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1562 if (rc) 1563 goto err; 1564 1565 return 0; 1566 1567 err: 1568 qede_free_mem_txq(edev, txq); 1569 return -ENOMEM; 1570 } 1571 1572 /* This function frees all memory of a single fp */ 1573 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1574 { 1575 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1576 1577 if (fp->type & QEDE_FASTPATH_RX) 1578 qede_free_mem_rxq(edev, fp->rxq); 1579 1580 if (fp->type & QEDE_FASTPATH_XDP) 1581 qede_free_mem_txq(edev, fp->xdp_tx); 1582 1583 if (fp->type & QEDE_FASTPATH_TX) { 1584 int cos; 1585 1586 for_each_cos_in_txq(edev, cos) 1587 qede_free_mem_txq(edev, &fp->txq[cos]); 1588 } 1589 } 1590 1591 /* This function allocates all memory needed for a single fp (i.e. an entity 1592 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1593 */ 1594 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1595 { 1596 int rc = 0; 1597 1598 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1599 if (rc) 1600 goto out; 1601 1602 if (fp->type & QEDE_FASTPATH_RX) { 1603 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1604 if (rc) 1605 goto out; 1606 } 1607 1608 if (fp->type & QEDE_FASTPATH_XDP) { 1609 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1610 if (rc) 1611 goto out; 1612 } 1613 1614 if (fp->type & QEDE_FASTPATH_TX) { 1615 int cos; 1616 1617 for_each_cos_in_txq(edev, cos) { 1618 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1619 if (rc) 1620 goto out; 1621 } 1622 } 1623 1624 out: 1625 return rc; 1626 } 1627 1628 static void qede_free_mem_load(struct qede_dev *edev) 1629 { 1630 int i; 1631 1632 for_each_queue(i) { 1633 struct qede_fastpath *fp = &edev->fp_array[i]; 1634 1635 qede_free_mem_fp(edev, fp); 1636 } 1637 } 1638 1639 /* This function allocates all qede memory at NIC load. */ 1640 static int qede_alloc_mem_load(struct qede_dev *edev) 1641 { 1642 int rc = 0, queue_id; 1643 1644 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1645 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1646 1647 rc = qede_alloc_mem_fp(edev, fp); 1648 if (rc) { 1649 DP_ERR(edev, 1650 "Failed to allocate memory for fastpath - rss id = %d\n", 1651 queue_id); 1652 qede_free_mem_load(edev); 1653 return rc; 1654 } 1655 } 1656 1657 return 0; 1658 } 1659 1660 static void qede_empty_tx_queue(struct qede_dev *edev, 1661 struct qede_tx_queue *txq) 1662 { 1663 unsigned int pkts_compl = 0, bytes_compl = 0; 1664 struct netdev_queue *netdev_txq; 1665 int rc, len = 0; 1666 1667 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1668 1669 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1670 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1671 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1672 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1673 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1674 qed_chain_get_prod_idx(&txq->tx_pbl)); 1675 1676 rc = qede_free_tx_pkt(edev, txq, &len); 1677 if (rc) { 1678 DP_NOTICE(edev, 1679 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1680 txq->index, 1681 qed_chain_get_cons_idx(&txq->tx_pbl), 1682 qed_chain_get_prod_idx(&txq->tx_pbl)); 1683 break; 1684 } 1685 1686 bytes_compl += len; 1687 pkts_compl++; 1688 txq->sw_tx_cons++; 1689 } 1690 1691 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1692 } 1693 1694 static void qede_empty_tx_queues(struct qede_dev *edev) 1695 { 1696 int i; 1697 1698 for_each_queue(i) 1699 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1700 int cos; 1701 1702 for_each_cos_in_txq(edev, cos) { 1703 struct qede_fastpath *fp; 1704 1705 fp = &edev->fp_array[i]; 1706 qede_empty_tx_queue(edev, 1707 &fp->txq[cos]); 1708 } 1709 } 1710 } 1711 1712 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1713 static void qede_init_fp(struct qede_dev *edev) 1714 { 1715 int queue_id, rxq_index = 0, txq_index = 0; 1716 struct qede_fastpath *fp; 1717 bool init_xdp = false; 1718 1719 for_each_queue(queue_id) { 1720 fp = &edev->fp_array[queue_id]; 1721 1722 fp->edev = edev; 1723 fp->id = queue_id; 1724 1725 if (fp->type & QEDE_FASTPATH_XDP) { 1726 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1727 rxq_index); 1728 fp->xdp_tx->is_xdp = 1; 1729 1730 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1731 init_xdp = true; 1732 } 1733 1734 if (fp->type & QEDE_FASTPATH_RX) { 1735 fp->rxq->rxq_id = rxq_index++; 1736 1737 /* Determine how to map buffers for this queue */ 1738 if (fp->type & QEDE_FASTPATH_XDP) 1739 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1740 else 1741 fp->rxq->data_direction = DMA_FROM_DEVICE; 1742 fp->rxq->dev = &edev->pdev->dev; 1743 1744 /* Driver have no error path from here */ 1745 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1746 fp->rxq->rxq_id) < 0); 1747 1748 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1749 MEM_TYPE_PAGE_ORDER0, 1750 NULL)) { 1751 DP_NOTICE(edev, 1752 "Failed to register XDP memory model\n"); 1753 } 1754 } 1755 1756 if (fp->type & QEDE_FASTPATH_TX) { 1757 int cos; 1758 1759 for_each_cos_in_txq(edev, cos) { 1760 struct qede_tx_queue *txq = &fp->txq[cos]; 1761 u16 ndev_tx_id; 1762 1763 txq->cos = cos; 1764 txq->index = txq_index; 1765 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1766 txq->ndev_txq_id = ndev_tx_id; 1767 1768 if (edev->dev_info.is_legacy) 1769 txq->is_legacy = true; 1770 txq->dev = &edev->pdev->dev; 1771 } 1772 1773 txq_index++; 1774 } 1775 1776 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1777 edev->ndev->name, queue_id); 1778 } 1779 1780 if (init_xdp) { 1781 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1782 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1783 } 1784 } 1785 1786 static int qede_set_real_num_queues(struct qede_dev *edev) 1787 { 1788 int rc = 0; 1789 1790 rc = netif_set_real_num_tx_queues(edev->ndev, 1791 QEDE_TSS_COUNT(edev) * 1792 edev->dev_info.num_tc); 1793 if (rc) { 1794 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1795 return rc; 1796 } 1797 1798 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1799 if (rc) { 1800 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1801 return rc; 1802 } 1803 1804 return 0; 1805 } 1806 1807 static void qede_napi_disable_remove(struct qede_dev *edev) 1808 { 1809 int i; 1810 1811 for_each_queue(i) { 1812 napi_disable(&edev->fp_array[i].napi); 1813 1814 netif_napi_del(&edev->fp_array[i].napi); 1815 } 1816 } 1817 1818 static void qede_napi_add_enable(struct qede_dev *edev) 1819 { 1820 int i; 1821 1822 /* Add NAPI objects */ 1823 for_each_queue(i) { 1824 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1825 qede_poll, NAPI_POLL_WEIGHT); 1826 napi_enable(&edev->fp_array[i].napi); 1827 } 1828 } 1829 1830 static void qede_sync_free_irqs(struct qede_dev *edev) 1831 { 1832 int i; 1833 1834 for (i = 0; i < edev->int_info.used_cnt; i++) { 1835 if (edev->int_info.msix_cnt) { 1836 synchronize_irq(edev->int_info.msix[i].vector); 1837 free_irq(edev->int_info.msix[i].vector, 1838 &edev->fp_array[i]); 1839 } else { 1840 edev->ops->common->simd_handler_clean(edev->cdev, i); 1841 } 1842 } 1843 1844 edev->int_info.used_cnt = 0; 1845 } 1846 1847 static int qede_req_msix_irqs(struct qede_dev *edev) 1848 { 1849 int i, rc; 1850 1851 /* Sanitize number of interrupts == number of prepared RSS queues */ 1852 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1853 DP_ERR(edev, 1854 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1855 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1856 return -EINVAL; 1857 } 1858 1859 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1860 #ifdef CONFIG_RFS_ACCEL 1861 struct qede_fastpath *fp = &edev->fp_array[i]; 1862 1863 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1864 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1865 edev->int_info.msix[i].vector); 1866 if (rc) { 1867 DP_ERR(edev, "Failed to add CPU rmap\n"); 1868 qede_free_arfs(edev); 1869 } 1870 } 1871 #endif 1872 rc = request_irq(edev->int_info.msix[i].vector, 1873 qede_msix_fp_int, 0, edev->fp_array[i].name, 1874 &edev->fp_array[i]); 1875 if (rc) { 1876 DP_ERR(edev, "Request fp %d irq failed\n", i); 1877 qede_sync_free_irqs(edev); 1878 return rc; 1879 } 1880 DP_VERBOSE(edev, NETIF_MSG_INTR, 1881 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1882 edev->fp_array[i].name, i, 1883 &edev->fp_array[i]); 1884 edev->int_info.used_cnt++; 1885 } 1886 1887 return 0; 1888 } 1889 1890 static void qede_simd_fp_handler(void *cookie) 1891 { 1892 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1893 1894 napi_schedule_irqoff(&fp->napi); 1895 } 1896 1897 static int qede_setup_irqs(struct qede_dev *edev) 1898 { 1899 int i, rc = 0; 1900 1901 /* Learn Interrupt configuration */ 1902 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1903 if (rc) 1904 return rc; 1905 1906 if (edev->int_info.msix_cnt) { 1907 rc = qede_req_msix_irqs(edev); 1908 if (rc) 1909 return rc; 1910 edev->ndev->irq = edev->int_info.msix[0].vector; 1911 } else { 1912 const struct qed_common_ops *ops; 1913 1914 /* qed should learn receive the RSS ids and callbacks */ 1915 ops = edev->ops->common; 1916 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1917 ops->simd_handler_config(edev->cdev, 1918 &edev->fp_array[i], i, 1919 qede_simd_fp_handler); 1920 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1921 } 1922 return 0; 1923 } 1924 1925 static int qede_drain_txq(struct qede_dev *edev, 1926 struct qede_tx_queue *txq, bool allow_drain) 1927 { 1928 int rc, cnt = 1000; 1929 1930 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1931 if (!cnt) { 1932 if (allow_drain) { 1933 DP_NOTICE(edev, 1934 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1935 txq->index); 1936 rc = edev->ops->common->drain(edev->cdev); 1937 if (rc) 1938 return rc; 1939 return qede_drain_txq(edev, txq, false); 1940 } 1941 DP_NOTICE(edev, 1942 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1943 txq->index, txq->sw_tx_prod, 1944 txq->sw_tx_cons); 1945 return -ENODEV; 1946 } 1947 cnt--; 1948 usleep_range(1000, 2000); 1949 barrier(); 1950 } 1951 1952 /* FW finished processing, wait for HW to transmit all tx packets */ 1953 usleep_range(1000, 2000); 1954 1955 return 0; 1956 } 1957 1958 static int qede_stop_txq(struct qede_dev *edev, 1959 struct qede_tx_queue *txq, int rss_id) 1960 { 1961 /* delete doorbell from doorbell recovery mechanism */ 1962 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1963 &txq->tx_db); 1964 1965 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1966 } 1967 1968 static int qede_stop_queues(struct qede_dev *edev) 1969 { 1970 struct qed_update_vport_params *vport_update_params; 1971 struct qed_dev *cdev = edev->cdev; 1972 struct qede_fastpath *fp; 1973 int rc, i; 1974 1975 /* Disable the vport */ 1976 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1977 if (!vport_update_params) 1978 return -ENOMEM; 1979 1980 vport_update_params->vport_id = 0; 1981 vport_update_params->update_vport_active_flg = 1; 1982 vport_update_params->vport_active_flg = 0; 1983 vport_update_params->update_rss_flg = 0; 1984 1985 rc = edev->ops->vport_update(cdev, vport_update_params); 1986 vfree(vport_update_params); 1987 1988 if (rc) { 1989 DP_ERR(edev, "Failed to update vport\n"); 1990 return rc; 1991 } 1992 1993 /* Flush Tx queues. If needed, request drain from MCP */ 1994 for_each_queue(i) { 1995 fp = &edev->fp_array[i]; 1996 1997 if (fp->type & QEDE_FASTPATH_TX) { 1998 int cos; 1999 2000 for_each_cos_in_txq(edev, cos) { 2001 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2002 if (rc) 2003 return rc; 2004 } 2005 } 2006 2007 if (fp->type & QEDE_FASTPATH_XDP) { 2008 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2009 if (rc) 2010 return rc; 2011 } 2012 } 2013 2014 /* Stop all Queues in reverse order */ 2015 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2016 fp = &edev->fp_array[i]; 2017 2018 /* Stop the Tx Queue(s) */ 2019 if (fp->type & QEDE_FASTPATH_TX) { 2020 int cos; 2021 2022 for_each_cos_in_txq(edev, cos) { 2023 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2024 if (rc) 2025 return rc; 2026 } 2027 } 2028 2029 /* Stop the Rx Queue */ 2030 if (fp->type & QEDE_FASTPATH_RX) { 2031 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2032 if (rc) { 2033 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2034 return rc; 2035 } 2036 } 2037 2038 /* Stop the XDP forwarding queue */ 2039 if (fp->type & QEDE_FASTPATH_XDP) { 2040 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2041 if (rc) 2042 return rc; 2043 2044 bpf_prog_put(fp->rxq->xdp_prog); 2045 } 2046 } 2047 2048 /* Stop the vport */ 2049 rc = edev->ops->vport_stop(cdev, 0); 2050 if (rc) 2051 DP_ERR(edev, "Failed to stop VPORT\n"); 2052 2053 return rc; 2054 } 2055 2056 static int qede_start_txq(struct qede_dev *edev, 2057 struct qede_fastpath *fp, 2058 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2059 { 2060 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2061 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2062 struct qed_queue_start_common_params params; 2063 struct qed_txq_start_ret_params ret_params; 2064 int rc; 2065 2066 memset(¶ms, 0, sizeof(params)); 2067 memset(&ret_params, 0, sizeof(ret_params)); 2068 2069 /* Let the XDP queue share the queue-zone with one of the regular txq. 2070 * We don't really care about its coalescing. 2071 */ 2072 if (txq->is_xdp) 2073 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2074 else 2075 params.queue_id = txq->index; 2076 2077 params.p_sb = fp->sb_info; 2078 params.sb_idx = sb_idx; 2079 params.tc = txq->cos; 2080 2081 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2082 page_cnt, &ret_params); 2083 if (rc) { 2084 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2085 return rc; 2086 } 2087 2088 txq->doorbell_addr = ret_params.p_doorbell; 2089 txq->handle = ret_params.p_handle; 2090 2091 /* Determine the FW consumer address associated */ 2092 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2093 2094 /* Prepare the doorbell parameters */ 2095 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2096 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2097 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2098 DQ_XCM_ETH_TX_BD_PROD_CMD); 2099 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2100 2101 /* register doorbell with doorbell recovery mechanism */ 2102 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2103 &txq->tx_db, DB_REC_WIDTH_32B, 2104 DB_REC_KERNEL); 2105 2106 return rc; 2107 } 2108 2109 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2110 { 2111 int vlan_removal_en = 1; 2112 struct qed_dev *cdev = edev->cdev; 2113 struct qed_dev_info *qed_info = &edev->dev_info.common; 2114 struct qed_update_vport_params *vport_update_params; 2115 struct qed_queue_start_common_params q_params; 2116 struct qed_start_vport_params start = {0}; 2117 int rc, i; 2118 2119 if (!edev->num_queues) { 2120 DP_ERR(edev, 2121 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2122 return -EINVAL; 2123 } 2124 2125 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2126 if (!vport_update_params) 2127 return -ENOMEM; 2128 2129 start.handle_ptp_pkts = !!(edev->ptp); 2130 start.gro_enable = !edev->gro_disable; 2131 start.mtu = edev->ndev->mtu; 2132 start.vport_id = 0; 2133 start.drop_ttl0 = true; 2134 start.remove_inner_vlan = vlan_removal_en; 2135 start.clear_stats = clear_stats; 2136 2137 rc = edev->ops->vport_start(cdev, &start); 2138 2139 if (rc) { 2140 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2141 goto out; 2142 } 2143 2144 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2145 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2146 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2147 2148 for_each_queue(i) { 2149 struct qede_fastpath *fp = &edev->fp_array[i]; 2150 dma_addr_t p_phys_table; 2151 u32 page_cnt; 2152 2153 if (fp->type & QEDE_FASTPATH_RX) { 2154 struct qed_rxq_start_ret_params ret_params; 2155 struct qede_rx_queue *rxq = fp->rxq; 2156 __le16 *val; 2157 2158 memset(&ret_params, 0, sizeof(ret_params)); 2159 memset(&q_params, 0, sizeof(q_params)); 2160 q_params.queue_id = rxq->rxq_id; 2161 q_params.vport_id = 0; 2162 q_params.p_sb = fp->sb_info; 2163 q_params.sb_idx = RX_PI; 2164 2165 p_phys_table = 2166 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2167 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2168 2169 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2170 rxq->rx_buf_size, 2171 rxq->rx_bd_ring.p_phys_addr, 2172 p_phys_table, 2173 page_cnt, &ret_params); 2174 if (rc) { 2175 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2176 rc); 2177 goto out; 2178 } 2179 2180 /* Use the return parameters */ 2181 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2182 rxq->handle = ret_params.p_handle; 2183 2184 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2185 rxq->hw_cons_ptr = val; 2186 2187 qede_update_rx_prod(edev, rxq); 2188 } 2189 2190 if (fp->type & QEDE_FASTPATH_XDP) { 2191 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2192 if (rc) 2193 goto out; 2194 2195 bpf_prog_add(edev->xdp_prog, 1); 2196 fp->rxq->xdp_prog = edev->xdp_prog; 2197 } 2198 2199 if (fp->type & QEDE_FASTPATH_TX) { 2200 int cos; 2201 2202 for_each_cos_in_txq(edev, cos) { 2203 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2204 TX_PI(cos)); 2205 if (rc) 2206 goto out; 2207 } 2208 } 2209 } 2210 2211 /* Prepare and send the vport enable */ 2212 vport_update_params->vport_id = start.vport_id; 2213 vport_update_params->update_vport_active_flg = 1; 2214 vport_update_params->vport_active_flg = 1; 2215 2216 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2217 qed_info->tx_switching) { 2218 vport_update_params->update_tx_switching_flg = 1; 2219 vport_update_params->tx_switching_flg = 1; 2220 } 2221 2222 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2223 &vport_update_params->update_rss_flg); 2224 2225 rc = edev->ops->vport_update(cdev, vport_update_params); 2226 if (rc) 2227 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2228 2229 out: 2230 vfree(vport_update_params); 2231 return rc; 2232 } 2233 2234 enum qede_unload_mode { 2235 QEDE_UNLOAD_NORMAL, 2236 QEDE_UNLOAD_RECOVERY, 2237 }; 2238 2239 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2240 bool is_locked) 2241 { 2242 struct qed_link_params link_params; 2243 int rc; 2244 2245 DP_INFO(edev, "Starting qede unload\n"); 2246 2247 if (!is_locked) 2248 __qede_lock(edev); 2249 2250 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2251 2252 if (mode != QEDE_UNLOAD_RECOVERY) 2253 edev->state = QEDE_STATE_CLOSED; 2254 2255 qede_rdma_dev_event_close(edev); 2256 2257 /* Close OS Tx */ 2258 netif_tx_disable(edev->ndev); 2259 netif_carrier_off(edev->ndev); 2260 2261 if (mode != QEDE_UNLOAD_RECOVERY) { 2262 /* Reset the link */ 2263 memset(&link_params, 0, sizeof(link_params)); 2264 link_params.link_up = false; 2265 edev->ops->common->set_link(edev->cdev, &link_params); 2266 2267 rc = qede_stop_queues(edev); 2268 if (rc) { 2269 qede_sync_free_irqs(edev); 2270 goto out; 2271 } 2272 2273 DP_INFO(edev, "Stopped Queues\n"); 2274 } 2275 2276 qede_vlan_mark_nonconfigured(edev); 2277 edev->ops->fastpath_stop(edev->cdev); 2278 2279 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2280 qede_poll_for_freeing_arfs_filters(edev); 2281 qede_free_arfs(edev); 2282 } 2283 2284 /* Release the interrupts */ 2285 qede_sync_free_irqs(edev); 2286 edev->ops->common->set_fp_int(edev->cdev, 0); 2287 2288 qede_napi_disable_remove(edev); 2289 2290 if (mode == QEDE_UNLOAD_RECOVERY) 2291 qede_empty_tx_queues(edev); 2292 2293 qede_free_mem_load(edev); 2294 qede_free_fp_array(edev); 2295 2296 out: 2297 if (!is_locked) 2298 __qede_unlock(edev); 2299 2300 if (mode != QEDE_UNLOAD_RECOVERY) 2301 DP_NOTICE(edev, "Link is down\n"); 2302 2303 edev->ptp_skip_txts = 0; 2304 2305 DP_INFO(edev, "Ending qede unload\n"); 2306 } 2307 2308 enum qede_load_mode { 2309 QEDE_LOAD_NORMAL, 2310 QEDE_LOAD_RELOAD, 2311 QEDE_LOAD_RECOVERY, 2312 }; 2313 2314 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2315 bool is_locked) 2316 { 2317 struct qed_link_params link_params; 2318 u8 num_tc; 2319 int rc; 2320 2321 DP_INFO(edev, "Starting qede load\n"); 2322 2323 if (!is_locked) 2324 __qede_lock(edev); 2325 2326 rc = qede_set_num_queues(edev); 2327 if (rc) 2328 goto out; 2329 2330 rc = qede_alloc_fp_array(edev); 2331 if (rc) 2332 goto out; 2333 2334 qede_init_fp(edev); 2335 2336 rc = qede_alloc_mem_load(edev); 2337 if (rc) 2338 goto err1; 2339 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2340 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2341 2342 rc = qede_set_real_num_queues(edev); 2343 if (rc) 2344 goto err2; 2345 2346 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2347 rc = qede_alloc_arfs(edev); 2348 if (rc) 2349 DP_NOTICE(edev, "aRFS memory allocation failed\n"); 2350 } 2351 2352 qede_napi_add_enable(edev); 2353 DP_INFO(edev, "Napi added and enabled\n"); 2354 2355 rc = qede_setup_irqs(edev); 2356 if (rc) 2357 goto err3; 2358 DP_INFO(edev, "Setup IRQs succeeded\n"); 2359 2360 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2361 if (rc) 2362 goto err4; 2363 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2364 2365 num_tc = netdev_get_num_tc(edev->ndev); 2366 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2367 qede_setup_tc(edev->ndev, num_tc); 2368 2369 /* Program un-configured VLANs */ 2370 qede_configure_vlan_filters(edev); 2371 2372 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2373 2374 /* Ask for link-up using current configuration */ 2375 memset(&link_params, 0, sizeof(link_params)); 2376 link_params.link_up = true; 2377 edev->ops->common->set_link(edev->cdev, &link_params); 2378 2379 edev->state = QEDE_STATE_OPEN; 2380 2381 DP_INFO(edev, "Ending successfully qede load\n"); 2382 2383 goto out; 2384 err4: 2385 qede_sync_free_irqs(edev); 2386 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2387 err3: 2388 qede_napi_disable_remove(edev); 2389 err2: 2390 qede_free_mem_load(edev); 2391 err1: 2392 edev->ops->common->set_fp_int(edev->cdev, 0); 2393 qede_free_fp_array(edev); 2394 edev->num_queues = 0; 2395 edev->fp_num_tx = 0; 2396 edev->fp_num_rx = 0; 2397 out: 2398 if (!is_locked) 2399 __qede_unlock(edev); 2400 2401 return rc; 2402 } 2403 2404 /* 'func' should be able to run between unload and reload assuming interface 2405 * is actually running, or afterwards in case it's currently DOWN. 2406 */ 2407 void qede_reload(struct qede_dev *edev, 2408 struct qede_reload_args *args, bool is_locked) 2409 { 2410 if (!is_locked) 2411 __qede_lock(edev); 2412 2413 /* Since qede_lock is held, internal state wouldn't change even 2414 * if netdev state would start transitioning. Check whether current 2415 * internal configuration indicates device is up, then reload. 2416 */ 2417 if (edev->state == QEDE_STATE_OPEN) { 2418 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2419 if (args) 2420 args->func(edev, args); 2421 qede_load(edev, QEDE_LOAD_RELOAD, true); 2422 2423 /* Since no one is going to do it for us, re-configure */ 2424 qede_config_rx_mode(edev->ndev); 2425 } else if (args) { 2426 args->func(edev, args); 2427 } 2428 2429 if (!is_locked) 2430 __qede_unlock(edev); 2431 } 2432 2433 /* called with rtnl_lock */ 2434 static int qede_open(struct net_device *ndev) 2435 { 2436 struct qede_dev *edev = netdev_priv(ndev); 2437 int rc; 2438 2439 netif_carrier_off(ndev); 2440 2441 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2442 2443 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2444 if (rc) 2445 return rc; 2446 2447 udp_tunnel_nic_reset_ntf(ndev); 2448 2449 edev->ops->common->update_drv_state(edev->cdev, true); 2450 2451 return 0; 2452 } 2453 2454 static int qede_close(struct net_device *ndev) 2455 { 2456 struct qede_dev *edev = netdev_priv(ndev); 2457 2458 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2459 2460 edev->ops->common->update_drv_state(edev->cdev, false); 2461 2462 return 0; 2463 } 2464 2465 static void qede_link_update(void *dev, struct qed_link_output *link) 2466 { 2467 struct qede_dev *edev = dev; 2468 2469 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2470 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2471 return; 2472 } 2473 2474 if (link->link_up) { 2475 if (!netif_carrier_ok(edev->ndev)) { 2476 DP_NOTICE(edev, "Link is up\n"); 2477 netif_tx_start_all_queues(edev->ndev); 2478 netif_carrier_on(edev->ndev); 2479 qede_rdma_dev_event_open(edev); 2480 } 2481 } else { 2482 if (netif_carrier_ok(edev->ndev)) { 2483 DP_NOTICE(edev, "Link is down\n"); 2484 netif_tx_disable(edev->ndev); 2485 netif_carrier_off(edev->ndev); 2486 qede_rdma_dev_event_close(edev); 2487 } 2488 } 2489 } 2490 2491 static void qede_schedule_recovery_handler(void *dev) 2492 { 2493 struct qede_dev *edev = dev; 2494 2495 if (edev->state == QEDE_STATE_RECOVERY) { 2496 DP_NOTICE(edev, 2497 "Avoid scheduling a recovery handling since already in recovery state\n"); 2498 return; 2499 } 2500 2501 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2502 schedule_delayed_work(&edev->sp_task, 0); 2503 2504 DP_INFO(edev, "Scheduled a recovery handler\n"); 2505 } 2506 2507 static void qede_recovery_failed(struct qede_dev *edev) 2508 { 2509 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2510 2511 netif_device_detach(edev->ndev); 2512 2513 if (edev->cdev) 2514 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2515 } 2516 2517 static void qede_recovery_handler(struct qede_dev *edev) 2518 { 2519 u32 curr_state = edev->state; 2520 int rc; 2521 2522 DP_NOTICE(edev, "Starting a recovery process\n"); 2523 2524 /* No need to acquire first the qede_lock since is done by qede_sp_task 2525 * before calling this function. 2526 */ 2527 edev->state = QEDE_STATE_RECOVERY; 2528 2529 edev->ops->common->recovery_prolog(edev->cdev); 2530 2531 if (curr_state == QEDE_STATE_OPEN) 2532 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2533 2534 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2535 2536 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2537 IS_VF(edev), QEDE_PROBE_RECOVERY); 2538 if (rc) { 2539 edev->cdev = NULL; 2540 goto err; 2541 } 2542 2543 if (curr_state == QEDE_STATE_OPEN) { 2544 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2545 if (rc) 2546 goto err; 2547 2548 qede_config_rx_mode(edev->ndev); 2549 udp_tunnel_nic_reset_ntf(edev->ndev); 2550 } 2551 2552 edev->state = curr_state; 2553 2554 DP_NOTICE(edev, "Recovery handling is done\n"); 2555 2556 return; 2557 2558 err: 2559 qede_recovery_failed(edev); 2560 } 2561 2562 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2563 { 2564 struct qed_dev *cdev = edev->cdev; 2565 2566 DP_NOTICE(edev, 2567 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2568 edev->err_flags); 2569 2570 /* Get a call trace of the flow that led to the error */ 2571 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2572 2573 /* Prevent HW attentions from being reasserted */ 2574 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2575 edev->ops->common->attn_clr_enable(cdev, true); 2576 2577 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2578 } 2579 2580 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2581 { 2582 struct qed_dev *cdev = edev->cdev; 2583 2584 DP_NOTICE(edev, 2585 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2586 edev->err_flags); 2587 2588 /* Trigger a recovery process. 2589 * This is placed in the sleep requiring section just to make 2590 * sure it is the last one, and that all the other operations 2591 * were completed. 2592 */ 2593 if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags)) 2594 edev->ops->common->recovery_process(cdev); 2595 2596 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2597 2598 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2599 } 2600 2601 static void qede_set_hw_err_flags(struct qede_dev *edev, 2602 enum qed_hw_err_type err_type) 2603 { 2604 unsigned long err_flags = 0; 2605 2606 switch (err_type) { 2607 case QED_HW_ERR_DMAE_FAIL: 2608 set_bit(QEDE_ERR_WARN, &err_flags); 2609 fallthrough; 2610 case QED_HW_ERR_MFW_RESP_FAIL: 2611 case QED_HW_ERR_HW_ATTN: 2612 case QED_HW_ERR_RAMROD_FAIL: 2613 case QED_HW_ERR_FW_ASSERT: 2614 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2615 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2616 break; 2617 2618 default: 2619 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2620 break; 2621 } 2622 2623 edev->err_flags |= err_flags; 2624 } 2625 2626 static void qede_schedule_hw_err_handler(void *dev, 2627 enum qed_hw_err_type err_type) 2628 { 2629 struct qede_dev *edev = dev; 2630 2631 /* Fan failure cannot be masked by handling of another HW error or by a 2632 * concurrent recovery process. 2633 */ 2634 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2635 edev->state == QEDE_STATE_RECOVERY) && 2636 err_type != QED_HW_ERR_FAN_FAIL) { 2637 DP_INFO(edev, 2638 "Avoid scheduling an error handling while another HW error is being handled\n"); 2639 return; 2640 } 2641 2642 if (err_type >= QED_HW_ERR_LAST) { 2643 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2644 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2645 return; 2646 } 2647 2648 qede_set_hw_err_flags(edev, err_type); 2649 qede_atomic_hw_err_handler(edev); 2650 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2651 schedule_delayed_work(&edev->sp_task, 0); 2652 2653 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2654 } 2655 2656 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2657 { 2658 struct netdev_queue *netdev_txq; 2659 2660 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2661 if (netif_xmit_stopped(netdev_txq)) 2662 return true; 2663 2664 return false; 2665 } 2666 2667 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2668 { 2669 struct qede_dev *edev = dev; 2670 struct netdev_hw_addr *ha; 2671 int i; 2672 2673 if (edev->ndev->features & NETIF_F_IP_CSUM) 2674 data->feat_flags |= QED_TLV_IP_CSUM; 2675 if (edev->ndev->features & NETIF_F_TSO) 2676 data->feat_flags |= QED_TLV_LSO; 2677 2678 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2679 memset(data->mac[1], 0, ETH_ALEN); 2680 memset(data->mac[2], 0, ETH_ALEN); 2681 /* Copy the first two UC macs */ 2682 netif_addr_lock_bh(edev->ndev); 2683 i = 1; 2684 netdev_for_each_uc_addr(ha, edev->ndev) { 2685 ether_addr_copy(data->mac[i++], ha->addr); 2686 if (i == QED_TLV_MAC_COUNT) 2687 break; 2688 } 2689 2690 netif_addr_unlock_bh(edev->ndev); 2691 } 2692 2693 static void qede_get_eth_tlv_data(void *dev, void *data) 2694 { 2695 struct qed_mfw_tlv_eth *etlv = data; 2696 struct qede_dev *edev = dev; 2697 struct qede_fastpath *fp; 2698 int i; 2699 2700 etlv->lso_maxoff_size = 0XFFFF; 2701 etlv->lso_maxoff_size_set = true; 2702 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2703 etlv->lso_minseg_size_set = true; 2704 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2705 etlv->prom_mode_set = true; 2706 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2707 etlv->tx_descr_size_set = true; 2708 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2709 etlv->rx_descr_size_set = true; 2710 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2711 etlv->iov_offload_set = true; 2712 2713 /* Fill information regarding queues; Should be done under the qede 2714 * lock to guarantee those don't change beneath our feet. 2715 */ 2716 etlv->txqs_empty = true; 2717 etlv->rxqs_empty = true; 2718 etlv->num_txqs_full = 0; 2719 etlv->num_rxqs_full = 0; 2720 2721 __qede_lock(edev); 2722 for_each_queue(i) { 2723 fp = &edev->fp_array[i]; 2724 if (fp->type & QEDE_FASTPATH_TX) { 2725 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2726 2727 if (txq->sw_tx_cons != txq->sw_tx_prod) 2728 etlv->txqs_empty = false; 2729 if (qede_is_txq_full(edev, txq)) 2730 etlv->num_txqs_full++; 2731 } 2732 if (fp->type & QEDE_FASTPATH_RX) { 2733 if (qede_has_rx_work(fp->rxq)) 2734 etlv->rxqs_empty = false; 2735 2736 /* This one is a bit tricky; Firmware might stop 2737 * placing packets if ring is not yet full. 2738 * Give an approximation. 2739 */ 2740 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2741 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2742 RX_RING_SIZE - 100) 2743 etlv->num_rxqs_full++; 2744 } 2745 } 2746 __qede_unlock(edev); 2747 2748 etlv->txqs_empty_set = true; 2749 etlv->rxqs_empty_set = true; 2750 etlv->num_txqs_full_set = true; 2751 etlv->num_rxqs_full_set = true; 2752 } 2753 2754 /** 2755 * qede_io_error_detected - called when PCI error is detected 2756 * @pdev: Pointer to PCI device 2757 * @state: The current pci connection state 2758 * 2759 * This function is called after a PCI bus error affecting 2760 * this device has been detected. 2761 */ 2762 static pci_ers_result_t 2763 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2764 { 2765 struct net_device *dev = pci_get_drvdata(pdev); 2766 struct qede_dev *edev = netdev_priv(dev); 2767 2768 if (!edev) 2769 return PCI_ERS_RESULT_NONE; 2770 2771 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2772 2773 __qede_lock(edev); 2774 if (edev->state == QEDE_STATE_RECOVERY) { 2775 DP_NOTICE(edev, "Device already in the recovery state\n"); 2776 __qede_unlock(edev); 2777 return PCI_ERS_RESULT_NONE; 2778 } 2779 2780 /* PF handles the recovery of its VFs */ 2781 if (IS_VF(edev)) { 2782 DP_VERBOSE(edev, QED_MSG_IOV, 2783 "VF recovery is handled by its PF\n"); 2784 __qede_unlock(edev); 2785 return PCI_ERS_RESULT_RECOVERED; 2786 } 2787 2788 /* Close OS Tx */ 2789 netif_tx_disable(edev->ndev); 2790 netif_carrier_off(edev->ndev); 2791 2792 set_bit(QEDE_SP_AER, &edev->sp_flags); 2793 schedule_delayed_work(&edev->sp_task, 0); 2794 2795 __qede_unlock(edev); 2796 2797 return PCI_ERS_RESULT_CAN_RECOVER; 2798 } 2799