xref: /linux/drivers/net/ethernet/qlogic/qede/qede_main.c (revision 93a3545d812ae7cfe4426374e00a7d8f64ac02e0)
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3  * Copyright (c) 2015-2017  QLogic Corporation
4  * Copyright (c) 2019-2020 Marvell International Ltd.
5  */
6 
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/version.h>
11 #include <linux/device.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/skbuff.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/string.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/interrupt.h>
20 #include <asm/byteorder.h>
21 #include <asm/param.h>
22 #include <linux/io.h>
23 #include <linux/netdev_features.h>
24 #include <linux/udp.h>
25 #include <linux/tcp.h>
26 #include <net/udp_tunnel.h>
27 #include <linux/ip.h>
28 #include <net/ipv6.h>
29 #include <net/tcp.h>
30 #include <linux/if_ether.h>
31 #include <linux/if_vlan.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/ethtool.h>
34 #include <linux/in.h>
35 #include <linux/random.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/bitops.h>
38 #include <linux/vmalloc.h>
39 #include <linux/aer.h>
40 #include "qede.h"
41 #include "qede_ptp.h"
42 
43 static char version[] =
44 	"QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
45 
46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
47 MODULE_LICENSE("GPL");
48 MODULE_VERSION(DRV_MODULE_VERSION);
49 
50 static uint debug;
51 module_param(debug, uint, 0);
52 MODULE_PARM_DESC(debug, " Default debug msglevel");
53 
54 static const struct qed_eth_ops *qed_ops;
55 
56 #define CHIP_NUM_57980S_40		0x1634
57 #define CHIP_NUM_57980S_10		0x1666
58 #define CHIP_NUM_57980S_MF		0x1636
59 #define CHIP_NUM_57980S_100		0x1644
60 #define CHIP_NUM_57980S_50		0x1654
61 #define CHIP_NUM_57980S_25		0x1656
62 #define CHIP_NUM_57980S_IOV		0x1664
63 #define CHIP_NUM_AH			0x8070
64 #define CHIP_NUM_AH_IOV			0x8090
65 
66 #ifndef PCI_DEVICE_ID_NX2_57980E
67 #define PCI_DEVICE_ID_57980S_40		CHIP_NUM_57980S_40
68 #define PCI_DEVICE_ID_57980S_10		CHIP_NUM_57980S_10
69 #define PCI_DEVICE_ID_57980S_MF		CHIP_NUM_57980S_MF
70 #define PCI_DEVICE_ID_57980S_100	CHIP_NUM_57980S_100
71 #define PCI_DEVICE_ID_57980S_50		CHIP_NUM_57980S_50
72 #define PCI_DEVICE_ID_57980S_25		CHIP_NUM_57980S_25
73 #define PCI_DEVICE_ID_57980S_IOV	CHIP_NUM_57980S_IOV
74 #define PCI_DEVICE_ID_AH		CHIP_NUM_AH
75 #define PCI_DEVICE_ID_AH_IOV		CHIP_NUM_AH_IOV
76 
77 #endif
78 
79 enum qede_pci_private {
80 	QEDE_PRIVATE_PF,
81 	QEDE_PRIVATE_VF
82 };
83 
84 static const struct pci_device_id qede_pci_tbl[] = {
85 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
86 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
87 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
88 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
89 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
90 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
91 #ifdef CONFIG_QED_SRIOV
92 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
93 #endif
94 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
95 #ifdef CONFIG_QED_SRIOV
96 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
97 #endif
98 	{ 0 }
99 };
100 
101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
102 
103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
104 static pci_ers_result_t
105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
106 
107 #define TX_TIMEOUT		(5 * HZ)
108 
109 /* Utilize last protocol index for XDP */
110 #define XDP_PI	11
111 
112 static void qede_remove(struct pci_dev *pdev);
113 static void qede_shutdown(struct pci_dev *pdev);
114 static void qede_link_update(void *dev, struct qed_link_output *link);
115 static void qede_schedule_recovery_handler(void *dev);
116 static void qede_recovery_handler(struct qede_dev *edev);
117 static void qede_schedule_hw_err_handler(void *dev,
118 					 enum qed_hw_err_type err_type);
119 static void qede_get_eth_tlv_data(void *edev, void *data);
120 static void qede_get_generic_tlv_data(void *edev,
121 				      struct qed_generic_tlvs *data);
122 static void qede_generic_hw_err_handler(struct qede_dev *edev);
123 #ifdef CONFIG_QED_SRIOV
124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
125 			    __be16 vlan_proto)
126 {
127 	struct qede_dev *edev = netdev_priv(ndev);
128 
129 	if (vlan > 4095) {
130 		DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
131 		return -EINVAL;
132 	}
133 
134 	if (vlan_proto != htons(ETH_P_8021Q))
135 		return -EPROTONOSUPPORT;
136 
137 	DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
138 		   vlan, vf);
139 
140 	return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
141 }
142 
143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
144 {
145 	struct qede_dev *edev = netdev_priv(ndev);
146 
147 	DP_VERBOSE(edev, QED_MSG_IOV,
148 		   "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
149 		   mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
150 
151 	if (!is_valid_ether_addr(mac)) {
152 		DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
153 		return -EINVAL;
154 	}
155 
156 	return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
157 }
158 
159 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
160 {
161 	struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
162 	struct qed_dev_info *qed_info = &edev->dev_info.common;
163 	struct qed_update_vport_params *vport_params;
164 	int rc;
165 
166 	vport_params = vzalloc(sizeof(*vport_params));
167 	if (!vport_params)
168 		return -ENOMEM;
169 	DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
170 
171 	rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
172 
173 	/* Enable/Disable Tx switching for PF */
174 	if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
175 	    !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
176 		vport_params->vport_id = 0;
177 		vport_params->update_tx_switching_flg = 1;
178 		vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
179 		edev->ops->vport_update(edev->cdev, vport_params);
180 	}
181 
182 	vfree(vport_params);
183 	return rc;
184 }
185 #endif
186 
187 static const struct pci_error_handlers qede_err_handler = {
188 	.error_detected = qede_io_error_detected,
189 };
190 
191 static struct pci_driver qede_pci_driver = {
192 	.name = "qede",
193 	.id_table = qede_pci_tbl,
194 	.probe = qede_probe,
195 	.remove = qede_remove,
196 	.shutdown = qede_shutdown,
197 #ifdef CONFIG_QED_SRIOV
198 	.sriov_configure = qede_sriov_configure,
199 #endif
200 	.err_handler = &qede_err_handler,
201 };
202 
203 static struct qed_eth_cb_ops qede_ll_ops = {
204 	{
205 #ifdef CONFIG_RFS_ACCEL
206 		.arfs_filter_op = qede_arfs_filter_op,
207 #endif
208 		.link_update = qede_link_update,
209 		.schedule_recovery_handler = qede_schedule_recovery_handler,
210 		.schedule_hw_err_handler = qede_schedule_hw_err_handler,
211 		.get_generic_tlv_data = qede_get_generic_tlv_data,
212 		.get_protocol_tlv_data = qede_get_eth_tlv_data,
213 	},
214 	.force_mac = qede_force_mac,
215 	.ports_update = qede_udp_ports_update,
216 };
217 
218 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
219 			     void *ptr)
220 {
221 	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
222 	struct ethtool_drvinfo drvinfo;
223 	struct qede_dev *edev;
224 
225 	if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
226 		goto done;
227 
228 	/* Check whether this is a qede device */
229 	if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
230 		goto done;
231 
232 	memset(&drvinfo, 0, sizeof(drvinfo));
233 	ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
234 	if (strcmp(drvinfo.driver, "qede"))
235 		goto done;
236 	edev = netdev_priv(ndev);
237 
238 	switch (event) {
239 	case NETDEV_CHANGENAME:
240 		/* Notify qed of the name change */
241 		if (!edev->ops || !edev->ops->common)
242 			goto done;
243 		edev->ops->common->set_name(edev->cdev, edev->ndev->name);
244 		break;
245 	case NETDEV_CHANGEADDR:
246 		edev = netdev_priv(ndev);
247 		qede_rdma_event_changeaddr(edev);
248 		break;
249 	}
250 
251 done:
252 	return NOTIFY_DONE;
253 }
254 
255 static struct notifier_block qede_netdev_notifier = {
256 	.notifier_call = qede_netdev_event,
257 };
258 
259 static
260 int __init qede_init(void)
261 {
262 	int ret;
263 
264 	pr_info("qede_init: %s\n", version);
265 
266 	qed_ops = qed_get_eth_ops();
267 	if (!qed_ops) {
268 		pr_notice("Failed to get qed ethtool operations\n");
269 		return -EINVAL;
270 	}
271 
272 	/* Must register notifier before pci ops, since we might miss
273 	 * interface rename after pci probe and netdev registration.
274 	 */
275 	ret = register_netdevice_notifier(&qede_netdev_notifier);
276 	if (ret) {
277 		pr_notice("Failed to register netdevice_notifier\n");
278 		qed_put_eth_ops();
279 		return -EINVAL;
280 	}
281 
282 	ret = pci_register_driver(&qede_pci_driver);
283 	if (ret) {
284 		pr_notice("Failed to register driver\n");
285 		unregister_netdevice_notifier(&qede_netdev_notifier);
286 		qed_put_eth_ops();
287 		return -EINVAL;
288 	}
289 
290 	return 0;
291 }
292 
293 static void __exit qede_cleanup(void)
294 {
295 	if (debug & QED_LOG_INFO_MASK)
296 		pr_info("qede_cleanup called\n");
297 
298 	unregister_netdevice_notifier(&qede_netdev_notifier);
299 	pci_unregister_driver(&qede_pci_driver);
300 	qed_put_eth_ops();
301 }
302 
303 module_init(qede_init);
304 module_exit(qede_cleanup);
305 
306 static int qede_open(struct net_device *ndev);
307 static int qede_close(struct net_device *ndev);
308 
309 void qede_fill_by_demand_stats(struct qede_dev *edev)
310 {
311 	struct qede_stats_common *p_common = &edev->stats.common;
312 	struct qed_eth_stats stats;
313 
314 	edev->ops->get_vport_stats(edev->cdev, &stats);
315 
316 	p_common->no_buff_discards = stats.common.no_buff_discards;
317 	p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
318 	p_common->ttl0_discard = stats.common.ttl0_discard;
319 	p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
320 	p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
321 	p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
322 	p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
323 	p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
324 	p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
325 	p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
326 	p_common->mac_filter_discards = stats.common.mac_filter_discards;
327 	p_common->gft_filter_drop = stats.common.gft_filter_drop;
328 
329 	p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
330 	p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
331 	p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
332 	p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
333 	p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
334 	p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
335 	p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
336 	p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
337 	p_common->coalesced_events = stats.common.tpa_coalesced_events;
338 	p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
339 	p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
340 	p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
341 
342 	p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
343 	p_common->rx_65_to_127_byte_packets =
344 	    stats.common.rx_65_to_127_byte_packets;
345 	p_common->rx_128_to_255_byte_packets =
346 	    stats.common.rx_128_to_255_byte_packets;
347 	p_common->rx_256_to_511_byte_packets =
348 	    stats.common.rx_256_to_511_byte_packets;
349 	p_common->rx_512_to_1023_byte_packets =
350 	    stats.common.rx_512_to_1023_byte_packets;
351 	p_common->rx_1024_to_1518_byte_packets =
352 	    stats.common.rx_1024_to_1518_byte_packets;
353 	p_common->rx_crc_errors = stats.common.rx_crc_errors;
354 	p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
355 	p_common->rx_pause_frames = stats.common.rx_pause_frames;
356 	p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
357 	p_common->rx_align_errors = stats.common.rx_align_errors;
358 	p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
359 	p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
360 	p_common->rx_jabbers = stats.common.rx_jabbers;
361 	p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
362 	p_common->rx_fragments = stats.common.rx_fragments;
363 	p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
364 	p_common->tx_65_to_127_byte_packets =
365 	    stats.common.tx_65_to_127_byte_packets;
366 	p_common->tx_128_to_255_byte_packets =
367 	    stats.common.tx_128_to_255_byte_packets;
368 	p_common->tx_256_to_511_byte_packets =
369 	    stats.common.tx_256_to_511_byte_packets;
370 	p_common->tx_512_to_1023_byte_packets =
371 	    stats.common.tx_512_to_1023_byte_packets;
372 	p_common->tx_1024_to_1518_byte_packets =
373 	    stats.common.tx_1024_to_1518_byte_packets;
374 	p_common->tx_pause_frames = stats.common.tx_pause_frames;
375 	p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
376 	p_common->brb_truncates = stats.common.brb_truncates;
377 	p_common->brb_discards = stats.common.brb_discards;
378 	p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
379 	p_common->link_change_count = stats.common.link_change_count;
380 	p_common->ptp_skip_txts = edev->ptp_skip_txts;
381 
382 	if (QEDE_IS_BB(edev)) {
383 		struct qede_stats_bb *p_bb = &edev->stats.bb;
384 
385 		p_bb->rx_1519_to_1522_byte_packets =
386 		    stats.bb.rx_1519_to_1522_byte_packets;
387 		p_bb->rx_1519_to_2047_byte_packets =
388 		    stats.bb.rx_1519_to_2047_byte_packets;
389 		p_bb->rx_2048_to_4095_byte_packets =
390 		    stats.bb.rx_2048_to_4095_byte_packets;
391 		p_bb->rx_4096_to_9216_byte_packets =
392 		    stats.bb.rx_4096_to_9216_byte_packets;
393 		p_bb->rx_9217_to_16383_byte_packets =
394 		    stats.bb.rx_9217_to_16383_byte_packets;
395 		p_bb->tx_1519_to_2047_byte_packets =
396 		    stats.bb.tx_1519_to_2047_byte_packets;
397 		p_bb->tx_2048_to_4095_byte_packets =
398 		    stats.bb.tx_2048_to_4095_byte_packets;
399 		p_bb->tx_4096_to_9216_byte_packets =
400 		    stats.bb.tx_4096_to_9216_byte_packets;
401 		p_bb->tx_9217_to_16383_byte_packets =
402 		    stats.bb.tx_9217_to_16383_byte_packets;
403 		p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
404 		p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
405 	} else {
406 		struct qede_stats_ah *p_ah = &edev->stats.ah;
407 
408 		p_ah->rx_1519_to_max_byte_packets =
409 		    stats.ah.rx_1519_to_max_byte_packets;
410 		p_ah->tx_1519_to_max_byte_packets =
411 		    stats.ah.tx_1519_to_max_byte_packets;
412 	}
413 }
414 
415 static void qede_get_stats64(struct net_device *dev,
416 			     struct rtnl_link_stats64 *stats)
417 {
418 	struct qede_dev *edev = netdev_priv(dev);
419 	struct qede_stats_common *p_common;
420 
421 	qede_fill_by_demand_stats(edev);
422 	p_common = &edev->stats.common;
423 
424 	stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
425 			    p_common->rx_bcast_pkts;
426 	stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
427 			    p_common->tx_bcast_pkts;
428 
429 	stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
430 			  p_common->rx_bcast_bytes;
431 	stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
432 			  p_common->tx_bcast_bytes;
433 
434 	stats->tx_errors = p_common->tx_err_drop_pkts;
435 	stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
436 
437 	stats->rx_fifo_errors = p_common->no_buff_discards;
438 
439 	if (QEDE_IS_BB(edev))
440 		stats->collisions = edev->stats.bb.tx_total_collisions;
441 	stats->rx_crc_errors = p_common->rx_crc_errors;
442 	stats->rx_frame_errors = p_common->rx_align_errors;
443 }
444 
445 #ifdef CONFIG_QED_SRIOV
446 static int qede_get_vf_config(struct net_device *dev, int vfidx,
447 			      struct ifla_vf_info *ivi)
448 {
449 	struct qede_dev *edev = netdev_priv(dev);
450 
451 	if (!edev->ops)
452 		return -EINVAL;
453 
454 	return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
455 }
456 
457 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
458 			    int min_tx_rate, int max_tx_rate)
459 {
460 	struct qede_dev *edev = netdev_priv(dev);
461 
462 	return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
463 					max_tx_rate);
464 }
465 
466 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
467 {
468 	struct qede_dev *edev = netdev_priv(dev);
469 
470 	if (!edev->ops)
471 		return -EINVAL;
472 
473 	return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
474 }
475 
476 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
477 				  int link_state)
478 {
479 	struct qede_dev *edev = netdev_priv(dev);
480 
481 	if (!edev->ops)
482 		return -EINVAL;
483 
484 	return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
485 }
486 
487 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
488 {
489 	struct qede_dev *edev = netdev_priv(dev);
490 
491 	if (!edev->ops)
492 		return -EINVAL;
493 
494 	return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
495 }
496 #endif
497 
498 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
499 {
500 	struct qede_dev *edev = netdev_priv(dev);
501 
502 	if (!netif_running(dev))
503 		return -EAGAIN;
504 
505 	switch (cmd) {
506 	case SIOCSHWTSTAMP:
507 		return qede_ptp_hw_ts(edev, ifr);
508 	default:
509 		DP_VERBOSE(edev, QED_MSG_DEBUG,
510 			   "default IOCTL cmd 0x%x\n", cmd);
511 		return -EOPNOTSUPP;
512 	}
513 
514 	return 0;
515 }
516 
517 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)
518 {
519 	DP_NOTICE(edev,
520 		  "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
521 		  txq->index, le16_to_cpu(*txq->hw_cons_ptr),
522 		  qed_chain_get_cons_idx(&txq->tx_pbl),
523 		  qed_chain_get_prod_idx(&txq->tx_pbl),
524 		  jiffies);
525 }
526 
527 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
528 {
529 	struct qede_dev *edev = netdev_priv(dev);
530 	struct qede_tx_queue *txq;
531 	int cos;
532 
533 	netif_carrier_off(dev);
534 	DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
535 
536 	if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX))
537 		return;
538 
539 	for_each_cos_in_txq(edev, cos) {
540 		txq = &edev->fp_array[txqueue].txq[cos];
541 
542 		if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
543 		    qed_chain_get_prod_idx(&txq->tx_pbl))
544 			qede_tx_log_print(edev, txq);
545 	}
546 
547 	if (IS_VF(edev))
548 		return;
549 
550 	if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
551 	    edev->state == QEDE_STATE_RECOVERY) {
552 		DP_INFO(edev,
553 			"Avoid handling a Tx timeout while another HW error is being handled\n");
554 		return;
555 	}
556 
557 	set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
558 	set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
559 	schedule_delayed_work(&edev->sp_task, 0);
560 }
561 
562 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
563 {
564 	struct qede_dev *edev = netdev_priv(ndev);
565 	int cos, count, offset;
566 
567 	if (num_tc > edev->dev_info.num_tc)
568 		return -EINVAL;
569 
570 	netdev_reset_tc(ndev);
571 	netdev_set_num_tc(ndev, num_tc);
572 
573 	for_each_cos_in_txq(edev, cos) {
574 		count = QEDE_TSS_COUNT(edev);
575 		offset = cos * QEDE_TSS_COUNT(edev);
576 		netdev_set_tc_queue(ndev, cos, count, offset);
577 	}
578 
579 	return 0;
580 }
581 
582 static int
583 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
584 		__be16 proto)
585 {
586 	switch (f->command) {
587 	case FLOW_CLS_REPLACE:
588 		return qede_add_tc_flower_fltr(edev, proto, f);
589 	case FLOW_CLS_DESTROY:
590 		return qede_delete_flow_filter(edev, f->cookie);
591 	default:
592 		return -EOPNOTSUPP;
593 	}
594 }
595 
596 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
597 				  void *cb_priv)
598 {
599 	struct flow_cls_offload *f;
600 	struct qede_dev *edev = cb_priv;
601 
602 	if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
603 		return -EOPNOTSUPP;
604 
605 	switch (type) {
606 	case TC_SETUP_CLSFLOWER:
607 		f = type_data;
608 		return qede_set_flower(edev, f, f->common.protocol);
609 	default:
610 		return -EOPNOTSUPP;
611 	}
612 }
613 
614 static LIST_HEAD(qede_block_cb_list);
615 
616 static int
617 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
618 		      void *type_data)
619 {
620 	struct qede_dev *edev = netdev_priv(dev);
621 	struct tc_mqprio_qopt *mqprio;
622 
623 	switch (type) {
624 	case TC_SETUP_BLOCK:
625 		return flow_block_cb_setup_simple(type_data,
626 						  &qede_block_cb_list,
627 						  qede_setup_tc_block_cb,
628 						  edev, edev, true);
629 	case TC_SETUP_QDISC_MQPRIO:
630 		mqprio = type_data;
631 
632 		mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
633 		return qede_setup_tc(dev, mqprio->num_tc);
634 	default:
635 		return -EOPNOTSUPP;
636 	}
637 }
638 
639 static const struct net_device_ops qede_netdev_ops = {
640 	.ndo_open = qede_open,
641 	.ndo_stop = qede_close,
642 	.ndo_start_xmit = qede_start_xmit,
643 	.ndo_select_queue = qede_select_queue,
644 	.ndo_set_rx_mode = qede_set_rx_mode,
645 	.ndo_set_mac_address = qede_set_mac_addr,
646 	.ndo_validate_addr = eth_validate_addr,
647 	.ndo_change_mtu = qede_change_mtu,
648 	.ndo_do_ioctl = qede_ioctl,
649 	.ndo_tx_timeout = qede_tx_timeout,
650 #ifdef CONFIG_QED_SRIOV
651 	.ndo_set_vf_mac = qede_set_vf_mac,
652 	.ndo_set_vf_vlan = qede_set_vf_vlan,
653 	.ndo_set_vf_trust = qede_set_vf_trust,
654 #endif
655 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
656 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
657 	.ndo_fix_features = qede_fix_features,
658 	.ndo_set_features = qede_set_features,
659 	.ndo_get_stats64 = qede_get_stats64,
660 #ifdef CONFIG_QED_SRIOV
661 	.ndo_set_vf_link_state = qede_set_vf_link_state,
662 	.ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
663 	.ndo_get_vf_config = qede_get_vf_config,
664 	.ndo_set_vf_rate = qede_set_vf_rate,
665 #endif
666 	.ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
667 	.ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
668 	.ndo_features_check = qede_features_check,
669 	.ndo_bpf = qede_xdp,
670 #ifdef CONFIG_RFS_ACCEL
671 	.ndo_rx_flow_steer = qede_rx_flow_steer,
672 #endif
673 	.ndo_setup_tc = qede_setup_tc_offload,
674 };
675 
676 static const struct net_device_ops qede_netdev_vf_ops = {
677 	.ndo_open = qede_open,
678 	.ndo_stop = qede_close,
679 	.ndo_start_xmit = qede_start_xmit,
680 	.ndo_select_queue = qede_select_queue,
681 	.ndo_set_rx_mode = qede_set_rx_mode,
682 	.ndo_set_mac_address = qede_set_mac_addr,
683 	.ndo_validate_addr = eth_validate_addr,
684 	.ndo_change_mtu = qede_change_mtu,
685 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
686 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
687 	.ndo_fix_features = qede_fix_features,
688 	.ndo_set_features = qede_set_features,
689 	.ndo_get_stats64 = qede_get_stats64,
690 	.ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
691 	.ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
692 	.ndo_features_check = qede_features_check,
693 };
694 
695 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
696 	.ndo_open = qede_open,
697 	.ndo_stop = qede_close,
698 	.ndo_start_xmit = qede_start_xmit,
699 	.ndo_select_queue = qede_select_queue,
700 	.ndo_set_rx_mode = qede_set_rx_mode,
701 	.ndo_set_mac_address = qede_set_mac_addr,
702 	.ndo_validate_addr = eth_validate_addr,
703 	.ndo_change_mtu = qede_change_mtu,
704 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
705 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
706 	.ndo_fix_features = qede_fix_features,
707 	.ndo_set_features = qede_set_features,
708 	.ndo_get_stats64 = qede_get_stats64,
709 	.ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
710 	.ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
711 	.ndo_features_check = qede_features_check,
712 	.ndo_bpf = qede_xdp,
713 };
714 
715 /* -------------------------------------------------------------------------
716  * START OF PROBE / REMOVE
717  * -------------------------------------------------------------------------
718  */
719 
720 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
721 					    struct pci_dev *pdev,
722 					    struct qed_dev_eth_info *info,
723 					    u32 dp_module, u8 dp_level)
724 {
725 	struct net_device *ndev;
726 	struct qede_dev *edev;
727 
728 	ndev = alloc_etherdev_mqs(sizeof(*edev),
729 				  info->num_queues * info->num_tc,
730 				  info->num_queues);
731 	if (!ndev) {
732 		pr_err("etherdev allocation failed\n");
733 		return NULL;
734 	}
735 
736 	edev = netdev_priv(ndev);
737 	edev->ndev = ndev;
738 	edev->cdev = cdev;
739 	edev->pdev = pdev;
740 	edev->dp_module = dp_module;
741 	edev->dp_level = dp_level;
742 	edev->ops = qed_ops;
743 
744 	if (is_kdump_kernel()) {
745 		edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
746 		edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
747 	} else {
748 		edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
749 		edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
750 	}
751 
752 	DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
753 		info->num_queues, info->num_queues);
754 
755 	SET_NETDEV_DEV(ndev, &pdev->dev);
756 
757 	memset(&edev->stats, 0, sizeof(edev->stats));
758 	memcpy(&edev->dev_info, info, sizeof(*info));
759 
760 	/* As ethtool doesn't have the ability to show WoL behavior as
761 	 * 'default', if device supports it declare it's enabled.
762 	 */
763 	if (edev->dev_info.common.wol_support)
764 		edev->wol_enabled = true;
765 
766 	INIT_LIST_HEAD(&edev->vlan_list);
767 
768 	return edev;
769 }
770 
771 static void qede_init_ndev(struct qede_dev *edev)
772 {
773 	struct net_device *ndev = edev->ndev;
774 	struct pci_dev *pdev = edev->pdev;
775 	bool udp_tunnel_enable = false;
776 	netdev_features_t hw_features;
777 
778 	pci_set_drvdata(pdev, ndev);
779 
780 	ndev->mem_start = edev->dev_info.common.pci_mem_start;
781 	ndev->base_addr = ndev->mem_start;
782 	ndev->mem_end = edev->dev_info.common.pci_mem_end;
783 	ndev->irq = edev->dev_info.common.pci_irq;
784 
785 	ndev->watchdog_timeo = TX_TIMEOUT;
786 
787 	if (IS_VF(edev)) {
788 		if (edev->dev_info.xdp_supported)
789 			ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
790 		else
791 			ndev->netdev_ops = &qede_netdev_vf_ops;
792 	} else {
793 		ndev->netdev_ops = &qede_netdev_ops;
794 	}
795 
796 	qede_set_ethtool_ops(ndev);
797 
798 	ndev->priv_flags |= IFF_UNICAST_FLT;
799 
800 	/* user-changeble features */
801 	hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
802 		      NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
803 		      NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
804 
805 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
806 		hw_features |= NETIF_F_NTUPLE;
807 
808 	if (edev->dev_info.common.vxlan_enable ||
809 	    edev->dev_info.common.geneve_enable)
810 		udp_tunnel_enable = true;
811 
812 	if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
813 		hw_features |= NETIF_F_TSO_ECN;
814 		ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
815 					NETIF_F_SG | NETIF_F_TSO |
816 					NETIF_F_TSO_ECN | NETIF_F_TSO6 |
817 					NETIF_F_RXCSUM;
818 	}
819 
820 	if (udp_tunnel_enable) {
821 		hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
822 				NETIF_F_GSO_UDP_TUNNEL_CSUM);
823 		ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
824 					  NETIF_F_GSO_UDP_TUNNEL_CSUM);
825 
826 		qede_set_udp_tunnels(edev);
827 	}
828 
829 	if (edev->dev_info.common.gre_enable) {
830 		hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
831 		ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
832 					  NETIF_F_GSO_GRE_CSUM);
833 	}
834 
835 	ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
836 			      NETIF_F_HIGHDMA;
837 	ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
838 			 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
839 			 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
840 
841 	ndev->hw_features = hw_features;
842 
843 	/* MTU range: 46 - 9600 */
844 	ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
845 	ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
846 
847 	/* Set network device HW mac */
848 	ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
849 
850 	ndev->mtu = edev->dev_info.common.mtu;
851 }
852 
853 /* This function converts from 32b param to two params of level and module
854  * Input 32b decoding:
855  * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
856  * 'happy' flow, e.g. memory allocation failed.
857  * b30 - enable all INFO prints. INFO prints are for major steps in the flow
858  * and provide important parameters.
859  * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
860  * module. VERBOSE prints are for tracking the specific flow in low level.
861  *
862  * Notice that the level should be that of the lowest required logs.
863  */
864 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
865 {
866 	*p_dp_level = QED_LEVEL_NOTICE;
867 	*p_dp_module = 0;
868 
869 	if (debug & QED_LOG_VERBOSE_MASK) {
870 		*p_dp_level = QED_LEVEL_VERBOSE;
871 		*p_dp_module = (debug & 0x3FFFFFFF);
872 	} else if (debug & QED_LOG_INFO_MASK) {
873 		*p_dp_level = QED_LEVEL_INFO;
874 	} else if (debug & QED_LOG_NOTICE_MASK) {
875 		*p_dp_level = QED_LEVEL_NOTICE;
876 	}
877 }
878 
879 static void qede_free_fp_array(struct qede_dev *edev)
880 {
881 	if (edev->fp_array) {
882 		struct qede_fastpath *fp;
883 		int i;
884 
885 		for_each_queue(i) {
886 			fp = &edev->fp_array[i];
887 
888 			kfree(fp->sb_info);
889 			/* Handle mem alloc failure case where qede_init_fp
890 			 * didn't register xdp_rxq_info yet.
891 			 * Implicit only (fp->type & QEDE_FASTPATH_RX)
892 			 */
893 			if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
894 				xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
895 			kfree(fp->rxq);
896 			kfree(fp->xdp_tx);
897 			kfree(fp->txq);
898 		}
899 		kfree(edev->fp_array);
900 	}
901 
902 	edev->num_queues = 0;
903 	edev->fp_num_tx = 0;
904 	edev->fp_num_rx = 0;
905 }
906 
907 static int qede_alloc_fp_array(struct qede_dev *edev)
908 {
909 	u8 fp_combined, fp_rx = edev->fp_num_rx;
910 	struct qede_fastpath *fp;
911 	int i;
912 
913 	edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
914 				 sizeof(*edev->fp_array), GFP_KERNEL);
915 	if (!edev->fp_array) {
916 		DP_NOTICE(edev, "fp array allocation failed\n");
917 		goto err;
918 	}
919 
920 	fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
921 
922 	/* Allocate the FP elements for Rx queues followed by combined and then
923 	 * the Tx. This ordering should be maintained so that the respective
924 	 * queues (Rx or Tx) will be together in the fastpath array and the
925 	 * associated ids will be sequential.
926 	 */
927 	for_each_queue(i) {
928 		fp = &edev->fp_array[i];
929 
930 		fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
931 		if (!fp->sb_info) {
932 			DP_NOTICE(edev, "sb info struct allocation failed\n");
933 			goto err;
934 		}
935 
936 		if (fp_rx) {
937 			fp->type = QEDE_FASTPATH_RX;
938 			fp_rx--;
939 		} else if (fp_combined) {
940 			fp->type = QEDE_FASTPATH_COMBINED;
941 			fp_combined--;
942 		} else {
943 			fp->type = QEDE_FASTPATH_TX;
944 		}
945 
946 		if (fp->type & QEDE_FASTPATH_TX) {
947 			fp->txq = kcalloc(edev->dev_info.num_tc,
948 					  sizeof(*fp->txq), GFP_KERNEL);
949 			if (!fp->txq)
950 				goto err;
951 		}
952 
953 		if (fp->type & QEDE_FASTPATH_RX) {
954 			fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
955 			if (!fp->rxq)
956 				goto err;
957 
958 			if (edev->xdp_prog) {
959 				fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
960 						     GFP_KERNEL);
961 				if (!fp->xdp_tx)
962 					goto err;
963 				fp->type |= QEDE_FASTPATH_XDP;
964 			}
965 		}
966 	}
967 
968 	return 0;
969 err:
970 	qede_free_fp_array(edev);
971 	return -ENOMEM;
972 }
973 
974 /* The qede lock is used to protect driver state change and driver flows that
975  * are not reentrant.
976  */
977 void __qede_lock(struct qede_dev *edev)
978 {
979 	mutex_lock(&edev->qede_lock);
980 }
981 
982 void __qede_unlock(struct qede_dev *edev)
983 {
984 	mutex_unlock(&edev->qede_lock);
985 }
986 
987 /* This version of the lock should be used when acquiring the RTNL lock is also
988  * needed in addition to the internal qede lock.
989  */
990 static void qede_lock(struct qede_dev *edev)
991 {
992 	rtnl_lock();
993 	__qede_lock(edev);
994 }
995 
996 static void qede_unlock(struct qede_dev *edev)
997 {
998 	__qede_unlock(edev);
999 	rtnl_unlock();
1000 }
1001 
1002 static void qede_sp_task(struct work_struct *work)
1003 {
1004 	struct qede_dev *edev = container_of(work, struct qede_dev,
1005 					     sp_task.work);
1006 
1007 	/* The locking scheme depends on the specific flag:
1008 	 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1009 	 * ensure that ongoing flows are ended and new ones are not started.
1010 	 * In other cases - only the internal qede lock should be acquired.
1011 	 */
1012 
1013 	if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1014 #ifdef CONFIG_QED_SRIOV
1015 		/* SRIOV must be disabled outside the lock to avoid a deadlock.
1016 		 * The recovery of the active VFs is currently not supported.
1017 		 */
1018 		if (pci_num_vf(edev->pdev))
1019 			qede_sriov_configure(edev->pdev, 0);
1020 #endif
1021 		qede_lock(edev);
1022 		qede_recovery_handler(edev);
1023 		qede_unlock(edev);
1024 	}
1025 
1026 	__qede_lock(edev);
1027 
1028 	if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1029 		if (edev->state == QEDE_STATE_OPEN)
1030 			qede_config_rx_mode(edev->ndev);
1031 
1032 #ifdef CONFIG_RFS_ACCEL
1033 	if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1034 		if (edev->state == QEDE_STATE_OPEN)
1035 			qede_process_arfs_filters(edev, false);
1036 	}
1037 #endif
1038 	if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1039 		qede_generic_hw_err_handler(edev);
1040 	__qede_unlock(edev);
1041 
1042 	if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1043 #ifdef CONFIG_QED_SRIOV
1044 		/* SRIOV must be disabled outside the lock to avoid a deadlock.
1045 		 * The recovery of the active VFs is currently not supported.
1046 		 */
1047 		if (pci_num_vf(edev->pdev))
1048 			qede_sriov_configure(edev->pdev, 0);
1049 #endif
1050 		edev->ops->common->recovery_process(edev->cdev);
1051 	}
1052 }
1053 
1054 static void qede_update_pf_params(struct qed_dev *cdev)
1055 {
1056 	struct qed_pf_params pf_params;
1057 	u16 num_cons;
1058 
1059 	/* 64 rx + 64 tx + 64 XDP */
1060 	memset(&pf_params, 0, sizeof(struct qed_pf_params));
1061 
1062 	/* 1 rx + 1 xdp + max tx cos */
1063 	num_cons = QED_MIN_L2_CONS;
1064 
1065 	pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1066 
1067 	/* Same for VFs - make sure they'll have sufficient connections
1068 	 * to support XDP Tx queues.
1069 	 */
1070 	pf_params.eth_pf_params.num_vf_cons = 48;
1071 
1072 	pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1073 	qed_ops->common->update_pf_params(cdev, &pf_params);
1074 }
1075 
1076 #define QEDE_FW_VER_STR_SIZE	80
1077 
1078 static void qede_log_probe(struct qede_dev *edev)
1079 {
1080 	struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1081 	u8 buf[QEDE_FW_VER_STR_SIZE];
1082 	size_t left_size;
1083 
1084 	snprintf(buf, QEDE_FW_VER_STR_SIZE,
1085 		 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1086 		 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1087 		 p_dev_info->fw_eng,
1088 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1089 		 QED_MFW_VERSION_3_OFFSET,
1090 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1091 		 QED_MFW_VERSION_2_OFFSET,
1092 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1093 		 QED_MFW_VERSION_1_OFFSET,
1094 		 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1095 		 QED_MFW_VERSION_0_OFFSET);
1096 
1097 	left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1098 	if (p_dev_info->mbi_version && left_size)
1099 		snprintf(buf + strlen(buf), left_size,
1100 			 " [MBI %d.%d.%d]",
1101 			 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1102 			 QED_MBI_VERSION_2_OFFSET,
1103 			 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1104 			 QED_MBI_VERSION_1_OFFSET,
1105 			 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1106 			 QED_MBI_VERSION_0_OFFSET);
1107 
1108 	pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1109 		PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1110 		buf, edev->ndev->name);
1111 }
1112 
1113 enum qede_probe_mode {
1114 	QEDE_PROBE_NORMAL,
1115 	QEDE_PROBE_RECOVERY,
1116 };
1117 
1118 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1119 			bool is_vf, enum qede_probe_mode mode)
1120 {
1121 	struct qed_probe_params probe_params;
1122 	struct qed_slowpath_params sp_params;
1123 	struct qed_dev_eth_info dev_info;
1124 	struct qede_dev *edev;
1125 	struct qed_dev *cdev;
1126 	int rc;
1127 
1128 	if (unlikely(dp_level & QED_LEVEL_INFO))
1129 		pr_notice("Starting qede probe\n");
1130 
1131 	memset(&probe_params, 0, sizeof(probe_params));
1132 	probe_params.protocol = QED_PROTOCOL_ETH;
1133 	probe_params.dp_module = dp_module;
1134 	probe_params.dp_level = dp_level;
1135 	probe_params.is_vf = is_vf;
1136 	probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1137 	cdev = qed_ops->common->probe(pdev, &probe_params);
1138 	if (!cdev) {
1139 		rc = -ENODEV;
1140 		goto err0;
1141 	}
1142 
1143 	qede_update_pf_params(cdev);
1144 
1145 	/* Start the Slowpath-process */
1146 	memset(&sp_params, 0, sizeof(sp_params));
1147 	sp_params.int_mode = QED_INT_MODE_MSIX;
1148 	sp_params.drv_major = QEDE_MAJOR_VERSION;
1149 	sp_params.drv_minor = QEDE_MINOR_VERSION;
1150 	sp_params.drv_rev = QEDE_REVISION_VERSION;
1151 	sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1152 	strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1153 	rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1154 	if (rc) {
1155 		pr_notice("Cannot start slowpath\n");
1156 		goto err1;
1157 	}
1158 
1159 	/* Learn information crucial for qede to progress */
1160 	rc = qed_ops->fill_dev_info(cdev, &dev_info);
1161 	if (rc)
1162 		goto err2;
1163 
1164 	if (mode != QEDE_PROBE_RECOVERY) {
1165 		edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1166 					   dp_level);
1167 		if (!edev) {
1168 			rc = -ENOMEM;
1169 			goto err2;
1170 		}
1171 	} else {
1172 		struct net_device *ndev = pci_get_drvdata(pdev);
1173 
1174 		edev = netdev_priv(ndev);
1175 		edev->cdev = cdev;
1176 		memset(&edev->stats, 0, sizeof(edev->stats));
1177 		memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1178 	}
1179 
1180 	if (is_vf)
1181 		set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1182 
1183 	qede_init_ndev(edev);
1184 
1185 	rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1186 	if (rc)
1187 		goto err3;
1188 
1189 	if (mode != QEDE_PROBE_RECOVERY) {
1190 		/* Prepare the lock prior to the registration of the netdev,
1191 		 * as once it's registered we might reach flows requiring it
1192 		 * [it's even possible to reach a flow needing it directly
1193 		 * from there, although it's unlikely].
1194 		 */
1195 		INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1196 		mutex_init(&edev->qede_lock);
1197 
1198 		rc = register_netdev(edev->ndev);
1199 		if (rc) {
1200 			DP_NOTICE(edev, "Cannot register net-device\n");
1201 			goto err4;
1202 		}
1203 	}
1204 
1205 	edev->ops->common->set_name(cdev, edev->ndev->name);
1206 
1207 	/* PTP not supported on VFs */
1208 	if (!is_vf)
1209 		qede_ptp_enable(edev);
1210 
1211 	edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1212 
1213 #ifdef CONFIG_DCB
1214 	if (!IS_VF(edev))
1215 		qede_set_dcbnl_ops(edev->ndev);
1216 #endif
1217 
1218 	edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1219 
1220 	qede_log_probe(edev);
1221 	return 0;
1222 
1223 err4:
1224 	qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1225 err3:
1226 	free_netdev(edev->ndev);
1227 err2:
1228 	qed_ops->common->slowpath_stop(cdev);
1229 err1:
1230 	qed_ops->common->remove(cdev);
1231 err0:
1232 	return rc;
1233 }
1234 
1235 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1236 {
1237 	bool is_vf = false;
1238 	u32 dp_module = 0;
1239 	u8 dp_level = 0;
1240 
1241 	switch ((enum qede_pci_private)id->driver_data) {
1242 	case QEDE_PRIVATE_VF:
1243 		if (debug & QED_LOG_VERBOSE_MASK)
1244 			dev_err(&pdev->dev, "Probing a VF\n");
1245 		is_vf = true;
1246 		break;
1247 	default:
1248 		if (debug & QED_LOG_VERBOSE_MASK)
1249 			dev_err(&pdev->dev, "Probing a PF\n");
1250 	}
1251 
1252 	qede_config_debug(debug, &dp_module, &dp_level);
1253 
1254 	return __qede_probe(pdev, dp_module, dp_level, is_vf,
1255 			    QEDE_PROBE_NORMAL);
1256 }
1257 
1258 enum qede_remove_mode {
1259 	QEDE_REMOVE_NORMAL,
1260 	QEDE_REMOVE_RECOVERY,
1261 };
1262 
1263 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1264 {
1265 	struct net_device *ndev = pci_get_drvdata(pdev);
1266 	struct qede_dev *edev;
1267 	struct qed_dev *cdev;
1268 
1269 	if (!ndev) {
1270 		dev_info(&pdev->dev, "Device has already been removed\n");
1271 		return;
1272 	}
1273 
1274 	edev = netdev_priv(ndev);
1275 	cdev = edev->cdev;
1276 
1277 	DP_INFO(edev, "Starting qede_remove\n");
1278 
1279 	qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1280 
1281 	if (mode != QEDE_REMOVE_RECOVERY) {
1282 		unregister_netdev(ndev);
1283 
1284 		cancel_delayed_work_sync(&edev->sp_task);
1285 
1286 		edev->ops->common->set_power_state(cdev, PCI_D0);
1287 
1288 		pci_set_drvdata(pdev, NULL);
1289 	}
1290 
1291 	qede_ptp_disable(edev);
1292 
1293 	/* Use global ops since we've freed edev */
1294 	qed_ops->common->slowpath_stop(cdev);
1295 	if (system_state == SYSTEM_POWER_OFF)
1296 		return;
1297 	qed_ops->common->remove(cdev);
1298 	edev->cdev = NULL;
1299 
1300 	/* Since this can happen out-of-sync with other flows,
1301 	 * don't release the netdevice until after slowpath stop
1302 	 * has been called to guarantee various other contexts
1303 	 * [e.g., QED register callbacks] won't break anything when
1304 	 * accessing the netdevice.
1305 	 */
1306 	if (mode != QEDE_REMOVE_RECOVERY)
1307 		free_netdev(ndev);
1308 
1309 	dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1310 }
1311 
1312 static void qede_remove(struct pci_dev *pdev)
1313 {
1314 	__qede_remove(pdev, QEDE_REMOVE_NORMAL);
1315 }
1316 
1317 static void qede_shutdown(struct pci_dev *pdev)
1318 {
1319 	__qede_remove(pdev, QEDE_REMOVE_NORMAL);
1320 }
1321 
1322 /* -------------------------------------------------------------------------
1323  * START OF LOAD / UNLOAD
1324  * -------------------------------------------------------------------------
1325  */
1326 
1327 static int qede_set_num_queues(struct qede_dev *edev)
1328 {
1329 	int rc;
1330 	u16 rss_num;
1331 
1332 	/* Setup queues according to possible resources*/
1333 	if (edev->req_queues)
1334 		rss_num = edev->req_queues;
1335 	else
1336 		rss_num = netif_get_num_default_rss_queues() *
1337 			  edev->dev_info.common.num_hwfns;
1338 
1339 	rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1340 
1341 	rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1342 	if (rc > 0) {
1343 		/* Managed to request interrupts for our queues */
1344 		edev->num_queues = rc;
1345 		DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1346 			QEDE_QUEUE_CNT(edev), rss_num);
1347 		rc = 0;
1348 	}
1349 
1350 	edev->fp_num_tx = edev->req_num_tx;
1351 	edev->fp_num_rx = edev->req_num_rx;
1352 
1353 	return rc;
1354 }
1355 
1356 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1357 			     u16 sb_id)
1358 {
1359 	if (sb_info->sb_virt) {
1360 		edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1361 					      QED_SB_TYPE_L2_QUEUE);
1362 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1363 				  (void *)sb_info->sb_virt, sb_info->sb_phys);
1364 		memset(sb_info, 0, sizeof(*sb_info));
1365 	}
1366 }
1367 
1368 /* This function allocates fast-path status block memory */
1369 static int qede_alloc_mem_sb(struct qede_dev *edev,
1370 			     struct qed_sb_info *sb_info, u16 sb_id)
1371 {
1372 	struct status_block_e4 *sb_virt;
1373 	dma_addr_t sb_phys;
1374 	int rc;
1375 
1376 	sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1377 				     sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1378 	if (!sb_virt) {
1379 		DP_ERR(edev, "Status block allocation failed\n");
1380 		return -ENOMEM;
1381 	}
1382 
1383 	rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1384 					sb_virt, sb_phys, sb_id,
1385 					QED_SB_TYPE_L2_QUEUE);
1386 	if (rc) {
1387 		DP_ERR(edev, "Status block initialization failed\n");
1388 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1389 				  sb_virt, sb_phys);
1390 		return rc;
1391 	}
1392 
1393 	return 0;
1394 }
1395 
1396 static void qede_free_rx_buffers(struct qede_dev *edev,
1397 				 struct qede_rx_queue *rxq)
1398 {
1399 	u16 i;
1400 
1401 	for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1402 		struct sw_rx_data *rx_buf;
1403 		struct page *data;
1404 
1405 		rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1406 		data = rx_buf->data;
1407 
1408 		dma_unmap_page(&edev->pdev->dev,
1409 			       rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1410 
1411 		rx_buf->data = NULL;
1412 		__free_page(data);
1413 	}
1414 }
1415 
1416 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1417 {
1418 	/* Free rx buffers */
1419 	qede_free_rx_buffers(edev, rxq);
1420 
1421 	/* Free the parallel SW ring */
1422 	kfree(rxq->sw_rx_ring);
1423 
1424 	/* Free the real RQ ring used by FW */
1425 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1426 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1427 }
1428 
1429 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1430 {
1431 	int i;
1432 
1433 	for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1434 		struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1435 
1436 		tpa_info->state = QEDE_AGG_STATE_NONE;
1437 	}
1438 }
1439 
1440 /* This function allocates all memory needed per Rx queue */
1441 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1442 {
1443 	int i, rc, size;
1444 
1445 	rxq->num_rx_buffers = edev->q_num_rx_buffers;
1446 
1447 	rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1448 
1449 	rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1450 	size = rxq->rx_headroom +
1451 	       SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1452 
1453 	/* Make sure that the headroom and  payload fit in a single page */
1454 	if (rxq->rx_buf_size + size > PAGE_SIZE)
1455 		rxq->rx_buf_size = PAGE_SIZE - size;
1456 
1457 	/* Segment size to split a page in multiple equal parts,
1458 	 * unless XDP is used in which case we'd use the entire page.
1459 	 */
1460 	if (!edev->xdp_prog) {
1461 		size = size + rxq->rx_buf_size;
1462 		rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1463 	} else {
1464 		rxq->rx_buf_seg_size = PAGE_SIZE;
1465 		edev->ndev->features &= ~NETIF_F_GRO_HW;
1466 	}
1467 
1468 	/* Allocate the parallel driver ring for Rx buffers */
1469 	size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1470 	rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1471 	if (!rxq->sw_rx_ring) {
1472 		DP_ERR(edev, "Rx buffers ring allocation failed\n");
1473 		rc = -ENOMEM;
1474 		goto err;
1475 	}
1476 
1477 	/* Allocate FW Rx ring  */
1478 	rc = edev->ops->common->chain_alloc(edev->cdev,
1479 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1480 					    QED_CHAIN_MODE_NEXT_PTR,
1481 					    QED_CHAIN_CNT_TYPE_U16,
1482 					    RX_RING_SIZE,
1483 					    sizeof(struct eth_rx_bd),
1484 					    &rxq->rx_bd_ring, NULL);
1485 	if (rc)
1486 		goto err;
1487 
1488 	/* Allocate FW completion ring */
1489 	rc = edev->ops->common->chain_alloc(edev->cdev,
1490 					    QED_CHAIN_USE_TO_CONSUME,
1491 					    QED_CHAIN_MODE_PBL,
1492 					    QED_CHAIN_CNT_TYPE_U16,
1493 					    RX_RING_SIZE,
1494 					    sizeof(union eth_rx_cqe),
1495 					    &rxq->rx_comp_ring, NULL);
1496 	if (rc)
1497 		goto err;
1498 
1499 	/* Allocate buffers for the Rx ring */
1500 	rxq->filled_buffers = 0;
1501 	for (i = 0; i < rxq->num_rx_buffers; i++) {
1502 		rc = qede_alloc_rx_buffer(rxq, false);
1503 		if (rc) {
1504 			DP_ERR(edev,
1505 			       "Rx buffers allocation failed at index %d\n", i);
1506 			goto err;
1507 		}
1508 	}
1509 
1510 	edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1511 	if (!edev->gro_disable)
1512 		qede_set_tpa_param(rxq);
1513 err:
1514 	return rc;
1515 }
1516 
1517 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1518 {
1519 	/* Free the parallel SW ring */
1520 	if (txq->is_xdp)
1521 		kfree(txq->sw_tx_ring.xdp);
1522 	else
1523 		kfree(txq->sw_tx_ring.skbs);
1524 
1525 	/* Free the real RQ ring used by FW */
1526 	edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1527 }
1528 
1529 /* This function allocates all memory needed per Tx queue */
1530 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1531 {
1532 	union eth_tx_bd_types *p_virt;
1533 	int size, rc;
1534 
1535 	txq->num_tx_buffers = edev->q_num_tx_buffers;
1536 
1537 	/* Allocate the parallel driver ring for Tx buffers */
1538 	if (txq->is_xdp) {
1539 		size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1540 		txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1541 		if (!txq->sw_tx_ring.xdp)
1542 			goto err;
1543 	} else {
1544 		size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1545 		txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1546 		if (!txq->sw_tx_ring.skbs)
1547 			goto err;
1548 	}
1549 
1550 	rc = edev->ops->common->chain_alloc(edev->cdev,
1551 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1552 					    QED_CHAIN_MODE_PBL,
1553 					    QED_CHAIN_CNT_TYPE_U16,
1554 					    txq->num_tx_buffers,
1555 					    sizeof(*p_virt),
1556 					    &txq->tx_pbl, NULL);
1557 	if (rc)
1558 		goto err;
1559 
1560 	return 0;
1561 
1562 err:
1563 	qede_free_mem_txq(edev, txq);
1564 	return -ENOMEM;
1565 }
1566 
1567 /* This function frees all memory of a single fp */
1568 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1569 {
1570 	qede_free_mem_sb(edev, fp->sb_info, fp->id);
1571 
1572 	if (fp->type & QEDE_FASTPATH_RX)
1573 		qede_free_mem_rxq(edev, fp->rxq);
1574 
1575 	if (fp->type & QEDE_FASTPATH_XDP)
1576 		qede_free_mem_txq(edev, fp->xdp_tx);
1577 
1578 	if (fp->type & QEDE_FASTPATH_TX) {
1579 		int cos;
1580 
1581 		for_each_cos_in_txq(edev, cos)
1582 			qede_free_mem_txq(edev, &fp->txq[cos]);
1583 	}
1584 }
1585 
1586 /* This function allocates all memory needed for a single fp (i.e. an entity
1587  * which contains status block, one rx queue and/or multiple per-TC tx queues.
1588  */
1589 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1590 {
1591 	int rc = 0;
1592 
1593 	rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1594 	if (rc)
1595 		goto out;
1596 
1597 	if (fp->type & QEDE_FASTPATH_RX) {
1598 		rc = qede_alloc_mem_rxq(edev, fp->rxq);
1599 		if (rc)
1600 			goto out;
1601 	}
1602 
1603 	if (fp->type & QEDE_FASTPATH_XDP) {
1604 		rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1605 		if (rc)
1606 			goto out;
1607 	}
1608 
1609 	if (fp->type & QEDE_FASTPATH_TX) {
1610 		int cos;
1611 
1612 		for_each_cos_in_txq(edev, cos) {
1613 			rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1614 			if (rc)
1615 				goto out;
1616 		}
1617 	}
1618 
1619 out:
1620 	return rc;
1621 }
1622 
1623 static void qede_free_mem_load(struct qede_dev *edev)
1624 {
1625 	int i;
1626 
1627 	for_each_queue(i) {
1628 		struct qede_fastpath *fp = &edev->fp_array[i];
1629 
1630 		qede_free_mem_fp(edev, fp);
1631 	}
1632 }
1633 
1634 /* This function allocates all qede memory at NIC load. */
1635 static int qede_alloc_mem_load(struct qede_dev *edev)
1636 {
1637 	int rc = 0, queue_id;
1638 
1639 	for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1640 		struct qede_fastpath *fp = &edev->fp_array[queue_id];
1641 
1642 		rc = qede_alloc_mem_fp(edev, fp);
1643 		if (rc) {
1644 			DP_ERR(edev,
1645 			       "Failed to allocate memory for fastpath - rss id = %d\n",
1646 			       queue_id);
1647 			qede_free_mem_load(edev);
1648 			return rc;
1649 		}
1650 	}
1651 
1652 	return 0;
1653 }
1654 
1655 static void qede_empty_tx_queue(struct qede_dev *edev,
1656 				struct qede_tx_queue *txq)
1657 {
1658 	unsigned int pkts_compl = 0, bytes_compl = 0;
1659 	struct netdev_queue *netdev_txq;
1660 	int rc, len = 0;
1661 
1662 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1663 
1664 	while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1665 	       qed_chain_get_prod_idx(&txq->tx_pbl)) {
1666 		DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1667 			   "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1668 			   txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1669 			   qed_chain_get_prod_idx(&txq->tx_pbl));
1670 
1671 		rc = qede_free_tx_pkt(edev, txq, &len);
1672 		if (rc) {
1673 			DP_NOTICE(edev,
1674 				  "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1675 				  txq->index,
1676 				  qed_chain_get_cons_idx(&txq->tx_pbl),
1677 				  qed_chain_get_prod_idx(&txq->tx_pbl));
1678 			break;
1679 		}
1680 
1681 		bytes_compl += len;
1682 		pkts_compl++;
1683 		txq->sw_tx_cons++;
1684 	}
1685 
1686 	netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1687 }
1688 
1689 static void qede_empty_tx_queues(struct qede_dev *edev)
1690 {
1691 	int i;
1692 
1693 	for_each_queue(i)
1694 		if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1695 			int cos;
1696 
1697 			for_each_cos_in_txq(edev, cos) {
1698 				struct qede_fastpath *fp;
1699 
1700 				fp = &edev->fp_array[i];
1701 				qede_empty_tx_queue(edev,
1702 						    &fp->txq[cos]);
1703 			}
1704 		}
1705 }
1706 
1707 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
1708 static void qede_init_fp(struct qede_dev *edev)
1709 {
1710 	int queue_id, rxq_index = 0, txq_index = 0;
1711 	struct qede_fastpath *fp;
1712 
1713 	for_each_queue(queue_id) {
1714 		fp = &edev->fp_array[queue_id];
1715 
1716 		fp->edev = edev;
1717 		fp->id = queue_id;
1718 
1719 		if (fp->type & QEDE_FASTPATH_XDP) {
1720 			fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1721 								rxq_index);
1722 			fp->xdp_tx->is_xdp = 1;
1723 		}
1724 
1725 		if (fp->type & QEDE_FASTPATH_RX) {
1726 			fp->rxq->rxq_id = rxq_index++;
1727 
1728 			/* Determine how to map buffers for this queue */
1729 			if (fp->type & QEDE_FASTPATH_XDP)
1730 				fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1731 			else
1732 				fp->rxq->data_direction = DMA_FROM_DEVICE;
1733 			fp->rxq->dev = &edev->pdev->dev;
1734 
1735 			/* Driver have no error path from here */
1736 			WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1737 						 fp->rxq->rxq_id) < 0);
1738 		}
1739 
1740 		if (fp->type & QEDE_FASTPATH_TX) {
1741 			int cos;
1742 
1743 			for_each_cos_in_txq(edev, cos) {
1744 				struct qede_tx_queue *txq = &fp->txq[cos];
1745 				u16 ndev_tx_id;
1746 
1747 				txq->cos = cos;
1748 				txq->index = txq_index;
1749 				ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1750 				txq->ndev_txq_id = ndev_tx_id;
1751 
1752 				if (edev->dev_info.is_legacy)
1753 					txq->is_legacy = true;
1754 				txq->dev = &edev->pdev->dev;
1755 			}
1756 
1757 			txq_index++;
1758 		}
1759 
1760 		snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1761 			 edev->ndev->name, queue_id);
1762 	}
1763 }
1764 
1765 static int qede_set_real_num_queues(struct qede_dev *edev)
1766 {
1767 	int rc = 0;
1768 
1769 	rc = netif_set_real_num_tx_queues(edev->ndev,
1770 					  QEDE_TSS_COUNT(edev) *
1771 					  edev->dev_info.num_tc);
1772 	if (rc) {
1773 		DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1774 		return rc;
1775 	}
1776 
1777 	rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1778 	if (rc) {
1779 		DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1780 		return rc;
1781 	}
1782 
1783 	return 0;
1784 }
1785 
1786 static void qede_napi_disable_remove(struct qede_dev *edev)
1787 {
1788 	int i;
1789 
1790 	for_each_queue(i) {
1791 		napi_disable(&edev->fp_array[i].napi);
1792 
1793 		netif_napi_del(&edev->fp_array[i].napi);
1794 	}
1795 }
1796 
1797 static void qede_napi_add_enable(struct qede_dev *edev)
1798 {
1799 	int i;
1800 
1801 	/* Add NAPI objects */
1802 	for_each_queue(i) {
1803 		netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1804 			       qede_poll, NAPI_POLL_WEIGHT);
1805 		napi_enable(&edev->fp_array[i].napi);
1806 	}
1807 }
1808 
1809 static void qede_sync_free_irqs(struct qede_dev *edev)
1810 {
1811 	int i;
1812 
1813 	for (i = 0; i < edev->int_info.used_cnt; i++) {
1814 		if (edev->int_info.msix_cnt) {
1815 			synchronize_irq(edev->int_info.msix[i].vector);
1816 			free_irq(edev->int_info.msix[i].vector,
1817 				 &edev->fp_array[i]);
1818 		} else {
1819 			edev->ops->common->simd_handler_clean(edev->cdev, i);
1820 		}
1821 	}
1822 
1823 	edev->int_info.used_cnt = 0;
1824 }
1825 
1826 static int qede_req_msix_irqs(struct qede_dev *edev)
1827 {
1828 	int i, rc;
1829 
1830 	/* Sanitize number of interrupts == number of prepared RSS queues */
1831 	if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1832 		DP_ERR(edev,
1833 		       "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1834 		       QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1835 		return -EINVAL;
1836 	}
1837 
1838 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1839 #ifdef CONFIG_RFS_ACCEL
1840 		struct qede_fastpath *fp = &edev->fp_array[i];
1841 
1842 		if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1843 			rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1844 					      edev->int_info.msix[i].vector);
1845 			if (rc) {
1846 				DP_ERR(edev, "Failed to add CPU rmap\n");
1847 				qede_free_arfs(edev);
1848 			}
1849 		}
1850 #endif
1851 		rc = request_irq(edev->int_info.msix[i].vector,
1852 				 qede_msix_fp_int, 0, edev->fp_array[i].name,
1853 				 &edev->fp_array[i]);
1854 		if (rc) {
1855 			DP_ERR(edev, "Request fp %d irq failed\n", i);
1856 			qede_sync_free_irqs(edev);
1857 			return rc;
1858 		}
1859 		DP_VERBOSE(edev, NETIF_MSG_INTR,
1860 			   "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1861 			   edev->fp_array[i].name, i,
1862 			   &edev->fp_array[i]);
1863 		edev->int_info.used_cnt++;
1864 	}
1865 
1866 	return 0;
1867 }
1868 
1869 static void qede_simd_fp_handler(void *cookie)
1870 {
1871 	struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1872 
1873 	napi_schedule_irqoff(&fp->napi);
1874 }
1875 
1876 static int qede_setup_irqs(struct qede_dev *edev)
1877 {
1878 	int i, rc = 0;
1879 
1880 	/* Learn Interrupt configuration */
1881 	rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1882 	if (rc)
1883 		return rc;
1884 
1885 	if (edev->int_info.msix_cnt) {
1886 		rc = qede_req_msix_irqs(edev);
1887 		if (rc)
1888 			return rc;
1889 		edev->ndev->irq = edev->int_info.msix[0].vector;
1890 	} else {
1891 		const struct qed_common_ops *ops;
1892 
1893 		/* qed should learn receive the RSS ids and callbacks */
1894 		ops = edev->ops->common;
1895 		for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1896 			ops->simd_handler_config(edev->cdev,
1897 						 &edev->fp_array[i], i,
1898 						 qede_simd_fp_handler);
1899 		edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1900 	}
1901 	return 0;
1902 }
1903 
1904 static int qede_drain_txq(struct qede_dev *edev,
1905 			  struct qede_tx_queue *txq, bool allow_drain)
1906 {
1907 	int rc, cnt = 1000;
1908 
1909 	while (txq->sw_tx_cons != txq->sw_tx_prod) {
1910 		if (!cnt) {
1911 			if (allow_drain) {
1912 				DP_NOTICE(edev,
1913 					  "Tx queue[%d] is stuck, requesting MCP to drain\n",
1914 					  txq->index);
1915 				rc = edev->ops->common->drain(edev->cdev);
1916 				if (rc)
1917 					return rc;
1918 				return qede_drain_txq(edev, txq, false);
1919 			}
1920 			DP_NOTICE(edev,
1921 				  "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1922 				  txq->index, txq->sw_tx_prod,
1923 				  txq->sw_tx_cons);
1924 			return -ENODEV;
1925 		}
1926 		cnt--;
1927 		usleep_range(1000, 2000);
1928 		barrier();
1929 	}
1930 
1931 	/* FW finished processing, wait for HW to transmit all tx packets */
1932 	usleep_range(1000, 2000);
1933 
1934 	return 0;
1935 }
1936 
1937 static int qede_stop_txq(struct qede_dev *edev,
1938 			 struct qede_tx_queue *txq, int rss_id)
1939 {
1940 	/* delete doorbell from doorbell recovery mechanism */
1941 	edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
1942 					   &txq->tx_db);
1943 
1944 	return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
1945 }
1946 
1947 static int qede_stop_queues(struct qede_dev *edev)
1948 {
1949 	struct qed_update_vport_params *vport_update_params;
1950 	struct qed_dev *cdev = edev->cdev;
1951 	struct qede_fastpath *fp;
1952 	int rc, i;
1953 
1954 	/* Disable the vport */
1955 	vport_update_params = vzalloc(sizeof(*vport_update_params));
1956 	if (!vport_update_params)
1957 		return -ENOMEM;
1958 
1959 	vport_update_params->vport_id = 0;
1960 	vport_update_params->update_vport_active_flg = 1;
1961 	vport_update_params->vport_active_flg = 0;
1962 	vport_update_params->update_rss_flg = 0;
1963 
1964 	rc = edev->ops->vport_update(cdev, vport_update_params);
1965 	vfree(vport_update_params);
1966 
1967 	if (rc) {
1968 		DP_ERR(edev, "Failed to update vport\n");
1969 		return rc;
1970 	}
1971 
1972 	/* Flush Tx queues. If needed, request drain from MCP */
1973 	for_each_queue(i) {
1974 		fp = &edev->fp_array[i];
1975 
1976 		if (fp->type & QEDE_FASTPATH_TX) {
1977 			int cos;
1978 
1979 			for_each_cos_in_txq(edev, cos) {
1980 				rc = qede_drain_txq(edev, &fp->txq[cos], true);
1981 				if (rc)
1982 					return rc;
1983 			}
1984 		}
1985 
1986 		if (fp->type & QEDE_FASTPATH_XDP) {
1987 			rc = qede_drain_txq(edev, fp->xdp_tx, true);
1988 			if (rc)
1989 				return rc;
1990 		}
1991 	}
1992 
1993 	/* Stop all Queues in reverse order */
1994 	for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
1995 		fp = &edev->fp_array[i];
1996 
1997 		/* Stop the Tx Queue(s) */
1998 		if (fp->type & QEDE_FASTPATH_TX) {
1999 			int cos;
2000 
2001 			for_each_cos_in_txq(edev, cos) {
2002 				rc = qede_stop_txq(edev, &fp->txq[cos], i);
2003 				if (rc)
2004 					return rc;
2005 			}
2006 		}
2007 
2008 		/* Stop the Rx Queue */
2009 		if (fp->type & QEDE_FASTPATH_RX) {
2010 			rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2011 			if (rc) {
2012 				DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2013 				return rc;
2014 			}
2015 		}
2016 
2017 		/* Stop the XDP forwarding queue */
2018 		if (fp->type & QEDE_FASTPATH_XDP) {
2019 			rc = qede_stop_txq(edev, fp->xdp_tx, i);
2020 			if (rc)
2021 				return rc;
2022 
2023 			bpf_prog_put(fp->rxq->xdp_prog);
2024 		}
2025 	}
2026 
2027 	/* Stop the vport */
2028 	rc = edev->ops->vport_stop(cdev, 0);
2029 	if (rc)
2030 		DP_ERR(edev, "Failed to stop VPORT\n");
2031 
2032 	return rc;
2033 }
2034 
2035 static int qede_start_txq(struct qede_dev *edev,
2036 			  struct qede_fastpath *fp,
2037 			  struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2038 {
2039 	dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2040 	u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2041 	struct qed_queue_start_common_params params;
2042 	struct qed_txq_start_ret_params ret_params;
2043 	int rc;
2044 
2045 	memset(&params, 0, sizeof(params));
2046 	memset(&ret_params, 0, sizeof(ret_params));
2047 
2048 	/* Let the XDP queue share the queue-zone with one of the regular txq.
2049 	 * We don't really care about its coalescing.
2050 	 */
2051 	if (txq->is_xdp)
2052 		params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2053 	else
2054 		params.queue_id = txq->index;
2055 
2056 	params.p_sb = fp->sb_info;
2057 	params.sb_idx = sb_idx;
2058 	params.tc = txq->cos;
2059 
2060 	rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
2061 				   page_cnt, &ret_params);
2062 	if (rc) {
2063 		DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2064 		return rc;
2065 	}
2066 
2067 	txq->doorbell_addr = ret_params.p_doorbell;
2068 	txq->handle = ret_params.p_handle;
2069 
2070 	/* Determine the FW consumer address associated */
2071 	txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2072 
2073 	/* Prepare the doorbell parameters */
2074 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2075 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2076 	SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2077 		  DQ_XCM_ETH_TX_BD_PROD_CMD);
2078 	txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2079 
2080 	/* register doorbell with doorbell recovery mechanism */
2081 	rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2082 						&txq->tx_db, DB_REC_WIDTH_32B,
2083 						DB_REC_KERNEL);
2084 
2085 	return rc;
2086 }
2087 
2088 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2089 {
2090 	int vlan_removal_en = 1;
2091 	struct qed_dev *cdev = edev->cdev;
2092 	struct qed_dev_info *qed_info = &edev->dev_info.common;
2093 	struct qed_update_vport_params *vport_update_params;
2094 	struct qed_queue_start_common_params q_params;
2095 	struct qed_start_vport_params start = {0};
2096 	int rc, i;
2097 
2098 	if (!edev->num_queues) {
2099 		DP_ERR(edev,
2100 		       "Cannot update V-VPORT as active as there are no Rx queues\n");
2101 		return -EINVAL;
2102 	}
2103 
2104 	vport_update_params = vzalloc(sizeof(*vport_update_params));
2105 	if (!vport_update_params)
2106 		return -ENOMEM;
2107 
2108 	start.handle_ptp_pkts = !!(edev->ptp);
2109 	start.gro_enable = !edev->gro_disable;
2110 	start.mtu = edev->ndev->mtu;
2111 	start.vport_id = 0;
2112 	start.drop_ttl0 = true;
2113 	start.remove_inner_vlan = vlan_removal_en;
2114 	start.clear_stats = clear_stats;
2115 
2116 	rc = edev->ops->vport_start(cdev, &start);
2117 
2118 	if (rc) {
2119 		DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2120 		goto out;
2121 	}
2122 
2123 	DP_VERBOSE(edev, NETIF_MSG_IFUP,
2124 		   "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2125 		   start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2126 
2127 	for_each_queue(i) {
2128 		struct qede_fastpath *fp = &edev->fp_array[i];
2129 		dma_addr_t p_phys_table;
2130 		u32 page_cnt;
2131 
2132 		if (fp->type & QEDE_FASTPATH_RX) {
2133 			struct qed_rxq_start_ret_params ret_params;
2134 			struct qede_rx_queue *rxq = fp->rxq;
2135 			__le16 *val;
2136 
2137 			memset(&ret_params, 0, sizeof(ret_params));
2138 			memset(&q_params, 0, sizeof(q_params));
2139 			q_params.queue_id = rxq->rxq_id;
2140 			q_params.vport_id = 0;
2141 			q_params.p_sb = fp->sb_info;
2142 			q_params.sb_idx = RX_PI;
2143 
2144 			p_phys_table =
2145 			    qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2146 			page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2147 
2148 			rc = edev->ops->q_rx_start(cdev, i, &q_params,
2149 						   rxq->rx_buf_size,
2150 						   rxq->rx_bd_ring.p_phys_addr,
2151 						   p_phys_table,
2152 						   page_cnt, &ret_params);
2153 			if (rc) {
2154 				DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2155 				       rc);
2156 				goto out;
2157 			}
2158 
2159 			/* Use the return parameters */
2160 			rxq->hw_rxq_prod_addr = ret_params.p_prod;
2161 			rxq->handle = ret_params.p_handle;
2162 
2163 			val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2164 			rxq->hw_cons_ptr = val;
2165 
2166 			qede_update_rx_prod(edev, rxq);
2167 		}
2168 
2169 		if (fp->type & QEDE_FASTPATH_XDP) {
2170 			rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2171 			if (rc)
2172 				goto out;
2173 
2174 			bpf_prog_add(edev->xdp_prog, 1);
2175 			fp->rxq->xdp_prog = edev->xdp_prog;
2176 		}
2177 
2178 		if (fp->type & QEDE_FASTPATH_TX) {
2179 			int cos;
2180 
2181 			for_each_cos_in_txq(edev, cos) {
2182 				rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2183 						    TX_PI(cos));
2184 				if (rc)
2185 					goto out;
2186 			}
2187 		}
2188 	}
2189 
2190 	/* Prepare and send the vport enable */
2191 	vport_update_params->vport_id = start.vport_id;
2192 	vport_update_params->update_vport_active_flg = 1;
2193 	vport_update_params->vport_active_flg = 1;
2194 
2195 	if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2196 	    qed_info->tx_switching) {
2197 		vport_update_params->update_tx_switching_flg = 1;
2198 		vport_update_params->tx_switching_flg = 1;
2199 	}
2200 
2201 	qede_fill_rss_params(edev, &vport_update_params->rss_params,
2202 			     &vport_update_params->update_rss_flg);
2203 
2204 	rc = edev->ops->vport_update(cdev, vport_update_params);
2205 	if (rc)
2206 		DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2207 
2208 out:
2209 	vfree(vport_update_params);
2210 	return rc;
2211 }
2212 
2213 enum qede_unload_mode {
2214 	QEDE_UNLOAD_NORMAL,
2215 	QEDE_UNLOAD_RECOVERY,
2216 };
2217 
2218 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2219 			bool is_locked)
2220 {
2221 	struct qed_link_params link_params;
2222 	int rc;
2223 
2224 	DP_INFO(edev, "Starting qede unload\n");
2225 
2226 	if (!is_locked)
2227 		__qede_lock(edev);
2228 
2229 	clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2230 
2231 	if (mode != QEDE_UNLOAD_RECOVERY)
2232 		edev->state = QEDE_STATE_CLOSED;
2233 
2234 	qede_rdma_dev_event_close(edev);
2235 
2236 	/* Close OS Tx */
2237 	netif_tx_disable(edev->ndev);
2238 	netif_carrier_off(edev->ndev);
2239 
2240 	if (mode != QEDE_UNLOAD_RECOVERY) {
2241 		/* Reset the link */
2242 		memset(&link_params, 0, sizeof(link_params));
2243 		link_params.link_up = false;
2244 		edev->ops->common->set_link(edev->cdev, &link_params);
2245 
2246 		rc = qede_stop_queues(edev);
2247 		if (rc) {
2248 			qede_sync_free_irqs(edev);
2249 			goto out;
2250 		}
2251 
2252 		DP_INFO(edev, "Stopped Queues\n");
2253 	}
2254 
2255 	qede_vlan_mark_nonconfigured(edev);
2256 	edev->ops->fastpath_stop(edev->cdev);
2257 
2258 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2259 		qede_poll_for_freeing_arfs_filters(edev);
2260 		qede_free_arfs(edev);
2261 	}
2262 
2263 	/* Release the interrupts */
2264 	qede_sync_free_irqs(edev);
2265 	edev->ops->common->set_fp_int(edev->cdev, 0);
2266 
2267 	qede_napi_disable_remove(edev);
2268 
2269 	if (mode == QEDE_UNLOAD_RECOVERY)
2270 		qede_empty_tx_queues(edev);
2271 
2272 	qede_free_mem_load(edev);
2273 	qede_free_fp_array(edev);
2274 
2275 out:
2276 	if (!is_locked)
2277 		__qede_unlock(edev);
2278 
2279 	if (mode != QEDE_UNLOAD_RECOVERY)
2280 		DP_NOTICE(edev, "Link is down\n");
2281 
2282 	edev->ptp_skip_txts = 0;
2283 
2284 	DP_INFO(edev, "Ending qede unload\n");
2285 }
2286 
2287 enum qede_load_mode {
2288 	QEDE_LOAD_NORMAL,
2289 	QEDE_LOAD_RELOAD,
2290 	QEDE_LOAD_RECOVERY,
2291 };
2292 
2293 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2294 		     bool is_locked)
2295 {
2296 	struct qed_link_params link_params;
2297 	u8 num_tc;
2298 	int rc;
2299 
2300 	DP_INFO(edev, "Starting qede load\n");
2301 
2302 	if (!is_locked)
2303 		__qede_lock(edev);
2304 
2305 	rc = qede_set_num_queues(edev);
2306 	if (rc)
2307 		goto out;
2308 
2309 	rc = qede_alloc_fp_array(edev);
2310 	if (rc)
2311 		goto out;
2312 
2313 	qede_init_fp(edev);
2314 
2315 	rc = qede_alloc_mem_load(edev);
2316 	if (rc)
2317 		goto err1;
2318 	DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2319 		QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2320 
2321 	rc = qede_set_real_num_queues(edev);
2322 	if (rc)
2323 		goto err2;
2324 
2325 	if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2326 		rc = qede_alloc_arfs(edev);
2327 		if (rc)
2328 			DP_NOTICE(edev, "aRFS memory allocation failed\n");
2329 	}
2330 
2331 	qede_napi_add_enable(edev);
2332 	DP_INFO(edev, "Napi added and enabled\n");
2333 
2334 	rc = qede_setup_irqs(edev);
2335 	if (rc)
2336 		goto err3;
2337 	DP_INFO(edev, "Setup IRQs succeeded\n");
2338 
2339 	rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2340 	if (rc)
2341 		goto err4;
2342 	DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2343 
2344 	num_tc = netdev_get_num_tc(edev->ndev);
2345 	num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2346 	qede_setup_tc(edev->ndev, num_tc);
2347 
2348 	/* Program un-configured VLANs */
2349 	qede_configure_vlan_filters(edev);
2350 
2351 	set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2352 
2353 	/* Ask for link-up using current configuration */
2354 	memset(&link_params, 0, sizeof(link_params));
2355 	link_params.link_up = true;
2356 	edev->ops->common->set_link(edev->cdev, &link_params);
2357 
2358 	edev->state = QEDE_STATE_OPEN;
2359 
2360 	DP_INFO(edev, "Ending successfully qede load\n");
2361 
2362 	goto out;
2363 err4:
2364 	qede_sync_free_irqs(edev);
2365 	memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2366 err3:
2367 	qede_napi_disable_remove(edev);
2368 err2:
2369 	qede_free_mem_load(edev);
2370 err1:
2371 	edev->ops->common->set_fp_int(edev->cdev, 0);
2372 	qede_free_fp_array(edev);
2373 	edev->num_queues = 0;
2374 	edev->fp_num_tx = 0;
2375 	edev->fp_num_rx = 0;
2376 out:
2377 	if (!is_locked)
2378 		__qede_unlock(edev);
2379 
2380 	return rc;
2381 }
2382 
2383 /* 'func' should be able to run between unload and reload assuming interface
2384  * is actually running, or afterwards in case it's currently DOWN.
2385  */
2386 void qede_reload(struct qede_dev *edev,
2387 		 struct qede_reload_args *args, bool is_locked)
2388 {
2389 	if (!is_locked)
2390 		__qede_lock(edev);
2391 
2392 	/* Since qede_lock is held, internal state wouldn't change even
2393 	 * if netdev state would start transitioning. Check whether current
2394 	 * internal configuration indicates device is up, then reload.
2395 	 */
2396 	if (edev->state == QEDE_STATE_OPEN) {
2397 		qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2398 		if (args)
2399 			args->func(edev, args);
2400 		qede_load(edev, QEDE_LOAD_RELOAD, true);
2401 
2402 		/* Since no one is going to do it for us, re-configure */
2403 		qede_config_rx_mode(edev->ndev);
2404 	} else if (args) {
2405 		args->func(edev, args);
2406 	}
2407 
2408 	if (!is_locked)
2409 		__qede_unlock(edev);
2410 }
2411 
2412 /* called with rtnl_lock */
2413 static int qede_open(struct net_device *ndev)
2414 {
2415 	struct qede_dev *edev = netdev_priv(ndev);
2416 	int rc;
2417 
2418 	netif_carrier_off(ndev);
2419 
2420 	edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2421 
2422 	rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2423 	if (rc)
2424 		return rc;
2425 
2426 	udp_tunnel_nic_reset_ntf(ndev);
2427 
2428 	edev->ops->common->update_drv_state(edev->cdev, true);
2429 
2430 	return 0;
2431 }
2432 
2433 static int qede_close(struct net_device *ndev)
2434 {
2435 	struct qede_dev *edev = netdev_priv(ndev);
2436 
2437 	qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2438 
2439 	edev->ops->common->update_drv_state(edev->cdev, false);
2440 
2441 	return 0;
2442 }
2443 
2444 static void qede_link_update(void *dev, struct qed_link_output *link)
2445 {
2446 	struct qede_dev *edev = dev;
2447 
2448 	if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2449 		DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2450 		return;
2451 	}
2452 
2453 	if (link->link_up) {
2454 		if (!netif_carrier_ok(edev->ndev)) {
2455 			DP_NOTICE(edev, "Link is up\n");
2456 			netif_tx_start_all_queues(edev->ndev);
2457 			netif_carrier_on(edev->ndev);
2458 			qede_rdma_dev_event_open(edev);
2459 		}
2460 	} else {
2461 		if (netif_carrier_ok(edev->ndev)) {
2462 			DP_NOTICE(edev, "Link is down\n");
2463 			netif_tx_disable(edev->ndev);
2464 			netif_carrier_off(edev->ndev);
2465 			qede_rdma_dev_event_close(edev);
2466 		}
2467 	}
2468 }
2469 
2470 static void qede_schedule_recovery_handler(void *dev)
2471 {
2472 	struct qede_dev *edev = dev;
2473 
2474 	if (edev->state == QEDE_STATE_RECOVERY) {
2475 		DP_NOTICE(edev,
2476 			  "Avoid scheduling a recovery handling since already in recovery state\n");
2477 		return;
2478 	}
2479 
2480 	set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2481 	schedule_delayed_work(&edev->sp_task, 0);
2482 
2483 	DP_INFO(edev, "Scheduled a recovery handler\n");
2484 }
2485 
2486 static void qede_recovery_failed(struct qede_dev *edev)
2487 {
2488 	netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2489 
2490 	netif_device_detach(edev->ndev);
2491 
2492 	if (edev->cdev)
2493 		edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2494 }
2495 
2496 static void qede_recovery_handler(struct qede_dev *edev)
2497 {
2498 	u32 curr_state = edev->state;
2499 	int rc;
2500 
2501 	DP_NOTICE(edev, "Starting a recovery process\n");
2502 
2503 	/* No need to acquire first the qede_lock since is done by qede_sp_task
2504 	 * before calling this function.
2505 	 */
2506 	edev->state = QEDE_STATE_RECOVERY;
2507 
2508 	edev->ops->common->recovery_prolog(edev->cdev);
2509 
2510 	if (curr_state == QEDE_STATE_OPEN)
2511 		qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2512 
2513 	__qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2514 
2515 	rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2516 			  IS_VF(edev), QEDE_PROBE_RECOVERY);
2517 	if (rc) {
2518 		edev->cdev = NULL;
2519 		goto err;
2520 	}
2521 
2522 	if (curr_state == QEDE_STATE_OPEN) {
2523 		rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2524 		if (rc)
2525 			goto err;
2526 
2527 		qede_config_rx_mode(edev->ndev);
2528 		udp_tunnel_nic_reset_ntf(edev->ndev);
2529 	}
2530 
2531 	edev->state = curr_state;
2532 
2533 	DP_NOTICE(edev, "Recovery handling is done\n");
2534 
2535 	return;
2536 
2537 err:
2538 	qede_recovery_failed(edev);
2539 }
2540 
2541 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2542 {
2543 	struct qed_dev *cdev = edev->cdev;
2544 
2545 	DP_NOTICE(edev,
2546 		  "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2547 		  edev->err_flags);
2548 
2549 	/* Get a call trace of the flow that led to the error */
2550 	WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2551 
2552 	/* Prevent HW attentions from being reasserted */
2553 	if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2554 		edev->ops->common->attn_clr_enable(cdev, true);
2555 
2556 	DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2557 }
2558 
2559 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2560 {
2561 	struct qed_dev *cdev = edev->cdev;
2562 
2563 	DP_NOTICE(edev,
2564 		  "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2565 		  edev->err_flags);
2566 
2567 	/* Trigger a recovery process.
2568 	 * This is placed in the sleep requiring section just to make
2569 	 * sure it is the last one, and that all the other operations
2570 	 * were completed.
2571 	 */
2572 	if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags))
2573 		edev->ops->common->recovery_process(cdev);
2574 
2575 	clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2576 
2577 	DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2578 }
2579 
2580 static void qede_set_hw_err_flags(struct qede_dev *edev,
2581 				  enum qed_hw_err_type err_type)
2582 {
2583 	unsigned long err_flags = 0;
2584 
2585 	switch (err_type) {
2586 	case QED_HW_ERR_DMAE_FAIL:
2587 		set_bit(QEDE_ERR_WARN, &err_flags);
2588 		fallthrough;
2589 	case QED_HW_ERR_MFW_RESP_FAIL:
2590 	case QED_HW_ERR_HW_ATTN:
2591 	case QED_HW_ERR_RAMROD_FAIL:
2592 	case QED_HW_ERR_FW_ASSERT:
2593 		set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2594 		set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2595 		break;
2596 
2597 	default:
2598 		DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2599 		break;
2600 	}
2601 
2602 	edev->err_flags |= err_flags;
2603 }
2604 
2605 static void qede_schedule_hw_err_handler(void *dev,
2606 					 enum qed_hw_err_type err_type)
2607 {
2608 	struct qede_dev *edev = dev;
2609 
2610 	/* Fan failure cannot be masked by handling of another HW error or by a
2611 	 * concurrent recovery process.
2612 	 */
2613 	if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2614 	     edev->state == QEDE_STATE_RECOVERY) &&
2615 	     err_type != QED_HW_ERR_FAN_FAIL) {
2616 		DP_INFO(edev,
2617 			"Avoid scheduling an error handling while another HW error is being handled\n");
2618 		return;
2619 	}
2620 
2621 	if (err_type >= QED_HW_ERR_LAST) {
2622 		DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2623 		clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2624 		return;
2625 	}
2626 
2627 	qede_set_hw_err_flags(edev, err_type);
2628 	qede_atomic_hw_err_handler(edev);
2629 	set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2630 	schedule_delayed_work(&edev->sp_task, 0);
2631 
2632 	DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2633 }
2634 
2635 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2636 {
2637 	struct netdev_queue *netdev_txq;
2638 
2639 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2640 	if (netif_xmit_stopped(netdev_txq))
2641 		return true;
2642 
2643 	return false;
2644 }
2645 
2646 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2647 {
2648 	struct qede_dev *edev = dev;
2649 	struct netdev_hw_addr *ha;
2650 	int i;
2651 
2652 	if (edev->ndev->features & NETIF_F_IP_CSUM)
2653 		data->feat_flags |= QED_TLV_IP_CSUM;
2654 	if (edev->ndev->features & NETIF_F_TSO)
2655 		data->feat_flags |= QED_TLV_LSO;
2656 
2657 	ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2658 	memset(data->mac[1], 0, ETH_ALEN);
2659 	memset(data->mac[2], 0, ETH_ALEN);
2660 	/* Copy the first two UC macs */
2661 	netif_addr_lock_bh(edev->ndev);
2662 	i = 1;
2663 	netdev_for_each_uc_addr(ha, edev->ndev) {
2664 		ether_addr_copy(data->mac[i++], ha->addr);
2665 		if (i == QED_TLV_MAC_COUNT)
2666 			break;
2667 	}
2668 
2669 	netif_addr_unlock_bh(edev->ndev);
2670 }
2671 
2672 static void qede_get_eth_tlv_data(void *dev, void *data)
2673 {
2674 	struct qed_mfw_tlv_eth *etlv = data;
2675 	struct qede_dev *edev = dev;
2676 	struct qede_fastpath *fp;
2677 	int i;
2678 
2679 	etlv->lso_maxoff_size = 0XFFFF;
2680 	etlv->lso_maxoff_size_set = true;
2681 	etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2682 	etlv->lso_minseg_size_set = true;
2683 	etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2684 	etlv->prom_mode_set = true;
2685 	etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2686 	etlv->tx_descr_size_set = true;
2687 	etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2688 	etlv->rx_descr_size_set = true;
2689 	etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2690 	etlv->iov_offload_set = true;
2691 
2692 	/* Fill information regarding queues; Should be done under the qede
2693 	 * lock to guarantee those don't change beneath our feet.
2694 	 */
2695 	etlv->txqs_empty = true;
2696 	etlv->rxqs_empty = true;
2697 	etlv->num_txqs_full = 0;
2698 	etlv->num_rxqs_full = 0;
2699 
2700 	__qede_lock(edev);
2701 	for_each_queue(i) {
2702 		fp = &edev->fp_array[i];
2703 		if (fp->type & QEDE_FASTPATH_TX) {
2704 			struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2705 
2706 			if (txq->sw_tx_cons != txq->sw_tx_prod)
2707 				etlv->txqs_empty = false;
2708 			if (qede_is_txq_full(edev, txq))
2709 				etlv->num_txqs_full++;
2710 		}
2711 		if (fp->type & QEDE_FASTPATH_RX) {
2712 			if (qede_has_rx_work(fp->rxq))
2713 				etlv->rxqs_empty = false;
2714 
2715 			/* This one is a bit tricky; Firmware might stop
2716 			 * placing packets if ring is not yet full.
2717 			 * Give an approximation.
2718 			 */
2719 			if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2720 			    qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2721 			    RX_RING_SIZE - 100)
2722 				etlv->num_rxqs_full++;
2723 		}
2724 	}
2725 	__qede_unlock(edev);
2726 
2727 	etlv->txqs_empty_set = true;
2728 	etlv->rxqs_empty_set = true;
2729 	etlv->num_txqs_full_set = true;
2730 	etlv->num_rxqs_full_set = true;
2731 }
2732 
2733 /**
2734  * qede_io_error_detected - called when PCI error is detected
2735  * @pdev: Pointer to PCI device
2736  * @state: The current pci connection state
2737  *
2738  * This function is called after a PCI bus error affecting
2739  * this device has been detected.
2740  */
2741 static pci_ers_result_t
2742 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2743 {
2744 	struct net_device *dev = pci_get_drvdata(pdev);
2745 	struct qede_dev *edev = netdev_priv(dev);
2746 
2747 	if (!edev)
2748 		return PCI_ERS_RESULT_NONE;
2749 
2750 	DP_NOTICE(edev, "IO error detected [%d]\n", state);
2751 
2752 	__qede_lock(edev);
2753 	if (edev->state == QEDE_STATE_RECOVERY) {
2754 		DP_NOTICE(edev, "Device already in the recovery state\n");
2755 		__qede_unlock(edev);
2756 		return PCI_ERS_RESULT_NONE;
2757 	}
2758 
2759 	/* PF handles the recovery of its VFs */
2760 	if (IS_VF(edev)) {
2761 		DP_VERBOSE(edev, QED_MSG_IOV,
2762 			   "VF recovery is handled by its PF\n");
2763 		__qede_unlock(edev);
2764 		return PCI_ERS_RESULT_RECOVERED;
2765 	}
2766 
2767 	/* Close OS Tx */
2768 	netif_tx_disable(edev->ndev);
2769 	netif_carrier_off(edev->ndev);
2770 
2771 	set_bit(QEDE_SP_AER, &edev->sp_flags);
2772 	schedule_delayed_work(&edev->sp_task, 0);
2773 
2774 	__qede_unlock(edev);
2775 
2776 	return PCI_ERS_RESULT_CAN_RECOVER;
2777 }
2778