1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/module.h> 33 #include <linux/pci.h> 34 #include <linux/version.h> 35 #include <linux/device.h> 36 #include <linux/netdevice.h> 37 #include <linux/etherdevice.h> 38 #include <linux/skbuff.h> 39 #include <linux/errno.h> 40 #include <linux/list.h> 41 #include <linux/string.h> 42 #include <linux/dma-mapping.h> 43 #include <linux/interrupt.h> 44 #include <asm/byteorder.h> 45 #include <asm/param.h> 46 #include <linux/io.h> 47 #include <linux/netdev_features.h> 48 #include <linux/udp.h> 49 #include <linux/tcp.h> 50 #include <net/udp_tunnel.h> 51 #include <linux/ip.h> 52 #include <net/ipv6.h> 53 #include <net/tcp.h> 54 #include <linux/if_ether.h> 55 #include <linux/if_vlan.h> 56 #include <linux/pkt_sched.h> 57 #include <linux/ethtool.h> 58 #include <linux/in.h> 59 #include <linux/random.h> 60 #include <net/ip6_checksum.h> 61 #include <linux/bitops.h> 62 #include <linux/vmalloc.h> 63 #include <linux/aer.h> 64 #include "qede.h" 65 #include "qede_ptp.h" 66 67 static char version[] = 68 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 69 70 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 71 MODULE_LICENSE("GPL"); 72 MODULE_VERSION(DRV_MODULE_VERSION); 73 74 static uint debug; 75 module_param(debug, uint, 0); 76 MODULE_PARM_DESC(debug, " Default debug msglevel"); 77 78 static const struct qed_eth_ops *qed_ops; 79 80 #define CHIP_NUM_57980S_40 0x1634 81 #define CHIP_NUM_57980S_10 0x1666 82 #define CHIP_NUM_57980S_MF 0x1636 83 #define CHIP_NUM_57980S_100 0x1644 84 #define CHIP_NUM_57980S_50 0x1654 85 #define CHIP_NUM_57980S_25 0x1656 86 #define CHIP_NUM_57980S_IOV 0x1664 87 #define CHIP_NUM_AH 0x8070 88 #define CHIP_NUM_AH_IOV 0x8090 89 90 #ifndef PCI_DEVICE_ID_NX2_57980E 91 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 92 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 93 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 94 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 95 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 96 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 97 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 98 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 99 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 100 101 #endif 102 103 enum qede_pci_private { 104 QEDE_PRIVATE_PF, 105 QEDE_PRIVATE_VF 106 }; 107 108 static const struct pci_device_id qede_pci_tbl[] = { 109 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 110 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 111 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 112 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 113 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 114 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 115 #ifdef CONFIG_QED_SRIOV 116 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 117 #endif 118 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 119 #ifdef CONFIG_QED_SRIOV 120 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 121 #endif 122 { 0 } 123 }; 124 125 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 126 127 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 128 static pci_ers_result_t 129 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 130 131 #define TX_TIMEOUT (5 * HZ) 132 133 /* Utilize last protocol index for XDP */ 134 #define XDP_PI 11 135 136 static void qede_remove(struct pci_dev *pdev); 137 static void qede_shutdown(struct pci_dev *pdev); 138 static void qede_link_update(void *dev, struct qed_link_output *link); 139 static void qede_schedule_recovery_handler(void *dev); 140 static void qede_recovery_handler(struct qede_dev *edev); 141 static void qede_get_eth_tlv_data(void *edev, void *data); 142 static void qede_get_generic_tlv_data(void *edev, 143 struct qed_generic_tlvs *data); 144 145 #ifdef CONFIG_QED_SRIOV 146 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 147 __be16 vlan_proto) 148 { 149 struct qede_dev *edev = netdev_priv(ndev); 150 151 if (vlan > 4095) { 152 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 153 return -EINVAL; 154 } 155 156 if (vlan_proto != htons(ETH_P_8021Q)) 157 return -EPROTONOSUPPORT; 158 159 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 160 vlan, vf); 161 162 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 163 } 164 165 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 166 { 167 struct qede_dev *edev = netdev_priv(ndev); 168 169 DP_VERBOSE(edev, QED_MSG_IOV, 170 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 171 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 172 173 if (!is_valid_ether_addr(mac)) { 174 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 175 return -EINVAL; 176 } 177 178 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 179 } 180 181 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 182 { 183 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 184 struct qed_dev_info *qed_info = &edev->dev_info.common; 185 struct qed_update_vport_params *vport_params; 186 int rc; 187 188 vport_params = vzalloc(sizeof(*vport_params)); 189 if (!vport_params) 190 return -ENOMEM; 191 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 192 193 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 194 195 /* Enable/Disable Tx switching for PF */ 196 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 197 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 198 vport_params->vport_id = 0; 199 vport_params->update_tx_switching_flg = 1; 200 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 201 edev->ops->vport_update(edev->cdev, vport_params); 202 } 203 204 vfree(vport_params); 205 return rc; 206 } 207 #endif 208 209 static const struct pci_error_handlers qede_err_handler = { 210 .error_detected = qede_io_error_detected, 211 }; 212 213 static struct pci_driver qede_pci_driver = { 214 .name = "qede", 215 .id_table = qede_pci_tbl, 216 .probe = qede_probe, 217 .remove = qede_remove, 218 .shutdown = qede_shutdown, 219 #ifdef CONFIG_QED_SRIOV 220 .sriov_configure = qede_sriov_configure, 221 #endif 222 .err_handler = &qede_err_handler, 223 }; 224 225 static struct qed_eth_cb_ops qede_ll_ops = { 226 { 227 #ifdef CONFIG_RFS_ACCEL 228 .arfs_filter_op = qede_arfs_filter_op, 229 #endif 230 .link_update = qede_link_update, 231 .schedule_recovery_handler = qede_schedule_recovery_handler, 232 .get_generic_tlv_data = qede_get_generic_tlv_data, 233 .get_protocol_tlv_data = qede_get_eth_tlv_data, 234 }, 235 .force_mac = qede_force_mac, 236 .ports_update = qede_udp_ports_update, 237 }; 238 239 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 240 void *ptr) 241 { 242 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 243 struct ethtool_drvinfo drvinfo; 244 struct qede_dev *edev; 245 246 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 247 goto done; 248 249 /* Check whether this is a qede device */ 250 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 251 goto done; 252 253 memset(&drvinfo, 0, sizeof(drvinfo)); 254 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 255 if (strcmp(drvinfo.driver, "qede")) 256 goto done; 257 edev = netdev_priv(ndev); 258 259 switch (event) { 260 case NETDEV_CHANGENAME: 261 /* Notify qed of the name change */ 262 if (!edev->ops || !edev->ops->common) 263 goto done; 264 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 265 break; 266 case NETDEV_CHANGEADDR: 267 edev = netdev_priv(ndev); 268 qede_rdma_event_changeaddr(edev); 269 break; 270 } 271 272 done: 273 return NOTIFY_DONE; 274 } 275 276 static struct notifier_block qede_netdev_notifier = { 277 .notifier_call = qede_netdev_event, 278 }; 279 280 static 281 int __init qede_init(void) 282 { 283 int ret; 284 285 pr_info("qede_init: %s\n", version); 286 287 qed_ops = qed_get_eth_ops(); 288 if (!qed_ops) { 289 pr_notice("Failed to get qed ethtool operations\n"); 290 return -EINVAL; 291 } 292 293 /* Must register notifier before pci ops, since we might miss 294 * interface rename after pci probe and netdev registration. 295 */ 296 ret = register_netdevice_notifier(&qede_netdev_notifier); 297 if (ret) { 298 pr_notice("Failed to register netdevice_notifier\n"); 299 qed_put_eth_ops(); 300 return -EINVAL; 301 } 302 303 ret = pci_register_driver(&qede_pci_driver); 304 if (ret) { 305 pr_notice("Failed to register driver\n"); 306 unregister_netdevice_notifier(&qede_netdev_notifier); 307 qed_put_eth_ops(); 308 return -EINVAL; 309 } 310 311 return 0; 312 } 313 314 static void __exit qede_cleanup(void) 315 { 316 if (debug & QED_LOG_INFO_MASK) 317 pr_info("qede_cleanup called\n"); 318 319 unregister_netdevice_notifier(&qede_netdev_notifier); 320 pci_unregister_driver(&qede_pci_driver); 321 qed_put_eth_ops(); 322 } 323 324 module_init(qede_init); 325 module_exit(qede_cleanup); 326 327 static int qede_open(struct net_device *ndev); 328 static int qede_close(struct net_device *ndev); 329 330 void qede_fill_by_demand_stats(struct qede_dev *edev) 331 { 332 struct qede_stats_common *p_common = &edev->stats.common; 333 struct qed_eth_stats stats; 334 335 edev->ops->get_vport_stats(edev->cdev, &stats); 336 337 p_common->no_buff_discards = stats.common.no_buff_discards; 338 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 339 p_common->ttl0_discard = stats.common.ttl0_discard; 340 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 341 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 342 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 343 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 344 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 345 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 346 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 347 p_common->mac_filter_discards = stats.common.mac_filter_discards; 348 p_common->gft_filter_drop = stats.common.gft_filter_drop; 349 350 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 351 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 352 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 353 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 354 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 355 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 356 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 357 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 358 p_common->coalesced_events = stats.common.tpa_coalesced_events; 359 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 360 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 361 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 362 363 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 364 p_common->rx_65_to_127_byte_packets = 365 stats.common.rx_65_to_127_byte_packets; 366 p_common->rx_128_to_255_byte_packets = 367 stats.common.rx_128_to_255_byte_packets; 368 p_common->rx_256_to_511_byte_packets = 369 stats.common.rx_256_to_511_byte_packets; 370 p_common->rx_512_to_1023_byte_packets = 371 stats.common.rx_512_to_1023_byte_packets; 372 p_common->rx_1024_to_1518_byte_packets = 373 stats.common.rx_1024_to_1518_byte_packets; 374 p_common->rx_crc_errors = stats.common.rx_crc_errors; 375 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 376 p_common->rx_pause_frames = stats.common.rx_pause_frames; 377 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 378 p_common->rx_align_errors = stats.common.rx_align_errors; 379 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 380 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 381 p_common->rx_jabbers = stats.common.rx_jabbers; 382 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 383 p_common->rx_fragments = stats.common.rx_fragments; 384 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 385 p_common->tx_65_to_127_byte_packets = 386 stats.common.tx_65_to_127_byte_packets; 387 p_common->tx_128_to_255_byte_packets = 388 stats.common.tx_128_to_255_byte_packets; 389 p_common->tx_256_to_511_byte_packets = 390 stats.common.tx_256_to_511_byte_packets; 391 p_common->tx_512_to_1023_byte_packets = 392 stats.common.tx_512_to_1023_byte_packets; 393 p_common->tx_1024_to_1518_byte_packets = 394 stats.common.tx_1024_to_1518_byte_packets; 395 p_common->tx_pause_frames = stats.common.tx_pause_frames; 396 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 397 p_common->brb_truncates = stats.common.brb_truncates; 398 p_common->brb_discards = stats.common.brb_discards; 399 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 400 p_common->link_change_count = stats.common.link_change_count; 401 p_common->ptp_skip_txts = edev->ptp_skip_txts; 402 403 if (QEDE_IS_BB(edev)) { 404 struct qede_stats_bb *p_bb = &edev->stats.bb; 405 406 p_bb->rx_1519_to_1522_byte_packets = 407 stats.bb.rx_1519_to_1522_byte_packets; 408 p_bb->rx_1519_to_2047_byte_packets = 409 stats.bb.rx_1519_to_2047_byte_packets; 410 p_bb->rx_2048_to_4095_byte_packets = 411 stats.bb.rx_2048_to_4095_byte_packets; 412 p_bb->rx_4096_to_9216_byte_packets = 413 stats.bb.rx_4096_to_9216_byte_packets; 414 p_bb->rx_9217_to_16383_byte_packets = 415 stats.bb.rx_9217_to_16383_byte_packets; 416 p_bb->tx_1519_to_2047_byte_packets = 417 stats.bb.tx_1519_to_2047_byte_packets; 418 p_bb->tx_2048_to_4095_byte_packets = 419 stats.bb.tx_2048_to_4095_byte_packets; 420 p_bb->tx_4096_to_9216_byte_packets = 421 stats.bb.tx_4096_to_9216_byte_packets; 422 p_bb->tx_9217_to_16383_byte_packets = 423 stats.bb.tx_9217_to_16383_byte_packets; 424 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 425 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 426 } else { 427 struct qede_stats_ah *p_ah = &edev->stats.ah; 428 429 p_ah->rx_1519_to_max_byte_packets = 430 stats.ah.rx_1519_to_max_byte_packets; 431 p_ah->tx_1519_to_max_byte_packets = 432 stats.ah.tx_1519_to_max_byte_packets; 433 } 434 } 435 436 static void qede_get_stats64(struct net_device *dev, 437 struct rtnl_link_stats64 *stats) 438 { 439 struct qede_dev *edev = netdev_priv(dev); 440 struct qede_stats_common *p_common; 441 442 qede_fill_by_demand_stats(edev); 443 p_common = &edev->stats.common; 444 445 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 446 p_common->rx_bcast_pkts; 447 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 448 p_common->tx_bcast_pkts; 449 450 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 451 p_common->rx_bcast_bytes; 452 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 453 p_common->tx_bcast_bytes; 454 455 stats->tx_errors = p_common->tx_err_drop_pkts; 456 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 457 458 stats->rx_fifo_errors = p_common->no_buff_discards; 459 460 if (QEDE_IS_BB(edev)) 461 stats->collisions = edev->stats.bb.tx_total_collisions; 462 stats->rx_crc_errors = p_common->rx_crc_errors; 463 stats->rx_frame_errors = p_common->rx_align_errors; 464 } 465 466 #ifdef CONFIG_QED_SRIOV 467 static int qede_get_vf_config(struct net_device *dev, int vfidx, 468 struct ifla_vf_info *ivi) 469 { 470 struct qede_dev *edev = netdev_priv(dev); 471 472 if (!edev->ops) 473 return -EINVAL; 474 475 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 476 } 477 478 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 479 int min_tx_rate, int max_tx_rate) 480 { 481 struct qede_dev *edev = netdev_priv(dev); 482 483 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 484 max_tx_rate); 485 } 486 487 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 488 { 489 struct qede_dev *edev = netdev_priv(dev); 490 491 if (!edev->ops) 492 return -EINVAL; 493 494 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 495 } 496 497 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 498 int link_state) 499 { 500 struct qede_dev *edev = netdev_priv(dev); 501 502 if (!edev->ops) 503 return -EINVAL; 504 505 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 506 } 507 508 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 509 { 510 struct qede_dev *edev = netdev_priv(dev); 511 512 if (!edev->ops) 513 return -EINVAL; 514 515 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 516 } 517 #endif 518 519 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 520 { 521 struct qede_dev *edev = netdev_priv(dev); 522 523 if (!netif_running(dev)) 524 return -EAGAIN; 525 526 switch (cmd) { 527 case SIOCSHWTSTAMP: 528 return qede_ptp_hw_ts(edev, ifr); 529 default: 530 DP_VERBOSE(edev, QED_MSG_DEBUG, 531 "default IOCTL cmd 0x%x\n", cmd); 532 return -EOPNOTSUPP; 533 } 534 535 return 0; 536 } 537 538 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 539 { 540 struct qede_dev *edev = netdev_priv(ndev); 541 int cos, count, offset; 542 543 if (num_tc > edev->dev_info.num_tc) 544 return -EINVAL; 545 546 netdev_reset_tc(ndev); 547 netdev_set_num_tc(ndev, num_tc); 548 549 for_each_cos_in_txq(edev, cos) { 550 count = QEDE_TSS_COUNT(edev); 551 offset = cos * QEDE_TSS_COUNT(edev); 552 netdev_set_tc_queue(ndev, cos, count, offset); 553 } 554 555 return 0; 556 } 557 558 static int 559 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 560 __be16 proto) 561 { 562 switch (f->command) { 563 case FLOW_CLS_REPLACE: 564 return qede_add_tc_flower_fltr(edev, proto, f); 565 case FLOW_CLS_DESTROY: 566 return qede_delete_flow_filter(edev, f->cookie); 567 default: 568 return -EOPNOTSUPP; 569 } 570 } 571 572 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 573 void *cb_priv) 574 { 575 struct flow_cls_offload *f; 576 struct qede_dev *edev = cb_priv; 577 578 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 579 return -EOPNOTSUPP; 580 581 switch (type) { 582 case TC_SETUP_CLSFLOWER: 583 f = type_data; 584 return qede_set_flower(edev, f, f->common.protocol); 585 default: 586 return -EOPNOTSUPP; 587 } 588 } 589 590 static LIST_HEAD(qede_block_cb_list); 591 592 static int 593 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 594 void *type_data) 595 { 596 struct qede_dev *edev = netdev_priv(dev); 597 struct tc_mqprio_qopt *mqprio; 598 599 switch (type) { 600 case TC_SETUP_BLOCK: 601 return flow_block_cb_setup_simple(type_data, 602 &qede_block_cb_list, 603 qede_setup_tc_block_cb, 604 edev, edev, true); 605 case TC_SETUP_QDISC_MQPRIO: 606 mqprio = type_data; 607 608 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 609 return qede_setup_tc(dev, mqprio->num_tc); 610 default: 611 return -EOPNOTSUPP; 612 } 613 } 614 615 static const struct net_device_ops qede_netdev_ops = { 616 .ndo_open = qede_open, 617 .ndo_stop = qede_close, 618 .ndo_start_xmit = qede_start_xmit, 619 .ndo_select_queue = qede_select_queue, 620 .ndo_set_rx_mode = qede_set_rx_mode, 621 .ndo_set_mac_address = qede_set_mac_addr, 622 .ndo_validate_addr = eth_validate_addr, 623 .ndo_change_mtu = qede_change_mtu, 624 .ndo_do_ioctl = qede_ioctl, 625 #ifdef CONFIG_QED_SRIOV 626 .ndo_set_vf_mac = qede_set_vf_mac, 627 .ndo_set_vf_vlan = qede_set_vf_vlan, 628 .ndo_set_vf_trust = qede_set_vf_trust, 629 #endif 630 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 631 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 632 .ndo_fix_features = qede_fix_features, 633 .ndo_set_features = qede_set_features, 634 .ndo_get_stats64 = qede_get_stats64, 635 #ifdef CONFIG_QED_SRIOV 636 .ndo_set_vf_link_state = qede_set_vf_link_state, 637 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 638 .ndo_get_vf_config = qede_get_vf_config, 639 .ndo_set_vf_rate = qede_set_vf_rate, 640 #endif 641 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 642 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 643 .ndo_features_check = qede_features_check, 644 .ndo_bpf = qede_xdp, 645 #ifdef CONFIG_RFS_ACCEL 646 .ndo_rx_flow_steer = qede_rx_flow_steer, 647 #endif 648 .ndo_setup_tc = qede_setup_tc_offload, 649 }; 650 651 static const struct net_device_ops qede_netdev_vf_ops = { 652 .ndo_open = qede_open, 653 .ndo_stop = qede_close, 654 .ndo_start_xmit = qede_start_xmit, 655 .ndo_select_queue = qede_select_queue, 656 .ndo_set_rx_mode = qede_set_rx_mode, 657 .ndo_set_mac_address = qede_set_mac_addr, 658 .ndo_validate_addr = eth_validate_addr, 659 .ndo_change_mtu = qede_change_mtu, 660 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 661 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 662 .ndo_fix_features = qede_fix_features, 663 .ndo_set_features = qede_set_features, 664 .ndo_get_stats64 = qede_get_stats64, 665 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 666 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 667 .ndo_features_check = qede_features_check, 668 }; 669 670 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 671 .ndo_open = qede_open, 672 .ndo_stop = qede_close, 673 .ndo_start_xmit = qede_start_xmit, 674 .ndo_select_queue = qede_select_queue, 675 .ndo_set_rx_mode = qede_set_rx_mode, 676 .ndo_set_mac_address = qede_set_mac_addr, 677 .ndo_validate_addr = eth_validate_addr, 678 .ndo_change_mtu = qede_change_mtu, 679 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 680 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 681 .ndo_fix_features = qede_fix_features, 682 .ndo_set_features = qede_set_features, 683 .ndo_get_stats64 = qede_get_stats64, 684 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 685 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 686 .ndo_features_check = qede_features_check, 687 .ndo_bpf = qede_xdp, 688 }; 689 690 /* ------------------------------------------------------------------------- 691 * START OF PROBE / REMOVE 692 * ------------------------------------------------------------------------- 693 */ 694 695 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 696 struct pci_dev *pdev, 697 struct qed_dev_eth_info *info, 698 u32 dp_module, u8 dp_level) 699 { 700 struct net_device *ndev; 701 struct qede_dev *edev; 702 703 ndev = alloc_etherdev_mqs(sizeof(*edev), 704 info->num_queues * info->num_tc, 705 info->num_queues); 706 if (!ndev) { 707 pr_err("etherdev allocation failed\n"); 708 return NULL; 709 } 710 711 edev = netdev_priv(ndev); 712 edev->ndev = ndev; 713 edev->cdev = cdev; 714 edev->pdev = pdev; 715 edev->dp_module = dp_module; 716 edev->dp_level = dp_level; 717 edev->ops = qed_ops; 718 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 719 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 720 721 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 722 info->num_queues, info->num_queues); 723 724 SET_NETDEV_DEV(ndev, &pdev->dev); 725 726 memset(&edev->stats, 0, sizeof(edev->stats)); 727 memcpy(&edev->dev_info, info, sizeof(*info)); 728 729 /* As ethtool doesn't have the ability to show WoL behavior as 730 * 'default', if device supports it declare it's enabled. 731 */ 732 if (edev->dev_info.common.wol_support) 733 edev->wol_enabled = true; 734 735 INIT_LIST_HEAD(&edev->vlan_list); 736 737 return edev; 738 } 739 740 static void qede_init_ndev(struct qede_dev *edev) 741 { 742 struct net_device *ndev = edev->ndev; 743 struct pci_dev *pdev = edev->pdev; 744 bool udp_tunnel_enable = false; 745 netdev_features_t hw_features; 746 747 pci_set_drvdata(pdev, ndev); 748 749 ndev->mem_start = edev->dev_info.common.pci_mem_start; 750 ndev->base_addr = ndev->mem_start; 751 ndev->mem_end = edev->dev_info.common.pci_mem_end; 752 ndev->irq = edev->dev_info.common.pci_irq; 753 754 ndev->watchdog_timeo = TX_TIMEOUT; 755 756 if (IS_VF(edev)) { 757 if (edev->dev_info.xdp_supported) 758 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 759 else 760 ndev->netdev_ops = &qede_netdev_vf_ops; 761 } else { 762 ndev->netdev_ops = &qede_netdev_ops; 763 } 764 765 qede_set_ethtool_ops(ndev); 766 767 ndev->priv_flags |= IFF_UNICAST_FLT; 768 769 /* user-changeble features */ 770 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 771 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 772 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 773 774 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) 775 hw_features |= NETIF_F_NTUPLE; 776 777 if (edev->dev_info.common.vxlan_enable || 778 edev->dev_info.common.geneve_enable) 779 udp_tunnel_enable = true; 780 781 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 782 hw_features |= NETIF_F_TSO_ECN; 783 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 784 NETIF_F_SG | NETIF_F_TSO | 785 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 786 NETIF_F_RXCSUM; 787 } 788 789 if (udp_tunnel_enable) { 790 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 791 NETIF_F_GSO_UDP_TUNNEL_CSUM); 792 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 793 NETIF_F_GSO_UDP_TUNNEL_CSUM); 794 } 795 796 if (edev->dev_info.common.gre_enable) { 797 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 798 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 799 NETIF_F_GSO_GRE_CSUM); 800 } 801 802 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 803 NETIF_F_HIGHDMA; 804 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 805 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 806 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 807 808 ndev->hw_features = hw_features; 809 810 /* MTU range: 46 - 9600 */ 811 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 812 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 813 814 /* Set network device HW mac */ 815 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 816 817 ndev->mtu = edev->dev_info.common.mtu; 818 } 819 820 /* This function converts from 32b param to two params of level and module 821 * Input 32b decoding: 822 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 823 * 'happy' flow, e.g. memory allocation failed. 824 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 825 * and provide important parameters. 826 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 827 * module. VERBOSE prints are for tracking the specific flow in low level. 828 * 829 * Notice that the level should be that of the lowest required logs. 830 */ 831 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 832 { 833 *p_dp_level = QED_LEVEL_NOTICE; 834 *p_dp_module = 0; 835 836 if (debug & QED_LOG_VERBOSE_MASK) { 837 *p_dp_level = QED_LEVEL_VERBOSE; 838 *p_dp_module = (debug & 0x3FFFFFFF); 839 } else if (debug & QED_LOG_INFO_MASK) { 840 *p_dp_level = QED_LEVEL_INFO; 841 } else if (debug & QED_LOG_NOTICE_MASK) { 842 *p_dp_level = QED_LEVEL_NOTICE; 843 } 844 } 845 846 static void qede_free_fp_array(struct qede_dev *edev) 847 { 848 if (edev->fp_array) { 849 struct qede_fastpath *fp; 850 int i; 851 852 for_each_queue(i) { 853 fp = &edev->fp_array[i]; 854 855 kfree(fp->sb_info); 856 /* Handle mem alloc failure case where qede_init_fp 857 * didn't register xdp_rxq_info yet. 858 * Implicit only (fp->type & QEDE_FASTPATH_RX) 859 */ 860 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 861 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 862 kfree(fp->rxq); 863 kfree(fp->xdp_tx); 864 kfree(fp->txq); 865 } 866 kfree(edev->fp_array); 867 } 868 869 edev->num_queues = 0; 870 edev->fp_num_tx = 0; 871 edev->fp_num_rx = 0; 872 } 873 874 static int qede_alloc_fp_array(struct qede_dev *edev) 875 { 876 u8 fp_combined, fp_rx = edev->fp_num_rx; 877 struct qede_fastpath *fp; 878 int i; 879 880 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 881 sizeof(*edev->fp_array), GFP_KERNEL); 882 if (!edev->fp_array) { 883 DP_NOTICE(edev, "fp array allocation failed\n"); 884 goto err; 885 } 886 887 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 888 889 /* Allocate the FP elements for Rx queues followed by combined and then 890 * the Tx. This ordering should be maintained so that the respective 891 * queues (Rx or Tx) will be together in the fastpath array and the 892 * associated ids will be sequential. 893 */ 894 for_each_queue(i) { 895 fp = &edev->fp_array[i]; 896 897 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 898 if (!fp->sb_info) { 899 DP_NOTICE(edev, "sb info struct allocation failed\n"); 900 goto err; 901 } 902 903 if (fp_rx) { 904 fp->type = QEDE_FASTPATH_RX; 905 fp_rx--; 906 } else if (fp_combined) { 907 fp->type = QEDE_FASTPATH_COMBINED; 908 fp_combined--; 909 } else { 910 fp->type = QEDE_FASTPATH_TX; 911 } 912 913 if (fp->type & QEDE_FASTPATH_TX) { 914 fp->txq = kcalloc(edev->dev_info.num_tc, 915 sizeof(*fp->txq), GFP_KERNEL); 916 if (!fp->txq) 917 goto err; 918 } 919 920 if (fp->type & QEDE_FASTPATH_RX) { 921 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 922 if (!fp->rxq) 923 goto err; 924 925 if (edev->xdp_prog) { 926 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 927 GFP_KERNEL); 928 if (!fp->xdp_tx) 929 goto err; 930 fp->type |= QEDE_FASTPATH_XDP; 931 } 932 } 933 } 934 935 return 0; 936 err: 937 qede_free_fp_array(edev); 938 return -ENOMEM; 939 } 940 941 /* The qede lock is used to protect driver state change and driver flows that 942 * are not reentrant. 943 */ 944 void __qede_lock(struct qede_dev *edev) 945 { 946 mutex_lock(&edev->qede_lock); 947 } 948 949 void __qede_unlock(struct qede_dev *edev) 950 { 951 mutex_unlock(&edev->qede_lock); 952 } 953 954 /* This version of the lock should be used when acquiring the RTNL lock is also 955 * needed in addition to the internal qede lock. 956 */ 957 static void qede_lock(struct qede_dev *edev) 958 { 959 rtnl_lock(); 960 __qede_lock(edev); 961 } 962 963 static void qede_unlock(struct qede_dev *edev) 964 { 965 __qede_unlock(edev); 966 rtnl_unlock(); 967 } 968 969 static void qede_sp_task(struct work_struct *work) 970 { 971 struct qede_dev *edev = container_of(work, struct qede_dev, 972 sp_task.work); 973 974 /* The locking scheme depends on the specific flag: 975 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 976 * ensure that ongoing flows are ended and new ones are not started. 977 * In other cases - only the internal qede lock should be acquired. 978 */ 979 980 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 981 #ifdef CONFIG_QED_SRIOV 982 /* SRIOV must be disabled outside the lock to avoid a deadlock. 983 * The recovery of the active VFs is currently not supported. 984 */ 985 if (pci_num_vf(edev->pdev)) 986 qede_sriov_configure(edev->pdev, 0); 987 #endif 988 qede_lock(edev); 989 qede_recovery_handler(edev); 990 qede_unlock(edev); 991 } 992 993 __qede_lock(edev); 994 995 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 996 if (edev->state == QEDE_STATE_OPEN) 997 qede_config_rx_mode(edev->ndev); 998 999 #ifdef CONFIG_RFS_ACCEL 1000 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1001 if (edev->state == QEDE_STATE_OPEN) 1002 qede_process_arfs_filters(edev, false); 1003 } 1004 #endif 1005 __qede_unlock(edev); 1006 1007 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1008 #ifdef CONFIG_QED_SRIOV 1009 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1010 * The recovery of the active VFs is currently not supported. 1011 */ 1012 if (pci_num_vf(edev->pdev)) 1013 qede_sriov_configure(edev->pdev, 0); 1014 #endif 1015 edev->ops->common->recovery_process(edev->cdev); 1016 } 1017 } 1018 1019 static void qede_update_pf_params(struct qed_dev *cdev) 1020 { 1021 struct qed_pf_params pf_params; 1022 u16 num_cons; 1023 1024 /* 64 rx + 64 tx + 64 XDP */ 1025 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1026 1027 /* 1 rx + 1 xdp + max tx cos */ 1028 num_cons = QED_MIN_L2_CONS; 1029 1030 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1031 1032 /* Same for VFs - make sure they'll have sufficient connections 1033 * to support XDP Tx queues. 1034 */ 1035 pf_params.eth_pf_params.num_vf_cons = 48; 1036 1037 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1038 qed_ops->common->update_pf_params(cdev, &pf_params); 1039 } 1040 1041 #define QEDE_FW_VER_STR_SIZE 80 1042 1043 static void qede_log_probe(struct qede_dev *edev) 1044 { 1045 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1046 u8 buf[QEDE_FW_VER_STR_SIZE]; 1047 size_t left_size; 1048 1049 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1050 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1051 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1052 p_dev_info->fw_eng, 1053 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1054 QED_MFW_VERSION_3_OFFSET, 1055 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1056 QED_MFW_VERSION_2_OFFSET, 1057 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1058 QED_MFW_VERSION_1_OFFSET, 1059 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1060 QED_MFW_VERSION_0_OFFSET); 1061 1062 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1063 if (p_dev_info->mbi_version && left_size) 1064 snprintf(buf + strlen(buf), left_size, 1065 " [MBI %d.%d.%d]", 1066 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1067 QED_MBI_VERSION_2_OFFSET, 1068 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1069 QED_MBI_VERSION_1_OFFSET, 1070 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1071 QED_MBI_VERSION_0_OFFSET); 1072 1073 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1074 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1075 buf, edev->ndev->name); 1076 } 1077 1078 enum qede_probe_mode { 1079 QEDE_PROBE_NORMAL, 1080 QEDE_PROBE_RECOVERY, 1081 }; 1082 1083 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1084 bool is_vf, enum qede_probe_mode mode) 1085 { 1086 struct qed_probe_params probe_params; 1087 struct qed_slowpath_params sp_params; 1088 struct qed_dev_eth_info dev_info; 1089 struct qede_dev *edev; 1090 struct qed_dev *cdev; 1091 int rc; 1092 1093 if (unlikely(dp_level & QED_LEVEL_INFO)) 1094 pr_notice("Starting qede probe\n"); 1095 1096 memset(&probe_params, 0, sizeof(probe_params)); 1097 probe_params.protocol = QED_PROTOCOL_ETH; 1098 probe_params.dp_module = dp_module; 1099 probe_params.dp_level = dp_level; 1100 probe_params.is_vf = is_vf; 1101 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1102 cdev = qed_ops->common->probe(pdev, &probe_params); 1103 if (!cdev) { 1104 rc = -ENODEV; 1105 goto err0; 1106 } 1107 1108 qede_update_pf_params(cdev); 1109 1110 /* Start the Slowpath-process */ 1111 memset(&sp_params, 0, sizeof(sp_params)); 1112 sp_params.int_mode = QED_INT_MODE_MSIX; 1113 sp_params.drv_major = QEDE_MAJOR_VERSION; 1114 sp_params.drv_minor = QEDE_MINOR_VERSION; 1115 sp_params.drv_rev = QEDE_REVISION_VERSION; 1116 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1117 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1118 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1119 if (rc) { 1120 pr_notice("Cannot start slowpath\n"); 1121 goto err1; 1122 } 1123 1124 /* Learn information crucial for qede to progress */ 1125 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1126 if (rc) 1127 goto err2; 1128 1129 if (mode != QEDE_PROBE_RECOVERY) { 1130 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1131 dp_level); 1132 if (!edev) { 1133 rc = -ENOMEM; 1134 goto err2; 1135 } 1136 } else { 1137 struct net_device *ndev = pci_get_drvdata(pdev); 1138 1139 edev = netdev_priv(ndev); 1140 edev->cdev = cdev; 1141 memset(&edev->stats, 0, sizeof(edev->stats)); 1142 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1143 } 1144 1145 if (is_vf) 1146 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1147 1148 qede_init_ndev(edev); 1149 1150 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1151 if (rc) 1152 goto err3; 1153 1154 if (mode != QEDE_PROBE_RECOVERY) { 1155 /* Prepare the lock prior to the registration of the netdev, 1156 * as once it's registered we might reach flows requiring it 1157 * [it's even possible to reach a flow needing it directly 1158 * from there, although it's unlikely]. 1159 */ 1160 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1161 mutex_init(&edev->qede_lock); 1162 1163 rc = register_netdev(edev->ndev); 1164 if (rc) { 1165 DP_NOTICE(edev, "Cannot register net-device\n"); 1166 goto err4; 1167 } 1168 } 1169 1170 edev->ops->common->set_name(cdev, edev->ndev->name); 1171 1172 /* PTP not supported on VFs */ 1173 if (!is_vf) 1174 qede_ptp_enable(edev, (mode == QEDE_PROBE_NORMAL)); 1175 1176 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1177 1178 #ifdef CONFIG_DCB 1179 if (!IS_VF(edev)) 1180 qede_set_dcbnl_ops(edev->ndev); 1181 #endif 1182 1183 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1184 1185 qede_log_probe(edev); 1186 return 0; 1187 1188 err4: 1189 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1190 err3: 1191 free_netdev(edev->ndev); 1192 err2: 1193 qed_ops->common->slowpath_stop(cdev); 1194 err1: 1195 qed_ops->common->remove(cdev); 1196 err0: 1197 return rc; 1198 } 1199 1200 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1201 { 1202 bool is_vf = false; 1203 u32 dp_module = 0; 1204 u8 dp_level = 0; 1205 1206 switch ((enum qede_pci_private)id->driver_data) { 1207 case QEDE_PRIVATE_VF: 1208 if (debug & QED_LOG_VERBOSE_MASK) 1209 dev_err(&pdev->dev, "Probing a VF\n"); 1210 is_vf = true; 1211 break; 1212 default: 1213 if (debug & QED_LOG_VERBOSE_MASK) 1214 dev_err(&pdev->dev, "Probing a PF\n"); 1215 } 1216 1217 qede_config_debug(debug, &dp_module, &dp_level); 1218 1219 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1220 QEDE_PROBE_NORMAL); 1221 } 1222 1223 enum qede_remove_mode { 1224 QEDE_REMOVE_NORMAL, 1225 QEDE_REMOVE_RECOVERY, 1226 }; 1227 1228 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1229 { 1230 struct net_device *ndev = pci_get_drvdata(pdev); 1231 struct qede_dev *edev; 1232 struct qed_dev *cdev; 1233 1234 if (!ndev) { 1235 dev_info(&pdev->dev, "Device has already been removed\n"); 1236 return; 1237 } 1238 1239 edev = netdev_priv(ndev); 1240 cdev = edev->cdev; 1241 1242 DP_INFO(edev, "Starting qede_remove\n"); 1243 1244 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1245 1246 if (mode != QEDE_REMOVE_RECOVERY) { 1247 unregister_netdev(ndev); 1248 1249 cancel_delayed_work_sync(&edev->sp_task); 1250 1251 edev->ops->common->set_power_state(cdev, PCI_D0); 1252 1253 pci_set_drvdata(pdev, NULL); 1254 } 1255 1256 qede_ptp_disable(edev); 1257 1258 /* Use global ops since we've freed edev */ 1259 qed_ops->common->slowpath_stop(cdev); 1260 if (system_state == SYSTEM_POWER_OFF) 1261 return; 1262 qed_ops->common->remove(cdev); 1263 1264 /* Since this can happen out-of-sync with other flows, 1265 * don't release the netdevice until after slowpath stop 1266 * has been called to guarantee various other contexts 1267 * [e.g., QED register callbacks] won't break anything when 1268 * accessing the netdevice. 1269 */ 1270 if (mode != QEDE_REMOVE_RECOVERY) 1271 free_netdev(ndev); 1272 1273 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1274 } 1275 1276 static void qede_remove(struct pci_dev *pdev) 1277 { 1278 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1279 } 1280 1281 static void qede_shutdown(struct pci_dev *pdev) 1282 { 1283 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1284 } 1285 1286 /* ------------------------------------------------------------------------- 1287 * START OF LOAD / UNLOAD 1288 * ------------------------------------------------------------------------- 1289 */ 1290 1291 static int qede_set_num_queues(struct qede_dev *edev) 1292 { 1293 int rc; 1294 u16 rss_num; 1295 1296 /* Setup queues according to possible resources*/ 1297 if (edev->req_queues) 1298 rss_num = edev->req_queues; 1299 else 1300 rss_num = netif_get_num_default_rss_queues() * 1301 edev->dev_info.common.num_hwfns; 1302 1303 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1304 1305 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1306 if (rc > 0) { 1307 /* Managed to request interrupts for our queues */ 1308 edev->num_queues = rc; 1309 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1310 QEDE_QUEUE_CNT(edev), rss_num); 1311 rc = 0; 1312 } 1313 1314 edev->fp_num_tx = edev->req_num_tx; 1315 edev->fp_num_rx = edev->req_num_rx; 1316 1317 return rc; 1318 } 1319 1320 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1321 u16 sb_id) 1322 { 1323 if (sb_info->sb_virt) { 1324 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1325 QED_SB_TYPE_L2_QUEUE); 1326 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1327 (void *)sb_info->sb_virt, sb_info->sb_phys); 1328 memset(sb_info, 0, sizeof(*sb_info)); 1329 } 1330 } 1331 1332 /* This function allocates fast-path status block memory */ 1333 static int qede_alloc_mem_sb(struct qede_dev *edev, 1334 struct qed_sb_info *sb_info, u16 sb_id) 1335 { 1336 struct status_block_e4 *sb_virt; 1337 dma_addr_t sb_phys; 1338 int rc; 1339 1340 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1341 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1342 if (!sb_virt) { 1343 DP_ERR(edev, "Status block allocation failed\n"); 1344 return -ENOMEM; 1345 } 1346 1347 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1348 sb_virt, sb_phys, sb_id, 1349 QED_SB_TYPE_L2_QUEUE); 1350 if (rc) { 1351 DP_ERR(edev, "Status block initialization failed\n"); 1352 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1353 sb_virt, sb_phys); 1354 return rc; 1355 } 1356 1357 return 0; 1358 } 1359 1360 static void qede_free_rx_buffers(struct qede_dev *edev, 1361 struct qede_rx_queue *rxq) 1362 { 1363 u16 i; 1364 1365 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1366 struct sw_rx_data *rx_buf; 1367 struct page *data; 1368 1369 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1370 data = rx_buf->data; 1371 1372 dma_unmap_page(&edev->pdev->dev, 1373 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1374 1375 rx_buf->data = NULL; 1376 __free_page(data); 1377 } 1378 } 1379 1380 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1381 { 1382 /* Free rx buffers */ 1383 qede_free_rx_buffers(edev, rxq); 1384 1385 /* Free the parallel SW ring */ 1386 kfree(rxq->sw_rx_ring); 1387 1388 /* Free the real RQ ring used by FW */ 1389 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1390 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1391 } 1392 1393 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1394 { 1395 int i; 1396 1397 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1398 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1399 1400 tpa_info->state = QEDE_AGG_STATE_NONE; 1401 } 1402 } 1403 1404 /* This function allocates all memory needed per Rx queue */ 1405 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1406 { 1407 int i, rc, size; 1408 1409 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1410 1411 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1412 1413 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1414 size = rxq->rx_headroom + 1415 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1416 1417 /* Make sure that the headroom and payload fit in a single page */ 1418 if (rxq->rx_buf_size + size > PAGE_SIZE) 1419 rxq->rx_buf_size = PAGE_SIZE - size; 1420 1421 /* Segment size to spilt a page in multiple equal parts , 1422 * unless XDP is used in which case we'd use the entire page. 1423 */ 1424 if (!edev->xdp_prog) { 1425 size = size + rxq->rx_buf_size; 1426 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1427 } else { 1428 rxq->rx_buf_seg_size = PAGE_SIZE; 1429 edev->ndev->features &= ~NETIF_F_GRO_HW; 1430 } 1431 1432 /* Allocate the parallel driver ring for Rx buffers */ 1433 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1434 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1435 if (!rxq->sw_rx_ring) { 1436 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1437 rc = -ENOMEM; 1438 goto err; 1439 } 1440 1441 /* Allocate FW Rx ring */ 1442 rc = edev->ops->common->chain_alloc(edev->cdev, 1443 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1444 QED_CHAIN_MODE_NEXT_PTR, 1445 QED_CHAIN_CNT_TYPE_U16, 1446 RX_RING_SIZE, 1447 sizeof(struct eth_rx_bd), 1448 &rxq->rx_bd_ring, NULL); 1449 if (rc) 1450 goto err; 1451 1452 /* Allocate FW completion ring */ 1453 rc = edev->ops->common->chain_alloc(edev->cdev, 1454 QED_CHAIN_USE_TO_CONSUME, 1455 QED_CHAIN_MODE_PBL, 1456 QED_CHAIN_CNT_TYPE_U16, 1457 RX_RING_SIZE, 1458 sizeof(union eth_rx_cqe), 1459 &rxq->rx_comp_ring, NULL); 1460 if (rc) 1461 goto err; 1462 1463 /* Allocate buffers for the Rx ring */ 1464 rxq->filled_buffers = 0; 1465 for (i = 0; i < rxq->num_rx_buffers; i++) { 1466 rc = qede_alloc_rx_buffer(rxq, false); 1467 if (rc) { 1468 DP_ERR(edev, 1469 "Rx buffers allocation failed at index %d\n", i); 1470 goto err; 1471 } 1472 } 1473 1474 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1475 if (!edev->gro_disable) 1476 qede_set_tpa_param(rxq); 1477 err: 1478 return rc; 1479 } 1480 1481 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1482 { 1483 /* Free the parallel SW ring */ 1484 if (txq->is_xdp) 1485 kfree(txq->sw_tx_ring.xdp); 1486 else 1487 kfree(txq->sw_tx_ring.skbs); 1488 1489 /* Free the real RQ ring used by FW */ 1490 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1491 } 1492 1493 /* This function allocates all memory needed per Tx queue */ 1494 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1495 { 1496 union eth_tx_bd_types *p_virt; 1497 int size, rc; 1498 1499 txq->num_tx_buffers = edev->q_num_tx_buffers; 1500 1501 /* Allocate the parallel driver ring for Tx buffers */ 1502 if (txq->is_xdp) { 1503 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1504 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1505 if (!txq->sw_tx_ring.xdp) 1506 goto err; 1507 } else { 1508 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1509 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1510 if (!txq->sw_tx_ring.skbs) 1511 goto err; 1512 } 1513 1514 rc = edev->ops->common->chain_alloc(edev->cdev, 1515 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1516 QED_CHAIN_MODE_PBL, 1517 QED_CHAIN_CNT_TYPE_U16, 1518 txq->num_tx_buffers, 1519 sizeof(*p_virt), 1520 &txq->tx_pbl, NULL); 1521 if (rc) 1522 goto err; 1523 1524 return 0; 1525 1526 err: 1527 qede_free_mem_txq(edev, txq); 1528 return -ENOMEM; 1529 } 1530 1531 /* This function frees all memory of a single fp */ 1532 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1533 { 1534 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1535 1536 if (fp->type & QEDE_FASTPATH_RX) 1537 qede_free_mem_rxq(edev, fp->rxq); 1538 1539 if (fp->type & QEDE_FASTPATH_XDP) 1540 qede_free_mem_txq(edev, fp->xdp_tx); 1541 1542 if (fp->type & QEDE_FASTPATH_TX) { 1543 int cos; 1544 1545 for_each_cos_in_txq(edev, cos) 1546 qede_free_mem_txq(edev, &fp->txq[cos]); 1547 } 1548 } 1549 1550 /* This function allocates all memory needed for a single fp (i.e. an entity 1551 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1552 */ 1553 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1554 { 1555 int rc = 0; 1556 1557 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1558 if (rc) 1559 goto out; 1560 1561 if (fp->type & QEDE_FASTPATH_RX) { 1562 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1563 if (rc) 1564 goto out; 1565 } 1566 1567 if (fp->type & QEDE_FASTPATH_XDP) { 1568 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1569 if (rc) 1570 goto out; 1571 } 1572 1573 if (fp->type & QEDE_FASTPATH_TX) { 1574 int cos; 1575 1576 for_each_cos_in_txq(edev, cos) { 1577 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1578 if (rc) 1579 goto out; 1580 } 1581 } 1582 1583 out: 1584 return rc; 1585 } 1586 1587 static void qede_free_mem_load(struct qede_dev *edev) 1588 { 1589 int i; 1590 1591 for_each_queue(i) { 1592 struct qede_fastpath *fp = &edev->fp_array[i]; 1593 1594 qede_free_mem_fp(edev, fp); 1595 } 1596 } 1597 1598 /* This function allocates all qede memory at NIC load. */ 1599 static int qede_alloc_mem_load(struct qede_dev *edev) 1600 { 1601 int rc = 0, queue_id; 1602 1603 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1604 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1605 1606 rc = qede_alloc_mem_fp(edev, fp); 1607 if (rc) { 1608 DP_ERR(edev, 1609 "Failed to allocate memory for fastpath - rss id = %d\n", 1610 queue_id); 1611 qede_free_mem_load(edev); 1612 return rc; 1613 } 1614 } 1615 1616 return 0; 1617 } 1618 1619 static void qede_empty_tx_queue(struct qede_dev *edev, 1620 struct qede_tx_queue *txq) 1621 { 1622 unsigned int pkts_compl = 0, bytes_compl = 0; 1623 struct netdev_queue *netdev_txq; 1624 int rc, len = 0; 1625 1626 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1627 1628 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1629 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1630 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1631 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1632 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1633 qed_chain_get_prod_idx(&txq->tx_pbl)); 1634 1635 rc = qede_free_tx_pkt(edev, txq, &len); 1636 if (rc) { 1637 DP_NOTICE(edev, 1638 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1639 txq->index, 1640 qed_chain_get_cons_idx(&txq->tx_pbl), 1641 qed_chain_get_prod_idx(&txq->tx_pbl)); 1642 break; 1643 } 1644 1645 bytes_compl += len; 1646 pkts_compl++; 1647 txq->sw_tx_cons++; 1648 } 1649 1650 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1651 } 1652 1653 static void qede_empty_tx_queues(struct qede_dev *edev) 1654 { 1655 int i; 1656 1657 for_each_queue(i) 1658 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1659 int cos; 1660 1661 for_each_cos_in_txq(edev, cos) { 1662 struct qede_fastpath *fp; 1663 1664 fp = &edev->fp_array[i]; 1665 qede_empty_tx_queue(edev, 1666 &fp->txq[cos]); 1667 } 1668 } 1669 } 1670 1671 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1672 static void qede_init_fp(struct qede_dev *edev) 1673 { 1674 int queue_id, rxq_index = 0, txq_index = 0; 1675 struct qede_fastpath *fp; 1676 1677 for_each_queue(queue_id) { 1678 fp = &edev->fp_array[queue_id]; 1679 1680 fp->edev = edev; 1681 fp->id = queue_id; 1682 1683 if (fp->type & QEDE_FASTPATH_XDP) { 1684 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1685 rxq_index); 1686 fp->xdp_tx->is_xdp = 1; 1687 } 1688 1689 if (fp->type & QEDE_FASTPATH_RX) { 1690 fp->rxq->rxq_id = rxq_index++; 1691 1692 /* Determine how to map buffers for this queue */ 1693 if (fp->type & QEDE_FASTPATH_XDP) 1694 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1695 else 1696 fp->rxq->data_direction = DMA_FROM_DEVICE; 1697 fp->rxq->dev = &edev->pdev->dev; 1698 1699 /* Driver have no error path from here */ 1700 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1701 fp->rxq->rxq_id) < 0); 1702 } 1703 1704 if (fp->type & QEDE_FASTPATH_TX) { 1705 int cos; 1706 1707 for_each_cos_in_txq(edev, cos) { 1708 struct qede_tx_queue *txq = &fp->txq[cos]; 1709 u16 ndev_tx_id; 1710 1711 txq->cos = cos; 1712 txq->index = txq_index; 1713 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1714 txq->ndev_txq_id = ndev_tx_id; 1715 1716 if (edev->dev_info.is_legacy) 1717 txq->is_legacy = true; 1718 txq->dev = &edev->pdev->dev; 1719 } 1720 1721 txq_index++; 1722 } 1723 1724 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1725 edev->ndev->name, queue_id); 1726 } 1727 } 1728 1729 static int qede_set_real_num_queues(struct qede_dev *edev) 1730 { 1731 int rc = 0; 1732 1733 rc = netif_set_real_num_tx_queues(edev->ndev, 1734 QEDE_TSS_COUNT(edev) * 1735 edev->dev_info.num_tc); 1736 if (rc) { 1737 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1738 return rc; 1739 } 1740 1741 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1742 if (rc) { 1743 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1744 return rc; 1745 } 1746 1747 return 0; 1748 } 1749 1750 static void qede_napi_disable_remove(struct qede_dev *edev) 1751 { 1752 int i; 1753 1754 for_each_queue(i) { 1755 napi_disable(&edev->fp_array[i].napi); 1756 1757 netif_napi_del(&edev->fp_array[i].napi); 1758 } 1759 } 1760 1761 static void qede_napi_add_enable(struct qede_dev *edev) 1762 { 1763 int i; 1764 1765 /* Add NAPI objects */ 1766 for_each_queue(i) { 1767 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1768 qede_poll, NAPI_POLL_WEIGHT); 1769 napi_enable(&edev->fp_array[i].napi); 1770 } 1771 } 1772 1773 static void qede_sync_free_irqs(struct qede_dev *edev) 1774 { 1775 int i; 1776 1777 for (i = 0; i < edev->int_info.used_cnt; i++) { 1778 if (edev->int_info.msix_cnt) { 1779 synchronize_irq(edev->int_info.msix[i].vector); 1780 free_irq(edev->int_info.msix[i].vector, 1781 &edev->fp_array[i]); 1782 } else { 1783 edev->ops->common->simd_handler_clean(edev->cdev, i); 1784 } 1785 } 1786 1787 edev->int_info.used_cnt = 0; 1788 } 1789 1790 static int qede_req_msix_irqs(struct qede_dev *edev) 1791 { 1792 int i, rc; 1793 1794 /* Sanitize number of interrupts == number of prepared RSS queues */ 1795 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1796 DP_ERR(edev, 1797 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1798 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1799 return -EINVAL; 1800 } 1801 1802 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1803 #ifdef CONFIG_RFS_ACCEL 1804 struct qede_fastpath *fp = &edev->fp_array[i]; 1805 1806 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1807 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1808 edev->int_info.msix[i].vector); 1809 if (rc) { 1810 DP_ERR(edev, "Failed to add CPU rmap\n"); 1811 qede_free_arfs(edev); 1812 } 1813 } 1814 #endif 1815 rc = request_irq(edev->int_info.msix[i].vector, 1816 qede_msix_fp_int, 0, edev->fp_array[i].name, 1817 &edev->fp_array[i]); 1818 if (rc) { 1819 DP_ERR(edev, "Request fp %d irq failed\n", i); 1820 qede_sync_free_irqs(edev); 1821 return rc; 1822 } 1823 DP_VERBOSE(edev, NETIF_MSG_INTR, 1824 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1825 edev->fp_array[i].name, i, 1826 &edev->fp_array[i]); 1827 edev->int_info.used_cnt++; 1828 } 1829 1830 return 0; 1831 } 1832 1833 static void qede_simd_fp_handler(void *cookie) 1834 { 1835 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1836 1837 napi_schedule_irqoff(&fp->napi); 1838 } 1839 1840 static int qede_setup_irqs(struct qede_dev *edev) 1841 { 1842 int i, rc = 0; 1843 1844 /* Learn Interrupt configuration */ 1845 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1846 if (rc) 1847 return rc; 1848 1849 if (edev->int_info.msix_cnt) { 1850 rc = qede_req_msix_irqs(edev); 1851 if (rc) 1852 return rc; 1853 edev->ndev->irq = edev->int_info.msix[0].vector; 1854 } else { 1855 const struct qed_common_ops *ops; 1856 1857 /* qed should learn receive the RSS ids and callbacks */ 1858 ops = edev->ops->common; 1859 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1860 ops->simd_handler_config(edev->cdev, 1861 &edev->fp_array[i], i, 1862 qede_simd_fp_handler); 1863 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1864 } 1865 return 0; 1866 } 1867 1868 static int qede_drain_txq(struct qede_dev *edev, 1869 struct qede_tx_queue *txq, bool allow_drain) 1870 { 1871 int rc, cnt = 1000; 1872 1873 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1874 if (!cnt) { 1875 if (allow_drain) { 1876 DP_NOTICE(edev, 1877 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1878 txq->index); 1879 rc = edev->ops->common->drain(edev->cdev); 1880 if (rc) 1881 return rc; 1882 return qede_drain_txq(edev, txq, false); 1883 } 1884 DP_NOTICE(edev, 1885 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1886 txq->index, txq->sw_tx_prod, 1887 txq->sw_tx_cons); 1888 return -ENODEV; 1889 } 1890 cnt--; 1891 usleep_range(1000, 2000); 1892 barrier(); 1893 } 1894 1895 /* FW finished processing, wait for HW to transmit all tx packets */ 1896 usleep_range(1000, 2000); 1897 1898 return 0; 1899 } 1900 1901 static int qede_stop_txq(struct qede_dev *edev, 1902 struct qede_tx_queue *txq, int rss_id) 1903 { 1904 /* delete doorbell from doorbell recovery mechanism */ 1905 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1906 &txq->tx_db); 1907 1908 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1909 } 1910 1911 static int qede_stop_queues(struct qede_dev *edev) 1912 { 1913 struct qed_update_vport_params *vport_update_params; 1914 struct qed_dev *cdev = edev->cdev; 1915 struct qede_fastpath *fp; 1916 int rc, i; 1917 1918 /* Disable the vport */ 1919 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1920 if (!vport_update_params) 1921 return -ENOMEM; 1922 1923 vport_update_params->vport_id = 0; 1924 vport_update_params->update_vport_active_flg = 1; 1925 vport_update_params->vport_active_flg = 0; 1926 vport_update_params->update_rss_flg = 0; 1927 1928 rc = edev->ops->vport_update(cdev, vport_update_params); 1929 vfree(vport_update_params); 1930 1931 if (rc) { 1932 DP_ERR(edev, "Failed to update vport\n"); 1933 return rc; 1934 } 1935 1936 /* Flush Tx queues. If needed, request drain from MCP */ 1937 for_each_queue(i) { 1938 fp = &edev->fp_array[i]; 1939 1940 if (fp->type & QEDE_FASTPATH_TX) { 1941 int cos; 1942 1943 for_each_cos_in_txq(edev, cos) { 1944 rc = qede_drain_txq(edev, &fp->txq[cos], true); 1945 if (rc) 1946 return rc; 1947 } 1948 } 1949 1950 if (fp->type & QEDE_FASTPATH_XDP) { 1951 rc = qede_drain_txq(edev, fp->xdp_tx, true); 1952 if (rc) 1953 return rc; 1954 } 1955 } 1956 1957 /* Stop all Queues in reverse order */ 1958 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 1959 fp = &edev->fp_array[i]; 1960 1961 /* Stop the Tx Queue(s) */ 1962 if (fp->type & QEDE_FASTPATH_TX) { 1963 int cos; 1964 1965 for_each_cos_in_txq(edev, cos) { 1966 rc = qede_stop_txq(edev, &fp->txq[cos], i); 1967 if (rc) 1968 return rc; 1969 } 1970 } 1971 1972 /* Stop the Rx Queue */ 1973 if (fp->type & QEDE_FASTPATH_RX) { 1974 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 1975 if (rc) { 1976 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 1977 return rc; 1978 } 1979 } 1980 1981 /* Stop the XDP forwarding queue */ 1982 if (fp->type & QEDE_FASTPATH_XDP) { 1983 rc = qede_stop_txq(edev, fp->xdp_tx, i); 1984 if (rc) 1985 return rc; 1986 1987 bpf_prog_put(fp->rxq->xdp_prog); 1988 } 1989 } 1990 1991 /* Stop the vport */ 1992 rc = edev->ops->vport_stop(cdev, 0); 1993 if (rc) 1994 DP_ERR(edev, "Failed to stop VPORT\n"); 1995 1996 return rc; 1997 } 1998 1999 static int qede_start_txq(struct qede_dev *edev, 2000 struct qede_fastpath *fp, 2001 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2002 { 2003 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2004 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2005 struct qed_queue_start_common_params params; 2006 struct qed_txq_start_ret_params ret_params; 2007 int rc; 2008 2009 memset(¶ms, 0, sizeof(params)); 2010 memset(&ret_params, 0, sizeof(ret_params)); 2011 2012 /* Let the XDP queue share the queue-zone with one of the regular txq. 2013 * We don't really care about its coalescing. 2014 */ 2015 if (txq->is_xdp) 2016 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2017 else 2018 params.queue_id = txq->index; 2019 2020 params.p_sb = fp->sb_info; 2021 params.sb_idx = sb_idx; 2022 params.tc = txq->cos; 2023 2024 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2025 page_cnt, &ret_params); 2026 if (rc) { 2027 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2028 return rc; 2029 } 2030 2031 txq->doorbell_addr = ret_params.p_doorbell; 2032 txq->handle = ret_params.p_handle; 2033 2034 /* Determine the FW consumer address associated */ 2035 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2036 2037 /* Prepare the doorbell parameters */ 2038 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2039 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2040 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2041 DQ_XCM_ETH_TX_BD_PROD_CMD); 2042 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2043 2044 /* register doorbell with doorbell recovery mechanism */ 2045 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2046 &txq->tx_db, DB_REC_WIDTH_32B, 2047 DB_REC_KERNEL); 2048 2049 return rc; 2050 } 2051 2052 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2053 { 2054 int vlan_removal_en = 1; 2055 struct qed_dev *cdev = edev->cdev; 2056 struct qed_dev_info *qed_info = &edev->dev_info.common; 2057 struct qed_update_vport_params *vport_update_params; 2058 struct qed_queue_start_common_params q_params; 2059 struct qed_start_vport_params start = {0}; 2060 int rc, i; 2061 2062 if (!edev->num_queues) { 2063 DP_ERR(edev, 2064 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2065 return -EINVAL; 2066 } 2067 2068 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2069 if (!vport_update_params) 2070 return -ENOMEM; 2071 2072 start.handle_ptp_pkts = !!(edev->ptp); 2073 start.gro_enable = !edev->gro_disable; 2074 start.mtu = edev->ndev->mtu; 2075 start.vport_id = 0; 2076 start.drop_ttl0 = true; 2077 start.remove_inner_vlan = vlan_removal_en; 2078 start.clear_stats = clear_stats; 2079 2080 rc = edev->ops->vport_start(cdev, &start); 2081 2082 if (rc) { 2083 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2084 goto out; 2085 } 2086 2087 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2088 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2089 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2090 2091 for_each_queue(i) { 2092 struct qede_fastpath *fp = &edev->fp_array[i]; 2093 dma_addr_t p_phys_table; 2094 u32 page_cnt; 2095 2096 if (fp->type & QEDE_FASTPATH_RX) { 2097 struct qed_rxq_start_ret_params ret_params; 2098 struct qede_rx_queue *rxq = fp->rxq; 2099 __le16 *val; 2100 2101 memset(&ret_params, 0, sizeof(ret_params)); 2102 memset(&q_params, 0, sizeof(q_params)); 2103 q_params.queue_id = rxq->rxq_id; 2104 q_params.vport_id = 0; 2105 q_params.p_sb = fp->sb_info; 2106 q_params.sb_idx = RX_PI; 2107 2108 p_phys_table = 2109 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2110 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2111 2112 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2113 rxq->rx_buf_size, 2114 rxq->rx_bd_ring.p_phys_addr, 2115 p_phys_table, 2116 page_cnt, &ret_params); 2117 if (rc) { 2118 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2119 rc); 2120 goto out; 2121 } 2122 2123 /* Use the return parameters */ 2124 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2125 rxq->handle = ret_params.p_handle; 2126 2127 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2128 rxq->hw_cons_ptr = val; 2129 2130 qede_update_rx_prod(edev, rxq); 2131 } 2132 2133 if (fp->type & QEDE_FASTPATH_XDP) { 2134 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2135 if (rc) 2136 goto out; 2137 2138 bpf_prog_add(edev->xdp_prog, 1); 2139 fp->rxq->xdp_prog = edev->xdp_prog; 2140 } 2141 2142 if (fp->type & QEDE_FASTPATH_TX) { 2143 int cos; 2144 2145 for_each_cos_in_txq(edev, cos) { 2146 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2147 TX_PI(cos)); 2148 if (rc) 2149 goto out; 2150 } 2151 } 2152 } 2153 2154 /* Prepare and send the vport enable */ 2155 vport_update_params->vport_id = start.vport_id; 2156 vport_update_params->update_vport_active_flg = 1; 2157 vport_update_params->vport_active_flg = 1; 2158 2159 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2160 qed_info->tx_switching) { 2161 vport_update_params->update_tx_switching_flg = 1; 2162 vport_update_params->tx_switching_flg = 1; 2163 } 2164 2165 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2166 &vport_update_params->update_rss_flg); 2167 2168 rc = edev->ops->vport_update(cdev, vport_update_params); 2169 if (rc) 2170 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2171 2172 out: 2173 vfree(vport_update_params); 2174 return rc; 2175 } 2176 2177 enum qede_unload_mode { 2178 QEDE_UNLOAD_NORMAL, 2179 QEDE_UNLOAD_RECOVERY, 2180 }; 2181 2182 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2183 bool is_locked) 2184 { 2185 struct qed_link_params link_params; 2186 int rc; 2187 2188 DP_INFO(edev, "Starting qede unload\n"); 2189 2190 if (!is_locked) 2191 __qede_lock(edev); 2192 2193 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2194 2195 if (mode != QEDE_UNLOAD_RECOVERY) 2196 edev->state = QEDE_STATE_CLOSED; 2197 2198 qede_rdma_dev_event_close(edev); 2199 2200 /* Close OS Tx */ 2201 netif_tx_disable(edev->ndev); 2202 netif_carrier_off(edev->ndev); 2203 2204 if (mode != QEDE_UNLOAD_RECOVERY) { 2205 /* Reset the link */ 2206 memset(&link_params, 0, sizeof(link_params)); 2207 link_params.link_up = false; 2208 edev->ops->common->set_link(edev->cdev, &link_params); 2209 2210 rc = qede_stop_queues(edev); 2211 if (rc) { 2212 qede_sync_free_irqs(edev); 2213 goto out; 2214 } 2215 2216 DP_INFO(edev, "Stopped Queues\n"); 2217 } 2218 2219 qede_vlan_mark_nonconfigured(edev); 2220 edev->ops->fastpath_stop(edev->cdev); 2221 2222 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2223 qede_poll_for_freeing_arfs_filters(edev); 2224 qede_free_arfs(edev); 2225 } 2226 2227 /* Release the interrupts */ 2228 qede_sync_free_irqs(edev); 2229 edev->ops->common->set_fp_int(edev->cdev, 0); 2230 2231 qede_napi_disable_remove(edev); 2232 2233 if (mode == QEDE_UNLOAD_RECOVERY) 2234 qede_empty_tx_queues(edev); 2235 2236 qede_free_mem_load(edev); 2237 qede_free_fp_array(edev); 2238 2239 out: 2240 if (!is_locked) 2241 __qede_unlock(edev); 2242 2243 if (mode != QEDE_UNLOAD_RECOVERY) 2244 DP_NOTICE(edev, "Link is down\n"); 2245 2246 edev->ptp_skip_txts = 0; 2247 2248 DP_INFO(edev, "Ending qede unload\n"); 2249 } 2250 2251 enum qede_load_mode { 2252 QEDE_LOAD_NORMAL, 2253 QEDE_LOAD_RELOAD, 2254 QEDE_LOAD_RECOVERY, 2255 }; 2256 2257 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2258 bool is_locked) 2259 { 2260 struct qed_link_params link_params; 2261 u8 num_tc; 2262 int rc; 2263 2264 DP_INFO(edev, "Starting qede load\n"); 2265 2266 if (!is_locked) 2267 __qede_lock(edev); 2268 2269 rc = qede_set_num_queues(edev); 2270 if (rc) 2271 goto out; 2272 2273 rc = qede_alloc_fp_array(edev); 2274 if (rc) 2275 goto out; 2276 2277 qede_init_fp(edev); 2278 2279 rc = qede_alloc_mem_load(edev); 2280 if (rc) 2281 goto err1; 2282 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2283 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2284 2285 rc = qede_set_real_num_queues(edev); 2286 if (rc) 2287 goto err2; 2288 2289 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2290 rc = qede_alloc_arfs(edev); 2291 if (rc) 2292 DP_NOTICE(edev, "aRFS memory allocation failed\n"); 2293 } 2294 2295 qede_napi_add_enable(edev); 2296 DP_INFO(edev, "Napi added and enabled\n"); 2297 2298 rc = qede_setup_irqs(edev); 2299 if (rc) 2300 goto err3; 2301 DP_INFO(edev, "Setup IRQs succeeded\n"); 2302 2303 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2304 if (rc) 2305 goto err4; 2306 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2307 2308 num_tc = netdev_get_num_tc(edev->ndev); 2309 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2310 qede_setup_tc(edev->ndev, num_tc); 2311 2312 /* Program un-configured VLANs */ 2313 qede_configure_vlan_filters(edev); 2314 2315 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2316 2317 /* Ask for link-up using current configuration */ 2318 memset(&link_params, 0, sizeof(link_params)); 2319 link_params.link_up = true; 2320 edev->ops->common->set_link(edev->cdev, &link_params); 2321 2322 edev->state = QEDE_STATE_OPEN; 2323 2324 DP_INFO(edev, "Ending successfully qede load\n"); 2325 2326 goto out; 2327 err4: 2328 qede_sync_free_irqs(edev); 2329 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2330 err3: 2331 qede_napi_disable_remove(edev); 2332 err2: 2333 qede_free_mem_load(edev); 2334 err1: 2335 edev->ops->common->set_fp_int(edev->cdev, 0); 2336 qede_free_fp_array(edev); 2337 edev->num_queues = 0; 2338 edev->fp_num_tx = 0; 2339 edev->fp_num_rx = 0; 2340 out: 2341 if (!is_locked) 2342 __qede_unlock(edev); 2343 2344 return rc; 2345 } 2346 2347 /* 'func' should be able to run between unload and reload assuming interface 2348 * is actually running, or afterwards in case it's currently DOWN. 2349 */ 2350 void qede_reload(struct qede_dev *edev, 2351 struct qede_reload_args *args, bool is_locked) 2352 { 2353 if (!is_locked) 2354 __qede_lock(edev); 2355 2356 /* Since qede_lock is held, internal state wouldn't change even 2357 * if netdev state would start transitioning. Check whether current 2358 * internal configuration indicates device is up, then reload. 2359 */ 2360 if (edev->state == QEDE_STATE_OPEN) { 2361 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2362 if (args) 2363 args->func(edev, args); 2364 qede_load(edev, QEDE_LOAD_RELOAD, true); 2365 2366 /* Since no one is going to do it for us, re-configure */ 2367 qede_config_rx_mode(edev->ndev); 2368 } else if (args) { 2369 args->func(edev, args); 2370 } 2371 2372 if (!is_locked) 2373 __qede_unlock(edev); 2374 } 2375 2376 /* called with rtnl_lock */ 2377 static int qede_open(struct net_device *ndev) 2378 { 2379 struct qede_dev *edev = netdev_priv(ndev); 2380 int rc; 2381 2382 netif_carrier_off(ndev); 2383 2384 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2385 2386 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2387 if (rc) 2388 return rc; 2389 2390 udp_tunnel_get_rx_info(ndev); 2391 2392 edev->ops->common->update_drv_state(edev->cdev, true); 2393 2394 return 0; 2395 } 2396 2397 static int qede_close(struct net_device *ndev) 2398 { 2399 struct qede_dev *edev = netdev_priv(ndev); 2400 2401 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2402 2403 edev->ops->common->update_drv_state(edev->cdev, false); 2404 2405 return 0; 2406 } 2407 2408 static void qede_link_update(void *dev, struct qed_link_output *link) 2409 { 2410 struct qede_dev *edev = dev; 2411 2412 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2413 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2414 return; 2415 } 2416 2417 if (link->link_up) { 2418 if (!netif_carrier_ok(edev->ndev)) { 2419 DP_NOTICE(edev, "Link is up\n"); 2420 netif_tx_start_all_queues(edev->ndev); 2421 netif_carrier_on(edev->ndev); 2422 qede_rdma_dev_event_open(edev); 2423 } 2424 } else { 2425 if (netif_carrier_ok(edev->ndev)) { 2426 DP_NOTICE(edev, "Link is down\n"); 2427 netif_tx_disable(edev->ndev); 2428 netif_carrier_off(edev->ndev); 2429 qede_rdma_dev_event_close(edev); 2430 } 2431 } 2432 } 2433 2434 static void qede_schedule_recovery_handler(void *dev) 2435 { 2436 struct qede_dev *edev = dev; 2437 2438 if (edev->state == QEDE_STATE_RECOVERY) { 2439 DP_NOTICE(edev, 2440 "Avoid scheduling a recovery handling since already in recovery state\n"); 2441 return; 2442 } 2443 2444 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2445 schedule_delayed_work(&edev->sp_task, 0); 2446 2447 DP_INFO(edev, "Scheduled a recovery handler\n"); 2448 } 2449 2450 static void qede_recovery_failed(struct qede_dev *edev) 2451 { 2452 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2453 2454 netif_device_detach(edev->ndev); 2455 2456 if (edev->cdev) 2457 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2458 } 2459 2460 static void qede_recovery_handler(struct qede_dev *edev) 2461 { 2462 u32 curr_state = edev->state; 2463 int rc; 2464 2465 DP_NOTICE(edev, "Starting a recovery process\n"); 2466 2467 /* No need to acquire first the qede_lock since is done by qede_sp_task 2468 * before calling this function. 2469 */ 2470 edev->state = QEDE_STATE_RECOVERY; 2471 2472 edev->ops->common->recovery_prolog(edev->cdev); 2473 2474 if (curr_state == QEDE_STATE_OPEN) 2475 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2476 2477 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2478 2479 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2480 IS_VF(edev), QEDE_PROBE_RECOVERY); 2481 if (rc) { 2482 edev->cdev = NULL; 2483 goto err; 2484 } 2485 2486 if (curr_state == QEDE_STATE_OPEN) { 2487 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2488 if (rc) 2489 goto err; 2490 2491 qede_config_rx_mode(edev->ndev); 2492 udp_tunnel_get_rx_info(edev->ndev); 2493 } 2494 2495 edev->state = curr_state; 2496 2497 DP_NOTICE(edev, "Recovery handling is done\n"); 2498 2499 return; 2500 2501 err: 2502 qede_recovery_failed(edev); 2503 } 2504 2505 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2506 { 2507 struct netdev_queue *netdev_txq; 2508 2509 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2510 if (netif_xmit_stopped(netdev_txq)) 2511 return true; 2512 2513 return false; 2514 } 2515 2516 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2517 { 2518 struct qede_dev *edev = dev; 2519 struct netdev_hw_addr *ha; 2520 int i; 2521 2522 if (edev->ndev->features & NETIF_F_IP_CSUM) 2523 data->feat_flags |= QED_TLV_IP_CSUM; 2524 if (edev->ndev->features & NETIF_F_TSO) 2525 data->feat_flags |= QED_TLV_LSO; 2526 2527 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2528 memset(data->mac[1], 0, ETH_ALEN); 2529 memset(data->mac[2], 0, ETH_ALEN); 2530 /* Copy the first two UC macs */ 2531 netif_addr_lock_bh(edev->ndev); 2532 i = 1; 2533 netdev_for_each_uc_addr(ha, edev->ndev) { 2534 ether_addr_copy(data->mac[i++], ha->addr); 2535 if (i == QED_TLV_MAC_COUNT) 2536 break; 2537 } 2538 2539 netif_addr_unlock_bh(edev->ndev); 2540 } 2541 2542 static void qede_get_eth_tlv_data(void *dev, void *data) 2543 { 2544 struct qed_mfw_tlv_eth *etlv = data; 2545 struct qede_dev *edev = dev; 2546 struct qede_fastpath *fp; 2547 int i; 2548 2549 etlv->lso_maxoff_size = 0XFFFF; 2550 etlv->lso_maxoff_size_set = true; 2551 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2552 etlv->lso_minseg_size_set = true; 2553 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2554 etlv->prom_mode_set = true; 2555 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2556 etlv->tx_descr_size_set = true; 2557 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2558 etlv->rx_descr_size_set = true; 2559 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2560 etlv->iov_offload_set = true; 2561 2562 /* Fill information regarding queues; Should be done under the qede 2563 * lock to guarantee those don't change beneath our feet. 2564 */ 2565 etlv->txqs_empty = true; 2566 etlv->rxqs_empty = true; 2567 etlv->num_txqs_full = 0; 2568 etlv->num_rxqs_full = 0; 2569 2570 __qede_lock(edev); 2571 for_each_queue(i) { 2572 fp = &edev->fp_array[i]; 2573 if (fp->type & QEDE_FASTPATH_TX) { 2574 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2575 2576 if (txq->sw_tx_cons != txq->sw_tx_prod) 2577 etlv->txqs_empty = false; 2578 if (qede_is_txq_full(edev, txq)) 2579 etlv->num_txqs_full++; 2580 } 2581 if (fp->type & QEDE_FASTPATH_RX) { 2582 if (qede_has_rx_work(fp->rxq)) 2583 etlv->rxqs_empty = false; 2584 2585 /* This one is a bit tricky; Firmware might stop 2586 * placing packets if ring is not yet full. 2587 * Give an approximation. 2588 */ 2589 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2590 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2591 RX_RING_SIZE - 100) 2592 etlv->num_rxqs_full++; 2593 } 2594 } 2595 __qede_unlock(edev); 2596 2597 etlv->txqs_empty_set = true; 2598 etlv->rxqs_empty_set = true; 2599 etlv->num_txqs_full_set = true; 2600 etlv->num_rxqs_full_set = true; 2601 } 2602 2603 /** 2604 * qede_io_error_detected - called when PCI error is detected 2605 * @pdev: Pointer to PCI device 2606 * @state: The current pci connection state 2607 * 2608 * This function is called after a PCI bus error affecting 2609 * this device has been detected. 2610 */ 2611 static pci_ers_result_t 2612 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2613 { 2614 struct net_device *dev = pci_get_drvdata(pdev); 2615 struct qede_dev *edev = netdev_priv(dev); 2616 2617 if (!edev) 2618 return PCI_ERS_RESULT_NONE; 2619 2620 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2621 2622 __qede_lock(edev); 2623 if (edev->state == QEDE_STATE_RECOVERY) { 2624 DP_NOTICE(edev, "Device already in the recovery state\n"); 2625 __qede_unlock(edev); 2626 return PCI_ERS_RESULT_NONE; 2627 } 2628 2629 /* PF handles the recovery of its VFs */ 2630 if (IS_VF(edev)) { 2631 DP_VERBOSE(edev, QED_MSG_IOV, 2632 "VF recovery is handled by its PF\n"); 2633 __qede_unlock(edev); 2634 return PCI_ERS_RESULT_RECOVERED; 2635 } 2636 2637 /* Close OS Tx */ 2638 netif_tx_disable(edev->ndev); 2639 netif_carrier_off(edev->ndev); 2640 2641 set_bit(QEDE_SP_AER, &edev->sp_flags); 2642 schedule_delayed_work(&edev->sp_task, 0); 2643 2644 __qede_unlock(edev); 2645 2646 return PCI_ERS_RESULT_CAN_RECOVER; 2647 } 2648