1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/module.h> 10 #include <linux/pci.h> 11 #include <linux/version.h> 12 #include <linux/device.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/errno.h> 17 #include <linux/list.h> 18 #include <linux/string.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/interrupt.h> 21 #include <asm/byteorder.h> 22 #include <asm/param.h> 23 #include <linux/io.h> 24 #include <linux/netdev_features.h> 25 #include <linux/udp.h> 26 #include <linux/tcp.h> 27 #include <net/udp_tunnel.h> 28 #include <linux/ip.h> 29 #include <net/ipv6.h> 30 #include <net/tcp.h> 31 #include <linux/if_ether.h> 32 #include <linux/if_vlan.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/ethtool.h> 35 #include <linux/in.h> 36 #include <linux/random.h> 37 #include <net/ip6_checksum.h> 38 #include <linux/bitops.h> 39 #include <linux/qed/qede_roce.h> 40 #include "qede.h" 41 42 static char version[] = 43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 44 45 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 46 MODULE_LICENSE("GPL"); 47 MODULE_VERSION(DRV_MODULE_VERSION); 48 49 static uint debug; 50 module_param(debug, uint, 0); 51 MODULE_PARM_DESC(debug, " Default debug msglevel"); 52 53 static const struct qed_eth_ops *qed_ops; 54 55 #define CHIP_NUM_57980S_40 0x1634 56 #define CHIP_NUM_57980S_10 0x1666 57 #define CHIP_NUM_57980S_MF 0x1636 58 #define CHIP_NUM_57980S_100 0x1644 59 #define CHIP_NUM_57980S_50 0x1654 60 #define CHIP_NUM_57980S_25 0x1656 61 #define CHIP_NUM_57980S_IOV 0x1664 62 63 #ifndef PCI_DEVICE_ID_NX2_57980E 64 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 65 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 66 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 67 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 68 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 69 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 70 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 71 #endif 72 73 enum qede_pci_private { 74 QEDE_PRIVATE_PF, 75 QEDE_PRIVATE_VF 76 }; 77 78 static const struct pci_device_id qede_pci_tbl[] = { 79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 85 #ifdef CONFIG_QED_SRIOV 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 87 #endif 88 { 0 } 89 }; 90 91 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 92 93 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 94 95 #define TX_TIMEOUT (5 * HZ) 96 97 static void qede_remove(struct pci_dev *pdev); 98 static void qede_shutdown(struct pci_dev *pdev); 99 static int qede_alloc_rx_buffer(struct qede_dev *edev, 100 struct qede_rx_queue *rxq); 101 static void qede_link_update(void *dev, struct qed_link_output *link); 102 103 #ifdef CONFIG_QED_SRIOV 104 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 105 __be16 vlan_proto) 106 { 107 struct qede_dev *edev = netdev_priv(ndev); 108 109 if (vlan > 4095) { 110 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 111 return -EINVAL; 112 } 113 114 if (vlan_proto != htons(ETH_P_8021Q)) 115 return -EPROTONOSUPPORT; 116 117 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 118 vlan, vf); 119 120 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 121 } 122 123 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 124 { 125 struct qede_dev *edev = netdev_priv(ndev); 126 127 DP_VERBOSE(edev, QED_MSG_IOV, 128 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 129 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 130 131 if (!is_valid_ether_addr(mac)) { 132 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 133 return -EINVAL; 134 } 135 136 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 137 } 138 139 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 140 { 141 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 142 struct qed_dev_info *qed_info = &edev->dev_info.common; 143 int rc; 144 145 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 146 147 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 148 149 /* Enable/Disable Tx switching for PF */ 150 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 151 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) { 152 struct qed_update_vport_params params; 153 154 memset(¶ms, 0, sizeof(params)); 155 params.vport_id = 0; 156 params.update_tx_switching_flg = 1; 157 params.tx_switching_flg = num_vfs_param ? 1 : 0; 158 edev->ops->vport_update(edev->cdev, ¶ms); 159 } 160 161 return rc; 162 } 163 #endif 164 165 static struct pci_driver qede_pci_driver = { 166 .name = "qede", 167 .id_table = qede_pci_tbl, 168 .probe = qede_probe, 169 .remove = qede_remove, 170 .shutdown = qede_shutdown, 171 #ifdef CONFIG_QED_SRIOV 172 .sriov_configure = qede_sriov_configure, 173 #endif 174 }; 175 176 static void qede_force_mac(void *dev, u8 *mac, bool forced) 177 { 178 struct qede_dev *edev = dev; 179 180 /* MAC hints take effect only if we haven't set one already */ 181 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced) 182 return; 183 184 ether_addr_copy(edev->ndev->dev_addr, mac); 185 ether_addr_copy(edev->primary_mac, mac); 186 } 187 188 static struct qed_eth_cb_ops qede_ll_ops = { 189 { 190 .link_update = qede_link_update, 191 }, 192 .force_mac = qede_force_mac, 193 }; 194 195 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 196 void *ptr) 197 { 198 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 199 struct ethtool_drvinfo drvinfo; 200 struct qede_dev *edev; 201 202 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 203 goto done; 204 205 /* Check whether this is a qede device */ 206 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 207 goto done; 208 209 memset(&drvinfo, 0, sizeof(drvinfo)); 210 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 211 if (strcmp(drvinfo.driver, "qede")) 212 goto done; 213 edev = netdev_priv(ndev); 214 215 switch (event) { 216 case NETDEV_CHANGENAME: 217 /* Notify qed of the name change */ 218 if (!edev->ops || !edev->ops->common) 219 goto done; 220 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede"); 221 break; 222 case NETDEV_CHANGEADDR: 223 edev = netdev_priv(ndev); 224 qede_roce_event_changeaddr(edev); 225 break; 226 } 227 228 done: 229 return NOTIFY_DONE; 230 } 231 232 static struct notifier_block qede_netdev_notifier = { 233 .notifier_call = qede_netdev_event, 234 }; 235 236 static 237 int __init qede_init(void) 238 { 239 int ret; 240 241 pr_info("qede_init: %s\n", version); 242 243 qed_ops = qed_get_eth_ops(); 244 if (!qed_ops) { 245 pr_notice("Failed to get qed ethtool operations\n"); 246 return -EINVAL; 247 } 248 249 /* Must register notifier before pci ops, since we might miss 250 * interface rename after pci probe and netdev registeration. 251 */ 252 ret = register_netdevice_notifier(&qede_netdev_notifier); 253 if (ret) { 254 pr_notice("Failed to register netdevice_notifier\n"); 255 qed_put_eth_ops(); 256 return -EINVAL; 257 } 258 259 ret = pci_register_driver(&qede_pci_driver); 260 if (ret) { 261 pr_notice("Failed to register driver\n"); 262 unregister_netdevice_notifier(&qede_netdev_notifier); 263 qed_put_eth_ops(); 264 return -EINVAL; 265 } 266 267 return 0; 268 } 269 270 static void __exit qede_cleanup(void) 271 { 272 if (debug & QED_LOG_INFO_MASK) 273 pr_info("qede_cleanup called\n"); 274 275 unregister_netdevice_notifier(&qede_netdev_notifier); 276 pci_unregister_driver(&qede_pci_driver); 277 qed_put_eth_ops(); 278 } 279 280 module_init(qede_init); 281 module_exit(qede_cleanup); 282 283 /* ------------------------------------------------------------------------- 284 * START OF FAST-PATH 285 * ------------------------------------------------------------------------- 286 */ 287 288 /* Unmap the data and free skb */ 289 static int qede_free_tx_pkt(struct qede_dev *edev, 290 struct qede_tx_queue *txq, int *len) 291 { 292 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX; 293 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 294 struct eth_tx_1st_bd *first_bd; 295 struct eth_tx_bd *tx_data_bd; 296 int bds_consumed = 0; 297 int nbds; 298 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD; 299 int i, split_bd_len = 0; 300 301 if (unlikely(!skb)) { 302 DP_ERR(edev, 303 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n", 304 idx, txq->sw_tx_cons, txq->sw_tx_prod); 305 return -1; 306 } 307 308 *len = skb->len; 309 310 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 311 312 bds_consumed++; 313 314 nbds = first_bd->data.nbds; 315 316 if (data_split) { 317 struct eth_tx_bd *split = (struct eth_tx_bd *) 318 qed_chain_consume(&txq->tx_pbl); 319 split_bd_len = BD_UNMAP_LEN(split); 320 bds_consumed++; 321 } 322 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 323 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 324 325 /* Unmap the data of the skb frags */ 326 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) { 327 tx_data_bd = (struct eth_tx_bd *) 328 qed_chain_consume(&txq->tx_pbl); 329 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), 330 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 331 } 332 333 while (bds_consumed++ < nbds) 334 qed_chain_consume(&txq->tx_pbl); 335 336 /* Free skb */ 337 dev_kfree_skb_any(skb); 338 txq->sw_tx_ring[idx].skb = NULL; 339 txq->sw_tx_ring[idx].flags = 0; 340 341 return 0; 342 } 343 344 /* Unmap the data and free skb when mapping failed during start_xmit */ 345 static void qede_free_failed_tx_pkt(struct qede_dev *edev, 346 struct qede_tx_queue *txq, 347 struct eth_tx_1st_bd *first_bd, 348 int nbd, bool data_split) 349 { 350 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 351 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 352 struct eth_tx_bd *tx_data_bd; 353 int i, split_bd_len = 0; 354 355 /* Return prod to its position before this skb was handled */ 356 qed_chain_set_prod(&txq->tx_pbl, 357 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 358 359 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl); 360 361 if (data_split) { 362 struct eth_tx_bd *split = (struct eth_tx_bd *) 363 qed_chain_produce(&txq->tx_pbl); 364 split_bd_len = BD_UNMAP_LEN(split); 365 nbd--; 366 } 367 368 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 369 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 370 371 /* Unmap the data of the skb frags */ 372 for (i = 0; i < nbd; i++) { 373 tx_data_bd = (struct eth_tx_bd *) 374 qed_chain_produce(&txq->tx_pbl); 375 if (tx_data_bd->nbytes) 376 dma_unmap_page(&edev->pdev->dev, 377 BD_UNMAP_ADDR(tx_data_bd), 378 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 379 } 380 381 /* Return again prod to its position before this skb was handled */ 382 qed_chain_set_prod(&txq->tx_pbl, 383 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 384 385 /* Free skb */ 386 dev_kfree_skb_any(skb); 387 txq->sw_tx_ring[idx].skb = NULL; 388 txq->sw_tx_ring[idx].flags = 0; 389 } 390 391 static u32 qede_xmit_type(struct qede_dev *edev, 392 struct sk_buff *skb, int *ipv6_ext) 393 { 394 u32 rc = XMIT_L4_CSUM; 395 __be16 l3_proto; 396 397 if (skb->ip_summed != CHECKSUM_PARTIAL) 398 return XMIT_PLAIN; 399 400 l3_proto = vlan_get_protocol(skb); 401 if (l3_proto == htons(ETH_P_IPV6) && 402 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 403 *ipv6_ext = 1; 404 405 if (skb->encapsulation) { 406 rc |= XMIT_ENC; 407 if (skb_is_gso(skb)) { 408 unsigned short gso_type = skb_shinfo(skb)->gso_type; 409 410 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) || 411 (gso_type & SKB_GSO_GRE_CSUM)) 412 rc |= XMIT_ENC_GSO_L4_CSUM; 413 414 rc |= XMIT_LSO; 415 return rc; 416 } 417 } 418 419 if (skb_is_gso(skb)) 420 rc |= XMIT_LSO; 421 422 return rc; 423 } 424 425 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb, 426 struct eth_tx_2nd_bd *second_bd, 427 struct eth_tx_3rd_bd *third_bd) 428 { 429 u8 l4_proto; 430 u16 bd2_bits1 = 0, bd2_bits2 = 0; 431 432 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT); 433 434 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) & 435 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK) 436 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT; 437 438 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH << 439 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT); 440 441 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) 442 l4_proto = ipv6_hdr(skb)->nexthdr; 443 else 444 l4_proto = ip_hdr(skb)->protocol; 445 446 if (l4_proto == IPPROTO_UDP) 447 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT; 448 449 if (third_bd) 450 third_bd->data.bitfields |= 451 cpu_to_le16(((tcp_hdrlen(skb) / 4) & 452 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) << 453 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT); 454 455 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1); 456 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2); 457 } 458 459 static int map_frag_to_bd(struct qede_dev *edev, 460 skb_frag_t *frag, struct eth_tx_bd *bd) 461 { 462 dma_addr_t mapping; 463 464 /* Map skb non-linear frag data for DMA */ 465 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0, 466 skb_frag_size(frag), DMA_TO_DEVICE); 467 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 468 DP_NOTICE(edev, "Unable to map frag - dropping packet\n"); 469 return -ENOMEM; 470 } 471 472 /* Setup the data pointer of the frag data */ 473 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag)); 474 475 return 0; 476 } 477 478 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt) 479 { 480 if (is_encap_pkt) 481 return (skb_inner_transport_header(skb) + 482 inner_tcp_hdrlen(skb) - skb->data); 483 else 484 return (skb_transport_header(skb) + 485 tcp_hdrlen(skb) - skb->data); 486 } 487 488 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */ 489 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 490 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb, 491 u8 xmit_type) 492 { 493 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1; 494 495 if (xmit_type & XMIT_LSO) { 496 int hlen; 497 498 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC); 499 500 /* linear payload would require its own BD */ 501 if (skb_headlen(skb) > hlen) 502 allowed_frags--; 503 } 504 505 return (skb_shinfo(skb)->nr_frags > allowed_frags); 506 } 507 #endif 508 509 static inline void qede_update_tx_producer(struct qede_tx_queue *txq) 510 { 511 /* wmb makes sure that the BDs data is updated before updating the 512 * producer, otherwise FW may read old data from the BDs. 513 */ 514 wmb(); 515 barrier(); 516 writel(txq->tx_db.raw, txq->doorbell_addr); 517 518 /* mmiowb is needed to synchronize doorbell writes from more than one 519 * processor. It guarantees that the write arrives to the device before 520 * the queue lock is released and another start_xmit is called (possibly 521 * on another CPU). Without this barrier, the next doorbell can bypass 522 * this doorbell. This is applicable to IA64/Altix systems. 523 */ 524 mmiowb(); 525 } 526 527 /* Main transmit function */ 528 static netdev_tx_t qede_start_xmit(struct sk_buff *skb, 529 struct net_device *ndev) 530 { 531 struct qede_dev *edev = netdev_priv(ndev); 532 struct netdev_queue *netdev_txq; 533 struct qede_tx_queue *txq; 534 struct eth_tx_1st_bd *first_bd; 535 struct eth_tx_2nd_bd *second_bd = NULL; 536 struct eth_tx_3rd_bd *third_bd = NULL; 537 struct eth_tx_bd *tx_data_bd = NULL; 538 u16 txq_index; 539 u8 nbd = 0; 540 dma_addr_t mapping; 541 int rc, frag_idx = 0, ipv6_ext = 0; 542 u8 xmit_type; 543 u16 idx; 544 u16 hlen; 545 bool data_split = false; 546 547 /* Get tx-queue context and netdev index */ 548 txq_index = skb_get_queue_mapping(skb); 549 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev)); 550 txq = QEDE_TX_QUEUE(edev, txq_index); 551 netdev_txq = netdev_get_tx_queue(ndev, txq_index); 552 553 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1)); 554 555 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext); 556 557 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 558 if (qede_pkt_req_lin(edev, skb, xmit_type)) { 559 if (skb_linearize(skb)) { 560 DP_NOTICE(edev, 561 "SKB linearization failed - silently dropping this SKB\n"); 562 dev_kfree_skb_any(skb); 563 return NETDEV_TX_OK; 564 } 565 } 566 #endif 567 568 /* Fill the entry in the SW ring and the BDs in the FW ring */ 569 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 570 txq->sw_tx_ring[idx].skb = skb; 571 first_bd = (struct eth_tx_1st_bd *) 572 qed_chain_produce(&txq->tx_pbl); 573 memset(first_bd, 0, sizeof(*first_bd)); 574 first_bd->data.bd_flags.bitfields = 575 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 576 577 /* Map skb linear data for DMA and set in the first BD */ 578 mapping = dma_map_single(&edev->pdev->dev, skb->data, 579 skb_headlen(skb), DMA_TO_DEVICE); 580 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 581 DP_NOTICE(edev, "SKB mapping failed\n"); 582 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false); 583 qede_update_tx_producer(txq); 584 return NETDEV_TX_OK; 585 } 586 nbd++; 587 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 588 589 /* In case there is IPv6 with extension headers or LSO we need 2nd and 590 * 3rd BDs. 591 */ 592 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) { 593 second_bd = (struct eth_tx_2nd_bd *) 594 qed_chain_produce(&txq->tx_pbl); 595 memset(second_bd, 0, sizeof(*second_bd)); 596 597 nbd++; 598 third_bd = (struct eth_tx_3rd_bd *) 599 qed_chain_produce(&txq->tx_pbl); 600 memset(third_bd, 0, sizeof(*third_bd)); 601 602 nbd++; 603 /* We need to fill in additional data in second_bd... */ 604 tx_data_bd = (struct eth_tx_bd *)second_bd; 605 } 606 607 if (skb_vlan_tag_present(skb)) { 608 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 609 first_bd->data.bd_flags.bitfields |= 610 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT; 611 } 612 613 /* Fill the parsing flags & params according to the requested offload */ 614 if (xmit_type & XMIT_L4_CSUM) { 615 /* We don't re-calculate IP checksum as it is already done by 616 * the upper stack 617 */ 618 first_bd->data.bd_flags.bitfields |= 619 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT; 620 621 if (xmit_type & XMIT_ENC) { 622 first_bd->data.bd_flags.bitfields |= 623 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 624 first_bd->data.bitfields |= 625 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 626 } 627 628 /* Legacy FW had flipped behavior in regard to this bit - 629 * I.e., needed to set to prevent FW from touching encapsulated 630 * packets when it didn't need to. 631 */ 632 if (unlikely(txq->is_legacy)) 633 first_bd->data.bitfields ^= 634 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 635 636 /* If the packet is IPv6 with extension header, indicate that 637 * to FW and pass few params, since the device cracker doesn't 638 * support parsing IPv6 with extension header/s. 639 */ 640 if (unlikely(ipv6_ext)) 641 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd); 642 } 643 644 if (xmit_type & XMIT_LSO) { 645 first_bd->data.bd_flags.bitfields |= 646 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT); 647 third_bd->data.lso_mss = 648 cpu_to_le16(skb_shinfo(skb)->gso_size); 649 650 if (unlikely(xmit_type & XMIT_ENC)) { 651 first_bd->data.bd_flags.bitfields |= 652 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT; 653 654 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) { 655 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT; 656 657 first_bd->data.bd_flags.bitfields |= 1 << tmp; 658 } 659 hlen = qede_get_skb_hlen(skb, true); 660 } else { 661 first_bd->data.bd_flags.bitfields |= 662 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 663 hlen = qede_get_skb_hlen(skb, false); 664 } 665 666 /* @@@TBD - if will not be removed need to check */ 667 third_bd->data.bitfields |= 668 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT)); 669 670 /* Make life easier for FW guys who can't deal with header and 671 * data on same BD. If we need to split, use the second bd... 672 */ 673 if (unlikely(skb_headlen(skb) > hlen)) { 674 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 675 "TSO split header size is %d (%x:%x)\n", 676 first_bd->nbytes, first_bd->addr.hi, 677 first_bd->addr.lo); 678 679 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi), 680 le32_to_cpu(first_bd->addr.lo)) + 681 hlen; 682 683 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping, 684 le16_to_cpu(first_bd->nbytes) - 685 hlen); 686 687 /* this marks the BD as one that has no 688 * individual mapping 689 */ 690 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD; 691 692 first_bd->nbytes = cpu_to_le16(hlen); 693 694 tx_data_bd = (struct eth_tx_bd *)third_bd; 695 data_split = true; 696 } 697 } else { 698 first_bd->data.bitfields |= 699 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) << 700 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 701 } 702 703 /* Handle fragmented skb */ 704 /* special handle for frags inside 2nd and 3rd bds.. */ 705 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) { 706 rc = map_frag_to_bd(edev, 707 &skb_shinfo(skb)->frags[frag_idx], 708 tx_data_bd); 709 if (rc) { 710 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 711 data_split); 712 qede_update_tx_producer(txq); 713 return NETDEV_TX_OK; 714 } 715 716 if (tx_data_bd == (struct eth_tx_bd *)second_bd) 717 tx_data_bd = (struct eth_tx_bd *)third_bd; 718 else 719 tx_data_bd = NULL; 720 721 frag_idx++; 722 } 723 724 /* map last frags into 4th, 5th .... */ 725 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) { 726 tx_data_bd = (struct eth_tx_bd *) 727 qed_chain_produce(&txq->tx_pbl); 728 729 memset(tx_data_bd, 0, sizeof(*tx_data_bd)); 730 731 rc = map_frag_to_bd(edev, 732 &skb_shinfo(skb)->frags[frag_idx], 733 tx_data_bd); 734 if (rc) { 735 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 736 data_split); 737 qede_update_tx_producer(txq); 738 return NETDEV_TX_OK; 739 } 740 } 741 742 /* update the first BD with the actual num BDs */ 743 first_bd->data.nbds = nbd; 744 745 netdev_tx_sent_queue(netdev_txq, skb->len); 746 747 skb_tx_timestamp(skb); 748 749 /* Advance packet producer only before sending the packet since mapping 750 * of pages may fail. 751 */ 752 txq->sw_tx_prod++; 753 754 /* 'next page' entries are counted in the producer value */ 755 txq->tx_db.data.bd_prod = 756 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl)); 757 758 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq)) 759 qede_update_tx_producer(txq); 760 761 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl) 762 < (MAX_SKB_FRAGS + 1))) { 763 if (skb->xmit_more) 764 qede_update_tx_producer(txq); 765 766 netif_tx_stop_queue(netdev_txq); 767 txq->stopped_cnt++; 768 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 769 "Stop queue was called\n"); 770 /* paired memory barrier is in qede_tx_int(), we have to keep 771 * ordering of set_bit() in netif_tx_stop_queue() and read of 772 * fp->bd_tx_cons 773 */ 774 smp_mb(); 775 776 if (qed_chain_get_elem_left(&txq->tx_pbl) 777 >= (MAX_SKB_FRAGS + 1) && 778 (edev->state == QEDE_STATE_OPEN)) { 779 netif_tx_wake_queue(netdev_txq); 780 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 781 "Wake queue was called\n"); 782 } 783 } 784 785 return NETDEV_TX_OK; 786 } 787 788 int qede_txq_has_work(struct qede_tx_queue *txq) 789 { 790 u16 hw_bd_cons; 791 792 /* Tell compiler that consumer and producer can change */ 793 barrier(); 794 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 795 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1) 796 return 0; 797 798 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl); 799 } 800 801 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq) 802 { 803 struct netdev_queue *netdev_txq; 804 u16 hw_bd_cons; 805 unsigned int pkts_compl = 0, bytes_compl = 0; 806 int rc; 807 808 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index); 809 810 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 811 barrier(); 812 813 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) { 814 int len = 0; 815 816 rc = qede_free_tx_pkt(edev, txq, &len); 817 if (rc) { 818 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n", 819 hw_bd_cons, 820 qed_chain_get_cons_idx(&txq->tx_pbl)); 821 break; 822 } 823 824 bytes_compl += len; 825 pkts_compl++; 826 txq->sw_tx_cons++; 827 txq->xmit_pkts++; 828 } 829 830 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 831 832 /* Need to make the tx_bd_cons update visible to start_xmit() 833 * before checking for netif_tx_queue_stopped(). Without the 834 * memory barrier, there is a small possibility that 835 * start_xmit() will miss it and cause the queue to be stopped 836 * forever. 837 * On the other hand we need an rmb() here to ensure the proper 838 * ordering of bit testing in the following 839 * netif_tx_queue_stopped(txq) call. 840 */ 841 smp_mb(); 842 843 if (unlikely(netif_tx_queue_stopped(netdev_txq))) { 844 /* Taking tx_lock is needed to prevent reenabling the queue 845 * while it's empty. This could have happen if rx_action() gets 846 * suspended in qede_tx_int() after the condition before 847 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()): 848 * 849 * stops the queue->sees fresh tx_bd_cons->releases the queue-> 850 * sends some packets consuming the whole queue again-> 851 * stops the queue 852 */ 853 854 __netif_tx_lock(netdev_txq, smp_processor_id()); 855 856 if ((netif_tx_queue_stopped(netdev_txq)) && 857 (edev->state == QEDE_STATE_OPEN) && 858 (qed_chain_get_elem_left(&txq->tx_pbl) 859 >= (MAX_SKB_FRAGS + 1))) { 860 netif_tx_wake_queue(netdev_txq); 861 DP_VERBOSE(edev, NETIF_MSG_TX_DONE, 862 "Wake queue was called\n"); 863 } 864 865 __netif_tx_unlock(netdev_txq); 866 } 867 868 return 0; 869 } 870 871 bool qede_has_rx_work(struct qede_rx_queue *rxq) 872 { 873 u16 hw_comp_cons, sw_comp_cons; 874 875 /* Tell compiler that status block fields can change */ 876 barrier(); 877 878 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 879 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 880 881 return hw_comp_cons != sw_comp_cons; 882 } 883 884 static bool qede_has_tx_work(struct qede_fastpath *fp) 885 { 886 u8 tc; 887 888 for (tc = 0; tc < fp->edev->num_tc; tc++) 889 if (qede_txq_has_work(&fp->txqs[tc])) 890 return true; 891 return false; 892 } 893 894 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq) 895 { 896 qed_chain_consume(&rxq->rx_bd_ring); 897 rxq->sw_rx_cons++; 898 } 899 900 /* This function reuses the buffer(from an offset) from 901 * consumer index to producer index in the bd ring 902 */ 903 static inline void qede_reuse_page(struct qede_dev *edev, 904 struct qede_rx_queue *rxq, 905 struct sw_rx_data *curr_cons) 906 { 907 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 908 struct sw_rx_data *curr_prod; 909 dma_addr_t new_mapping; 910 911 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 912 *curr_prod = *curr_cons; 913 914 new_mapping = curr_prod->mapping + curr_prod->page_offset; 915 916 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping)); 917 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping)); 918 919 rxq->sw_rx_prod++; 920 curr_cons->data = NULL; 921 } 922 923 /* In case of allocation failures reuse buffers 924 * from consumer index to produce buffers for firmware 925 */ 926 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, 927 struct qede_dev *edev, u8 count) 928 { 929 struct sw_rx_data *curr_cons; 930 931 for (; count > 0; count--) { 932 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 933 qede_reuse_page(edev, rxq, curr_cons); 934 qede_rx_bd_ring_consume(rxq); 935 } 936 } 937 938 static inline int qede_realloc_rx_buffer(struct qede_dev *edev, 939 struct qede_rx_queue *rxq, 940 struct sw_rx_data *curr_cons) 941 { 942 /* Move to the next segment in the page */ 943 curr_cons->page_offset += rxq->rx_buf_seg_size; 944 945 if (curr_cons->page_offset == PAGE_SIZE) { 946 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 947 /* Since we failed to allocate new buffer 948 * current buffer can be used again. 949 */ 950 curr_cons->page_offset -= rxq->rx_buf_seg_size; 951 952 return -ENOMEM; 953 } 954 955 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping, 956 PAGE_SIZE, DMA_FROM_DEVICE); 957 } else { 958 /* Increment refcount of the page as we don't want 959 * network stack to take the ownership of the page 960 * which can be recycled multiple times by the driver. 961 */ 962 page_ref_inc(curr_cons->data); 963 qede_reuse_page(edev, rxq, curr_cons); 964 } 965 966 return 0; 967 } 968 969 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq) 970 { 971 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring); 972 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring); 973 struct eth_rx_prod_data rx_prods = {0}; 974 975 /* Update producers */ 976 rx_prods.bd_prod = cpu_to_le16(bd_prod); 977 rx_prods.cqe_prod = cpu_to_le16(cqe_prod); 978 979 /* Make sure that the BD and SGE data is updated before updating the 980 * producers since FW might read the BD/SGE right after the producer 981 * is updated. 982 */ 983 wmb(); 984 985 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods), 986 (u32 *)&rx_prods); 987 988 /* mmiowb is needed to synchronize doorbell writes from more than one 989 * processor. It guarantees that the write arrives to the device before 990 * the napi lock is released and another qede_poll is called (possibly 991 * on another CPU). Without this barrier, the next doorbell can bypass 992 * this doorbell. This is applicable to IA64/Altix systems. 993 */ 994 mmiowb(); 995 } 996 997 static u32 qede_get_rxhash(struct qede_dev *edev, 998 u8 bitfields, 999 __le32 rss_hash, enum pkt_hash_types *rxhash_type) 1000 { 1001 enum rss_hash_type htype; 1002 1003 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE); 1004 1005 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) { 1006 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) || 1007 (htype == RSS_HASH_TYPE_IPV6)) ? 1008 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4; 1009 return le32_to_cpu(rss_hash); 1010 } 1011 *rxhash_type = PKT_HASH_TYPE_NONE; 1012 return 0; 1013 } 1014 1015 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag) 1016 { 1017 skb_checksum_none_assert(skb); 1018 1019 if (csum_flag & QEDE_CSUM_UNNECESSARY) 1020 skb->ip_summed = CHECKSUM_UNNECESSARY; 1021 1022 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) 1023 skb->csum_level = 1; 1024 } 1025 1026 static inline void qede_skb_receive(struct qede_dev *edev, 1027 struct qede_fastpath *fp, 1028 struct sk_buff *skb, u16 vlan_tag) 1029 { 1030 if (vlan_tag) 1031 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1032 1033 napi_gro_receive(&fp->napi, skb); 1034 } 1035 1036 static void qede_set_gro_params(struct qede_dev *edev, 1037 struct sk_buff *skb, 1038 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1039 { 1040 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags); 1041 1042 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & 1043 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2) 1044 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 1045 else 1046 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1047 1048 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) - 1049 cqe->header_len; 1050 } 1051 1052 static int qede_fill_frag_skb(struct qede_dev *edev, 1053 struct qede_rx_queue *rxq, 1054 u8 tpa_agg_index, u16 len_on_bd) 1055 { 1056 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons & 1057 NUM_RX_BDS_MAX]; 1058 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index]; 1059 struct sk_buff *skb = tpa_info->skb; 1060 1061 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1062 goto out; 1063 1064 /* Add one frag and update the appropriate fields in the skb */ 1065 skb_fill_page_desc(skb, tpa_info->frag_id++, 1066 current_bd->data, current_bd->page_offset, 1067 len_on_bd); 1068 1069 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) { 1070 /* Incr page ref count to reuse on allocation failure 1071 * so that it doesn't get freed while freeing SKB. 1072 */ 1073 page_ref_inc(current_bd->data); 1074 goto out; 1075 } 1076 1077 qed_chain_consume(&rxq->rx_bd_ring); 1078 rxq->sw_rx_cons++; 1079 1080 skb->data_len += len_on_bd; 1081 skb->truesize += rxq->rx_buf_seg_size; 1082 skb->len += len_on_bd; 1083 1084 return 0; 1085 1086 out: 1087 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1088 qede_recycle_rx_bd_ring(rxq, edev, 1); 1089 return -ENOMEM; 1090 } 1091 1092 static void qede_tpa_start(struct qede_dev *edev, 1093 struct qede_rx_queue *rxq, 1094 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1095 { 1096 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1097 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring); 1098 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 1099 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 1100 dma_addr_t mapping = tpa_info->replace_buf_mapping; 1101 struct sw_rx_data *sw_rx_data_cons; 1102 struct sw_rx_data *sw_rx_data_prod; 1103 enum pkt_hash_types rxhash_type; 1104 u32 rxhash; 1105 1106 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 1107 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 1108 1109 /* Use pre-allocated replacement buffer - we can't release the agg. 1110 * start until its over and we don't want to risk allocation failing 1111 * here, so re-allocate when aggregation will be over. 1112 */ 1113 sw_rx_data_prod->mapping = replace_buf->mapping; 1114 1115 sw_rx_data_prod->data = replace_buf->data; 1116 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 1117 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 1118 sw_rx_data_prod->page_offset = replace_buf->page_offset; 1119 1120 rxq->sw_rx_prod++; 1121 1122 /* move partial skb from cons to pool (don't unmap yet) 1123 * save mapping, incase we drop the packet later on. 1124 */ 1125 tpa_info->start_buf = *sw_rx_data_cons; 1126 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi), 1127 le32_to_cpu(rx_bd_cons->addr.lo)); 1128 1129 tpa_info->start_buf_mapping = mapping; 1130 rxq->sw_rx_cons++; 1131 1132 /* set tpa state to start only if we are able to allocate skb 1133 * for this aggregation, otherwise mark as error and aggregation will 1134 * be dropped 1135 */ 1136 tpa_info->skb = netdev_alloc_skb(edev->ndev, 1137 le16_to_cpu(cqe->len_on_first_bd)); 1138 if (unlikely(!tpa_info->skb)) { 1139 DP_NOTICE(edev, "Failed to allocate SKB for gro\n"); 1140 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1141 goto cons_buf; 1142 } 1143 1144 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd)); 1145 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe)); 1146 1147 /* Start filling in the aggregation info */ 1148 tpa_info->frag_id = 0; 1149 tpa_info->agg_state = QEDE_AGG_STATE_START; 1150 1151 rxhash = qede_get_rxhash(edev, cqe->bitfields, 1152 cqe->rss_hash, &rxhash_type); 1153 skb_set_hash(tpa_info->skb, rxhash, rxhash_type); 1154 if ((le16_to_cpu(cqe->pars_flags.flags) >> 1155 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) & 1156 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK) 1157 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); 1158 else 1159 tpa_info->vlan_tag = 0; 1160 1161 /* This is needed in order to enable forwarding support */ 1162 qede_set_gro_params(edev, tpa_info->skb, cqe); 1163 1164 cons_buf: /* We still need to handle bd_len_list to consume buffers */ 1165 if (likely(cqe->ext_bd_len_list[0])) 1166 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1167 le16_to_cpu(cqe->ext_bd_len_list[0])); 1168 1169 if (unlikely(cqe->ext_bd_len_list[1])) { 1170 DP_ERR(edev, 1171 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n"); 1172 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1173 } 1174 } 1175 1176 #ifdef CONFIG_INET 1177 static void qede_gro_ip_csum(struct sk_buff *skb) 1178 { 1179 const struct iphdr *iph = ip_hdr(skb); 1180 struct tcphdr *th; 1181 1182 skb_set_transport_header(skb, sizeof(struct iphdr)); 1183 th = tcp_hdr(skb); 1184 1185 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb), 1186 iph->saddr, iph->daddr, 0); 1187 1188 tcp_gro_complete(skb); 1189 } 1190 1191 static void qede_gro_ipv6_csum(struct sk_buff *skb) 1192 { 1193 struct ipv6hdr *iph = ipv6_hdr(skb); 1194 struct tcphdr *th; 1195 1196 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 1197 th = tcp_hdr(skb); 1198 1199 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb), 1200 &iph->saddr, &iph->daddr, 0); 1201 tcp_gro_complete(skb); 1202 } 1203 #endif 1204 1205 static void qede_gro_receive(struct qede_dev *edev, 1206 struct qede_fastpath *fp, 1207 struct sk_buff *skb, 1208 u16 vlan_tag) 1209 { 1210 /* FW can send a single MTU sized packet from gro flow 1211 * due to aggregation timeout/last segment etc. which 1212 * is not expected to be a gro packet. If a skb has zero 1213 * frags then simply push it in the stack as non gso skb. 1214 */ 1215 if (unlikely(!skb->data_len)) { 1216 skb_shinfo(skb)->gso_type = 0; 1217 skb_shinfo(skb)->gso_size = 0; 1218 goto send_skb; 1219 } 1220 1221 #ifdef CONFIG_INET 1222 if (skb_shinfo(skb)->gso_size) { 1223 skb_set_network_header(skb, 0); 1224 1225 switch (skb->protocol) { 1226 case htons(ETH_P_IP): 1227 qede_gro_ip_csum(skb); 1228 break; 1229 case htons(ETH_P_IPV6): 1230 qede_gro_ipv6_csum(skb); 1231 break; 1232 default: 1233 DP_ERR(edev, 1234 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n", 1235 ntohs(skb->protocol)); 1236 } 1237 } 1238 #endif 1239 1240 send_skb: 1241 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1242 qede_skb_receive(edev, fp, skb, vlan_tag); 1243 } 1244 1245 static inline void qede_tpa_cont(struct qede_dev *edev, 1246 struct qede_rx_queue *rxq, 1247 struct eth_fast_path_rx_tpa_cont_cqe *cqe) 1248 { 1249 int i; 1250 1251 for (i = 0; cqe->len_list[i]; i++) 1252 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1253 le16_to_cpu(cqe->len_list[i])); 1254 1255 if (unlikely(i > 1)) 1256 DP_ERR(edev, 1257 "Strange - TPA cont with more than a single len_list entry\n"); 1258 } 1259 1260 static void qede_tpa_end(struct qede_dev *edev, 1261 struct qede_fastpath *fp, 1262 struct eth_fast_path_rx_tpa_end_cqe *cqe) 1263 { 1264 struct qede_rx_queue *rxq = fp->rxq; 1265 struct qede_agg_info *tpa_info; 1266 struct sk_buff *skb; 1267 int i; 1268 1269 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1270 skb = tpa_info->skb; 1271 1272 for (i = 0; cqe->len_list[i]; i++) 1273 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1274 le16_to_cpu(cqe->len_list[i])); 1275 if (unlikely(i > 1)) 1276 DP_ERR(edev, 1277 "Strange - TPA emd with more than a single len_list entry\n"); 1278 1279 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1280 goto err; 1281 1282 /* Sanity */ 1283 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1)) 1284 DP_ERR(edev, 1285 "Strange - TPA had %02x BDs, but SKB has only %d frags\n", 1286 cqe->num_of_bds, tpa_info->frag_id); 1287 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len))) 1288 DP_ERR(edev, 1289 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n", 1290 le16_to_cpu(cqe->total_packet_len), skb->len); 1291 1292 memcpy(skb->data, 1293 page_address(tpa_info->start_buf.data) + 1294 tpa_info->start_cqe.placement_offset + 1295 tpa_info->start_buf.page_offset, 1296 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd)); 1297 1298 /* Recycle [mapped] start buffer for the next replacement */ 1299 tpa_info->replace_buf = tpa_info->start_buf; 1300 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1301 1302 /* Finalize the SKB */ 1303 skb->protocol = eth_type_trans(skb, edev->ndev); 1304 skb->ip_summed = CHECKSUM_UNNECESSARY; 1305 1306 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count 1307 * to skb_shinfo(skb)->gso_segs 1308 */ 1309 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs); 1310 1311 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag); 1312 1313 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1314 1315 return; 1316 err: 1317 /* The BD starting the aggregation is still mapped; Re-use it for 1318 * future aggregations [as replacement buffer] 1319 */ 1320 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf, 1321 sizeof(struct sw_rx_data)); 1322 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1323 tpa_info->start_buf.data = NULL; 1324 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1325 dev_kfree_skb_any(tpa_info->skb); 1326 tpa_info->skb = NULL; 1327 } 1328 1329 static bool qede_tunn_exist(u16 flag) 1330 { 1331 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK << 1332 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT)); 1333 } 1334 1335 static u8 qede_check_tunn_csum(u16 flag) 1336 { 1337 u16 csum_flag = 0; 1338 u8 tcsum = 0; 1339 1340 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK << 1341 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT)) 1342 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK << 1343 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT; 1344 1345 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1346 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1347 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1348 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1349 tcsum = QEDE_TUNN_CSUM_UNNECESSARY; 1350 } 1351 1352 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK << 1353 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT | 1354 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1355 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1356 1357 if (csum_flag & flag) 1358 return QEDE_CSUM_ERROR; 1359 1360 return QEDE_CSUM_UNNECESSARY | tcsum; 1361 } 1362 1363 static u8 qede_check_notunn_csum(u16 flag) 1364 { 1365 u16 csum_flag = 0; 1366 u8 csum = 0; 1367 1368 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1369 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1370 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1371 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1372 csum = QEDE_CSUM_UNNECESSARY; 1373 } 1374 1375 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1376 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1377 1378 if (csum_flag & flag) 1379 return QEDE_CSUM_ERROR; 1380 1381 return csum; 1382 } 1383 1384 static u8 qede_check_csum(u16 flag) 1385 { 1386 if (!qede_tunn_exist(flag)) 1387 return qede_check_notunn_csum(flag); 1388 else 1389 return qede_check_tunn_csum(flag); 1390 } 1391 1392 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe, 1393 u16 flag) 1394 { 1395 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags; 1396 1397 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK << 1398 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) || 1399 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK << 1400 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT))) 1401 return true; 1402 1403 return false; 1404 } 1405 1406 static int qede_rx_int(struct qede_fastpath *fp, int budget) 1407 { 1408 struct qede_dev *edev = fp->edev; 1409 struct qede_rx_queue *rxq = fp->rxq; 1410 1411 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag; 1412 int rx_pkt = 0; 1413 u8 csum_flag; 1414 1415 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1416 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1417 1418 /* Memory barrier to prevent the CPU from doing speculative reads of CQE 1419 * / BD in the while-loop before reading hw_comp_cons. If the CQE is 1420 * read before it is written by FW, then FW writes CQE and SB, and then 1421 * the CPU reads the hw_comp_cons, it will use an old CQE. 1422 */ 1423 rmb(); 1424 1425 /* Loop to complete all indicated BDs */ 1426 while (sw_comp_cons != hw_comp_cons) { 1427 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1428 enum pkt_hash_types rxhash_type; 1429 enum eth_rx_cqe_type cqe_type; 1430 struct sw_rx_data *sw_rx_data; 1431 union eth_rx_cqe *cqe; 1432 struct sk_buff *skb; 1433 struct page *data; 1434 __le16 flags; 1435 u16 len, pad; 1436 u32 rx_hash; 1437 1438 /* Get the CQE from the completion ring */ 1439 cqe = (union eth_rx_cqe *) 1440 qed_chain_consume(&rxq->rx_comp_ring); 1441 cqe_type = cqe->fast_path_regular.type; 1442 1443 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) { 1444 edev->ops->eth_cqe_completion( 1445 edev->cdev, fp->id, 1446 (struct eth_slow_path_rx_cqe *)cqe); 1447 goto next_cqe; 1448 } 1449 1450 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) { 1451 switch (cqe_type) { 1452 case ETH_RX_CQE_TYPE_TPA_START: 1453 qede_tpa_start(edev, rxq, 1454 &cqe->fast_path_tpa_start); 1455 goto next_cqe; 1456 case ETH_RX_CQE_TYPE_TPA_CONT: 1457 qede_tpa_cont(edev, rxq, 1458 &cqe->fast_path_tpa_cont); 1459 goto next_cqe; 1460 case ETH_RX_CQE_TYPE_TPA_END: 1461 qede_tpa_end(edev, fp, 1462 &cqe->fast_path_tpa_end); 1463 goto next_rx_only; 1464 default: 1465 break; 1466 } 1467 } 1468 1469 /* Get the data from the SW ring */ 1470 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1471 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1472 data = sw_rx_data->data; 1473 1474 fp_cqe = &cqe->fast_path_regular; 1475 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1476 pad = fp_cqe->placement_offset; 1477 flags = cqe->fast_path_regular.pars_flags.flags; 1478 1479 /* If this is an error packet then drop it */ 1480 parse_flag = le16_to_cpu(flags); 1481 1482 csum_flag = qede_check_csum(parse_flag); 1483 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) { 1484 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular, 1485 parse_flag)) { 1486 rxq->rx_ip_frags++; 1487 goto alloc_skb; 1488 } 1489 1490 DP_NOTICE(edev, 1491 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n", 1492 sw_comp_cons, parse_flag); 1493 rxq->rx_hw_errors++; 1494 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1495 goto next_cqe; 1496 } 1497 1498 alloc_skb: 1499 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE); 1500 if (unlikely(!skb)) { 1501 DP_NOTICE(edev, 1502 "skb allocation failed, dropping incoming packet\n"); 1503 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1504 rxq->rx_alloc_errors++; 1505 goto next_cqe; 1506 } 1507 1508 /* Copy data into SKB */ 1509 if (len + pad <= edev->rx_copybreak) { 1510 memcpy(skb_put(skb, len), 1511 page_address(data) + pad + 1512 sw_rx_data->page_offset, len); 1513 qede_reuse_page(edev, rxq, sw_rx_data); 1514 } else { 1515 struct skb_frag_struct *frag; 1516 unsigned int pull_len; 1517 unsigned char *va; 1518 1519 frag = &skb_shinfo(skb)->frags[0]; 1520 1521 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data, 1522 pad + sw_rx_data->page_offset, 1523 len, rxq->rx_buf_seg_size); 1524 1525 va = skb_frag_address(frag); 1526 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE); 1527 1528 /* Align the pull_len to optimize memcpy */ 1529 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long))); 1530 1531 skb_frag_size_sub(frag, pull_len); 1532 frag->page_offset += pull_len; 1533 skb->data_len -= pull_len; 1534 skb->tail += pull_len; 1535 1536 if (unlikely(qede_realloc_rx_buffer(edev, rxq, 1537 sw_rx_data))) { 1538 DP_ERR(edev, "Failed to allocate rx buffer\n"); 1539 /* Incr page ref count to reuse on allocation 1540 * failure so that it doesn't get freed while 1541 * freeing SKB. 1542 */ 1543 1544 page_ref_inc(sw_rx_data->data); 1545 rxq->rx_alloc_errors++; 1546 qede_recycle_rx_bd_ring(rxq, edev, 1547 fp_cqe->bd_num); 1548 dev_kfree_skb_any(skb); 1549 goto next_cqe; 1550 } 1551 } 1552 1553 qede_rx_bd_ring_consume(rxq); 1554 1555 if (fp_cqe->bd_num != 1) { 1556 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len); 1557 u8 num_frags; 1558 1559 pkt_len -= len; 1560 1561 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0; 1562 num_frags--) { 1563 u16 cur_size = pkt_len > rxq->rx_buf_size ? 1564 rxq->rx_buf_size : pkt_len; 1565 if (unlikely(!cur_size)) { 1566 DP_ERR(edev, 1567 "Still got %d BDs for mapping jumbo, but length became 0\n", 1568 num_frags); 1569 qede_recycle_rx_bd_ring(rxq, edev, 1570 num_frags); 1571 dev_kfree_skb_any(skb); 1572 goto next_cqe; 1573 } 1574 1575 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 1576 qede_recycle_rx_bd_ring(rxq, edev, 1577 num_frags); 1578 dev_kfree_skb_any(skb); 1579 goto next_cqe; 1580 } 1581 1582 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1583 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1584 qede_rx_bd_ring_consume(rxq); 1585 1586 dma_unmap_page(&edev->pdev->dev, 1587 sw_rx_data->mapping, 1588 PAGE_SIZE, DMA_FROM_DEVICE); 1589 1590 skb_fill_page_desc(skb, 1591 skb_shinfo(skb)->nr_frags++, 1592 sw_rx_data->data, 0, 1593 cur_size); 1594 1595 skb->truesize += PAGE_SIZE; 1596 skb->data_len += cur_size; 1597 skb->len += cur_size; 1598 pkt_len -= cur_size; 1599 } 1600 1601 if (unlikely(pkt_len)) 1602 DP_ERR(edev, 1603 "Mapped all BDs of jumbo, but still have %d bytes\n", 1604 pkt_len); 1605 } 1606 1607 skb->protocol = eth_type_trans(skb, edev->ndev); 1608 1609 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields, 1610 fp_cqe->rss_hash, &rxhash_type); 1611 1612 skb_set_hash(skb, rx_hash, rxhash_type); 1613 1614 qede_set_skb_csum(skb, csum_flag); 1615 1616 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1617 1618 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag)); 1619 next_rx_only: 1620 rx_pkt++; 1621 1622 next_cqe: /* don't consume bd rx buffer */ 1623 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1624 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1625 /* CR TPA - revisit how to handle budget in TPA perhaps 1626 * increase on "end" 1627 */ 1628 if (rx_pkt == budget) 1629 break; 1630 } /* repeat while sw_comp_cons != hw_comp_cons... */ 1631 1632 /* Update producers */ 1633 qede_update_rx_prod(edev, rxq); 1634 1635 rxq->rcv_pkts += rx_pkt; 1636 1637 return rx_pkt; 1638 } 1639 1640 static int qede_poll(struct napi_struct *napi, int budget) 1641 { 1642 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath, 1643 napi); 1644 struct qede_dev *edev = fp->edev; 1645 int rx_work_done = 0; 1646 u8 tc; 1647 1648 for (tc = 0; tc < edev->num_tc; tc++) 1649 if (likely(fp->type & QEDE_FASTPATH_TX) && 1650 qede_txq_has_work(&fp->txqs[tc])) 1651 qede_tx_int(edev, &fp->txqs[tc]); 1652 1653 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) && 1654 qede_has_rx_work(fp->rxq)) ? 1655 qede_rx_int(fp, budget) : 0; 1656 if (rx_work_done < budget) { 1657 qed_sb_update_sb_idx(fp->sb_info); 1658 /* *_has_*_work() reads the status block, 1659 * thus we need to ensure that status block indices 1660 * have been actually read (qed_sb_update_sb_idx) 1661 * prior to this check (*_has_*_work) so that 1662 * we won't write the "newer" value of the status block 1663 * to HW (if there was a DMA right after 1664 * qede_has_rx_work and if there is no rmb, the memory 1665 * reading (qed_sb_update_sb_idx) may be postponed 1666 * to right before *_ack_sb). In this case there 1667 * will never be another interrupt until there is 1668 * another update of the status block, while there 1669 * is still unhandled work. 1670 */ 1671 rmb(); 1672 1673 /* Fall out from the NAPI loop if needed */ 1674 if (!((likely(fp->type & QEDE_FASTPATH_RX) && 1675 qede_has_rx_work(fp->rxq)) || 1676 (likely(fp->type & QEDE_FASTPATH_TX) && 1677 qede_has_tx_work(fp)))) { 1678 napi_complete(napi); 1679 1680 /* Update and reenable interrupts */ 1681 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1682 1 /*update*/); 1683 } else { 1684 rx_work_done = budget; 1685 } 1686 } 1687 1688 return rx_work_done; 1689 } 1690 1691 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie) 1692 { 1693 struct qede_fastpath *fp = fp_cookie; 1694 1695 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/); 1696 1697 napi_schedule_irqoff(&fp->napi); 1698 return IRQ_HANDLED; 1699 } 1700 1701 /* ------------------------------------------------------------------------- 1702 * END OF FAST-PATH 1703 * ------------------------------------------------------------------------- 1704 */ 1705 1706 static int qede_open(struct net_device *ndev); 1707 static int qede_close(struct net_device *ndev); 1708 static int qede_set_mac_addr(struct net_device *ndev, void *p); 1709 static void qede_set_rx_mode(struct net_device *ndev); 1710 static void qede_config_rx_mode(struct net_device *ndev); 1711 1712 static int qede_set_ucast_rx_mac(struct qede_dev *edev, 1713 enum qed_filter_xcast_params_type opcode, 1714 unsigned char mac[ETH_ALEN]) 1715 { 1716 struct qed_filter_params filter_cmd; 1717 1718 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1719 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1720 filter_cmd.filter.ucast.type = opcode; 1721 filter_cmd.filter.ucast.mac_valid = 1; 1722 ether_addr_copy(filter_cmd.filter.ucast.mac, mac); 1723 1724 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1725 } 1726 1727 static int qede_set_ucast_rx_vlan(struct qede_dev *edev, 1728 enum qed_filter_xcast_params_type opcode, 1729 u16 vid) 1730 { 1731 struct qed_filter_params filter_cmd; 1732 1733 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1734 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1735 filter_cmd.filter.ucast.type = opcode; 1736 filter_cmd.filter.ucast.vlan_valid = 1; 1737 filter_cmd.filter.ucast.vlan = vid; 1738 1739 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1740 } 1741 1742 void qede_fill_by_demand_stats(struct qede_dev *edev) 1743 { 1744 struct qed_eth_stats stats; 1745 1746 edev->ops->get_vport_stats(edev->cdev, &stats); 1747 edev->stats.no_buff_discards = stats.no_buff_discards; 1748 edev->stats.packet_too_big_discard = stats.packet_too_big_discard; 1749 edev->stats.ttl0_discard = stats.ttl0_discard; 1750 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes; 1751 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes; 1752 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes; 1753 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts; 1754 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts; 1755 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts; 1756 edev->stats.mftag_filter_discards = stats.mftag_filter_discards; 1757 edev->stats.mac_filter_discards = stats.mac_filter_discards; 1758 1759 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes; 1760 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes; 1761 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes; 1762 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts; 1763 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts; 1764 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts; 1765 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts; 1766 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts; 1767 edev->stats.coalesced_events = stats.tpa_coalesced_events; 1768 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num; 1769 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts; 1770 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes; 1771 1772 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets; 1773 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets; 1774 edev->stats.rx_128_to_255_byte_packets = 1775 stats.rx_128_to_255_byte_packets; 1776 edev->stats.rx_256_to_511_byte_packets = 1777 stats.rx_256_to_511_byte_packets; 1778 edev->stats.rx_512_to_1023_byte_packets = 1779 stats.rx_512_to_1023_byte_packets; 1780 edev->stats.rx_1024_to_1518_byte_packets = 1781 stats.rx_1024_to_1518_byte_packets; 1782 edev->stats.rx_1519_to_1522_byte_packets = 1783 stats.rx_1519_to_1522_byte_packets; 1784 edev->stats.rx_1519_to_2047_byte_packets = 1785 stats.rx_1519_to_2047_byte_packets; 1786 edev->stats.rx_2048_to_4095_byte_packets = 1787 stats.rx_2048_to_4095_byte_packets; 1788 edev->stats.rx_4096_to_9216_byte_packets = 1789 stats.rx_4096_to_9216_byte_packets; 1790 edev->stats.rx_9217_to_16383_byte_packets = 1791 stats.rx_9217_to_16383_byte_packets; 1792 edev->stats.rx_crc_errors = stats.rx_crc_errors; 1793 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames; 1794 edev->stats.rx_pause_frames = stats.rx_pause_frames; 1795 edev->stats.rx_pfc_frames = stats.rx_pfc_frames; 1796 edev->stats.rx_align_errors = stats.rx_align_errors; 1797 edev->stats.rx_carrier_errors = stats.rx_carrier_errors; 1798 edev->stats.rx_oversize_packets = stats.rx_oversize_packets; 1799 edev->stats.rx_jabbers = stats.rx_jabbers; 1800 edev->stats.rx_undersize_packets = stats.rx_undersize_packets; 1801 edev->stats.rx_fragments = stats.rx_fragments; 1802 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets; 1803 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets; 1804 edev->stats.tx_128_to_255_byte_packets = 1805 stats.tx_128_to_255_byte_packets; 1806 edev->stats.tx_256_to_511_byte_packets = 1807 stats.tx_256_to_511_byte_packets; 1808 edev->stats.tx_512_to_1023_byte_packets = 1809 stats.tx_512_to_1023_byte_packets; 1810 edev->stats.tx_1024_to_1518_byte_packets = 1811 stats.tx_1024_to_1518_byte_packets; 1812 edev->stats.tx_1519_to_2047_byte_packets = 1813 stats.tx_1519_to_2047_byte_packets; 1814 edev->stats.tx_2048_to_4095_byte_packets = 1815 stats.tx_2048_to_4095_byte_packets; 1816 edev->stats.tx_4096_to_9216_byte_packets = 1817 stats.tx_4096_to_9216_byte_packets; 1818 edev->stats.tx_9217_to_16383_byte_packets = 1819 stats.tx_9217_to_16383_byte_packets; 1820 edev->stats.tx_pause_frames = stats.tx_pause_frames; 1821 edev->stats.tx_pfc_frames = stats.tx_pfc_frames; 1822 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count; 1823 edev->stats.tx_total_collisions = stats.tx_total_collisions; 1824 edev->stats.brb_truncates = stats.brb_truncates; 1825 edev->stats.brb_discards = stats.brb_discards; 1826 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames; 1827 } 1828 1829 static 1830 struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev, 1831 struct rtnl_link_stats64 *stats) 1832 { 1833 struct qede_dev *edev = netdev_priv(dev); 1834 1835 qede_fill_by_demand_stats(edev); 1836 1837 stats->rx_packets = edev->stats.rx_ucast_pkts + 1838 edev->stats.rx_mcast_pkts + 1839 edev->stats.rx_bcast_pkts; 1840 stats->tx_packets = edev->stats.tx_ucast_pkts + 1841 edev->stats.tx_mcast_pkts + 1842 edev->stats.tx_bcast_pkts; 1843 1844 stats->rx_bytes = edev->stats.rx_ucast_bytes + 1845 edev->stats.rx_mcast_bytes + 1846 edev->stats.rx_bcast_bytes; 1847 1848 stats->tx_bytes = edev->stats.tx_ucast_bytes + 1849 edev->stats.tx_mcast_bytes + 1850 edev->stats.tx_bcast_bytes; 1851 1852 stats->tx_errors = edev->stats.tx_err_drop_pkts; 1853 stats->multicast = edev->stats.rx_mcast_pkts + 1854 edev->stats.rx_bcast_pkts; 1855 1856 stats->rx_fifo_errors = edev->stats.no_buff_discards; 1857 1858 stats->collisions = edev->stats.tx_total_collisions; 1859 stats->rx_crc_errors = edev->stats.rx_crc_errors; 1860 stats->rx_frame_errors = edev->stats.rx_align_errors; 1861 1862 return stats; 1863 } 1864 1865 #ifdef CONFIG_QED_SRIOV 1866 static int qede_get_vf_config(struct net_device *dev, int vfidx, 1867 struct ifla_vf_info *ivi) 1868 { 1869 struct qede_dev *edev = netdev_priv(dev); 1870 1871 if (!edev->ops) 1872 return -EINVAL; 1873 1874 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 1875 } 1876 1877 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 1878 int min_tx_rate, int max_tx_rate) 1879 { 1880 struct qede_dev *edev = netdev_priv(dev); 1881 1882 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 1883 max_tx_rate); 1884 } 1885 1886 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 1887 { 1888 struct qede_dev *edev = netdev_priv(dev); 1889 1890 if (!edev->ops) 1891 return -EINVAL; 1892 1893 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 1894 } 1895 1896 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 1897 int link_state) 1898 { 1899 struct qede_dev *edev = netdev_priv(dev); 1900 1901 if (!edev->ops) 1902 return -EINVAL; 1903 1904 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 1905 } 1906 #endif 1907 1908 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action) 1909 { 1910 struct qed_update_vport_params params; 1911 int rc; 1912 1913 /* Proceed only if action actually needs to be performed */ 1914 if (edev->accept_any_vlan == action) 1915 return; 1916 1917 memset(¶ms, 0, sizeof(params)); 1918 1919 params.vport_id = 0; 1920 params.accept_any_vlan = action; 1921 params.update_accept_any_vlan_flg = 1; 1922 1923 rc = edev->ops->vport_update(edev->cdev, ¶ms); 1924 if (rc) { 1925 DP_ERR(edev, "Failed to %s accept-any-vlan\n", 1926 action ? "enable" : "disable"); 1927 } else { 1928 DP_INFO(edev, "%s accept-any-vlan\n", 1929 action ? "enabled" : "disabled"); 1930 edev->accept_any_vlan = action; 1931 } 1932 } 1933 1934 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) 1935 { 1936 struct qede_dev *edev = netdev_priv(dev); 1937 struct qede_vlan *vlan, *tmp; 1938 int rc; 1939 1940 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid); 1941 1942 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL); 1943 if (!vlan) { 1944 DP_INFO(edev, "Failed to allocate struct for vlan\n"); 1945 return -ENOMEM; 1946 } 1947 INIT_LIST_HEAD(&vlan->list); 1948 vlan->vid = vid; 1949 vlan->configured = false; 1950 1951 /* Verify vlan isn't already configured */ 1952 list_for_each_entry(tmp, &edev->vlan_list, list) { 1953 if (tmp->vid == vlan->vid) { 1954 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1955 "vlan already configured\n"); 1956 kfree(vlan); 1957 return -EEXIST; 1958 } 1959 } 1960 1961 /* If interface is down, cache this VLAN ID and return */ 1962 if (edev->state != QEDE_STATE_OPEN) { 1963 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1964 "Interface is down, VLAN %d will be configured when interface is up\n", 1965 vid); 1966 if (vid != 0) 1967 edev->non_configured_vlans++; 1968 list_add(&vlan->list, &edev->vlan_list); 1969 1970 return 0; 1971 } 1972 1973 /* Check for the filter limit. 1974 * Note - vlan0 has a reserved filter and can be added without 1975 * worrying about quota 1976 */ 1977 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) || 1978 (vlan->vid == 0)) { 1979 rc = qede_set_ucast_rx_vlan(edev, 1980 QED_FILTER_XCAST_TYPE_ADD, 1981 vlan->vid); 1982 if (rc) { 1983 DP_ERR(edev, "Failed to configure VLAN %d\n", 1984 vlan->vid); 1985 kfree(vlan); 1986 return -EINVAL; 1987 } 1988 vlan->configured = true; 1989 1990 /* vlan0 filter isn't consuming out of our quota */ 1991 if (vlan->vid != 0) 1992 edev->configured_vlans++; 1993 } else { 1994 /* Out of quota; Activate accept-any-VLAN mode */ 1995 if (!edev->non_configured_vlans) 1996 qede_config_accept_any_vlan(edev, true); 1997 1998 edev->non_configured_vlans++; 1999 } 2000 2001 list_add(&vlan->list, &edev->vlan_list); 2002 2003 return 0; 2004 } 2005 2006 static void qede_del_vlan_from_list(struct qede_dev *edev, 2007 struct qede_vlan *vlan) 2008 { 2009 /* vlan0 filter isn't consuming out of our quota */ 2010 if (vlan->vid != 0) { 2011 if (vlan->configured) 2012 edev->configured_vlans--; 2013 else 2014 edev->non_configured_vlans--; 2015 } 2016 2017 list_del(&vlan->list); 2018 kfree(vlan); 2019 } 2020 2021 static int qede_configure_vlan_filters(struct qede_dev *edev) 2022 { 2023 int rc = 0, real_rc = 0, accept_any_vlan = 0; 2024 struct qed_dev_eth_info *dev_info; 2025 struct qede_vlan *vlan = NULL; 2026 2027 if (list_empty(&edev->vlan_list)) 2028 return 0; 2029 2030 dev_info = &edev->dev_info; 2031 2032 /* Configure non-configured vlans */ 2033 list_for_each_entry(vlan, &edev->vlan_list, list) { 2034 if (vlan->configured) 2035 continue; 2036 2037 /* We have used all our credits, now enable accept_any_vlan */ 2038 if ((vlan->vid != 0) && 2039 (edev->configured_vlans == dev_info->num_vlan_filters)) { 2040 accept_any_vlan = 1; 2041 continue; 2042 } 2043 2044 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid); 2045 2046 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD, 2047 vlan->vid); 2048 if (rc) { 2049 DP_ERR(edev, "Failed to configure VLAN %u\n", 2050 vlan->vid); 2051 real_rc = rc; 2052 continue; 2053 } 2054 2055 vlan->configured = true; 2056 /* vlan0 filter doesn't consume our VLAN filter's quota */ 2057 if (vlan->vid != 0) { 2058 edev->non_configured_vlans--; 2059 edev->configured_vlans++; 2060 } 2061 } 2062 2063 /* enable accept_any_vlan mode if we have more VLANs than credits, 2064 * or remove accept_any_vlan mode if we've actually removed 2065 * a non-configured vlan, and all remaining vlans are truly configured. 2066 */ 2067 2068 if (accept_any_vlan) 2069 qede_config_accept_any_vlan(edev, true); 2070 else if (!edev->non_configured_vlans) 2071 qede_config_accept_any_vlan(edev, false); 2072 2073 return real_rc; 2074 } 2075 2076 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) 2077 { 2078 struct qede_dev *edev = netdev_priv(dev); 2079 struct qede_vlan *vlan = NULL; 2080 int rc; 2081 2082 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid); 2083 2084 /* Find whether entry exists */ 2085 list_for_each_entry(vlan, &edev->vlan_list, list) 2086 if (vlan->vid == vid) 2087 break; 2088 2089 if (!vlan || (vlan->vid != vid)) { 2090 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 2091 "Vlan isn't configured\n"); 2092 return 0; 2093 } 2094 2095 if (edev->state != QEDE_STATE_OPEN) { 2096 /* As interface is already down, we don't have a VPORT 2097 * instance to remove vlan filter. So just update vlan list 2098 */ 2099 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2100 "Interface is down, removing VLAN from list only\n"); 2101 qede_del_vlan_from_list(edev, vlan); 2102 return 0; 2103 } 2104 2105 /* Remove vlan */ 2106 if (vlan->configured) { 2107 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, 2108 vid); 2109 if (rc) { 2110 DP_ERR(edev, "Failed to remove VLAN %d\n", vid); 2111 return -EINVAL; 2112 } 2113 } 2114 2115 qede_del_vlan_from_list(edev, vlan); 2116 2117 /* We have removed a VLAN - try to see if we can 2118 * configure non-configured VLAN from the list. 2119 */ 2120 rc = qede_configure_vlan_filters(edev); 2121 2122 return rc; 2123 } 2124 2125 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev) 2126 { 2127 struct qede_vlan *vlan = NULL; 2128 2129 if (list_empty(&edev->vlan_list)) 2130 return; 2131 2132 list_for_each_entry(vlan, &edev->vlan_list, list) { 2133 if (!vlan->configured) 2134 continue; 2135 2136 vlan->configured = false; 2137 2138 /* vlan0 filter isn't consuming out of our quota */ 2139 if (vlan->vid != 0) { 2140 edev->non_configured_vlans++; 2141 edev->configured_vlans--; 2142 } 2143 2144 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2145 "marked vlan %d as non-configured\n", vlan->vid); 2146 } 2147 2148 edev->accept_any_vlan = false; 2149 } 2150 2151 static int qede_set_features(struct net_device *dev, netdev_features_t features) 2152 { 2153 struct qede_dev *edev = netdev_priv(dev); 2154 netdev_features_t changes = features ^ dev->features; 2155 bool need_reload = false; 2156 2157 /* No action needed if hardware GRO is disabled during driver load */ 2158 if (changes & NETIF_F_GRO) { 2159 if (dev->features & NETIF_F_GRO) 2160 need_reload = !edev->gro_disable; 2161 else 2162 need_reload = edev->gro_disable; 2163 } 2164 2165 if (need_reload && netif_running(edev->ndev)) { 2166 dev->features = features; 2167 qede_reload(edev, NULL, NULL); 2168 return 1; 2169 } 2170 2171 return 0; 2172 } 2173 2174 static void qede_udp_tunnel_add(struct net_device *dev, 2175 struct udp_tunnel_info *ti) 2176 { 2177 struct qede_dev *edev = netdev_priv(dev); 2178 u16 t_port = ntohs(ti->port); 2179 2180 switch (ti->type) { 2181 case UDP_TUNNEL_TYPE_VXLAN: 2182 if (edev->vxlan_dst_port) 2183 return; 2184 2185 edev->vxlan_dst_port = t_port; 2186 2187 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n", 2188 t_port); 2189 2190 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2191 break; 2192 case UDP_TUNNEL_TYPE_GENEVE: 2193 if (edev->geneve_dst_port) 2194 return; 2195 2196 edev->geneve_dst_port = t_port; 2197 2198 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n", 2199 t_port); 2200 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2201 break; 2202 default: 2203 return; 2204 } 2205 2206 schedule_delayed_work(&edev->sp_task, 0); 2207 } 2208 2209 static void qede_udp_tunnel_del(struct net_device *dev, 2210 struct udp_tunnel_info *ti) 2211 { 2212 struct qede_dev *edev = netdev_priv(dev); 2213 u16 t_port = ntohs(ti->port); 2214 2215 switch (ti->type) { 2216 case UDP_TUNNEL_TYPE_VXLAN: 2217 if (t_port != edev->vxlan_dst_port) 2218 return; 2219 2220 edev->vxlan_dst_port = 0; 2221 2222 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n", 2223 t_port); 2224 2225 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2226 break; 2227 case UDP_TUNNEL_TYPE_GENEVE: 2228 if (t_port != edev->geneve_dst_port) 2229 return; 2230 2231 edev->geneve_dst_port = 0; 2232 2233 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n", 2234 t_port); 2235 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2236 break; 2237 default: 2238 return; 2239 } 2240 2241 schedule_delayed_work(&edev->sp_task, 0); 2242 } 2243 2244 /* 8B udp header + 8B base tunnel header + 32B option length */ 2245 #define QEDE_MAX_TUN_HDR_LEN 48 2246 2247 static netdev_features_t qede_features_check(struct sk_buff *skb, 2248 struct net_device *dev, 2249 netdev_features_t features) 2250 { 2251 if (skb->encapsulation) { 2252 u8 l4_proto = 0; 2253 2254 switch (vlan_get_protocol(skb)) { 2255 case htons(ETH_P_IP): 2256 l4_proto = ip_hdr(skb)->protocol; 2257 break; 2258 case htons(ETH_P_IPV6): 2259 l4_proto = ipv6_hdr(skb)->nexthdr; 2260 break; 2261 default: 2262 return features; 2263 } 2264 2265 /* Disable offloads for geneve tunnels, as HW can't parse 2266 * the geneve header which has option length greater than 32B. 2267 */ 2268 if ((l4_proto == IPPROTO_UDP) && 2269 ((skb_inner_mac_header(skb) - 2270 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN)) 2271 return features & ~(NETIF_F_CSUM_MASK | 2272 NETIF_F_GSO_MASK); 2273 } 2274 2275 return features; 2276 } 2277 2278 static const struct net_device_ops qede_netdev_ops = { 2279 .ndo_open = qede_open, 2280 .ndo_stop = qede_close, 2281 .ndo_start_xmit = qede_start_xmit, 2282 .ndo_set_rx_mode = qede_set_rx_mode, 2283 .ndo_set_mac_address = qede_set_mac_addr, 2284 .ndo_validate_addr = eth_validate_addr, 2285 .ndo_change_mtu = qede_change_mtu, 2286 #ifdef CONFIG_QED_SRIOV 2287 .ndo_set_vf_mac = qede_set_vf_mac, 2288 .ndo_set_vf_vlan = qede_set_vf_vlan, 2289 #endif 2290 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 2291 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 2292 .ndo_set_features = qede_set_features, 2293 .ndo_get_stats64 = qede_get_stats64, 2294 #ifdef CONFIG_QED_SRIOV 2295 .ndo_set_vf_link_state = qede_set_vf_link_state, 2296 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 2297 .ndo_get_vf_config = qede_get_vf_config, 2298 .ndo_set_vf_rate = qede_set_vf_rate, 2299 #endif 2300 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 2301 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 2302 .ndo_features_check = qede_features_check, 2303 }; 2304 2305 /* ------------------------------------------------------------------------- 2306 * START OF PROBE / REMOVE 2307 * ------------------------------------------------------------------------- 2308 */ 2309 2310 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 2311 struct pci_dev *pdev, 2312 struct qed_dev_eth_info *info, 2313 u32 dp_module, u8 dp_level) 2314 { 2315 struct net_device *ndev; 2316 struct qede_dev *edev; 2317 2318 ndev = alloc_etherdev_mqs(sizeof(*edev), 2319 info->num_queues, info->num_queues); 2320 if (!ndev) { 2321 pr_err("etherdev allocation failed\n"); 2322 return NULL; 2323 } 2324 2325 edev = netdev_priv(ndev); 2326 edev->ndev = ndev; 2327 edev->cdev = cdev; 2328 edev->pdev = pdev; 2329 edev->dp_module = dp_module; 2330 edev->dp_level = dp_level; 2331 edev->ops = qed_ops; 2332 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 2333 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 2334 2335 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 2336 info->num_queues, info->num_queues); 2337 2338 SET_NETDEV_DEV(ndev, &pdev->dev); 2339 2340 memset(&edev->stats, 0, sizeof(edev->stats)); 2341 memcpy(&edev->dev_info, info, sizeof(*info)); 2342 2343 edev->num_tc = edev->dev_info.num_tc; 2344 2345 INIT_LIST_HEAD(&edev->vlan_list); 2346 2347 return edev; 2348 } 2349 2350 static void qede_init_ndev(struct qede_dev *edev) 2351 { 2352 struct net_device *ndev = edev->ndev; 2353 struct pci_dev *pdev = edev->pdev; 2354 u32 hw_features; 2355 2356 pci_set_drvdata(pdev, ndev); 2357 2358 ndev->mem_start = edev->dev_info.common.pci_mem_start; 2359 ndev->base_addr = ndev->mem_start; 2360 ndev->mem_end = edev->dev_info.common.pci_mem_end; 2361 ndev->irq = edev->dev_info.common.pci_irq; 2362 2363 ndev->watchdog_timeo = TX_TIMEOUT; 2364 2365 ndev->netdev_ops = &qede_netdev_ops; 2366 2367 qede_set_ethtool_ops(ndev); 2368 2369 ndev->priv_flags |= IFF_UNICAST_FLT; 2370 2371 /* user-changeble features */ 2372 hw_features = NETIF_F_GRO | NETIF_F_SG | 2373 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2374 NETIF_F_TSO | NETIF_F_TSO6; 2375 2376 /* Encap features*/ 2377 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | 2378 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM | 2379 NETIF_F_GSO_GRE_CSUM; 2380 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2381 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN | 2382 NETIF_F_TSO6 | NETIF_F_GSO_GRE | 2383 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM | 2384 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2385 NETIF_F_GSO_GRE_CSUM; 2386 2387 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2388 NETIF_F_HIGHDMA; 2389 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2390 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 2391 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 2392 2393 ndev->hw_features = hw_features; 2394 2395 /* MTU range: 46 - 9600 */ 2396 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 2397 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 2398 2399 /* Set network device HW mac */ 2400 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 2401 2402 ndev->mtu = edev->dev_info.common.mtu; 2403 } 2404 2405 /* This function converts from 32b param to two params of level and module 2406 * Input 32b decoding: 2407 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 2408 * 'happy' flow, e.g. memory allocation failed. 2409 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 2410 * and provide important parameters. 2411 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 2412 * module. VERBOSE prints are for tracking the specific flow in low level. 2413 * 2414 * Notice that the level should be that of the lowest required logs. 2415 */ 2416 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 2417 { 2418 *p_dp_level = QED_LEVEL_NOTICE; 2419 *p_dp_module = 0; 2420 2421 if (debug & QED_LOG_VERBOSE_MASK) { 2422 *p_dp_level = QED_LEVEL_VERBOSE; 2423 *p_dp_module = (debug & 0x3FFFFFFF); 2424 } else if (debug & QED_LOG_INFO_MASK) { 2425 *p_dp_level = QED_LEVEL_INFO; 2426 } else if (debug & QED_LOG_NOTICE_MASK) { 2427 *p_dp_level = QED_LEVEL_NOTICE; 2428 } 2429 } 2430 2431 static void qede_free_fp_array(struct qede_dev *edev) 2432 { 2433 if (edev->fp_array) { 2434 struct qede_fastpath *fp; 2435 int i; 2436 2437 for_each_queue(i) { 2438 fp = &edev->fp_array[i]; 2439 2440 kfree(fp->sb_info); 2441 kfree(fp->rxq); 2442 kfree(fp->txqs); 2443 } 2444 kfree(edev->fp_array); 2445 } 2446 2447 edev->num_queues = 0; 2448 edev->fp_num_tx = 0; 2449 edev->fp_num_rx = 0; 2450 } 2451 2452 static int qede_alloc_fp_array(struct qede_dev *edev) 2453 { 2454 u8 fp_combined, fp_rx = edev->fp_num_rx; 2455 struct qede_fastpath *fp; 2456 int i; 2457 2458 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 2459 sizeof(*edev->fp_array), GFP_KERNEL); 2460 if (!edev->fp_array) { 2461 DP_NOTICE(edev, "fp array allocation failed\n"); 2462 goto err; 2463 } 2464 2465 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 2466 2467 /* Allocate the FP elements for Rx queues followed by combined and then 2468 * the Tx. This ordering should be maintained so that the respective 2469 * queues (Rx or Tx) will be together in the fastpath array and the 2470 * associated ids will be sequential. 2471 */ 2472 for_each_queue(i) { 2473 fp = &edev->fp_array[i]; 2474 2475 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL); 2476 if (!fp->sb_info) { 2477 DP_NOTICE(edev, "sb info struct allocation failed\n"); 2478 goto err; 2479 } 2480 2481 if (fp_rx) { 2482 fp->type = QEDE_FASTPATH_RX; 2483 fp_rx--; 2484 } else if (fp_combined) { 2485 fp->type = QEDE_FASTPATH_COMBINED; 2486 fp_combined--; 2487 } else { 2488 fp->type = QEDE_FASTPATH_TX; 2489 } 2490 2491 if (fp->type & QEDE_FASTPATH_TX) { 2492 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), 2493 GFP_KERNEL); 2494 if (!fp->txqs) { 2495 DP_NOTICE(edev, 2496 "TXQ array allocation failed\n"); 2497 goto err; 2498 } 2499 } 2500 2501 if (fp->type & QEDE_FASTPATH_RX) { 2502 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL); 2503 if (!fp->rxq) { 2504 DP_NOTICE(edev, 2505 "RXQ struct allocation failed\n"); 2506 goto err; 2507 } 2508 } 2509 } 2510 2511 return 0; 2512 err: 2513 qede_free_fp_array(edev); 2514 return -ENOMEM; 2515 } 2516 2517 static void qede_sp_task(struct work_struct *work) 2518 { 2519 struct qede_dev *edev = container_of(work, struct qede_dev, 2520 sp_task.work); 2521 struct qed_dev *cdev = edev->cdev; 2522 2523 mutex_lock(&edev->qede_lock); 2524 2525 if (edev->state == QEDE_STATE_OPEN) { 2526 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 2527 qede_config_rx_mode(edev->ndev); 2528 } 2529 2530 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) { 2531 struct qed_tunn_params tunn_params; 2532 2533 memset(&tunn_params, 0, sizeof(tunn_params)); 2534 tunn_params.update_vxlan_port = 1; 2535 tunn_params.vxlan_port = edev->vxlan_dst_port; 2536 qed_ops->tunn_config(cdev, &tunn_params); 2537 } 2538 2539 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) { 2540 struct qed_tunn_params tunn_params; 2541 2542 memset(&tunn_params, 0, sizeof(tunn_params)); 2543 tunn_params.update_geneve_port = 1; 2544 tunn_params.geneve_port = edev->geneve_dst_port; 2545 qed_ops->tunn_config(cdev, &tunn_params); 2546 } 2547 2548 mutex_unlock(&edev->qede_lock); 2549 } 2550 2551 static void qede_update_pf_params(struct qed_dev *cdev) 2552 { 2553 struct qed_pf_params pf_params; 2554 2555 /* 64 rx + 64 tx */ 2556 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 2557 pf_params.eth_pf_params.num_cons = 128; 2558 qed_ops->common->update_pf_params(cdev, &pf_params); 2559 } 2560 2561 enum qede_probe_mode { 2562 QEDE_PROBE_NORMAL, 2563 }; 2564 2565 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 2566 bool is_vf, enum qede_probe_mode mode) 2567 { 2568 struct qed_probe_params probe_params; 2569 struct qed_slowpath_params sp_params; 2570 struct qed_dev_eth_info dev_info; 2571 struct qede_dev *edev; 2572 struct qed_dev *cdev; 2573 int rc; 2574 2575 if (unlikely(dp_level & QED_LEVEL_INFO)) 2576 pr_notice("Starting qede probe\n"); 2577 2578 memset(&probe_params, 0, sizeof(probe_params)); 2579 probe_params.protocol = QED_PROTOCOL_ETH; 2580 probe_params.dp_module = dp_module; 2581 probe_params.dp_level = dp_level; 2582 probe_params.is_vf = is_vf; 2583 cdev = qed_ops->common->probe(pdev, &probe_params); 2584 if (!cdev) { 2585 rc = -ENODEV; 2586 goto err0; 2587 } 2588 2589 qede_update_pf_params(cdev); 2590 2591 /* Start the Slowpath-process */ 2592 memset(&sp_params, 0, sizeof(sp_params)); 2593 sp_params.int_mode = QED_INT_MODE_MSIX; 2594 sp_params.drv_major = QEDE_MAJOR_VERSION; 2595 sp_params.drv_minor = QEDE_MINOR_VERSION; 2596 sp_params.drv_rev = QEDE_REVISION_VERSION; 2597 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 2598 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 2599 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 2600 if (rc) { 2601 pr_notice("Cannot start slowpath\n"); 2602 goto err1; 2603 } 2604 2605 /* Learn information crucial for qede to progress */ 2606 rc = qed_ops->fill_dev_info(cdev, &dev_info); 2607 if (rc) 2608 goto err2; 2609 2610 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 2611 dp_level); 2612 if (!edev) { 2613 rc = -ENOMEM; 2614 goto err2; 2615 } 2616 2617 if (is_vf) 2618 edev->flags |= QEDE_FLAG_IS_VF; 2619 2620 qede_init_ndev(edev); 2621 2622 rc = qede_roce_dev_add(edev); 2623 if (rc) 2624 goto err3; 2625 2626 rc = register_netdev(edev->ndev); 2627 if (rc) { 2628 DP_NOTICE(edev, "Cannot register net-device\n"); 2629 goto err4; 2630 } 2631 2632 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION); 2633 2634 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 2635 2636 #ifdef CONFIG_DCB 2637 if (!IS_VF(edev)) 2638 qede_set_dcbnl_ops(edev->ndev); 2639 #endif 2640 2641 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 2642 mutex_init(&edev->qede_lock); 2643 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 2644 2645 DP_INFO(edev, "Ending successfully qede probe\n"); 2646 2647 return 0; 2648 2649 err4: 2650 qede_roce_dev_remove(edev); 2651 err3: 2652 free_netdev(edev->ndev); 2653 err2: 2654 qed_ops->common->slowpath_stop(cdev); 2655 err1: 2656 qed_ops->common->remove(cdev); 2657 err0: 2658 return rc; 2659 } 2660 2661 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 2662 { 2663 bool is_vf = false; 2664 u32 dp_module = 0; 2665 u8 dp_level = 0; 2666 2667 switch ((enum qede_pci_private)id->driver_data) { 2668 case QEDE_PRIVATE_VF: 2669 if (debug & QED_LOG_VERBOSE_MASK) 2670 dev_err(&pdev->dev, "Probing a VF\n"); 2671 is_vf = true; 2672 break; 2673 default: 2674 if (debug & QED_LOG_VERBOSE_MASK) 2675 dev_err(&pdev->dev, "Probing a PF\n"); 2676 } 2677 2678 qede_config_debug(debug, &dp_module, &dp_level); 2679 2680 return __qede_probe(pdev, dp_module, dp_level, is_vf, 2681 QEDE_PROBE_NORMAL); 2682 } 2683 2684 enum qede_remove_mode { 2685 QEDE_REMOVE_NORMAL, 2686 }; 2687 2688 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 2689 { 2690 struct net_device *ndev = pci_get_drvdata(pdev); 2691 struct qede_dev *edev = netdev_priv(ndev); 2692 struct qed_dev *cdev = edev->cdev; 2693 2694 DP_INFO(edev, "Starting qede_remove\n"); 2695 2696 cancel_delayed_work_sync(&edev->sp_task); 2697 2698 unregister_netdev(ndev); 2699 2700 qede_roce_dev_remove(edev); 2701 2702 edev->ops->common->set_power_state(cdev, PCI_D0); 2703 2704 pci_set_drvdata(pdev, NULL); 2705 2706 free_netdev(ndev); 2707 2708 /* Use global ops since we've freed edev */ 2709 qed_ops->common->slowpath_stop(cdev); 2710 if (system_state == SYSTEM_POWER_OFF) 2711 return; 2712 qed_ops->common->remove(cdev); 2713 2714 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 2715 } 2716 2717 static void qede_remove(struct pci_dev *pdev) 2718 { 2719 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 2720 } 2721 2722 static void qede_shutdown(struct pci_dev *pdev) 2723 { 2724 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 2725 } 2726 2727 /* ------------------------------------------------------------------------- 2728 * START OF LOAD / UNLOAD 2729 * ------------------------------------------------------------------------- 2730 */ 2731 2732 static int qede_set_num_queues(struct qede_dev *edev) 2733 { 2734 int rc; 2735 u16 rss_num; 2736 2737 /* Setup queues according to possible resources*/ 2738 if (edev->req_queues) 2739 rss_num = edev->req_queues; 2740 else 2741 rss_num = netif_get_num_default_rss_queues() * 2742 edev->dev_info.common.num_hwfns; 2743 2744 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 2745 2746 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 2747 if (rc > 0) { 2748 /* Managed to request interrupts for our queues */ 2749 edev->num_queues = rc; 2750 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 2751 QEDE_QUEUE_CNT(edev), rss_num); 2752 rc = 0; 2753 } 2754 2755 edev->fp_num_tx = edev->req_num_tx; 2756 edev->fp_num_rx = edev->req_num_rx; 2757 2758 return rc; 2759 } 2760 2761 static void qede_free_mem_sb(struct qede_dev *edev, 2762 struct qed_sb_info *sb_info) 2763 { 2764 if (sb_info->sb_virt) 2765 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 2766 (void *)sb_info->sb_virt, sb_info->sb_phys); 2767 } 2768 2769 /* This function allocates fast-path status block memory */ 2770 static int qede_alloc_mem_sb(struct qede_dev *edev, 2771 struct qed_sb_info *sb_info, u16 sb_id) 2772 { 2773 struct status_block *sb_virt; 2774 dma_addr_t sb_phys; 2775 int rc; 2776 2777 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 2778 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 2779 if (!sb_virt) { 2780 DP_ERR(edev, "Status block allocation failed\n"); 2781 return -ENOMEM; 2782 } 2783 2784 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 2785 sb_virt, sb_phys, sb_id, 2786 QED_SB_TYPE_L2_QUEUE); 2787 if (rc) { 2788 DP_ERR(edev, "Status block initialization failed\n"); 2789 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 2790 sb_virt, sb_phys); 2791 return rc; 2792 } 2793 2794 return 0; 2795 } 2796 2797 static void qede_free_rx_buffers(struct qede_dev *edev, 2798 struct qede_rx_queue *rxq) 2799 { 2800 u16 i; 2801 2802 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 2803 struct sw_rx_data *rx_buf; 2804 struct page *data; 2805 2806 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 2807 data = rx_buf->data; 2808 2809 dma_unmap_page(&edev->pdev->dev, 2810 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE); 2811 2812 rx_buf->data = NULL; 2813 __free_page(data); 2814 } 2815 } 2816 2817 static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2818 { 2819 int i; 2820 2821 if (edev->gro_disable) 2822 return; 2823 2824 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2825 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2826 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2827 2828 if (replace_buf->data) { 2829 dma_unmap_page(&edev->pdev->dev, 2830 replace_buf->mapping, 2831 PAGE_SIZE, DMA_FROM_DEVICE); 2832 __free_page(replace_buf->data); 2833 } 2834 } 2835 } 2836 2837 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2838 { 2839 qede_free_sge_mem(edev, rxq); 2840 2841 /* Free rx buffers */ 2842 qede_free_rx_buffers(edev, rxq); 2843 2844 /* Free the parallel SW ring */ 2845 kfree(rxq->sw_rx_ring); 2846 2847 /* Free the real RQ ring used by FW */ 2848 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 2849 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 2850 } 2851 2852 static int qede_alloc_rx_buffer(struct qede_dev *edev, 2853 struct qede_rx_queue *rxq) 2854 { 2855 struct sw_rx_data *sw_rx_data; 2856 struct eth_rx_bd *rx_bd; 2857 dma_addr_t mapping; 2858 struct page *data; 2859 2860 data = alloc_pages(GFP_ATOMIC, 0); 2861 if (unlikely(!data)) { 2862 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n"); 2863 return -ENOMEM; 2864 } 2865 2866 /* Map the entire page as it would be used 2867 * for multiple RX buffer segment size mapping. 2868 */ 2869 mapping = dma_map_page(&edev->pdev->dev, data, 0, 2870 PAGE_SIZE, DMA_FROM_DEVICE); 2871 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2872 __free_page(data); 2873 DP_NOTICE(edev, "Failed to map Rx buffer\n"); 2874 return -ENOMEM; 2875 } 2876 2877 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 2878 sw_rx_data->page_offset = 0; 2879 sw_rx_data->data = data; 2880 sw_rx_data->mapping = mapping; 2881 2882 /* Advance PROD and get BD pointer */ 2883 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring); 2884 WARN_ON(!rx_bd); 2885 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 2886 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 2887 2888 rxq->sw_rx_prod++; 2889 2890 return 0; 2891 } 2892 2893 static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2894 { 2895 dma_addr_t mapping; 2896 int i; 2897 2898 if (edev->gro_disable) 2899 return 0; 2900 2901 if (edev->ndev->mtu > PAGE_SIZE) { 2902 edev->gro_disable = 1; 2903 return 0; 2904 } 2905 2906 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2907 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2908 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2909 2910 replace_buf->data = alloc_pages(GFP_ATOMIC, 0); 2911 if (unlikely(!replace_buf->data)) { 2912 DP_NOTICE(edev, 2913 "Failed to allocate TPA skb pool [replacement buffer]\n"); 2914 goto err; 2915 } 2916 2917 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0, 2918 PAGE_SIZE, DMA_FROM_DEVICE); 2919 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2920 DP_NOTICE(edev, 2921 "Failed to map TPA replacement buffer\n"); 2922 goto err; 2923 } 2924 2925 replace_buf->mapping = mapping; 2926 tpa_info->replace_buf.page_offset = 0; 2927 2928 tpa_info->replace_buf_mapping = mapping; 2929 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 2930 } 2931 2932 return 0; 2933 err: 2934 qede_free_sge_mem(edev, rxq); 2935 edev->gro_disable = 1; 2936 return -ENOMEM; 2937 } 2938 2939 /* This function allocates all memory needed per Rx queue */ 2940 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2941 { 2942 int i, rc, size; 2943 2944 rxq->num_rx_buffers = edev->q_num_rx_buffers; 2945 2946 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 2947 2948 if (rxq->rx_buf_size > PAGE_SIZE) 2949 rxq->rx_buf_size = PAGE_SIZE; 2950 2951 /* Segment size to spilt a page in multiple equal parts */ 2952 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size); 2953 2954 /* Allocate the parallel driver ring for Rx buffers */ 2955 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 2956 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 2957 if (!rxq->sw_rx_ring) { 2958 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 2959 rc = -ENOMEM; 2960 goto err; 2961 } 2962 2963 /* Allocate FW Rx ring */ 2964 rc = edev->ops->common->chain_alloc(edev->cdev, 2965 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2966 QED_CHAIN_MODE_NEXT_PTR, 2967 QED_CHAIN_CNT_TYPE_U16, 2968 RX_RING_SIZE, 2969 sizeof(struct eth_rx_bd), 2970 &rxq->rx_bd_ring); 2971 2972 if (rc) 2973 goto err; 2974 2975 /* Allocate FW completion ring */ 2976 rc = edev->ops->common->chain_alloc(edev->cdev, 2977 QED_CHAIN_USE_TO_CONSUME, 2978 QED_CHAIN_MODE_PBL, 2979 QED_CHAIN_CNT_TYPE_U16, 2980 RX_RING_SIZE, 2981 sizeof(union eth_rx_cqe), 2982 &rxq->rx_comp_ring); 2983 if (rc) 2984 goto err; 2985 2986 /* Allocate buffers for the Rx ring */ 2987 for (i = 0; i < rxq->num_rx_buffers; i++) { 2988 rc = qede_alloc_rx_buffer(edev, rxq); 2989 if (rc) { 2990 DP_ERR(edev, 2991 "Rx buffers allocation failed at index %d\n", i); 2992 goto err; 2993 } 2994 } 2995 2996 rc = qede_alloc_sge_mem(edev, rxq); 2997 err: 2998 return rc; 2999 } 3000 3001 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 3002 { 3003 /* Free the parallel SW ring */ 3004 kfree(txq->sw_tx_ring); 3005 3006 /* Free the real RQ ring used by FW */ 3007 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 3008 } 3009 3010 /* This function allocates all memory needed per Tx queue */ 3011 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 3012 { 3013 int size, rc; 3014 union eth_tx_bd_types *p_virt; 3015 3016 txq->num_tx_buffers = edev->q_num_tx_buffers; 3017 3018 /* Allocate the parallel driver ring for Tx buffers */ 3019 size = sizeof(*txq->sw_tx_ring) * TX_RING_SIZE; 3020 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL); 3021 if (!txq->sw_tx_ring) { 3022 DP_NOTICE(edev, "Tx buffers ring allocation failed\n"); 3023 goto err; 3024 } 3025 3026 rc = edev->ops->common->chain_alloc(edev->cdev, 3027 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 3028 QED_CHAIN_MODE_PBL, 3029 QED_CHAIN_CNT_TYPE_U16, 3030 TX_RING_SIZE, 3031 sizeof(*p_virt), &txq->tx_pbl); 3032 if (rc) 3033 goto err; 3034 3035 return 0; 3036 3037 err: 3038 qede_free_mem_txq(edev, txq); 3039 return -ENOMEM; 3040 } 3041 3042 /* This function frees all memory of a single fp */ 3043 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 3044 { 3045 int tc; 3046 3047 qede_free_mem_sb(edev, fp->sb_info); 3048 3049 if (fp->type & QEDE_FASTPATH_RX) 3050 qede_free_mem_rxq(edev, fp->rxq); 3051 3052 if (fp->type & QEDE_FASTPATH_TX) 3053 for (tc = 0; tc < edev->num_tc; tc++) 3054 qede_free_mem_txq(edev, &fp->txqs[tc]); 3055 } 3056 3057 /* This function allocates all memory needed for a single fp (i.e. an entity 3058 * which contains status block, one rx queue and/or multiple per-TC tx queues. 3059 */ 3060 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 3061 { 3062 int rc, tc; 3063 3064 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 3065 if (rc) 3066 goto err; 3067 3068 if (fp->type & QEDE_FASTPATH_RX) { 3069 rc = qede_alloc_mem_rxq(edev, fp->rxq); 3070 if (rc) 3071 goto err; 3072 } 3073 3074 if (fp->type & QEDE_FASTPATH_TX) { 3075 for (tc = 0; tc < edev->num_tc; tc++) { 3076 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]); 3077 if (rc) 3078 goto err; 3079 } 3080 } 3081 3082 return 0; 3083 err: 3084 return rc; 3085 } 3086 3087 static void qede_free_mem_load(struct qede_dev *edev) 3088 { 3089 int i; 3090 3091 for_each_queue(i) { 3092 struct qede_fastpath *fp = &edev->fp_array[i]; 3093 3094 qede_free_mem_fp(edev, fp); 3095 } 3096 } 3097 3098 /* This function allocates all qede memory at NIC load. */ 3099 static int qede_alloc_mem_load(struct qede_dev *edev) 3100 { 3101 int rc = 0, queue_id; 3102 3103 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 3104 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 3105 3106 rc = qede_alloc_mem_fp(edev, fp); 3107 if (rc) { 3108 DP_ERR(edev, 3109 "Failed to allocate memory for fastpath - rss id = %d\n", 3110 queue_id); 3111 qede_free_mem_load(edev); 3112 return rc; 3113 } 3114 } 3115 3116 return 0; 3117 } 3118 3119 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 3120 static void qede_init_fp(struct qede_dev *edev) 3121 { 3122 int queue_id, rxq_index = 0, txq_index = 0, tc; 3123 struct qede_fastpath *fp; 3124 3125 for_each_queue(queue_id) { 3126 fp = &edev->fp_array[queue_id]; 3127 3128 fp->edev = edev; 3129 fp->id = queue_id; 3130 3131 memset((void *)&fp->napi, 0, sizeof(fp->napi)); 3132 3133 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info)); 3134 3135 if (fp->type & QEDE_FASTPATH_RX) { 3136 memset((void *)fp->rxq, 0, sizeof(*fp->rxq)); 3137 fp->rxq->rxq_id = rxq_index++; 3138 } 3139 3140 if (fp->type & QEDE_FASTPATH_TX) { 3141 memset((void *)fp->txqs, 0, 3142 (edev->num_tc * sizeof(*fp->txqs))); 3143 for (tc = 0; tc < edev->num_tc; tc++) { 3144 fp->txqs[tc].index = txq_index + 3145 tc * QEDE_TSS_COUNT(edev); 3146 if (edev->dev_info.is_legacy) 3147 fp->txqs[tc].is_legacy = true; 3148 } 3149 txq_index++; 3150 } 3151 3152 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 3153 edev->ndev->name, queue_id); 3154 } 3155 3156 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO); 3157 } 3158 3159 static int qede_set_real_num_queues(struct qede_dev *edev) 3160 { 3161 int rc = 0; 3162 3163 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev)); 3164 if (rc) { 3165 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 3166 return rc; 3167 } 3168 3169 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 3170 if (rc) { 3171 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 3172 return rc; 3173 } 3174 3175 return 0; 3176 } 3177 3178 static void qede_napi_disable_remove(struct qede_dev *edev) 3179 { 3180 int i; 3181 3182 for_each_queue(i) { 3183 napi_disable(&edev->fp_array[i].napi); 3184 3185 netif_napi_del(&edev->fp_array[i].napi); 3186 } 3187 } 3188 3189 static void qede_napi_add_enable(struct qede_dev *edev) 3190 { 3191 int i; 3192 3193 /* Add NAPI objects */ 3194 for_each_queue(i) { 3195 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 3196 qede_poll, NAPI_POLL_WEIGHT); 3197 napi_enable(&edev->fp_array[i].napi); 3198 } 3199 } 3200 3201 static void qede_sync_free_irqs(struct qede_dev *edev) 3202 { 3203 int i; 3204 3205 for (i = 0; i < edev->int_info.used_cnt; i++) { 3206 if (edev->int_info.msix_cnt) { 3207 synchronize_irq(edev->int_info.msix[i].vector); 3208 free_irq(edev->int_info.msix[i].vector, 3209 &edev->fp_array[i]); 3210 } else { 3211 edev->ops->common->simd_handler_clean(edev->cdev, i); 3212 } 3213 } 3214 3215 edev->int_info.used_cnt = 0; 3216 } 3217 3218 static int qede_req_msix_irqs(struct qede_dev *edev) 3219 { 3220 int i, rc; 3221 3222 /* Sanitize number of interrupts == number of prepared RSS queues */ 3223 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 3224 DP_ERR(edev, 3225 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 3226 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 3227 return -EINVAL; 3228 } 3229 3230 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 3231 rc = request_irq(edev->int_info.msix[i].vector, 3232 qede_msix_fp_int, 0, edev->fp_array[i].name, 3233 &edev->fp_array[i]); 3234 if (rc) { 3235 DP_ERR(edev, "Request fp %d irq failed\n", i); 3236 qede_sync_free_irqs(edev); 3237 return rc; 3238 } 3239 DP_VERBOSE(edev, NETIF_MSG_INTR, 3240 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 3241 edev->fp_array[i].name, i, 3242 &edev->fp_array[i]); 3243 edev->int_info.used_cnt++; 3244 } 3245 3246 return 0; 3247 } 3248 3249 static void qede_simd_fp_handler(void *cookie) 3250 { 3251 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 3252 3253 napi_schedule_irqoff(&fp->napi); 3254 } 3255 3256 static int qede_setup_irqs(struct qede_dev *edev) 3257 { 3258 int i, rc = 0; 3259 3260 /* Learn Interrupt configuration */ 3261 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 3262 if (rc) 3263 return rc; 3264 3265 if (edev->int_info.msix_cnt) { 3266 rc = qede_req_msix_irqs(edev); 3267 if (rc) 3268 return rc; 3269 edev->ndev->irq = edev->int_info.msix[0].vector; 3270 } else { 3271 const struct qed_common_ops *ops; 3272 3273 /* qed should learn receive the RSS ids and callbacks */ 3274 ops = edev->ops->common; 3275 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 3276 ops->simd_handler_config(edev->cdev, 3277 &edev->fp_array[i], i, 3278 qede_simd_fp_handler); 3279 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 3280 } 3281 return 0; 3282 } 3283 3284 static int qede_drain_txq(struct qede_dev *edev, 3285 struct qede_tx_queue *txq, bool allow_drain) 3286 { 3287 int rc, cnt = 1000; 3288 3289 while (txq->sw_tx_cons != txq->sw_tx_prod) { 3290 if (!cnt) { 3291 if (allow_drain) { 3292 DP_NOTICE(edev, 3293 "Tx queue[%d] is stuck, requesting MCP to drain\n", 3294 txq->index); 3295 rc = edev->ops->common->drain(edev->cdev); 3296 if (rc) 3297 return rc; 3298 return qede_drain_txq(edev, txq, false); 3299 } 3300 DP_NOTICE(edev, 3301 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 3302 txq->index, txq->sw_tx_prod, 3303 txq->sw_tx_cons); 3304 return -ENODEV; 3305 } 3306 cnt--; 3307 usleep_range(1000, 2000); 3308 barrier(); 3309 } 3310 3311 /* FW finished processing, wait for HW to transmit all tx packets */ 3312 usleep_range(1000, 2000); 3313 3314 return 0; 3315 } 3316 3317 static int qede_stop_queues(struct qede_dev *edev) 3318 { 3319 struct qed_update_vport_params vport_update_params; 3320 struct qed_dev *cdev = edev->cdev; 3321 int rc, tc, i; 3322 3323 /* Disable the vport */ 3324 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3325 vport_update_params.vport_id = 0; 3326 vport_update_params.update_vport_active_flg = 1; 3327 vport_update_params.vport_active_flg = 0; 3328 vport_update_params.update_rss_flg = 0; 3329 3330 rc = edev->ops->vport_update(cdev, &vport_update_params); 3331 if (rc) { 3332 DP_ERR(edev, "Failed to update vport\n"); 3333 return rc; 3334 } 3335 3336 /* Flush Tx queues. If needed, request drain from MCP */ 3337 for_each_queue(i) { 3338 struct qede_fastpath *fp = &edev->fp_array[i]; 3339 3340 if (fp->type & QEDE_FASTPATH_TX) { 3341 for (tc = 0; tc < edev->num_tc; tc++) { 3342 struct qede_tx_queue *txq = &fp->txqs[tc]; 3343 3344 rc = qede_drain_txq(edev, txq, true); 3345 if (rc) 3346 return rc; 3347 } 3348 } 3349 } 3350 3351 /* Stop all Queues in reverse order */ 3352 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 3353 struct qed_stop_rxq_params rx_params; 3354 3355 /* Stop the Tx Queue(s) */ 3356 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 3357 for (tc = 0; tc < edev->num_tc; tc++) { 3358 struct qed_stop_txq_params tx_params; 3359 u8 val; 3360 3361 tx_params.rss_id = i; 3362 val = edev->fp_array[i].txqs[tc].index; 3363 tx_params.tx_queue_id = val; 3364 rc = edev->ops->q_tx_stop(cdev, &tx_params); 3365 if (rc) { 3366 DP_ERR(edev, "Failed to stop TXQ #%d\n", 3367 tx_params.tx_queue_id); 3368 return rc; 3369 } 3370 } 3371 } 3372 3373 /* Stop the Rx Queue */ 3374 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 3375 memset(&rx_params, 0, sizeof(rx_params)); 3376 rx_params.rss_id = i; 3377 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id; 3378 3379 rc = edev->ops->q_rx_stop(cdev, &rx_params); 3380 if (rc) { 3381 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 3382 return rc; 3383 } 3384 } 3385 } 3386 3387 /* Stop the vport */ 3388 rc = edev->ops->vport_stop(cdev, 0); 3389 if (rc) 3390 DP_ERR(edev, "Failed to stop VPORT\n"); 3391 3392 return rc; 3393 } 3394 3395 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 3396 { 3397 int rc, tc, i; 3398 int vlan_removal_en = 1; 3399 struct qed_dev *cdev = edev->cdev; 3400 struct qed_update_vport_params vport_update_params; 3401 struct qed_queue_start_common_params q_params; 3402 struct qed_dev_info *qed_info = &edev->dev_info.common; 3403 struct qed_start_vport_params start = {0}; 3404 bool reset_rss_indir = false; 3405 3406 if (!edev->num_queues) { 3407 DP_ERR(edev, 3408 "Cannot update V-VPORT as active as there are no Rx queues\n"); 3409 return -EINVAL; 3410 } 3411 3412 start.gro_enable = !edev->gro_disable; 3413 start.mtu = edev->ndev->mtu; 3414 start.vport_id = 0; 3415 start.drop_ttl0 = true; 3416 start.remove_inner_vlan = vlan_removal_en; 3417 start.clear_stats = clear_stats; 3418 3419 rc = edev->ops->vport_start(cdev, &start); 3420 3421 if (rc) { 3422 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 3423 return rc; 3424 } 3425 3426 DP_VERBOSE(edev, NETIF_MSG_IFUP, 3427 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 3428 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 3429 3430 for_each_queue(i) { 3431 struct qede_fastpath *fp = &edev->fp_array[i]; 3432 dma_addr_t p_phys_table; 3433 u32 page_cnt; 3434 3435 if (fp->type & QEDE_FASTPATH_RX) { 3436 struct qede_rx_queue *rxq = fp->rxq; 3437 __le16 *val; 3438 3439 memset(&q_params, 0, sizeof(q_params)); 3440 q_params.rss_id = i; 3441 q_params.queue_id = rxq->rxq_id; 3442 q_params.vport_id = 0; 3443 q_params.sb = fp->sb_info->igu_sb_id; 3444 q_params.sb_idx = RX_PI; 3445 3446 p_phys_table = 3447 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 3448 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 3449 3450 rc = edev->ops->q_rx_start(cdev, &q_params, 3451 rxq->rx_buf_size, 3452 rxq->rx_bd_ring.p_phys_addr, 3453 p_phys_table, 3454 page_cnt, 3455 &rxq->hw_rxq_prod_addr); 3456 if (rc) { 3457 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 3458 rc); 3459 return rc; 3460 } 3461 3462 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 3463 rxq->hw_cons_ptr = val; 3464 3465 qede_update_rx_prod(edev, rxq); 3466 } 3467 3468 if (!(fp->type & QEDE_FASTPATH_TX)) 3469 continue; 3470 3471 for (tc = 0; tc < edev->num_tc; tc++) { 3472 struct qede_tx_queue *txq = &fp->txqs[tc]; 3473 3474 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 3475 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 3476 3477 memset(&q_params, 0, sizeof(q_params)); 3478 q_params.rss_id = i; 3479 q_params.queue_id = txq->index; 3480 q_params.vport_id = 0; 3481 q_params.sb = fp->sb_info->igu_sb_id; 3482 q_params.sb_idx = TX_PI(tc); 3483 3484 rc = edev->ops->q_tx_start(cdev, &q_params, 3485 p_phys_table, page_cnt, 3486 &txq->doorbell_addr); 3487 if (rc) { 3488 DP_ERR(edev, "Start TXQ #%d failed %d\n", 3489 txq->index, rc); 3490 return rc; 3491 } 3492 3493 txq->hw_cons_ptr = 3494 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)]; 3495 SET_FIELD(txq->tx_db.data.params, 3496 ETH_DB_DATA_DEST, DB_DEST_XCM); 3497 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, 3498 DB_AGG_CMD_SET); 3499 SET_FIELD(txq->tx_db.data.params, 3500 ETH_DB_DATA_AGG_VAL_SEL, 3501 DQ_XCM_ETH_TX_BD_PROD_CMD); 3502 3503 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 3504 } 3505 } 3506 3507 /* Prepare and send the vport enable */ 3508 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3509 vport_update_params.vport_id = start.vport_id; 3510 vport_update_params.update_vport_active_flg = 1; 3511 vport_update_params.vport_active_flg = 1; 3512 3513 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) && 3514 qed_info->tx_switching) { 3515 vport_update_params.update_tx_switching_flg = 1; 3516 vport_update_params.tx_switching_flg = 1; 3517 } 3518 3519 /* Fill struct with RSS params */ 3520 if (QEDE_RSS_COUNT(edev) > 1) { 3521 vport_update_params.update_rss_flg = 1; 3522 3523 /* Need to validate current RSS config uses valid entries */ 3524 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3525 if (edev->rss_params.rss_ind_table[i] >= 3526 QEDE_RSS_COUNT(edev)) { 3527 reset_rss_indir = true; 3528 break; 3529 } 3530 } 3531 3532 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || 3533 reset_rss_indir) { 3534 u16 val; 3535 3536 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3537 u16 indir_val; 3538 3539 val = QEDE_RSS_COUNT(edev); 3540 indir_val = ethtool_rxfh_indir_default(i, val); 3541 edev->rss_params.rss_ind_table[i] = indir_val; 3542 } 3543 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 3544 } 3545 3546 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) { 3547 netdev_rss_key_fill(edev->rss_params.rss_key, 3548 sizeof(edev->rss_params.rss_key)); 3549 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 3550 } 3551 3552 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) { 3553 edev->rss_params.rss_caps = QED_RSS_IPV4 | 3554 QED_RSS_IPV6 | 3555 QED_RSS_IPV4_TCP | 3556 QED_RSS_IPV6_TCP; 3557 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 3558 } 3559 3560 memcpy(&vport_update_params.rss_params, &edev->rss_params, 3561 sizeof(vport_update_params.rss_params)); 3562 } else { 3563 memset(&vport_update_params.rss_params, 0, 3564 sizeof(vport_update_params.rss_params)); 3565 } 3566 3567 rc = edev->ops->vport_update(cdev, &vport_update_params); 3568 if (rc) { 3569 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 3570 return rc; 3571 } 3572 3573 return 0; 3574 } 3575 3576 static int qede_set_mcast_rx_mac(struct qede_dev *edev, 3577 enum qed_filter_xcast_params_type opcode, 3578 unsigned char *mac, int num_macs) 3579 { 3580 struct qed_filter_params filter_cmd; 3581 int i; 3582 3583 memset(&filter_cmd, 0, sizeof(filter_cmd)); 3584 filter_cmd.type = QED_FILTER_TYPE_MCAST; 3585 filter_cmd.filter.mcast.type = opcode; 3586 filter_cmd.filter.mcast.num = num_macs; 3587 3588 for (i = 0; i < num_macs; i++, mac += ETH_ALEN) 3589 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac); 3590 3591 return edev->ops->filter_config(edev->cdev, &filter_cmd); 3592 } 3593 3594 enum qede_unload_mode { 3595 QEDE_UNLOAD_NORMAL, 3596 }; 3597 3598 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode) 3599 { 3600 struct qed_link_params link_params; 3601 int rc; 3602 3603 DP_INFO(edev, "Starting qede unload\n"); 3604 3605 qede_roce_dev_event_close(edev); 3606 mutex_lock(&edev->qede_lock); 3607 edev->state = QEDE_STATE_CLOSED; 3608 3609 /* Close OS Tx */ 3610 netif_tx_disable(edev->ndev); 3611 netif_carrier_off(edev->ndev); 3612 3613 /* Reset the link */ 3614 memset(&link_params, 0, sizeof(link_params)); 3615 link_params.link_up = false; 3616 edev->ops->common->set_link(edev->cdev, &link_params); 3617 rc = qede_stop_queues(edev); 3618 if (rc) { 3619 qede_sync_free_irqs(edev); 3620 goto out; 3621 } 3622 3623 DP_INFO(edev, "Stopped Queues\n"); 3624 3625 qede_vlan_mark_nonconfigured(edev); 3626 edev->ops->fastpath_stop(edev->cdev); 3627 3628 /* Release the interrupts */ 3629 qede_sync_free_irqs(edev); 3630 edev->ops->common->set_fp_int(edev->cdev, 0); 3631 3632 qede_napi_disable_remove(edev); 3633 3634 qede_free_mem_load(edev); 3635 qede_free_fp_array(edev); 3636 3637 out: 3638 mutex_unlock(&edev->qede_lock); 3639 DP_INFO(edev, "Ending qede unload\n"); 3640 } 3641 3642 enum qede_load_mode { 3643 QEDE_LOAD_NORMAL, 3644 QEDE_LOAD_RELOAD, 3645 }; 3646 3647 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) 3648 { 3649 struct qed_link_params link_params; 3650 struct qed_link_output link_output; 3651 int rc; 3652 3653 DP_INFO(edev, "Starting qede load\n"); 3654 3655 rc = qede_set_num_queues(edev); 3656 if (rc) 3657 goto err0; 3658 3659 rc = qede_alloc_fp_array(edev); 3660 if (rc) 3661 goto err0; 3662 3663 qede_init_fp(edev); 3664 3665 rc = qede_alloc_mem_load(edev); 3666 if (rc) 3667 goto err1; 3668 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n", 3669 QEDE_QUEUE_CNT(edev), edev->num_tc); 3670 3671 rc = qede_set_real_num_queues(edev); 3672 if (rc) 3673 goto err2; 3674 3675 qede_napi_add_enable(edev); 3676 DP_INFO(edev, "Napi added and enabled\n"); 3677 3678 rc = qede_setup_irqs(edev); 3679 if (rc) 3680 goto err3; 3681 DP_INFO(edev, "Setup IRQs succeeded\n"); 3682 3683 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 3684 if (rc) 3685 goto err4; 3686 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 3687 3688 /* Add primary mac and set Rx filters */ 3689 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr); 3690 3691 mutex_lock(&edev->qede_lock); 3692 edev->state = QEDE_STATE_OPEN; 3693 mutex_unlock(&edev->qede_lock); 3694 3695 /* Program un-configured VLANs */ 3696 qede_configure_vlan_filters(edev); 3697 3698 /* Ask for link-up using current configuration */ 3699 memset(&link_params, 0, sizeof(link_params)); 3700 link_params.link_up = true; 3701 edev->ops->common->set_link(edev->cdev, &link_params); 3702 3703 /* Query whether link is already-up */ 3704 memset(&link_output, 0, sizeof(link_output)); 3705 edev->ops->common->get_link(edev->cdev, &link_output); 3706 qede_roce_dev_event_open(edev); 3707 qede_link_update(edev, &link_output); 3708 3709 DP_INFO(edev, "Ending successfully qede load\n"); 3710 3711 return 0; 3712 3713 err4: 3714 qede_sync_free_irqs(edev); 3715 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 3716 err3: 3717 qede_napi_disable_remove(edev); 3718 err2: 3719 qede_free_mem_load(edev); 3720 err1: 3721 edev->ops->common->set_fp_int(edev->cdev, 0); 3722 qede_free_fp_array(edev); 3723 edev->num_queues = 0; 3724 edev->fp_num_tx = 0; 3725 edev->fp_num_rx = 0; 3726 err0: 3727 return rc; 3728 } 3729 3730 void qede_reload(struct qede_dev *edev, 3731 void (*func)(struct qede_dev *, union qede_reload_args *), 3732 union qede_reload_args *args) 3733 { 3734 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3735 /* Call function handler to update parameters 3736 * needed for function load. 3737 */ 3738 if (func) 3739 func(edev, args); 3740 3741 qede_load(edev, QEDE_LOAD_RELOAD); 3742 3743 mutex_lock(&edev->qede_lock); 3744 qede_config_rx_mode(edev->ndev); 3745 mutex_unlock(&edev->qede_lock); 3746 } 3747 3748 /* called with rtnl_lock */ 3749 static int qede_open(struct net_device *ndev) 3750 { 3751 struct qede_dev *edev = netdev_priv(ndev); 3752 int rc; 3753 3754 netif_carrier_off(ndev); 3755 3756 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 3757 3758 rc = qede_load(edev, QEDE_LOAD_NORMAL); 3759 3760 if (rc) 3761 return rc; 3762 3763 udp_tunnel_get_rx_info(ndev); 3764 3765 edev->ops->common->update_drv_state(edev->cdev, true); 3766 3767 return 0; 3768 } 3769 3770 static int qede_close(struct net_device *ndev) 3771 { 3772 struct qede_dev *edev = netdev_priv(ndev); 3773 3774 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3775 3776 edev->ops->common->update_drv_state(edev->cdev, false); 3777 3778 return 0; 3779 } 3780 3781 static void qede_link_update(void *dev, struct qed_link_output *link) 3782 { 3783 struct qede_dev *edev = dev; 3784 3785 if (!netif_running(edev->ndev)) { 3786 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n"); 3787 return; 3788 } 3789 3790 if (link->link_up) { 3791 if (!netif_carrier_ok(edev->ndev)) { 3792 DP_NOTICE(edev, "Link is up\n"); 3793 netif_tx_start_all_queues(edev->ndev); 3794 netif_carrier_on(edev->ndev); 3795 } 3796 } else { 3797 if (netif_carrier_ok(edev->ndev)) { 3798 DP_NOTICE(edev, "Link is down\n"); 3799 netif_tx_disable(edev->ndev); 3800 netif_carrier_off(edev->ndev); 3801 } 3802 } 3803 } 3804 3805 static int qede_set_mac_addr(struct net_device *ndev, void *p) 3806 { 3807 struct qede_dev *edev = netdev_priv(ndev); 3808 struct sockaddr *addr = p; 3809 int rc; 3810 3811 ASSERT_RTNL(); /* @@@TBD To be removed */ 3812 3813 DP_INFO(edev, "Set_mac_addr called\n"); 3814 3815 if (!is_valid_ether_addr(addr->sa_data)) { 3816 DP_NOTICE(edev, "The MAC address is not valid\n"); 3817 return -EFAULT; 3818 } 3819 3820 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) { 3821 DP_NOTICE(edev, "qed prevents setting MAC\n"); 3822 return -EINVAL; 3823 } 3824 3825 ether_addr_copy(ndev->dev_addr, addr->sa_data); 3826 3827 if (!netif_running(ndev)) { 3828 DP_NOTICE(edev, "The device is currently down\n"); 3829 return 0; 3830 } 3831 3832 /* Remove the previous primary mac */ 3833 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3834 edev->primary_mac); 3835 if (rc) 3836 return rc; 3837 3838 edev->ops->common->update_mac(edev->cdev, addr->sa_data); 3839 3840 /* Add MAC filter according to the new unicast HW MAC address */ 3841 ether_addr_copy(edev->primary_mac, ndev->dev_addr); 3842 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3843 edev->primary_mac); 3844 } 3845 3846 static int 3847 qede_configure_mcast_filtering(struct net_device *ndev, 3848 enum qed_filter_rx_mode_type *accept_flags) 3849 { 3850 struct qede_dev *edev = netdev_priv(ndev); 3851 unsigned char *mc_macs, *temp; 3852 struct netdev_hw_addr *ha; 3853 int rc = 0, mc_count; 3854 size_t size; 3855 3856 size = 64 * ETH_ALEN; 3857 3858 mc_macs = kzalloc(size, GFP_KERNEL); 3859 if (!mc_macs) { 3860 DP_NOTICE(edev, 3861 "Failed to allocate memory for multicast MACs\n"); 3862 rc = -ENOMEM; 3863 goto exit; 3864 } 3865 3866 temp = mc_macs; 3867 3868 /* Remove all previously configured MAC filters */ 3869 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3870 mc_macs, 1); 3871 if (rc) 3872 goto exit; 3873 3874 netif_addr_lock_bh(ndev); 3875 3876 mc_count = netdev_mc_count(ndev); 3877 if (mc_count < 64) { 3878 netdev_for_each_mc_addr(ha, ndev) { 3879 ether_addr_copy(temp, ha->addr); 3880 temp += ETH_ALEN; 3881 } 3882 } 3883 3884 netif_addr_unlock_bh(ndev); 3885 3886 /* Check for all multicast @@@TBD resource allocation */ 3887 if ((ndev->flags & IFF_ALLMULTI) || 3888 (mc_count > 64)) { 3889 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR) 3890 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC; 3891 } else { 3892 /* Add all multicast MAC filters */ 3893 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3894 mc_macs, mc_count); 3895 } 3896 3897 exit: 3898 kfree(mc_macs); 3899 return rc; 3900 } 3901 3902 static void qede_set_rx_mode(struct net_device *ndev) 3903 { 3904 struct qede_dev *edev = netdev_priv(ndev); 3905 3906 DP_INFO(edev, "qede_set_rx_mode called\n"); 3907 3908 if (edev->state != QEDE_STATE_OPEN) { 3909 DP_INFO(edev, 3910 "qede_set_rx_mode called while interface is down\n"); 3911 } else { 3912 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags); 3913 schedule_delayed_work(&edev->sp_task, 0); 3914 } 3915 } 3916 3917 /* Must be called with qede_lock held */ 3918 static void qede_config_rx_mode(struct net_device *ndev) 3919 { 3920 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST; 3921 struct qede_dev *edev = netdev_priv(ndev); 3922 struct qed_filter_params rx_mode; 3923 unsigned char *uc_macs, *temp; 3924 struct netdev_hw_addr *ha; 3925 int rc, uc_count; 3926 size_t size; 3927 3928 netif_addr_lock_bh(ndev); 3929 3930 uc_count = netdev_uc_count(ndev); 3931 size = uc_count * ETH_ALEN; 3932 3933 uc_macs = kzalloc(size, GFP_ATOMIC); 3934 if (!uc_macs) { 3935 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n"); 3936 netif_addr_unlock_bh(ndev); 3937 return; 3938 } 3939 3940 temp = uc_macs; 3941 netdev_for_each_uc_addr(ha, ndev) { 3942 ether_addr_copy(temp, ha->addr); 3943 temp += ETH_ALEN; 3944 } 3945 3946 netif_addr_unlock_bh(ndev); 3947 3948 /* Configure the struct for the Rx mode */ 3949 memset(&rx_mode, 0, sizeof(struct qed_filter_params)); 3950 rx_mode.type = QED_FILTER_TYPE_RX_MODE; 3951 3952 /* Remove all previous unicast secondary macs and multicast macs 3953 * (configrue / leave the primary mac) 3954 */ 3955 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, 3956 edev->primary_mac); 3957 if (rc) 3958 goto out; 3959 3960 /* Check for promiscuous */ 3961 if ((ndev->flags & IFF_PROMISC) || 3962 (uc_count > edev->dev_info.num_mac_filters - 1)) { 3963 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC; 3964 } else { 3965 /* Add MAC filters according to the unicast secondary macs */ 3966 int i; 3967 3968 temp = uc_macs; 3969 for (i = 0; i < uc_count; i++) { 3970 rc = qede_set_ucast_rx_mac(edev, 3971 QED_FILTER_XCAST_TYPE_ADD, 3972 temp); 3973 if (rc) 3974 goto out; 3975 3976 temp += ETH_ALEN; 3977 } 3978 3979 rc = qede_configure_mcast_filtering(ndev, &accept_flags); 3980 if (rc) 3981 goto out; 3982 } 3983 3984 /* take care of VLAN mode */ 3985 if (ndev->flags & IFF_PROMISC) { 3986 qede_config_accept_any_vlan(edev, true); 3987 } else if (!edev->non_configured_vlans) { 3988 /* It's possible that accept_any_vlan mode is set due to a 3989 * previous setting of IFF_PROMISC. If vlan credits are 3990 * sufficient, disable accept_any_vlan. 3991 */ 3992 qede_config_accept_any_vlan(edev, false); 3993 } 3994 3995 rx_mode.filter.accept_flags = accept_flags; 3996 edev->ops->filter_config(edev->cdev, &rx_mode); 3997 out: 3998 kfree(uc_macs); 3999 } 4000