1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/version.h> 8 #include <linux/types.h> 9 #include <linux/netdevice.h> 10 #include <linux/etherdevice.h> 11 #include <linux/ethtool.h> 12 #include <linux/string.h> 13 #include <linux/pci.h> 14 #include <linux/capability.h> 15 #include <linux/vmalloc.h> 16 #include "qede.h" 17 #include "qede_ptp.h" 18 19 #define QEDE_RQSTAT_OFFSET(stat_name) \ 20 (offsetof(struct qede_rx_queue, stat_name)) 21 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 22 #define QEDE_RQSTAT(stat_name) \ 23 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 24 25 #define QEDE_SELFTEST_POLL_COUNT 100 26 #define QEDE_DUMP_VERSION 0x1 27 #define QEDE_DUMP_NVM_ARG_COUNT 2 28 29 static const struct { 30 u64 offset; 31 char string[ETH_GSTRING_LEN]; 32 } qede_rqstats_arr[] = { 33 QEDE_RQSTAT(rcv_pkts), 34 QEDE_RQSTAT(rx_hw_errors), 35 QEDE_RQSTAT(rx_alloc_errors), 36 QEDE_RQSTAT(rx_ip_frags), 37 QEDE_RQSTAT(xdp_no_pass), 38 }; 39 40 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 41 #define QEDE_TQSTAT_OFFSET(stat_name) \ 42 (offsetof(struct qede_tx_queue, stat_name)) 43 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 44 #define QEDE_TQSTAT(stat_name) \ 45 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 46 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 47 static const struct { 48 u64 offset; 49 char string[ETH_GSTRING_LEN]; 50 } qede_tqstats_arr[] = { 51 QEDE_TQSTAT(xmit_pkts), 52 QEDE_TQSTAT(stopped_cnt), 53 QEDE_TQSTAT(tx_mem_alloc_err), 54 }; 55 56 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 57 (offsetof(type, stat_name) + (base)) 58 #define QEDE_STAT_STRING(stat_name) (#stat_name) 59 #define _QEDE_STAT(stat_name, type, base, attr) \ 60 {QEDE_STAT_OFFSET(stat_name, type, base), \ 61 QEDE_STAT_STRING(stat_name), \ 62 attr} 63 #define QEDE_STAT(stat_name) \ 64 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 65 #define QEDE_PF_STAT(stat_name) \ 66 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 67 BIT(QEDE_STAT_PF_ONLY)) 68 #define QEDE_PF_BB_STAT(stat_name) \ 69 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 70 offsetof(struct qede_stats, bb), \ 71 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 72 #define QEDE_PF_AH_STAT(stat_name) \ 73 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 74 offsetof(struct qede_stats, ah), \ 75 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 76 static const struct { 77 u64 offset; 78 char string[ETH_GSTRING_LEN]; 79 unsigned long attr; 80 #define QEDE_STAT_PF_ONLY 0 81 #define QEDE_STAT_BB_ONLY 1 82 #define QEDE_STAT_AH_ONLY 2 83 } qede_stats_arr[] = { 84 QEDE_STAT(rx_ucast_bytes), 85 QEDE_STAT(rx_mcast_bytes), 86 QEDE_STAT(rx_bcast_bytes), 87 QEDE_STAT(rx_ucast_pkts), 88 QEDE_STAT(rx_mcast_pkts), 89 QEDE_STAT(rx_bcast_pkts), 90 91 QEDE_STAT(tx_ucast_bytes), 92 QEDE_STAT(tx_mcast_bytes), 93 QEDE_STAT(tx_bcast_bytes), 94 QEDE_STAT(tx_ucast_pkts), 95 QEDE_STAT(tx_mcast_pkts), 96 QEDE_STAT(tx_bcast_pkts), 97 98 QEDE_PF_STAT(rx_64_byte_packets), 99 QEDE_PF_STAT(rx_65_to_127_byte_packets), 100 QEDE_PF_STAT(rx_128_to_255_byte_packets), 101 QEDE_PF_STAT(rx_256_to_511_byte_packets), 102 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 103 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 104 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 105 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 106 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 107 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 108 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 109 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 110 QEDE_PF_STAT(tx_64_byte_packets), 111 QEDE_PF_STAT(tx_65_to_127_byte_packets), 112 QEDE_PF_STAT(tx_128_to_255_byte_packets), 113 QEDE_PF_STAT(tx_256_to_511_byte_packets), 114 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 115 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 116 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 117 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 118 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 119 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 120 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 121 QEDE_PF_STAT(rx_mac_crtl_frames), 122 QEDE_PF_STAT(tx_mac_ctrl_frames), 123 QEDE_PF_STAT(rx_pause_frames), 124 QEDE_PF_STAT(tx_pause_frames), 125 QEDE_PF_STAT(rx_pfc_frames), 126 QEDE_PF_STAT(tx_pfc_frames), 127 128 QEDE_PF_STAT(rx_crc_errors), 129 QEDE_PF_STAT(rx_align_errors), 130 QEDE_PF_STAT(rx_carrier_errors), 131 QEDE_PF_STAT(rx_oversize_packets), 132 QEDE_PF_STAT(rx_jabbers), 133 QEDE_PF_STAT(rx_undersize_packets), 134 QEDE_PF_STAT(rx_fragments), 135 QEDE_PF_BB_STAT(tx_lpi_entry_count), 136 QEDE_PF_BB_STAT(tx_total_collisions), 137 QEDE_PF_STAT(brb_truncates), 138 QEDE_PF_STAT(brb_discards), 139 QEDE_STAT(no_buff_discards), 140 QEDE_PF_STAT(mftag_filter_discards), 141 QEDE_PF_STAT(mac_filter_discards), 142 QEDE_PF_STAT(gft_filter_drop), 143 QEDE_STAT(tx_err_drop_pkts), 144 QEDE_STAT(ttl0_discard), 145 QEDE_STAT(packet_too_big_discard), 146 147 QEDE_STAT(coalesced_pkts), 148 QEDE_STAT(coalesced_events), 149 QEDE_STAT(coalesced_aborts_num), 150 QEDE_STAT(non_coalesced_pkts), 151 QEDE_STAT(coalesced_bytes), 152 153 QEDE_STAT(link_change_count), 154 QEDE_STAT(ptp_skip_txts), 155 }; 156 157 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 158 #define QEDE_STAT_IS_PF_ONLY(i) \ 159 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 160 #define QEDE_STAT_IS_BB_ONLY(i) \ 161 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 162 #define QEDE_STAT_IS_AH_ONLY(i) \ 163 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 164 165 enum { 166 QEDE_PRI_FLAG_CMT, 167 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 168 QEDE_PRI_FLAG_RECOVER_ON_ERROR, 169 QEDE_PRI_FLAG_LEN, 170 }; 171 172 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 173 "Coupled-Function", 174 "SmartAN capable", 175 "Recover on error", 176 }; 177 178 enum qede_ethtool_tests { 179 QEDE_ETHTOOL_INT_LOOPBACK, 180 QEDE_ETHTOOL_INTERRUPT_TEST, 181 QEDE_ETHTOOL_MEMORY_TEST, 182 QEDE_ETHTOOL_REGISTER_TEST, 183 QEDE_ETHTOOL_CLOCK_TEST, 184 QEDE_ETHTOOL_NVRAM_TEST, 185 QEDE_ETHTOOL_TEST_MAX 186 }; 187 188 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 189 "Internal loopback (offline)", 190 "Interrupt (online)\t", 191 "Memory (online)\t\t", 192 "Register (online)\t", 193 "Clock (online)\t\t", 194 "Nvram (online)\t\t", 195 }; 196 197 static void qede_get_strings_stats_txq(struct qede_dev *edev, 198 struct qede_tx_queue *txq, u8 **buf) 199 { 200 int i; 201 202 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 203 if (txq->is_xdp) 204 sprintf(*buf, "%d [XDP]: %s", 205 QEDE_TXQ_XDP_TO_IDX(edev, txq), 206 qede_tqstats_arr[i].string); 207 else 208 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 209 qede_tqstats_arr[i].string); 210 *buf += ETH_GSTRING_LEN; 211 } 212 } 213 214 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 215 struct qede_rx_queue *rxq, u8 **buf) 216 { 217 int i; 218 219 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 220 sprintf(*buf, "%d: %s", rxq->rxq_id, 221 qede_rqstats_arr[i].string); 222 *buf += ETH_GSTRING_LEN; 223 } 224 } 225 226 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 227 { 228 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 229 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 230 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 231 } 232 233 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 234 { 235 struct qede_fastpath *fp; 236 int i; 237 238 /* Account for queue statistics */ 239 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 240 fp = &edev->fp_array[i]; 241 242 if (fp->type & QEDE_FASTPATH_RX) 243 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 244 245 if (fp->type & QEDE_FASTPATH_XDP) 246 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 247 248 if (fp->type & QEDE_FASTPATH_TX) { 249 int cos; 250 251 for_each_cos_in_txq(edev, cos) 252 qede_get_strings_stats_txq(edev, 253 &fp->txq[cos], &buf); 254 } 255 } 256 257 /* Account for non-queue statistics */ 258 for (i = 0; i < QEDE_NUM_STATS; i++) { 259 if (qede_is_irrelevant_stat(edev, i)) 260 continue; 261 strcpy(buf, qede_stats_arr[i].string); 262 buf += ETH_GSTRING_LEN; 263 } 264 } 265 266 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 267 { 268 struct qede_dev *edev = netdev_priv(dev); 269 270 switch (stringset) { 271 case ETH_SS_STATS: 272 qede_get_strings_stats(edev, buf); 273 break; 274 case ETH_SS_PRIV_FLAGS: 275 memcpy(buf, qede_private_arr, 276 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 277 break; 278 case ETH_SS_TEST: 279 memcpy(buf, qede_tests_str_arr, 280 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 281 break; 282 default: 283 DP_VERBOSE(edev, QED_MSG_DEBUG, 284 "Unsupported stringset 0x%08x\n", stringset); 285 } 286 } 287 288 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 289 { 290 int i; 291 292 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 293 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 294 (*buf)++; 295 } 296 } 297 298 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 299 { 300 int i; 301 302 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 303 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 304 (*buf)++; 305 } 306 } 307 308 static void qede_get_ethtool_stats(struct net_device *dev, 309 struct ethtool_stats *stats, u64 *buf) 310 { 311 struct qede_dev *edev = netdev_priv(dev); 312 struct qede_fastpath *fp; 313 int i; 314 315 qede_fill_by_demand_stats(edev); 316 317 /* Need to protect the access to the fastpath array */ 318 __qede_lock(edev); 319 320 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 321 fp = &edev->fp_array[i]; 322 323 if (fp->type & QEDE_FASTPATH_RX) 324 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 325 326 if (fp->type & QEDE_FASTPATH_XDP) 327 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 328 329 if (fp->type & QEDE_FASTPATH_TX) { 330 int cos; 331 332 for_each_cos_in_txq(edev, cos) 333 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 334 } 335 } 336 337 for (i = 0; i < QEDE_NUM_STATS; i++) { 338 if (qede_is_irrelevant_stat(edev, i)) 339 continue; 340 *buf = *((u64 *)(((void *)&edev->stats) + 341 qede_stats_arr[i].offset)); 342 343 buf++; 344 } 345 346 __qede_unlock(edev); 347 } 348 349 static int qede_get_sset_count(struct net_device *dev, int stringset) 350 { 351 struct qede_dev *edev = netdev_priv(dev); 352 int num_stats = QEDE_NUM_STATS, i; 353 354 switch (stringset) { 355 case ETH_SS_STATS: 356 for (i = 0; i < QEDE_NUM_STATS; i++) 357 if (qede_is_irrelevant_stat(edev, i)) 358 num_stats--; 359 360 /* Account for the Regular Tx statistics */ 361 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 362 edev->dev_info.num_tc; 363 364 /* Account for the Regular Rx statistics */ 365 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 366 367 /* Account for XDP statistics [if needed] */ 368 if (edev->xdp_prog) 369 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 370 return num_stats; 371 372 case ETH_SS_PRIV_FLAGS: 373 return QEDE_PRI_FLAG_LEN; 374 case ETH_SS_TEST: 375 if (!IS_VF(edev)) 376 return QEDE_ETHTOOL_TEST_MAX; 377 else 378 return 0; 379 default: 380 DP_VERBOSE(edev, QED_MSG_DEBUG, 381 "Unsupported stringset 0x%08x\n", stringset); 382 return -EINVAL; 383 } 384 } 385 386 static u32 qede_get_priv_flags(struct net_device *dev) 387 { 388 struct qede_dev *edev = netdev_priv(dev); 389 u32 flags = 0; 390 391 if (edev->dev_info.common.num_hwfns > 1) 392 flags |= BIT(QEDE_PRI_FLAG_CMT); 393 394 if (edev->dev_info.common.smart_an) 395 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 396 397 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE)) 398 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR); 399 400 return flags; 401 } 402 403 static int qede_set_priv_flags(struct net_device *dev, u32 flags) 404 { 405 struct qede_dev *edev = netdev_priv(dev); 406 u32 cflags = qede_get_priv_flags(dev); 407 u32 dflags = flags ^ cflags; 408 409 /* can only change RECOVER_ON_ERROR flag */ 410 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 411 return -EINVAL; 412 413 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 414 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 415 else 416 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 417 418 return 0; 419 } 420 421 struct qede_link_mode_mapping { 422 u32 qed_link_mode; 423 u32 ethtool_link_mode; 424 }; 425 426 static const struct qede_link_mode_mapping qed_lm_map[] = { 427 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT}, 428 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 429 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 430 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 431 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 432 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 433 {QED_LM_TP_BIT, ETHTOOL_LINK_MODE_TP_BIT}, 434 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 435 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 436 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 437 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 438 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 439 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 440 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 441 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 442 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 443 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 444 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 445 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 446 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 447 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 448 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 449 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 450 {QED_LM_100000baseKR4_Full_BIT, 451 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 452 {QED_LM_100000baseSR4_Full_BIT, 453 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 454 {QED_LM_100000baseCR4_Full_BIT, 455 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 456 {QED_LM_100000baseLR4_ER4_Full_BIT, 457 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 458 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 459 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 460 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 461 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 462 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 463 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 464 }; 465 466 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 467 { \ 468 int i; \ 469 \ 470 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 471 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 472 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 473 lk_ksettings->link_modes.name); \ 474 } \ 475 } 476 477 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 478 { \ 479 int i; \ 480 \ 481 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 482 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 483 lk_ksettings->link_modes.name)) \ 484 caps |= qed_lm_map[i].qed_link_mode; \ 485 } \ 486 } 487 488 static int qede_get_link_ksettings(struct net_device *dev, 489 struct ethtool_link_ksettings *cmd) 490 { 491 struct ethtool_link_settings *base = &cmd->base; 492 struct qede_dev *edev = netdev_priv(dev); 493 struct qed_link_output current_link; 494 495 __qede_lock(edev); 496 497 memset(¤t_link, 0, sizeof(current_link)); 498 edev->ops->common->get_link(edev->cdev, ¤t_link); 499 500 ethtool_link_ksettings_zero_link_mode(cmd, supported); 501 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 502 503 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 504 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 505 506 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 507 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 508 509 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 510 base->speed = current_link.speed; 511 base->duplex = current_link.duplex; 512 } else { 513 base->speed = SPEED_UNKNOWN; 514 base->duplex = DUPLEX_UNKNOWN; 515 } 516 517 __qede_unlock(edev); 518 519 base->port = current_link.port; 520 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 521 AUTONEG_DISABLE; 522 523 return 0; 524 } 525 526 static int qede_set_link_ksettings(struct net_device *dev, 527 const struct ethtool_link_ksettings *cmd) 528 { 529 const struct ethtool_link_settings *base = &cmd->base; 530 struct qede_dev *edev = netdev_priv(dev); 531 struct qed_link_output current_link; 532 struct qed_link_params params; 533 u32 sup_caps; 534 535 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 536 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 537 return -EOPNOTSUPP; 538 } 539 memset(¤t_link, 0, sizeof(current_link)); 540 memset(¶ms, 0, sizeof(params)); 541 edev->ops->common->get_link(edev->cdev, ¤t_link); 542 543 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 544 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 545 if (base->autoneg == AUTONEG_ENABLE) { 546 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 547 DP_INFO(edev, "Auto negotiation is not supported\n"); 548 return -EOPNOTSUPP; 549 } 550 551 params.autoneg = true; 552 params.forced_speed = 0; 553 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 554 } else { /* forced speed */ 555 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 556 params.autoneg = false; 557 params.forced_speed = base->speed; 558 switch (base->speed) { 559 case SPEED_1000: 560 sup_caps = QED_LM_1000baseT_Full_BIT | 561 QED_LM_1000baseKX_Full_BIT | 562 QED_LM_1000baseX_Full_BIT; 563 if (!(current_link.supported_caps & sup_caps)) { 564 DP_INFO(edev, "1G speed not supported\n"); 565 return -EINVAL; 566 } 567 params.adv_speeds = current_link.supported_caps & 568 sup_caps; 569 break; 570 case SPEED_10000: 571 sup_caps = QED_LM_10000baseT_Full_BIT | 572 QED_LM_10000baseKR_Full_BIT | 573 QED_LM_10000baseKX4_Full_BIT | 574 QED_LM_10000baseR_FEC_BIT | 575 QED_LM_10000baseCR_Full_BIT | 576 QED_LM_10000baseSR_Full_BIT | 577 QED_LM_10000baseLR_Full_BIT | 578 QED_LM_10000baseLRM_Full_BIT; 579 if (!(current_link.supported_caps & sup_caps)) { 580 DP_INFO(edev, "10G speed not supported\n"); 581 return -EINVAL; 582 } 583 params.adv_speeds = current_link.supported_caps & 584 sup_caps; 585 break; 586 case SPEED_20000: 587 if (!(current_link.supported_caps & 588 QED_LM_20000baseKR2_Full_BIT)) { 589 DP_INFO(edev, "20G speed not supported\n"); 590 return -EINVAL; 591 } 592 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 593 break; 594 case SPEED_25000: 595 sup_caps = QED_LM_25000baseKR_Full_BIT | 596 QED_LM_25000baseCR_Full_BIT | 597 QED_LM_25000baseSR_Full_BIT; 598 if (!(current_link.supported_caps & sup_caps)) { 599 DP_INFO(edev, "25G speed not supported\n"); 600 return -EINVAL; 601 } 602 params.adv_speeds = current_link.supported_caps & 603 sup_caps; 604 break; 605 case SPEED_40000: 606 sup_caps = QED_LM_40000baseLR4_Full_BIT | 607 QED_LM_40000baseKR4_Full_BIT | 608 QED_LM_40000baseCR4_Full_BIT | 609 QED_LM_40000baseSR4_Full_BIT; 610 if (!(current_link.supported_caps & sup_caps)) { 611 DP_INFO(edev, "40G speed not supported\n"); 612 return -EINVAL; 613 } 614 params.adv_speeds = current_link.supported_caps & 615 sup_caps; 616 break; 617 case SPEED_50000: 618 sup_caps = QED_LM_50000baseKR2_Full_BIT | 619 QED_LM_50000baseCR2_Full_BIT | 620 QED_LM_50000baseSR2_Full_BIT; 621 if (!(current_link.supported_caps & sup_caps)) { 622 DP_INFO(edev, "50G speed not supported\n"); 623 return -EINVAL; 624 } 625 params.adv_speeds = current_link.supported_caps & 626 sup_caps; 627 break; 628 case SPEED_100000: 629 sup_caps = QED_LM_100000baseKR4_Full_BIT | 630 QED_LM_100000baseSR4_Full_BIT | 631 QED_LM_100000baseCR4_Full_BIT | 632 QED_LM_100000baseLR4_ER4_Full_BIT; 633 if (!(current_link.supported_caps & sup_caps)) { 634 DP_INFO(edev, "100G speed not supported\n"); 635 return -EINVAL; 636 } 637 params.adv_speeds = current_link.supported_caps & 638 sup_caps; 639 break; 640 default: 641 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 642 return -EINVAL; 643 } 644 } 645 646 params.link_up = true; 647 edev->ops->common->set_link(edev->cdev, ¶ms); 648 649 return 0; 650 } 651 652 static void qede_get_drvinfo(struct net_device *ndev, 653 struct ethtool_drvinfo *info) 654 { 655 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 656 struct qede_dev *edev = netdev_priv(ndev); 657 char mbi[ETHTOOL_FWVERS_LEN]; 658 659 strlcpy(info->driver, "qede", sizeof(info->driver)); 660 661 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 662 edev->dev_info.common.fw_major, 663 edev->dev_info.common.fw_minor, 664 edev->dev_info.common.fw_rev, 665 edev->dev_info.common.fw_eng); 666 667 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 668 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 669 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 670 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 671 edev->dev_info.common.mfw_rev & 0xFF); 672 673 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) < 674 sizeof(info->version)) 675 snprintf(info->version, sizeof(info->version), 676 "%s [storm %s]", DRV_MODULE_VERSION, storm); 677 else 678 snprintf(info->version, sizeof(info->version), 679 "%s %s", DRV_MODULE_VERSION, storm); 680 681 if (edev->dev_info.common.mbi_version) { 682 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d", 683 (edev->dev_info.common.mbi_version & 684 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET, 685 (edev->dev_info.common.mbi_version & 686 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET, 687 (edev->dev_info.common.mbi_version & 688 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET); 689 snprintf(info->fw_version, sizeof(info->fw_version), 690 "mbi %s [mfw %s]", mbi, mfw); 691 } else { 692 snprintf(info->fw_version, sizeof(info->fw_version), 693 "mfw %s", mfw); 694 } 695 696 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 697 } 698 699 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 700 { 701 struct qede_dev *edev = netdev_priv(ndev); 702 703 if (edev->dev_info.common.wol_support) { 704 wol->supported = WAKE_MAGIC; 705 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 706 } 707 } 708 709 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 710 { 711 struct qede_dev *edev = netdev_priv(ndev); 712 bool wol_requested; 713 int rc; 714 715 if (wol->wolopts & ~WAKE_MAGIC) { 716 DP_INFO(edev, 717 "Can't support WoL options other than magic-packet\n"); 718 return -EINVAL; 719 } 720 721 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 722 if (wol_requested == edev->wol_enabled) 723 return 0; 724 725 /* Need to actually change configuration */ 726 if (!edev->dev_info.common.wol_support) { 727 DP_INFO(edev, "Device doesn't support WoL\n"); 728 return -EINVAL; 729 } 730 731 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 732 if (!rc) 733 edev->wol_enabled = wol_requested; 734 735 return rc; 736 } 737 738 static u32 qede_get_msglevel(struct net_device *ndev) 739 { 740 struct qede_dev *edev = netdev_priv(ndev); 741 742 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 743 } 744 745 static void qede_set_msglevel(struct net_device *ndev, u32 level) 746 { 747 struct qede_dev *edev = netdev_priv(ndev); 748 u32 dp_module = 0; 749 u8 dp_level = 0; 750 751 qede_config_debug(level, &dp_module, &dp_level); 752 753 edev->dp_level = dp_level; 754 edev->dp_module = dp_module; 755 edev->ops->common->update_msglvl(edev->cdev, 756 dp_module, dp_level); 757 } 758 759 static int qede_nway_reset(struct net_device *dev) 760 { 761 struct qede_dev *edev = netdev_priv(dev); 762 struct qed_link_output current_link; 763 struct qed_link_params link_params; 764 765 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 766 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 767 return -EOPNOTSUPP; 768 } 769 770 if (!netif_running(dev)) 771 return 0; 772 773 memset(¤t_link, 0, sizeof(current_link)); 774 edev->ops->common->get_link(edev->cdev, ¤t_link); 775 if (!current_link.link_up) 776 return 0; 777 778 /* Toggle the link */ 779 memset(&link_params, 0, sizeof(link_params)); 780 link_params.link_up = false; 781 edev->ops->common->set_link(edev->cdev, &link_params); 782 link_params.link_up = true; 783 edev->ops->common->set_link(edev->cdev, &link_params); 784 785 return 0; 786 } 787 788 static u32 qede_get_link(struct net_device *dev) 789 { 790 struct qede_dev *edev = netdev_priv(dev); 791 struct qed_link_output current_link; 792 793 memset(¤t_link, 0, sizeof(current_link)); 794 edev->ops->common->get_link(edev->cdev, ¤t_link); 795 796 return current_link.link_up; 797 } 798 799 static int qede_flash_device(struct net_device *dev, 800 struct ethtool_flash *flash) 801 { 802 struct qede_dev *edev = netdev_priv(dev); 803 804 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 805 } 806 807 static int qede_get_coalesce(struct net_device *dev, 808 struct ethtool_coalesce *coal) 809 { 810 void *rx_handle = NULL, *tx_handle = NULL; 811 struct qede_dev *edev = netdev_priv(dev); 812 u16 rx_coal, tx_coal, i, rc = 0; 813 struct qede_fastpath *fp; 814 815 rx_coal = QED_DEFAULT_RX_USECS; 816 tx_coal = QED_DEFAULT_TX_USECS; 817 818 memset(coal, 0, sizeof(struct ethtool_coalesce)); 819 820 __qede_lock(edev); 821 if (edev->state == QEDE_STATE_OPEN) { 822 for_each_queue(i) { 823 fp = &edev->fp_array[i]; 824 825 if (fp->type & QEDE_FASTPATH_RX) { 826 rx_handle = fp->rxq->handle; 827 break; 828 } 829 } 830 831 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 832 if (rc) { 833 DP_INFO(edev, "Read Rx coalesce error\n"); 834 goto out; 835 } 836 837 for_each_queue(i) { 838 struct qede_tx_queue *txq; 839 840 fp = &edev->fp_array[i]; 841 842 /* All TX queues of given fastpath uses same 843 * coalescing value, so no need to iterate over 844 * all TCs, TC0 txq should suffice. 845 */ 846 if (fp->type & QEDE_FASTPATH_TX) { 847 txq = QEDE_FP_TC0_TXQ(fp); 848 tx_handle = txq->handle; 849 break; 850 } 851 } 852 853 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 854 if (rc) 855 DP_INFO(edev, "Read Tx coalesce error\n"); 856 } 857 858 out: 859 __qede_unlock(edev); 860 861 coal->rx_coalesce_usecs = rx_coal; 862 coal->tx_coalesce_usecs = tx_coal; 863 864 return rc; 865 } 866 867 static int qede_set_coalesce(struct net_device *dev, 868 struct ethtool_coalesce *coal) 869 { 870 struct qede_dev *edev = netdev_priv(dev); 871 struct qede_fastpath *fp; 872 int i, rc = 0; 873 u16 rxc, txc; 874 875 if (!netif_running(dev)) { 876 DP_INFO(edev, "Interface is down\n"); 877 return -EINVAL; 878 } 879 880 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 881 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 882 DP_INFO(edev, 883 "Can't support requested %s coalesce value [max supported value %d]\n", 884 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 885 "tx", QED_COALESCE_MAX); 886 return -EINVAL; 887 } 888 889 rxc = (u16)coal->rx_coalesce_usecs; 890 txc = (u16)coal->tx_coalesce_usecs; 891 for_each_queue(i) { 892 fp = &edev->fp_array[i]; 893 894 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 895 rc = edev->ops->common->set_coalesce(edev->cdev, 896 rxc, 0, 897 fp->rxq->handle); 898 if (rc) { 899 DP_INFO(edev, 900 "Set RX coalesce error, rc = %d\n", rc); 901 return rc; 902 } 903 } 904 905 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 906 struct qede_tx_queue *txq; 907 908 /* All TX queues of given fastpath uses same 909 * coalescing value, so no need to iterate over 910 * all TCs, TC0 txq should suffice. 911 */ 912 txq = QEDE_FP_TC0_TXQ(fp); 913 914 rc = edev->ops->common->set_coalesce(edev->cdev, 915 0, txc, 916 txq->handle); 917 if (rc) { 918 DP_INFO(edev, 919 "Set TX coalesce error, rc = %d\n", rc); 920 return rc; 921 } 922 } 923 } 924 925 return rc; 926 } 927 928 static void qede_get_ringparam(struct net_device *dev, 929 struct ethtool_ringparam *ering) 930 { 931 struct qede_dev *edev = netdev_priv(dev); 932 933 ering->rx_max_pending = NUM_RX_BDS_MAX; 934 ering->rx_pending = edev->q_num_rx_buffers; 935 ering->tx_max_pending = NUM_TX_BDS_MAX; 936 ering->tx_pending = edev->q_num_tx_buffers; 937 } 938 939 static int qede_set_ringparam(struct net_device *dev, 940 struct ethtool_ringparam *ering) 941 { 942 struct qede_dev *edev = netdev_priv(dev); 943 944 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 945 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 946 ering->rx_pending, ering->tx_pending); 947 948 /* Validate legality of configuration */ 949 if (ering->rx_pending > NUM_RX_BDS_MAX || 950 ering->rx_pending < NUM_RX_BDS_MIN || 951 ering->tx_pending > NUM_TX_BDS_MAX || 952 ering->tx_pending < NUM_TX_BDS_MIN) { 953 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 954 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 955 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 956 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 957 return -EINVAL; 958 } 959 960 /* Change ring size and re-load */ 961 edev->q_num_rx_buffers = ering->rx_pending; 962 edev->q_num_tx_buffers = ering->tx_pending; 963 964 qede_reload(edev, NULL, false); 965 966 return 0; 967 } 968 969 static void qede_get_pauseparam(struct net_device *dev, 970 struct ethtool_pauseparam *epause) 971 { 972 struct qede_dev *edev = netdev_priv(dev); 973 struct qed_link_output current_link; 974 975 memset(¤t_link, 0, sizeof(current_link)); 976 edev->ops->common->get_link(edev->cdev, ¤t_link); 977 978 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 979 epause->autoneg = true; 980 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 981 epause->rx_pause = true; 982 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 983 epause->tx_pause = true; 984 985 DP_VERBOSE(edev, QED_MSG_DEBUG, 986 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 987 epause->cmd, epause->autoneg, epause->rx_pause, 988 epause->tx_pause); 989 } 990 991 static int qede_set_pauseparam(struct net_device *dev, 992 struct ethtool_pauseparam *epause) 993 { 994 struct qede_dev *edev = netdev_priv(dev); 995 struct qed_link_params params; 996 struct qed_link_output current_link; 997 998 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 999 DP_INFO(edev, 1000 "Pause settings are not allowed to be changed\n"); 1001 return -EOPNOTSUPP; 1002 } 1003 1004 memset(¤t_link, 0, sizeof(current_link)); 1005 edev->ops->common->get_link(edev->cdev, ¤t_link); 1006 1007 memset(¶ms, 0, sizeof(params)); 1008 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 1009 if (epause->autoneg) { 1010 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 1011 DP_INFO(edev, "autoneg not supported\n"); 1012 return -EINVAL; 1013 } 1014 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 1015 } 1016 if (epause->rx_pause) 1017 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1018 if (epause->tx_pause) 1019 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1020 1021 params.link_up = true; 1022 edev->ops->common->set_link(edev->cdev, ¶ms); 1023 1024 return 0; 1025 } 1026 1027 static void qede_get_regs(struct net_device *ndev, 1028 struct ethtool_regs *regs, void *buffer) 1029 { 1030 struct qede_dev *edev = netdev_priv(ndev); 1031 1032 regs->version = 0; 1033 memset(buffer, 0, regs->len); 1034 1035 if (edev->ops && edev->ops->common) 1036 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1037 } 1038 1039 static int qede_get_regs_len(struct net_device *ndev) 1040 { 1041 struct qede_dev *edev = netdev_priv(ndev); 1042 1043 if (edev->ops && edev->ops->common) 1044 return edev->ops->common->dbg_all_data_size(edev->cdev); 1045 else 1046 return -EINVAL; 1047 } 1048 1049 static void qede_update_mtu(struct qede_dev *edev, 1050 struct qede_reload_args *args) 1051 { 1052 edev->ndev->mtu = args->u.mtu; 1053 } 1054 1055 /* Netdevice NDOs */ 1056 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1057 { 1058 struct qede_dev *edev = netdev_priv(ndev); 1059 struct qede_reload_args args; 1060 1061 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1062 "Configuring MTU size of %d\n", new_mtu); 1063 1064 if (new_mtu > PAGE_SIZE) 1065 ndev->features &= ~NETIF_F_GRO_HW; 1066 1067 /* Set the mtu field and re-start the interface if needed */ 1068 args.u.mtu = new_mtu; 1069 args.func = &qede_update_mtu; 1070 qede_reload(edev, &args, false); 1071 1072 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1073 1074 return 0; 1075 } 1076 1077 static void qede_get_channels(struct net_device *dev, 1078 struct ethtool_channels *channels) 1079 { 1080 struct qede_dev *edev = netdev_priv(dev); 1081 1082 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1083 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1084 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1085 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1086 edev->fp_num_rx; 1087 channels->tx_count = edev->fp_num_tx; 1088 channels->rx_count = edev->fp_num_rx; 1089 } 1090 1091 static int qede_set_channels(struct net_device *dev, 1092 struct ethtool_channels *channels) 1093 { 1094 struct qede_dev *edev = netdev_priv(dev); 1095 u32 count; 1096 1097 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1098 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1099 channels->rx_count, channels->tx_count, 1100 channels->other_count, channels->combined_count); 1101 1102 count = channels->rx_count + channels->tx_count + 1103 channels->combined_count; 1104 1105 /* We don't support `other' channels */ 1106 if (channels->other_count) { 1107 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1108 "command parameters not supported\n"); 1109 return -EINVAL; 1110 } 1111 1112 if (!(channels->combined_count || (channels->rx_count && 1113 channels->tx_count))) { 1114 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1115 "need to request at least one transmit and one receive channel\n"); 1116 return -EINVAL; 1117 } 1118 1119 if (count > QEDE_MAX_RSS_CNT(edev)) { 1120 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1121 "requested channels = %d max supported channels = %d\n", 1122 count, QEDE_MAX_RSS_CNT(edev)); 1123 return -EINVAL; 1124 } 1125 1126 /* Check if there was a change in the active parameters */ 1127 if ((count == QEDE_QUEUE_CNT(edev)) && 1128 (channels->tx_count == edev->fp_num_tx) && 1129 (channels->rx_count == edev->fp_num_rx)) { 1130 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1131 "No change in active parameters\n"); 1132 return 0; 1133 } 1134 1135 /* We need the number of queues to be divisible between the hwfns */ 1136 if ((count % edev->dev_info.common.num_hwfns) || 1137 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1138 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1139 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1140 "Number of channels must be divisible by %04x\n", 1141 edev->dev_info.common.num_hwfns); 1142 return -EINVAL; 1143 } 1144 1145 /* Set number of queues and reload if necessary */ 1146 edev->req_queues = count; 1147 edev->req_num_tx = channels->tx_count; 1148 edev->req_num_rx = channels->rx_count; 1149 /* Reset the indirection table if rx queue count is updated */ 1150 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1151 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1152 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1153 } 1154 1155 qede_reload(edev, NULL, false); 1156 1157 return 0; 1158 } 1159 1160 static int qede_get_ts_info(struct net_device *dev, 1161 struct ethtool_ts_info *info) 1162 { 1163 struct qede_dev *edev = netdev_priv(dev); 1164 1165 return qede_ptp_get_ts_info(edev, info); 1166 } 1167 1168 static int qede_set_phys_id(struct net_device *dev, 1169 enum ethtool_phys_id_state state) 1170 { 1171 struct qede_dev *edev = netdev_priv(dev); 1172 u8 led_state = 0; 1173 1174 switch (state) { 1175 case ETHTOOL_ID_ACTIVE: 1176 return 1; /* cycle on/off once per second */ 1177 1178 case ETHTOOL_ID_ON: 1179 led_state = QED_LED_MODE_ON; 1180 break; 1181 1182 case ETHTOOL_ID_OFF: 1183 led_state = QED_LED_MODE_OFF; 1184 break; 1185 1186 case ETHTOOL_ID_INACTIVE: 1187 led_state = QED_LED_MODE_RESTORE; 1188 break; 1189 } 1190 1191 edev->ops->common->set_led(edev->cdev, led_state); 1192 1193 return 0; 1194 } 1195 1196 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1197 { 1198 info->data = RXH_IP_SRC | RXH_IP_DST; 1199 1200 switch (info->flow_type) { 1201 case TCP_V4_FLOW: 1202 case TCP_V6_FLOW: 1203 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1204 break; 1205 case UDP_V4_FLOW: 1206 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1207 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1208 break; 1209 case UDP_V6_FLOW: 1210 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1211 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1212 break; 1213 case IPV4_FLOW: 1214 case IPV6_FLOW: 1215 break; 1216 default: 1217 info->data = 0; 1218 break; 1219 } 1220 1221 return 0; 1222 } 1223 1224 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1225 u32 *rule_locs) 1226 { 1227 struct qede_dev *edev = netdev_priv(dev); 1228 int rc = 0; 1229 1230 switch (info->cmd) { 1231 case ETHTOOL_GRXRINGS: 1232 info->data = QEDE_RSS_COUNT(edev); 1233 break; 1234 case ETHTOOL_GRXFH: 1235 rc = qede_get_rss_flags(edev, info); 1236 break; 1237 case ETHTOOL_GRXCLSRLCNT: 1238 info->rule_cnt = qede_get_arfs_filter_count(edev); 1239 info->data = QEDE_RFS_MAX_FLTR; 1240 break; 1241 case ETHTOOL_GRXCLSRULE: 1242 rc = qede_get_cls_rule_entry(edev, info); 1243 break; 1244 case ETHTOOL_GRXCLSRLALL: 1245 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1246 break; 1247 default: 1248 DP_ERR(edev, "Command parameters not supported\n"); 1249 rc = -EOPNOTSUPP; 1250 } 1251 1252 return rc; 1253 } 1254 1255 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1256 { 1257 struct qed_update_vport_params *vport_update_params; 1258 u8 set_caps = 0, clr_caps = 0; 1259 int rc = 0; 1260 1261 DP_VERBOSE(edev, QED_MSG_DEBUG, 1262 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1263 info->flow_type, info->data); 1264 1265 switch (info->flow_type) { 1266 case TCP_V4_FLOW: 1267 case TCP_V6_FLOW: 1268 /* For TCP only 4-tuple hash is supported */ 1269 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1270 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1271 DP_INFO(edev, "Command parameters not supported\n"); 1272 return -EINVAL; 1273 } 1274 return 0; 1275 case UDP_V4_FLOW: 1276 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1277 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1278 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1279 set_caps = QED_RSS_IPV4_UDP; 1280 DP_VERBOSE(edev, QED_MSG_DEBUG, 1281 "UDP 4-tuple enabled\n"); 1282 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1283 clr_caps = QED_RSS_IPV4_UDP; 1284 DP_VERBOSE(edev, QED_MSG_DEBUG, 1285 "UDP 4-tuple disabled\n"); 1286 } else { 1287 return -EINVAL; 1288 } 1289 break; 1290 case UDP_V6_FLOW: 1291 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1292 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1293 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1294 set_caps = QED_RSS_IPV6_UDP; 1295 DP_VERBOSE(edev, QED_MSG_DEBUG, 1296 "UDP 4-tuple enabled\n"); 1297 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1298 clr_caps = QED_RSS_IPV6_UDP; 1299 DP_VERBOSE(edev, QED_MSG_DEBUG, 1300 "UDP 4-tuple disabled\n"); 1301 } else { 1302 return -EINVAL; 1303 } 1304 break; 1305 case IPV4_FLOW: 1306 case IPV6_FLOW: 1307 /* For IP only 2-tuple hash is supported */ 1308 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1309 DP_INFO(edev, "Command parameters not supported\n"); 1310 return -EINVAL; 1311 } 1312 return 0; 1313 case SCTP_V4_FLOW: 1314 case AH_ESP_V4_FLOW: 1315 case AH_V4_FLOW: 1316 case ESP_V4_FLOW: 1317 case SCTP_V6_FLOW: 1318 case AH_ESP_V6_FLOW: 1319 case AH_V6_FLOW: 1320 case ESP_V6_FLOW: 1321 case IP_USER_FLOW: 1322 case ETHER_FLOW: 1323 /* RSS is not supported for these protocols */ 1324 if (info->data) { 1325 DP_INFO(edev, "Command parameters not supported\n"); 1326 return -EINVAL; 1327 } 1328 return 0; 1329 default: 1330 return -EINVAL; 1331 } 1332 1333 /* No action is needed if there is no change in the rss capability */ 1334 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1335 return 0; 1336 1337 /* Update internal configuration */ 1338 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1339 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1340 1341 /* Re-configure if possible */ 1342 __qede_lock(edev); 1343 if (edev->state == QEDE_STATE_OPEN) { 1344 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1345 if (!vport_update_params) { 1346 __qede_unlock(edev); 1347 return -ENOMEM; 1348 } 1349 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1350 &vport_update_params->update_rss_flg); 1351 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1352 vfree(vport_update_params); 1353 } 1354 __qede_unlock(edev); 1355 1356 return rc; 1357 } 1358 1359 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1360 { 1361 struct qede_dev *edev = netdev_priv(dev); 1362 int rc; 1363 1364 switch (info->cmd) { 1365 case ETHTOOL_SRXFH: 1366 rc = qede_set_rss_flags(edev, info); 1367 break; 1368 case ETHTOOL_SRXCLSRLINS: 1369 rc = qede_add_cls_rule(edev, info); 1370 break; 1371 case ETHTOOL_SRXCLSRLDEL: 1372 rc = qede_delete_flow_filter(edev, info->fs.location); 1373 break; 1374 default: 1375 DP_INFO(edev, "Command parameters not supported\n"); 1376 rc = -EOPNOTSUPP; 1377 } 1378 1379 return rc; 1380 } 1381 1382 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1383 { 1384 return QED_RSS_IND_TABLE_SIZE; 1385 } 1386 1387 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1388 { 1389 struct qede_dev *edev = netdev_priv(dev); 1390 1391 return sizeof(edev->rss_key); 1392 } 1393 1394 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1395 { 1396 struct qede_dev *edev = netdev_priv(dev); 1397 int i; 1398 1399 if (hfunc) 1400 *hfunc = ETH_RSS_HASH_TOP; 1401 1402 if (!indir) 1403 return 0; 1404 1405 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1406 indir[i] = edev->rss_ind_table[i]; 1407 1408 if (key) 1409 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1410 1411 return 0; 1412 } 1413 1414 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1415 const u8 *key, const u8 hfunc) 1416 { 1417 struct qed_update_vport_params *vport_update_params; 1418 struct qede_dev *edev = netdev_priv(dev); 1419 int i, rc = 0; 1420 1421 if (edev->dev_info.common.num_hwfns > 1) { 1422 DP_INFO(edev, 1423 "RSS configuration is not supported for 100G devices\n"); 1424 return -EOPNOTSUPP; 1425 } 1426 1427 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1428 return -EOPNOTSUPP; 1429 1430 if (!indir && !key) 1431 return 0; 1432 1433 if (indir) { 1434 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1435 edev->rss_ind_table[i] = indir[i]; 1436 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1437 } 1438 1439 if (key) { 1440 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1441 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1442 } 1443 1444 __qede_lock(edev); 1445 if (edev->state == QEDE_STATE_OPEN) { 1446 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1447 if (!vport_update_params) { 1448 __qede_unlock(edev); 1449 return -ENOMEM; 1450 } 1451 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1452 &vport_update_params->update_rss_flg); 1453 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1454 vfree(vport_update_params); 1455 } 1456 __qede_unlock(edev); 1457 1458 return rc; 1459 } 1460 1461 /* This function enables the interrupt generation and the NAPI on the device */ 1462 static void qede_netif_start(struct qede_dev *edev) 1463 { 1464 int i; 1465 1466 if (!netif_running(edev->ndev)) 1467 return; 1468 1469 for_each_queue(i) { 1470 /* Update and reenable interrupts */ 1471 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1472 napi_enable(&edev->fp_array[i].napi); 1473 } 1474 } 1475 1476 /* This function disables the NAPI and the interrupt generation on the device */ 1477 static void qede_netif_stop(struct qede_dev *edev) 1478 { 1479 int i; 1480 1481 for_each_queue(i) { 1482 napi_disable(&edev->fp_array[i].napi); 1483 /* Disable interrupts */ 1484 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1485 } 1486 } 1487 1488 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1489 struct sk_buff *skb) 1490 { 1491 struct qede_tx_queue *txq = NULL; 1492 struct eth_tx_1st_bd *first_bd; 1493 dma_addr_t mapping; 1494 int i, idx; 1495 u16 val; 1496 1497 for_each_queue(i) { 1498 struct qede_fastpath *fp = &edev->fp_array[i]; 1499 1500 if (fp->type & QEDE_FASTPATH_TX) { 1501 txq = QEDE_FP_TC0_TXQ(fp); 1502 break; 1503 } 1504 } 1505 1506 if (!txq) { 1507 DP_NOTICE(edev, "Tx path is not available\n"); 1508 return -1; 1509 } 1510 1511 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1512 idx = txq->sw_tx_prod; 1513 txq->sw_tx_ring.skbs[idx].skb = skb; 1514 first_bd = qed_chain_produce(&txq->tx_pbl); 1515 memset(first_bd, 0, sizeof(*first_bd)); 1516 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1517 first_bd->data.bd_flags.bitfields = val; 1518 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1519 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1520 first_bd->data.bitfields |= cpu_to_le16(val); 1521 1522 /* Map skb linear data for DMA and set in the first BD */ 1523 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1524 skb_headlen(skb), DMA_TO_DEVICE); 1525 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1526 DP_NOTICE(edev, "SKB mapping failed\n"); 1527 return -ENOMEM; 1528 } 1529 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1530 1531 /* update the first BD with the actual num BDs */ 1532 first_bd->data.nbds = 1; 1533 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1534 /* 'next page' entries are counted in the producer value */ 1535 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1536 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1537 1538 /* wmb makes sure that the BDs data is updated before updating the 1539 * producer, otherwise FW may read old data from the BDs. 1540 */ 1541 wmb(); 1542 barrier(); 1543 writel(txq->tx_db.raw, txq->doorbell_addr); 1544 1545 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1546 if (qede_txq_has_work(txq)) 1547 break; 1548 usleep_range(100, 200); 1549 } 1550 1551 if (!qede_txq_has_work(txq)) { 1552 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1553 return -1; 1554 } 1555 1556 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1557 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1558 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1559 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1560 txq->sw_tx_ring.skbs[idx].skb = NULL; 1561 1562 return 0; 1563 } 1564 1565 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1566 { 1567 u16 sw_rx_index, len; 1568 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1569 struct qede_rx_queue *rxq = NULL; 1570 struct sw_rx_data *sw_rx_data; 1571 union eth_rx_cqe *cqe; 1572 int i, iter, rc = 0; 1573 u8 *data_ptr; 1574 1575 for_each_queue(i) { 1576 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1577 rxq = edev->fp_array[i].rxq; 1578 break; 1579 } 1580 } 1581 1582 if (!rxq) { 1583 DP_NOTICE(edev, "Rx path is not available\n"); 1584 return -1; 1585 } 1586 1587 /* The packet is expected to receive on rx-queue 0 even though RSS is 1588 * enabled. This is because the queue 0 is configured as the default 1589 * queue and that the loopback traffic is not IP. 1590 */ 1591 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1592 if (!qede_has_rx_work(rxq)) { 1593 usleep_range(100, 200); 1594 continue; 1595 } 1596 1597 /* Get the CQE from the completion ring */ 1598 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1599 1600 /* Get the data from the SW ring */ 1601 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1602 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1603 fp_cqe = &cqe->fast_path_regular; 1604 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1605 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1606 fp_cqe->placement_offset + 1607 sw_rx_data->page_offset + 1608 rxq->rx_headroom); 1609 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1610 ether_addr_equal(data_ptr + ETH_ALEN, 1611 edev->ndev->dev_addr)) { 1612 for (i = ETH_HLEN; i < len; i++) 1613 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1614 rc = -1; 1615 break; 1616 } 1617 1618 qede_recycle_rx_bd_ring(rxq, 1); 1619 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1620 break; 1621 } 1622 1623 DP_INFO(edev, "Not the transmitted packet\n"); 1624 qede_recycle_rx_bd_ring(rxq, 1); 1625 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1626 } 1627 1628 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1629 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1630 return -1; 1631 } 1632 1633 qede_update_rx_prod(edev, rxq); 1634 1635 return rc; 1636 } 1637 1638 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1639 { 1640 struct qed_link_params link_params; 1641 struct sk_buff *skb = NULL; 1642 int rc = 0, i; 1643 u32 pkt_size; 1644 u8 *packet; 1645 1646 if (!netif_running(edev->ndev)) { 1647 DP_NOTICE(edev, "Interface is down\n"); 1648 return -EINVAL; 1649 } 1650 1651 qede_netif_stop(edev); 1652 1653 /* Bring up the link in Loopback mode */ 1654 memset(&link_params, 0, sizeof(link_params)); 1655 link_params.link_up = true; 1656 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1657 link_params.loopback_mode = loopback_mode; 1658 edev->ops->common->set_link(edev->cdev, &link_params); 1659 1660 /* Wait for loopback configuration to apply */ 1661 msleep_interruptible(500); 1662 1663 /* Setting max packet size to 1.5K to avoid data being split over 1664 * multiple BDs in cases where MTU > PAGE_SIZE. 1665 */ 1666 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1667 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1668 1669 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1670 if (!skb) { 1671 DP_INFO(edev, "Can't allocate skb\n"); 1672 rc = -ENOMEM; 1673 goto test_loopback_exit; 1674 } 1675 packet = skb_put(skb, pkt_size); 1676 ether_addr_copy(packet, edev->ndev->dev_addr); 1677 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1678 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1679 for (i = ETH_HLEN; i < pkt_size; i++) 1680 packet[i] = (unsigned char)(i & 0xff); 1681 1682 rc = qede_selftest_transmit_traffic(edev, skb); 1683 if (rc) 1684 goto test_loopback_exit; 1685 1686 rc = qede_selftest_receive_traffic(edev); 1687 if (rc) 1688 goto test_loopback_exit; 1689 1690 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1691 1692 test_loopback_exit: 1693 dev_kfree_skb(skb); 1694 1695 /* Bring up the link in Normal mode */ 1696 memset(&link_params, 0, sizeof(link_params)); 1697 link_params.link_up = true; 1698 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1699 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1700 edev->ops->common->set_link(edev->cdev, &link_params); 1701 1702 /* Wait for loopback configuration to apply */ 1703 msleep_interruptible(500); 1704 1705 qede_netif_start(edev); 1706 1707 return rc; 1708 } 1709 1710 static void qede_self_test(struct net_device *dev, 1711 struct ethtool_test *etest, u64 *buf) 1712 { 1713 struct qede_dev *edev = netdev_priv(dev); 1714 1715 DP_VERBOSE(edev, QED_MSG_DEBUG, 1716 "Self-test command parameters: offline = %d, external_lb = %d\n", 1717 (etest->flags & ETH_TEST_FL_OFFLINE), 1718 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1719 1720 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1721 1722 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1723 if (qede_selftest_run_loopback(edev, 1724 QED_LINK_LOOPBACK_INT_PHY)) { 1725 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1726 etest->flags |= ETH_TEST_FL_FAILED; 1727 } 1728 } 1729 1730 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1731 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1732 etest->flags |= ETH_TEST_FL_FAILED; 1733 } 1734 1735 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1736 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1737 etest->flags |= ETH_TEST_FL_FAILED; 1738 } 1739 1740 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1741 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1742 etest->flags |= ETH_TEST_FL_FAILED; 1743 } 1744 1745 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1746 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1747 etest->flags |= ETH_TEST_FL_FAILED; 1748 } 1749 1750 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1751 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1752 etest->flags |= ETH_TEST_FL_FAILED; 1753 } 1754 } 1755 1756 static int qede_set_tunable(struct net_device *dev, 1757 const struct ethtool_tunable *tuna, 1758 const void *data) 1759 { 1760 struct qede_dev *edev = netdev_priv(dev); 1761 u32 val; 1762 1763 switch (tuna->id) { 1764 case ETHTOOL_RX_COPYBREAK: 1765 val = *(u32 *)data; 1766 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1767 DP_VERBOSE(edev, QED_MSG_DEBUG, 1768 "Invalid rx copy break value, range is [%u, %u]", 1769 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1770 return -EINVAL; 1771 } 1772 1773 edev->rx_copybreak = *(u32 *)data; 1774 break; 1775 default: 1776 return -EOPNOTSUPP; 1777 } 1778 1779 return 0; 1780 } 1781 1782 static int qede_get_tunable(struct net_device *dev, 1783 const struct ethtool_tunable *tuna, void *data) 1784 { 1785 struct qede_dev *edev = netdev_priv(dev); 1786 1787 switch (tuna->id) { 1788 case ETHTOOL_RX_COPYBREAK: 1789 *(u32 *)data = edev->rx_copybreak; 1790 break; 1791 default: 1792 return -EOPNOTSUPP; 1793 } 1794 1795 return 0; 1796 } 1797 1798 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1799 { 1800 struct qede_dev *edev = netdev_priv(dev); 1801 struct qed_link_output current_link; 1802 1803 memset(¤t_link, 0, sizeof(current_link)); 1804 edev->ops->common->get_link(edev->cdev, ¤t_link); 1805 1806 if (!current_link.eee_supported) { 1807 DP_INFO(edev, "EEE is not supported\n"); 1808 return -EOPNOTSUPP; 1809 } 1810 1811 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1812 edata->advertised = ADVERTISED_1000baseT_Full; 1813 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1814 edata->advertised |= ADVERTISED_10000baseT_Full; 1815 if (current_link.sup_caps & QED_EEE_1G_ADV) 1816 edata->supported = ADVERTISED_1000baseT_Full; 1817 if (current_link.sup_caps & QED_EEE_10G_ADV) 1818 edata->supported |= ADVERTISED_10000baseT_Full; 1819 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1820 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1821 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1822 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1823 1824 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1825 edata->eee_enabled = current_link.eee.enable; 1826 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1827 edata->eee_active = current_link.eee_active; 1828 1829 return 0; 1830 } 1831 1832 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1833 { 1834 struct qede_dev *edev = netdev_priv(dev); 1835 struct qed_link_output current_link; 1836 struct qed_link_params params; 1837 1838 if (!edev->ops->common->can_link_change(edev->cdev)) { 1839 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1840 return -EOPNOTSUPP; 1841 } 1842 1843 memset(¤t_link, 0, sizeof(current_link)); 1844 edev->ops->common->get_link(edev->cdev, ¤t_link); 1845 1846 if (!current_link.eee_supported) { 1847 DP_INFO(edev, "EEE is not supported\n"); 1848 return -EOPNOTSUPP; 1849 } 1850 1851 memset(¶ms, 0, sizeof(params)); 1852 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1853 1854 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1855 ADVERTISED_10000baseT_Full)) || 1856 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1857 ADVERTISED_10000baseT_Full)) != 1858 edata->advertised)) { 1859 DP_VERBOSE(edev, QED_MSG_DEBUG, 1860 "Invalid advertised capabilities %d\n", 1861 edata->advertised); 1862 return -EINVAL; 1863 } 1864 1865 if (edata->advertised & ADVERTISED_1000baseT_Full) 1866 params.eee.adv_caps = QED_EEE_1G_ADV; 1867 if (edata->advertised & ADVERTISED_10000baseT_Full) 1868 params.eee.adv_caps |= QED_EEE_10G_ADV; 1869 params.eee.enable = edata->eee_enabled; 1870 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1871 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1872 1873 params.link_up = true; 1874 edev->ops->common->set_link(edev->cdev, ¶ms); 1875 1876 return 0; 1877 } 1878 1879 static int qede_get_module_info(struct net_device *dev, 1880 struct ethtool_modinfo *modinfo) 1881 { 1882 struct qede_dev *edev = netdev_priv(dev); 1883 u8 buf[4]; 1884 int rc; 1885 1886 /* Read first 4 bytes to find the sfp type */ 1887 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1888 QED_I2C_DEV_ADDR_A0, 0, 4); 1889 if (rc) { 1890 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1891 return rc; 1892 } 1893 1894 switch (buf[0]) { 1895 case 0x3: /* SFP, SFP+, SFP-28 */ 1896 modinfo->type = ETH_MODULE_SFF_8472; 1897 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1898 break; 1899 case 0xc: /* QSFP */ 1900 case 0xd: /* QSFP+ */ 1901 modinfo->type = ETH_MODULE_SFF_8436; 1902 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1903 break; 1904 case 0x11: /* QSFP-28 */ 1905 modinfo->type = ETH_MODULE_SFF_8636; 1906 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1907 break; 1908 default: 1909 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1910 return -EINVAL; 1911 } 1912 1913 return 0; 1914 } 1915 1916 static int qede_get_module_eeprom(struct net_device *dev, 1917 struct ethtool_eeprom *ee, u8 *data) 1918 { 1919 struct qede_dev *edev = netdev_priv(dev); 1920 u32 start_addr = ee->offset, size = 0; 1921 u8 *buf = data; 1922 int rc = 0; 1923 1924 /* Read A0 section */ 1925 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1926 /* Limit transfer size to the A0 section boundary */ 1927 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1928 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1929 else 1930 size = ee->len; 1931 1932 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1933 QED_I2C_DEV_ADDR_A0, 1934 start_addr, size); 1935 if (rc) { 1936 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1937 return rc; 1938 } 1939 1940 buf += size; 1941 start_addr += size; 1942 } 1943 1944 /* Read A2 section */ 1945 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1946 start_addr < ETH_MODULE_SFF_8472_LEN) { 1947 size = ee->len - size; 1948 /* Limit transfer size to the A2 section boundary */ 1949 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1950 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1951 start_addr -= ETH_MODULE_SFF_8079_LEN; 1952 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1953 QED_I2C_DEV_ADDR_A2, 1954 start_addr, size); 1955 if (rc) { 1956 DP_VERBOSE(edev, QED_MSG_DEBUG, 1957 "Failed reading A2 section %d\n", rc); 1958 return 0; 1959 } 1960 } 1961 1962 return rc; 1963 } 1964 1965 static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val) 1966 { 1967 struct qede_dev *edev = netdev_priv(dev); 1968 int rc = 0; 1969 1970 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) { 1971 if (val->flag > QEDE_DUMP_CMD_MAX) { 1972 DP_ERR(edev, "Invalid command %d\n", val->flag); 1973 return -EINVAL; 1974 } 1975 edev->dump_info.cmd = val->flag; 1976 edev->dump_info.num_args = 0; 1977 return 0; 1978 } 1979 1980 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) { 1981 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args); 1982 return -EINVAL; 1983 } 1984 1985 switch (edev->dump_info.cmd) { 1986 case QEDE_DUMP_CMD_NVM_CFG: 1987 edev->dump_info.args[edev->dump_info.num_args] = val->flag; 1988 edev->dump_info.num_args++; 1989 break; 1990 case QEDE_DUMP_CMD_GRCDUMP: 1991 rc = edev->ops->common->set_grc_config(edev->cdev, 1992 val->flag, 1); 1993 break; 1994 default: 1995 break; 1996 } 1997 1998 return rc; 1999 } 2000 2001 static int qede_get_dump_flag(struct net_device *dev, 2002 struct ethtool_dump *dump) 2003 { 2004 struct qede_dev *edev = netdev_priv(dev); 2005 2006 if (!edev->ops || !edev->ops->common) { 2007 DP_ERR(edev, "Edev ops not populated\n"); 2008 return -EINVAL; 2009 } 2010 2011 dump->version = QEDE_DUMP_VERSION; 2012 switch (edev->dump_info.cmd) { 2013 case QEDE_DUMP_CMD_NVM_CFG: 2014 dump->flag = QEDE_DUMP_CMD_NVM_CFG; 2015 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev, 2016 edev->dump_info.args[0]); 2017 break; 2018 case QEDE_DUMP_CMD_GRCDUMP: 2019 dump->flag = QEDE_DUMP_CMD_GRCDUMP; 2020 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev); 2021 break; 2022 default: 2023 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2024 return -EINVAL; 2025 } 2026 2027 DP_VERBOSE(edev, QED_MSG_DEBUG, 2028 "dump->version = 0x%x dump->flag = %d dump->len = %d\n", 2029 dump->version, dump->flag, dump->len); 2030 return 0; 2031 } 2032 2033 static int qede_get_dump_data(struct net_device *dev, 2034 struct ethtool_dump *dump, void *buf) 2035 { 2036 struct qede_dev *edev = netdev_priv(dev); 2037 int rc = 0; 2038 2039 if (!edev->ops || !edev->ops->common) { 2040 DP_ERR(edev, "Edev ops not populated\n"); 2041 rc = -EINVAL; 2042 goto err; 2043 } 2044 2045 switch (edev->dump_info.cmd) { 2046 case QEDE_DUMP_CMD_NVM_CFG: 2047 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) { 2048 DP_ERR(edev, "Arg count = %d required = %d\n", 2049 edev->dump_info.num_args, 2050 QEDE_DUMP_NVM_ARG_COUNT); 2051 rc = -EINVAL; 2052 goto err; 2053 } 2054 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf, 2055 edev->dump_info.args[0], 2056 edev->dump_info.args[1]); 2057 break; 2058 case QEDE_DUMP_CMD_GRCDUMP: 2059 memset(buf, 0, dump->len); 2060 rc = edev->ops->common->dbg_all_data(edev->cdev, buf); 2061 break; 2062 default: 2063 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2064 rc = -EINVAL; 2065 break; 2066 } 2067 2068 err: 2069 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; 2070 edev->dump_info.num_args = 0; 2071 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args)); 2072 2073 return rc; 2074 } 2075 2076 static const struct ethtool_ops qede_ethtool_ops = { 2077 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 2078 .get_link_ksettings = qede_get_link_ksettings, 2079 .set_link_ksettings = qede_set_link_ksettings, 2080 .get_drvinfo = qede_get_drvinfo, 2081 .get_regs_len = qede_get_regs_len, 2082 .get_regs = qede_get_regs, 2083 .get_wol = qede_get_wol, 2084 .set_wol = qede_set_wol, 2085 .get_msglevel = qede_get_msglevel, 2086 .set_msglevel = qede_set_msglevel, 2087 .nway_reset = qede_nway_reset, 2088 .get_link = qede_get_link, 2089 .get_coalesce = qede_get_coalesce, 2090 .set_coalesce = qede_set_coalesce, 2091 .get_ringparam = qede_get_ringparam, 2092 .set_ringparam = qede_set_ringparam, 2093 .get_pauseparam = qede_get_pauseparam, 2094 .set_pauseparam = qede_set_pauseparam, 2095 .get_strings = qede_get_strings, 2096 .set_phys_id = qede_set_phys_id, 2097 .get_ethtool_stats = qede_get_ethtool_stats, 2098 .get_priv_flags = qede_get_priv_flags, 2099 .set_priv_flags = qede_set_priv_flags, 2100 .get_sset_count = qede_get_sset_count, 2101 .get_rxnfc = qede_get_rxnfc, 2102 .set_rxnfc = qede_set_rxnfc, 2103 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2104 .get_rxfh_key_size = qede_get_rxfh_key_size, 2105 .get_rxfh = qede_get_rxfh, 2106 .set_rxfh = qede_set_rxfh, 2107 .get_ts_info = qede_get_ts_info, 2108 .get_channels = qede_get_channels, 2109 .set_channels = qede_set_channels, 2110 .self_test = qede_self_test, 2111 .get_module_info = qede_get_module_info, 2112 .get_module_eeprom = qede_get_module_eeprom, 2113 .get_eee = qede_get_eee, 2114 .set_eee = qede_set_eee, 2115 2116 .get_tunable = qede_get_tunable, 2117 .set_tunable = qede_set_tunable, 2118 .flash_device = qede_flash_device, 2119 .get_dump_flag = qede_get_dump_flag, 2120 .get_dump_data = qede_get_dump_data, 2121 .set_dump = qede_set_dump, 2122 }; 2123 2124 static const struct ethtool_ops qede_vf_ethtool_ops = { 2125 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 2126 .get_link_ksettings = qede_get_link_ksettings, 2127 .get_drvinfo = qede_get_drvinfo, 2128 .get_msglevel = qede_get_msglevel, 2129 .set_msglevel = qede_set_msglevel, 2130 .get_link = qede_get_link, 2131 .get_coalesce = qede_get_coalesce, 2132 .set_coalesce = qede_set_coalesce, 2133 .get_ringparam = qede_get_ringparam, 2134 .set_ringparam = qede_set_ringparam, 2135 .get_strings = qede_get_strings, 2136 .get_ethtool_stats = qede_get_ethtool_stats, 2137 .get_priv_flags = qede_get_priv_flags, 2138 .get_sset_count = qede_get_sset_count, 2139 .get_rxnfc = qede_get_rxnfc, 2140 .set_rxnfc = qede_set_rxnfc, 2141 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2142 .get_rxfh_key_size = qede_get_rxfh_key_size, 2143 .get_rxfh = qede_get_rxfh, 2144 .set_rxfh = qede_set_rxfh, 2145 .get_channels = qede_get_channels, 2146 .set_channels = qede_set_channels, 2147 .get_tunable = qede_get_tunable, 2148 .set_tunable = qede_set_tunable, 2149 }; 2150 2151 void qede_set_ethtool_ops(struct net_device *dev) 2152 { 2153 struct qede_dev *edev = netdev_priv(dev); 2154 2155 if (IS_VF(edev)) 2156 dev->ethtool_ops = &qede_vf_ethtool_ops; 2157 else 2158 dev->ethtool_ops = &qede_ethtool_ops; 2159 } 2160