1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* QLogic qed NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #ifndef _QED_MCP_H 8 #define _QED_MCP_H 9 10 #include <linux/types.h> 11 #include <linux/delay.h> 12 #include <linux/slab.h> 13 #include <linux/spinlock.h> 14 #include <linux/qed/qed_fcoe_if.h> 15 #include "qed_hsi.h" 16 #include "qed_dev_api.h" 17 18 struct qed_mcp_link_speed_params { 19 bool autoneg; 20 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 21 u32 forced_speed; /* In Mb/s */ 22 }; 23 24 struct qed_mcp_link_pause_params { 25 bool autoneg; 26 bool forced_rx; 27 bool forced_tx; 28 }; 29 30 enum qed_mcp_eee_mode { 31 QED_MCP_EEE_DISABLED, 32 QED_MCP_EEE_ENABLED, 33 QED_MCP_EEE_UNSUPPORTED 34 }; 35 36 struct qed_mcp_link_params { 37 struct qed_mcp_link_speed_params speed; 38 struct qed_mcp_link_pause_params pause; 39 u32 loopback_mode; 40 struct qed_link_eee_params eee; 41 }; 42 43 struct qed_mcp_link_capabilities { 44 u32 speed_capabilities; 45 bool default_speed_autoneg; 46 enum qed_mcp_eee_mode default_eee; 47 u32 eee_lpi_timer; 48 u8 eee_speed_caps; 49 }; 50 51 struct qed_mcp_link_state { 52 bool link_up; 53 54 u32 min_pf_rate; 55 56 /* Actual link speed in Mb/s */ 57 u32 line_speed; 58 59 /* PF max speed in Mb/s, deduced from line_speed 60 * according to PF max bandwidth configuration. 61 */ 62 u32 speed; 63 bool full_duplex; 64 65 bool an; 66 bool an_complete; 67 bool parallel_detection; 68 bool pfc_enabled; 69 70 #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 71 #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 72 #define QED_LINK_PARTNER_SPEED_10G BIT(2) 73 #define QED_LINK_PARTNER_SPEED_20G BIT(3) 74 #define QED_LINK_PARTNER_SPEED_25G BIT(4) 75 #define QED_LINK_PARTNER_SPEED_40G BIT(5) 76 #define QED_LINK_PARTNER_SPEED_50G BIT(6) 77 #define QED_LINK_PARTNER_SPEED_100G BIT(7) 78 u32 partner_adv_speed; 79 80 bool partner_tx_flow_ctrl_en; 81 bool partner_rx_flow_ctrl_en; 82 83 #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 84 #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 85 #define QED_LINK_PARTNER_BOTH_PAUSE (3) 86 u8 partner_adv_pause; 87 88 bool sfp_tx_fault; 89 bool eee_active; 90 u8 eee_adv_caps; 91 u8 eee_lp_adv_caps; 92 }; 93 94 struct qed_mcp_function_info { 95 u8 pause_on_host; 96 97 enum qed_pci_personality protocol; 98 99 u8 bandwidth_min; 100 u8 bandwidth_max; 101 102 u8 mac[ETH_ALEN]; 103 104 u64 wwn_port; 105 u64 wwn_node; 106 107 #define QED_MCP_VLAN_UNSET (0xffff) 108 u16 ovlan; 109 110 u16 mtu; 111 }; 112 113 struct qed_mcp_nvm_common { 114 u32 offset; 115 u32 param; 116 u32 resp; 117 u32 cmd; 118 }; 119 120 struct qed_mcp_drv_version { 121 u32 version; 122 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 123 }; 124 125 struct qed_mcp_lan_stats { 126 u64 ucast_rx_pkts; 127 u64 ucast_tx_pkts; 128 u32 fcs_err; 129 }; 130 131 struct qed_mcp_fcoe_stats { 132 u64 rx_pkts; 133 u64 tx_pkts; 134 u32 fcs_err; 135 u32 login_failure; 136 }; 137 138 struct qed_mcp_iscsi_stats { 139 u64 rx_pdus; 140 u64 tx_pdus; 141 u64 rx_bytes; 142 u64 tx_bytes; 143 }; 144 145 struct qed_mcp_rdma_stats { 146 u64 rx_pkts; 147 u64 tx_pkts; 148 u64 rx_bytes; 149 u64 tx_byts; 150 }; 151 152 enum qed_mcp_protocol_type { 153 QED_MCP_LAN_STATS, 154 QED_MCP_FCOE_STATS, 155 QED_MCP_ISCSI_STATS, 156 QED_MCP_RDMA_STATS 157 }; 158 159 union qed_mcp_protocol_stats { 160 struct qed_mcp_lan_stats lan_stats; 161 struct qed_mcp_fcoe_stats fcoe_stats; 162 struct qed_mcp_iscsi_stats iscsi_stats; 163 struct qed_mcp_rdma_stats rdma_stats; 164 }; 165 166 enum qed_ov_eswitch { 167 QED_OV_ESWITCH_NONE, 168 QED_OV_ESWITCH_VEB, 169 QED_OV_ESWITCH_VEPA 170 }; 171 172 enum qed_ov_client { 173 QED_OV_CLIENT_DRV, 174 QED_OV_CLIENT_USER, 175 QED_OV_CLIENT_VENDOR_SPEC 176 }; 177 178 enum qed_ov_driver_state { 179 QED_OV_DRIVER_STATE_NOT_LOADED, 180 QED_OV_DRIVER_STATE_DISABLED, 181 QED_OV_DRIVER_STATE_ACTIVE 182 }; 183 184 enum qed_ov_wol { 185 QED_OV_WOL_DEFAULT, 186 QED_OV_WOL_DISABLED, 187 QED_OV_WOL_ENABLED 188 }; 189 190 enum qed_mfw_tlv_type { 191 QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 192 QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 193 QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 194 QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 195 QED_MFW_TLV_MAX = 0x16, 196 }; 197 198 struct qed_mfw_tlv_generic { 199 #define QED_MFW_TLV_FLAGS_SIZE 2 200 struct { 201 u8 ipv4_csum_offload; 202 u8 lso_supported; 203 bool b_set; 204 } flags; 205 206 #define QED_MFW_TLV_MAC_COUNT 3 207 /* First entry for primary MAC, 2 secondary MACs possible */ 208 u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 209 bool mac_set[QED_MFW_TLV_MAC_COUNT]; 210 211 u64 rx_frames; 212 bool rx_frames_set; 213 u64 rx_bytes; 214 bool rx_bytes_set; 215 u64 tx_frames; 216 bool tx_frames_set; 217 u64 tx_bytes; 218 bool tx_bytes_set; 219 }; 220 221 union qed_mfw_tlv_data { 222 struct qed_mfw_tlv_generic generic; 223 struct qed_mfw_tlv_eth eth; 224 struct qed_mfw_tlv_fcoe fcoe; 225 struct qed_mfw_tlv_iscsi iscsi; 226 }; 227 228 #define QED_NVM_CFG_OPTION_ALL BIT(0) 229 #define QED_NVM_CFG_OPTION_INIT BIT(1) 230 #define QED_NVM_CFG_OPTION_COMMIT BIT(2) 231 #define QED_NVM_CFG_OPTION_FREE BIT(3) 232 #define QED_NVM_CFG_OPTION_ENTITY_SEL BIT(4) 233 234 /** 235 * @brief - returns the link params of the hw function 236 * 237 * @param p_hwfn 238 * 239 * @returns pointer to link params 240 */ 241 struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 242 243 /** 244 * @brief - return the link state of the hw function 245 * 246 * @param p_hwfn 247 * 248 * @returns pointer to link state 249 */ 250 struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 251 252 /** 253 * @brief - return the link capabilities of the hw function 254 * 255 * @param p_hwfn 256 * 257 * @returns pointer to link capabilities 258 */ 259 struct qed_mcp_link_capabilities 260 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 261 262 /** 263 * @brief Request the MFW to set the the link according to 'link_input'. 264 * 265 * @param p_hwfn 266 * @param p_ptt 267 * @param b_up - raise link if `true'. Reset link if `false'. 268 * 269 * @return int 270 */ 271 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 272 struct qed_ptt *p_ptt, 273 bool b_up); 274 275 /** 276 * @brief Get the management firmware version value 277 * 278 * @param p_hwfn 279 * @param p_ptt 280 * @param p_mfw_ver - mfw version value 281 * @param p_running_bundle_id - image id in nvram; Optional. 282 * 283 * @return int - 0 - operation was successful. 284 */ 285 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 286 struct qed_ptt *p_ptt, 287 u32 *p_mfw_ver, u32 *p_running_bundle_id); 288 289 /** 290 * @brief Get the MBI version value 291 * 292 * @param p_hwfn 293 * @param p_ptt 294 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 295 * 296 * @return int - 0 - operation was successful. 297 */ 298 int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 299 struct qed_ptt *p_ptt, u32 *p_mbi_ver); 300 301 /** 302 * @brief Get media type value of the port. 303 * 304 * @param cdev - qed dev pointer 305 * @param p_ptt 306 * @param mfw_ver - media type value 307 * 308 * @return int - 309 * 0 - Operation was successul. 310 * -EBUSY - Operation failed 311 */ 312 int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn, 313 struct qed_ptt *p_ptt, u32 *media_type); 314 315 /** 316 * @brief Get transceiver data of the port. 317 * 318 * @param cdev - qed dev pointer 319 * @param p_ptt 320 * @param p_transceiver_state - transceiver state. 321 * @param p_transceiver_type - media type value 322 * 323 * @return int - 324 * 0 - Operation was successful. 325 * -EBUSY - Operation failed 326 */ 327 int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn, 328 struct qed_ptt *p_ptt, 329 u32 *p_transceiver_state, 330 u32 *p_tranceiver_type); 331 332 /** 333 * @brief Get transceiver supported speed mask. 334 * 335 * @param cdev - qed dev pointer 336 * @param p_ptt 337 * @param p_speed_mask - Bit mask of all supported speeds. 338 * 339 * @return int - 340 * 0 - Operation was successful. 341 * -EBUSY - Operation failed 342 */ 343 344 int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn, 345 struct qed_ptt *p_ptt, u32 *p_speed_mask); 346 347 /** 348 * @brief Get board configuration. 349 * 350 * @param cdev - qed dev pointer 351 * @param p_ptt 352 * @param p_board_config - Board config. 353 * 354 * @return int - 355 * 0 - Operation was successful. 356 * -EBUSY - Operation failed 357 */ 358 int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn, 359 struct qed_ptt *p_ptt, u32 *p_board_config); 360 361 /** 362 * @brief General function for sending commands to the MCP 363 * mailbox. It acquire mutex lock for the entire 364 * operation, from sending the request until the MCP 365 * response. Waiting for MCP response will be checked up 366 * to 5 seconds every 5ms. 367 * 368 * @param p_hwfn - hw function 369 * @param p_ptt - PTT required for register access 370 * @param cmd - command to be sent to the MCP. 371 * @param param - Optional param 372 * @param o_mcp_resp - The MCP response code (exclude sequence). 373 * @param o_mcp_param- Optional parameter provided by the MCP 374 * response 375 * @return int - 0 - operation 376 * was successul. 377 */ 378 int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 379 struct qed_ptt *p_ptt, 380 u32 cmd, 381 u32 param, 382 u32 *o_mcp_resp, 383 u32 *o_mcp_param); 384 385 /** 386 * @brief - drains the nig, allowing completion to pass in case of pauses. 387 * (Should be called only from sleepable context) 388 * 389 * @param p_hwfn 390 * @param p_ptt 391 */ 392 int qed_mcp_drain(struct qed_hwfn *p_hwfn, 393 struct qed_ptt *p_ptt); 394 395 /** 396 * @brief Get the flash size value 397 * 398 * @param p_hwfn 399 * @param p_ptt 400 * @param p_flash_size - flash size in bytes to be filled. 401 * 402 * @return int - 0 - operation was successul. 403 */ 404 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 405 struct qed_ptt *p_ptt, 406 u32 *p_flash_size); 407 408 /** 409 * @brief Send driver version to MFW 410 * 411 * @param p_hwfn 412 * @param p_ptt 413 * @param version - Version value 414 * @param name - Protocol driver name 415 * 416 * @return int - 0 - operation was successul. 417 */ 418 int 419 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 420 struct qed_ptt *p_ptt, 421 struct qed_mcp_drv_version *p_ver); 422 423 /** 424 * @brief Read the MFW process kill counter 425 * 426 * @param p_hwfn 427 * @param p_ptt 428 * 429 * @return u32 430 */ 431 u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn, 432 struct qed_ptt *p_ptt); 433 434 /** 435 * @brief Trigger a recovery process 436 * 437 * @param p_hwfn 438 * @param p_ptt 439 * 440 * @return int 441 */ 442 int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 443 444 /** 445 * @brief A recovery handler must call this function as its first step. 446 * It is assumed that the handler is not run from an interrupt context. 447 * 448 * @param cdev 449 * @param p_ptt 450 * 451 * @return int 452 */ 453 int qed_recovery_prolog(struct qed_dev *cdev); 454 455 /** 456 * @brief Notify MFW about the change in base device properties 457 * 458 * @param p_hwfn 459 * @param p_ptt 460 * @param client - qed client type 461 * 462 * @return int - 0 - operation was successful. 463 */ 464 int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 465 struct qed_ptt *p_ptt, 466 enum qed_ov_client client); 467 468 /** 469 * @brief Notify MFW about the driver state 470 * 471 * @param p_hwfn 472 * @param p_ptt 473 * @param drv_state - Driver state 474 * 475 * @return int - 0 - operation was successful. 476 */ 477 int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 478 struct qed_ptt *p_ptt, 479 enum qed_ov_driver_state drv_state); 480 481 /** 482 * @brief Send MTU size to MFW 483 * 484 * @param p_hwfn 485 * @param p_ptt 486 * @param mtu - MTU size 487 * 488 * @return int - 0 - operation was successful. 489 */ 490 int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 491 struct qed_ptt *p_ptt, u16 mtu); 492 493 /** 494 * @brief Send MAC address to MFW 495 * 496 * @param p_hwfn 497 * @param p_ptt 498 * @param mac - MAC address 499 * 500 * @return int - 0 - operation was successful. 501 */ 502 int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 503 struct qed_ptt *p_ptt, u8 *mac); 504 505 /** 506 * @brief Send WOL mode to MFW 507 * 508 * @param p_hwfn 509 * @param p_ptt 510 * @param wol - WOL mode 511 * 512 * @return int - 0 - operation was successful. 513 */ 514 int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 515 struct qed_ptt *p_ptt, 516 enum qed_ov_wol wol); 517 518 /** 519 * @brief Set LED status 520 * 521 * @param p_hwfn 522 * @param p_ptt 523 * @param mode - LED mode 524 * 525 * @return int - 0 - operation was successful. 526 */ 527 int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 528 struct qed_ptt *p_ptt, 529 enum qed_led_mode mode); 530 531 /** 532 * @brief Read from nvm 533 * 534 * @param cdev 535 * @param addr - nvm offset 536 * @param p_buf - nvm read buffer 537 * @param len - buffer len 538 * 539 * @return int - 0 - operation was successful. 540 */ 541 int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 542 543 /** 544 * @brief Write to nvm 545 * 546 * @param cdev 547 * @param addr - nvm offset 548 * @param cmd - nvm command 549 * @param p_buf - nvm write buffer 550 * @param len - buffer len 551 * 552 * @return int - 0 - operation was successful. 553 */ 554 int qed_mcp_nvm_write(struct qed_dev *cdev, 555 u32 cmd, u32 addr, u8 *p_buf, u32 len); 556 557 /** 558 * @brief Check latest response 559 * 560 * @param cdev 561 * @param p_buf - nvm write buffer 562 * 563 * @return int - 0 - operation was successful. 564 */ 565 int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 566 567 struct qed_nvm_image_att { 568 u32 start_addr; 569 u32 length; 570 }; 571 572 /** 573 * @brief Allows reading a whole nvram image 574 * 575 * @param p_hwfn 576 * @param image_id - image to get attributes for 577 * @param p_image_att - image attributes structure into which to fill data 578 * 579 * @return int - 0 - operation was successful. 580 */ 581 int 582 qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 583 enum qed_nvm_images image_id, 584 struct qed_nvm_image_att *p_image_att); 585 586 /** 587 * @brief Allows reading a whole nvram image 588 * 589 * @param p_hwfn 590 * @param image_id - image requested for reading 591 * @param p_buffer - allocated buffer into which to fill data 592 * @param buffer_len - length of the allocated buffer. 593 * 594 * @return 0 iff p_buffer now contains the nvram image. 595 */ 596 int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 597 enum qed_nvm_images image_id, 598 u8 *p_buffer, u32 buffer_len); 599 600 /** 601 * @brief Bist register test 602 * 603 * @param p_hwfn - hw function 604 * @param p_ptt - PTT required for register access 605 * 606 * @return int - 0 - operation was successful. 607 */ 608 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 609 struct qed_ptt *p_ptt); 610 611 /** 612 * @brief Bist clock test 613 * 614 * @param p_hwfn - hw function 615 * @param p_ptt - PTT required for register access 616 * 617 * @return int - 0 - operation was successful. 618 */ 619 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 620 struct qed_ptt *p_ptt); 621 622 /** 623 * @brief Bist nvm test - get number of images 624 * 625 * @param p_hwfn - hw function 626 * @param p_ptt - PTT required for register access 627 * @param num_images - number of images if operation was 628 * successful. 0 if not. 629 * 630 * @return int - 0 - operation was successful. 631 */ 632 int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 633 struct qed_ptt *p_ptt, 634 u32 *num_images); 635 636 /** 637 * @brief Bist nvm test - get image attributes by index 638 * 639 * @param p_hwfn - hw function 640 * @param p_ptt - PTT required for register access 641 * @param p_image_att - Attributes of image 642 * @param image_index - Index of image to get information for 643 * 644 * @return int - 0 - operation was successful. 645 */ 646 int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 647 struct qed_ptt *p_ptt, 648 struct bist_nvm_image_att *p_image_att, 649 u32 image_index); 650 651 /** 652 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 653 * from the qed client and send it to the MFW. 654 * 655 * @param p_hwfn 656 * @param p_ptt 657 * 658 * @param return 0 upon success. 659 */ 660 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 661 662 /** 663 * @brief Send raw debug data to the MFW 664 * 665 * @param p_hwfn 666 * @param p_ptt 667 * @param p_buf - raw debug data buffer 668 * @param size - buffer size 669 */ 670 int 671 qed_mcp_send_raw_debug_data(struct qed_hwfn *p_hwfn, 672 struct qed_ptt *p_ptt, u8 *p_buf, u32 size); 673 674 /* Using hwfn number (and not pf_num) is required since in CMT mode, 675 * same pf_num may be used by two different hwfn 676 * TODO - this shouldn't really be in .h file, but until all fields 677 * required during hw-init will be placed in their correct place in shmem 678 * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 679 */ 680 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 681 ((rel_pfid) | \ 682 ((p_hwfn)->abs_pf_id & 1) << 3) : \ 683 rel_pfid) 684 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 685 686 struct qed_mcp_info { 687 /* List for mailbox commands which were sent and wait for a response */ 688 struct list_head cmd_list; 689 690 /* Spinlock used for protecting the access to the mailbox commands list 691 * and the sending of the commands. 692 */ 693 spinlock_t cmd_lock; 694 695 /* Flag to indicate whether sending a MFW mailbox command is blocked */ 696 bool b_block_cmd; 697 698 /* Spinlock used for syncing SW link-changes and link-changes 699 * originating from attention context. 700 */ 701 spinlock_t link_lock; 702 703 u32 public_base; 704 u32 drv_mb_addr; 705 u32 mfw_mb_addr; 706 u32 port_addr; 707 u16 drv_mb_seq; 708 u16 drv_pulse_seq; 709 struct qed_mcp_link_params link_input; 710 struct qed_mcp_link_state link_output; 711 struct qed_mcp_link_capabilities link_capabilities; 712 struct qed_mcp_function_info func_info; 713 u8 *mfw_mb_cur; 714 u8 *mfw_mb_shadow; 715 u16 mfw_mb_length; 716 u32 mcp_hist; 717 718 /* Capabilties negotiated with the MFW */ 719 u32 capabilities; 720 721 /* S/N for debug data mailbox commands */ 722 atomic_t dbg_data_seq; 723 }; 724 725 struct qed_mcp_mb_params { 726 u32 cmd; 727 u32 param; 728 void *p_data_src; 729 void *p_data_dst; 730 u8 data_src_size; 731 u8 data_dst_size; 732 u32 mcp_resp; 733 u32 mcp_param; 734 u32 flags; 735 #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0) 736 #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1) 737 #define QED_MB_FLAGS_IS_SET(params, flag) \ 738 ({ typeof(params) __params = (params); \ 739 (__params && (__params->flags & QED_MB_FLAG_ ## flag)); }) 740 }; 741 742 struct qed_drv_tlv_hdr { 743 u8 tlv_type; 744 u8 tlv_length; /* In dwords - not including this header */ 745 u8 tlv_reserved; 746 #define QED_DRV_TLV_FLAGS_CHANGED 0x01 747 u8 tlv_flags; 748 }; 749 750 /** 751 * @brief Initialize the interface with the MCP 752 * 753 * @param p_hwfn - HW func 754 * @param p_ptt - PTT required for register access 755 * 756 * @return int 757 */ 758 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 759 struct qed_ptt *p_ptt); 760 761 /** 762 * @brief Initialize the port interface with the MCP 763 * 764 * @param p_hwfn 765 * @param p_ptt 766 * Can only be called after `num_ports_in_engines' is set 767 */ 768 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 769 struct qed_ptt *p_ptt); 770 /** 771 * @brief Releases resources allocated during the init process. 772 * 773 * @param p_hwfn - HW func 774 * @param p_ptt - PTT required for register access 775 * 776 * @return int 777 */ 778 779 int qed_mcp_free(struct qed_hwfn *p_hwfn); 780 781 /** 782 * @brief This function is called from the DPC context. After 783 * pointing PTT to the mfw mb, check for events sent by the MCP 784 * to the driver and ack them. In case a critical event 785 * detected, it will be handled here, otherwise the work will be 786 * queued to a sleepable work-queue. 787 * 788 * @param p_hwfn - HW function 789 * @param p_ptt - PTT required for register access 790 * @return int - 0 - operation 791 * was successul. 792 */ 793 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 794 struct qed_ptt *p_ptt); 795 796 enum qed_drv_role { 797 QED_DRV_ROLE_OS, 798 QED_DRV_ROLE_KDUMP, 799 }; 800 801 struct qed_load_req_params { 802 /* Input params */ 803 enum qed_drv_role drv_role; 804 u8 timeout_val; 805 bool avoid_eng_reset; 806 enum qed_override_force_load override_force_load; 807 808 /* Output params */ 809 u32 load_code; 810 }; 811 812 /** 813 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 814 * returns whether this PF is the first on the engine/port or function. 815 * 816 * @param p_hwfn 817 * @param p_ptt 818 * @param p_params 819 * 820 * @return int - 0 - Operation was successful. 821 */ 822 int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 823 struct qed_ptt *p_ptt, 824 struct qed_load_req_params *p_params); 825 826 /** 827 * @brief Sends a LOAD_DONE message to the MFW 828 * 829 * @param p_hwfn 830 * @param p_ptt 831 * 832 * @return int - 0 - Operation was successful. 833 */ 834 int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 835 836 /** 837 * @brief Sends a UNLOAD_REQ message to the MFW 838 * 839 * @param p_hwfn 840 * @param p_ptt 841 * 842 * @return int - 0 - Operation was successful. 843 */ 844 int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 845 846 /** 847 * @brief Sends a UNLOAD_DONE message to the MFW 848 * 849 * @param p_hwfn 850 * @param p_ptt 851 * 852 * @return int - 0 - Operation was successful. 853 */ 854 int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 855 856 /** 857 * @brief Read the MFW mailbox into Current buffer. 858 * 859 * @param p_hwfn 860 * @param p_ptt 861 */ 862 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 863 struct qed_ptt *p_ptt); 864 865 /** 866 * @brief Ack to mfw that driver finished FLR process for VFs 867 * 868 * @param p_hwfn 869 * @param p_ptt 870 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 871 * 872 * @param return int - 0 upon success. 873 */ 874 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 875 struct qed_ptt *p_ptt, u32 *vfs_to_ack); 876 877 /** 878 * @brief - calls during init to read shmem of all function-related info. 879 * 880 * @param p_hwfn 881 * 882 * @param return 0 upon success. 883 */ 884 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 885 struct qed_ptt *p_ptt); 886 887 /** 888 * @brief - Reset the MCP using mailbox command. 889 * 890 * @param p_hwfn 891 * @param p_ptt 892 * 893 * @param return 0 upon success. 894 */ 895 int qed_mcp_reset(struct qed_hwfn *p_hwfn, 896 struct qed_ptt *p_ptt); 897 898 /** 899 * @brief - Sends an NVM read command request to the MFW to get 900 * a buffer. 901 * 902 * @param p_hwfn 903 * @param p_ptt 904 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 905 * DRV_MSG_CODE_NVM_READ_NVRAM commands 906 * @param param - [0:23] - Offset [24:31] - Size 907 * @param o_mcp_resp - MCP response 908 * @param o_mcp_param - MCP response param 909 * @param o_txn_size - Buffer size output 910 * @param o_buf - Pointer to the buffer returned by the MFW. 911 * 912 * @param return 0 upon success. 913 */ 914 int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 915 struct qed_ptt *p_ptt, 916 u32 cmd, 917 u32 param, 918 u32 *o_mcp_resp, 919 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 920 921 /** 922 * @brief Read from sfp 923 * 924 * @param p_hwfn - hw function 925 * @param p_ptt - PTT required for register access 926 * @param port - transceiver port 927 * @param addr - I2C address 928 * @param offset - offset in sfp 929 * @param len - buffer length 930 * @param p_buf - buffer to read into 931 * 932 * @return int - 0 - operation was successful. 933 */ 934 int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 935 u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf); 936 937 /** 938 * @brief indicates whether the MFW objects [under mcp_info] are accessible 939 * 940 * @param p_hwfn 941 * 942 * @return true iff MFW is running and mcp_info is initialized 943 */ 944 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 945 946 /** 947 * @brief request MFW to configure MSI-X for a VF 948 * 949 * @param p_hwfn 950 * @param p_ptt 951 * @param vf_id - absolute inside engine 952 * @param num_sbs - number of entries to request 953 * 954 * @return int 955 */ 956 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 957 struct qed_ptt *p_ptt, u8 vf_id, u8 num); 958 959 /** 960 * @brief - Halt the MCP. 961 * 962 * @param p_hwfn 963 * @param p_ptt 964 * 965 * @param return 0 upon success. 966 */ 967 int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 968 969 /** 970 * @brief - Wake up the MCP. 971 * 972 * @param p_hwfn 973 * @param p_ptt 974 * 975 * @param return 0 upon success. 976 */ 977 int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 978 979 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 980 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 981 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 982 struct qed_ptt *p_ptt, 983 struct qed_mcp_link_state *p_link, 984 u8 max_bw); 985 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 986 struct qed_ptt *p_ptt, 987 struct qed_mcp_link_state *p_link, 988 u8 min_bw); 989 990 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 991 struct qed_ptt *p_ptt, u32 mask_parities); 992 993 /* @brief - Gets the mdump retained data from the MFW. 994 * 995 * @param p_hwfn 996 * @param p_ptt 997 * @param p_mdump_retain 998 * 999 * @param return 0 upon success. 1000 */ 1001 int 1002 qed_mcp_mdump_get_retain(struct qed_hwfn *p_hwfn, 1003 struct qed_ptt *p_ptt, 1004 struct mdump_retain_data_stc *p_mdump_retain); 1005 1006 /** 1007 * @brief - Sets the MFW's max value for the given resource 1008 * 1009 * @param p_hwfn 1010 * @param p_ptt 1011 * @param res_id 1012 * @param resc_max_val 1013 * @param p_mcp_resp 1014 * 1015 * @return int - 0 - operation was successful. 1016 */ 1017 int 1018 qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 1019 struct qed_ptt *p_ptt, 1020 enum qed_resources res_id, 1021 u32 resc_max_val, u32 *p_mcp_resp); 1022 1023 /** 1024 * @brief - Gets the MFW allocation info for the given resource 1025 * 1026 * @param p_hwfn 1027 * @param p_ptt 1028 * @param res_id 1029 * @param p_mcp_resp 1030 * @param p_resc_num 1031 * @param p_resc_start 1032 * 1033 * @return int - 0 - operation was successful. 1034 */ 1035 int 1036 qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 1037 struct qed_ptt *p_ptt, 1038 enum qed_resources res_id, 1039 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 1040 1041 /** 1042 * @brief Send eswitch mode to MFW 1043 * 1044 * @param p_hwfn 1045 * @param p_ptt 1046 * @param eswitch - eswitch mode 1047 * 1048 * @return int - 0 - operation was successful. 1049 */ 1050 int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 1051 struct qed_ptt *p_ptt, 1052 enum qed_ov_eswitch eswitch); 1053 1054 #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 1055 #define QED_MCP_RESC_LOCK_MAX_VAL 31 1056 1057 enum qed_resc_lock { 1058 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 1059 QED_RESC_LOCK_PTP_PORT0, 1060 QED_RESC_LOCK_PTP_PORT1, 1061 QED_RESC_LOCK_PTP_PORT2, 1062 QED_RESC_LOCK_PTP_PORT3, 1063 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 1064 QED_RESC_LOCK_RESC_INVALID 1065 }; 1066 1067 /** 1068 * @brief - Initiates PF FLR 1069 * 1070 * @param p_hwfn 1071 * @param p_ptt 1072 * 1073 * @return int - 0 - operation was successful. 1074 */ 1075 int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1076 struct qed_resc_lock_params { 1077 /* Resource number [valid values are 0..31] */ 1078 u8 resource; 1079 1080 /* Lock timeout value in seconds [default, none or 1..254] */ 1081 u8 timeout; 1082 #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 1083 #define QED_MCP_RESC_LOCK_TO_NONE 255 1084 1085 /* Number of times to retry locking */ 1086 u8 retry_num; 1087 #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 1088 1089 /* The interval in usec between retries */ 1090 u16 retry_interval; 1091 #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 1092 1093 /* Use sleep or delay between retries */ 1094 bool sleep_b4_retry; 1095 1096 /* Will be set as true if the resource is free and granted */ 1097 bool b_granted; 1098 1099 /* Will be filled with the resource owner. 1100 * [0..15 = PF0-15, 16 = MFW] 1101 */ 1102 u8 owner; 1103 }; 1104 1105 /** 1106 * @brief Acquires MFW generic resource lock 1107 * 1108 * @param p_hwfn 1109 * @param p_ptt 1110 * @param p_params 1111 * 1112 * @return int - 0 - operation was successful. 1113 */ 1114 int 1115 qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 1116 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 1117 1118 struct qed_resc_unlock_params { 1119 /* Resource number [valid values are 0..31] */ 1120 u8 resource; 1121 1122 /* Allow to release a resource even if belongs to another PF */ 1123 bool b_force; 1124 1125 /* Will be set as true if the resource is released */ 1126 bool b_released; 1127 }; 1128 1129 /** 1130 * @brief Releases MFW generic resource lock 1131 * 1132 * @param p_hwfn 1133 * @param p_ptt 1134 * @param p_params 1135 * 1136 * @return int - 0 - operation was successful. 1137 */ 1138 int 1139 qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 1140 struct qed_ptt *p_ptt, 1141 struct qed_resc_unlock_params *p_params); 1142 1143 /** 1144 * @brief - default initialization for lock/unlock resource structs 1145 * 1146 * @param p_lock - lock params struct to be initialized; Can be NULL 1147 * @param p_unlock - unlock params struct to be initialized; Can be NULL 1148 * @param resource - the requested resource 1149 * @paral b_is_permanent - disable retries & aging when set 1150 */ 1151 void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1152 struct qed_resc_unlock_params *p_unlock, 1153 enum qed_resc_lock 1154 resource, bool b_is_permanent); 1155 1156 /** 1157 * @brief - Return whether management firmware support smart AN 1158 * 1159 * @param p_hwfn 1160 * 1161 * @return bool - true if feature is supported. 1162 */ 1163 bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn); 1164 1165 /** 1166 * @brief Learn of supported MFW features; To be done during early init 1167 * 1168 * @param p_hwfn 1169 * @param p_ptt 1170 */ 1171 int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1172 1173 /** 1174 * @brief Inform MFW of set of features supported by driver. Should be done 1175 * inside the content of the LOAD_REQ. 1176 * 1177 * @param p_hwfn 1178 * @param p_ptt 1179 */ 1180 int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1181 1182 /** 1183 * @brief Read ufp config from the shared memory. 1184 * 1185 * @param p_hwfn 1186 * @param p_ptt 1187 */ 1188 void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1189 1190 /** 1191 * @brief Populate the nvm info shadow in the given hardware function 1192 * 1193 * @param p_hwfn 1194 */ 1195 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 1196 1197 /** 1198 * @brief Delete nvm info shadow in the given hardware function 1199 * 1200 * @param p_hwfn 1201 */ 1202 void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn); 1203 1204 /** 1205 * @brief Get the engine affinity configuration. 1206 * 1207 * @param p_hwfn 1208 * @param p_ptt 1209 */ 1210 int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1211 1212 /** 1213 * @brief Get the PPFID bitmap. 1214 * 1215 * @param p_hwfn 1216 * @param p_ptt 1217 */ 1218 int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1219 1220 /** 1221 * @brief Get NVM config attribute value. 1222 * 1223 * @param p_hwfn 1224 * @param p_ptt 1225 * @param option_id 1226 * @param entity_id 1227 * @param flags 1228 * @param p_buf 1229 * @param p_len 1230 */ 1231 int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1232 u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 1233 u32 *p_len); 1234 1235 /** 1236 * @brief Set NVM config attribute value. 1237 * 1238 * @param p_hwfn 1239 * @param p_ptt 1240 * @param option_id 1241 * @param entity_id 1242 * @param flags 1243 * @param p_buf 1244 * @param len 1245 */ 1246 int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1247 u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 1248 u32 len); 1249 #endif 1250