xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision f240b6882211aae7155a9839dff1426e2853fe30)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
3fe56b9e6SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
31fe56b9e6SYuval Mintz  */
32fe56b9e6SYuval Mintz 
33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
34fe56b9e6SYuval Mintz #define _QED_MCP_H
35fe56b9e6SYuval Mintz 
36fe56b9e6SYuval Mintz #include <linux/types.h>
37fe56b9e6SYuval Mintz #include <linux/delay.h>
38fe56b9e6SYuval Mintz #include <linux/slab.h>
395529bad9STomer Tayar #include <linux/spinlock.h>
401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
41fe56b9e6SYuval Mintz #include "qed_hsi.h"
425d24bcf1STomer Tayar #include "qed_dev_api.h"
43fe56b9e6SYuval Mintz 
44cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
45cc875c2eSYuval Mintz 	bool    autoneg;
46cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
47cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
48cc875c2eSYuval Mintz };
49cc875c2eSYuval Mintz 
50cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
51cc875c2eSYuval Mintz 	bool    autoneg;
52cc875c2eSYuval Mintz 	bool    forced_rx;
53cc875c2eSYuval Mintz 	bool    forced_tx;
54cc875c2eSYuval Mintz };
55cc875c2eSYuval Mintz 
56645874e5SSudarsana Reddy Kalluru enum qed_mcp_eee_mode {
57645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_DISABLED,
58645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_ENABLED,
59645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_UNSUPPORTED
60645874e5SSudarsana Reddy Kalluru };
61645874e5SSudarsana Reddy Kalluru 
62cc875c2eSYuval Mintz struct qed_mcp_link_params {
63cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params speed;
64cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params pause;
65cc875c2eSYuval Mintz 	u32 loopback_mode;
66645874e5SSudarsana Reddy Kalluru 	struct qed_link_eee_params eee;
67cc875c2eSYuval Mintz };
68cc875c2eSYuval Mintz 
69cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
70cc875c2eSYuval Mintz 	u32 speed_capabilities;
7134f9199cSsudarsana.kalluru@cavium.com 	bool default_speed_autoneg;
72645874e5SSudarsana Reddy Kalluru 	enum qed_mcp_eee_mode default_eee;
73645874e5SSudarsana Reddy Kalluru 	u32 eee_lpi_timer;
74645874e5SSudarsana Reddy Kalluru 	u8 eee_speed_caps;
75cc875c2eSYuval Mintz };
76cc875c2eSYuval Mintz 
77cc875c2eSYuval Mintz struct qed_mcp_link_state {
78cc875c2eSYuval Mintz 	bool    link_up;
79cc875c2eSYuval Mintz 
80a64b02d5SManish Chopra 	u32	min_pf_rate;
81a64b02d5SManish Chopra 
824b01e519SManish Chopra 	/* Actual link speed in Mb/s */
834b01e519SManish Chopra 	u32	line_speed;
844b01e519SManish Chopra 
854b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
864b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
874b01e519SManish Chopra 	 */
884b01e519SManish Chopra 	u32     speed;
89cc875c2eSYuval Mintz 	bool    full_duplex;
90cc875c2eSYuval Mintz 
91cc875c2eSYuval Mintz 	bool    an;
92cc875c2eSYuval Mintz 	bool    an_complete;
93cc875c2eSYuval Mintz 	bool    parallel_detection;
94cc875c2eSYuval Mintz 	bool    pfc_enabled;
95cc875c2eSYuval Mintz 
96cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
97cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
98cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
100054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
101054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
102054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
103054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
104cc875c2eSYuval Mintz 	u32     partner_adv_speed;
105cc875c2eSYuval Mintz 
106cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
107cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
108cc875c2eSYuval Mintz 
109cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
110cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
111cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
112cc875c2eSYuval Mintz 	u8      partner_adv_pause;
113cc875c2eSYuval Mintz 
114cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
115645874e5SSudarsana Reddy Kalluru 	bool    eee_active;
116645874e5SSudarsana Reddy Kalluru 	u8      eee_adv_caps;
117645874e5SSudarsana Reddy Kalluru 	u8      eee_lp_adv_caps;
118cc875c2eSYuval Mintz };
119cc875c2eSYuval Mintz 
120fe56b9e6SYuval Mintz struct qed_mcp_function_info {
121fe56b9e6SYuval Mintz 	u8				pause_on_host;
122fe56b9e6SYuval Mintz 
123fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
124fe56b9e6SYuval Mintz 
125fe56b9e6SYuval Mintz 	u8				bandwidth_min;
126fe56b9e6SYuval Mintz 	u8				bandwidth_max;
127fe56b9e6SYuval Mintz 
128fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
129fe56b9e6SYuval Mintz 
130fe56b9e6SYuval Mintz 	u64				wwn_port;
131fe56b9e6SYuval Mintz 	u64				wwn_node;
132fe56b9e6SYuval Mintz 
133fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
134fe56b9e6SYuval Mintz 	u16				ovlan;
1350fefbfbaSSudarsana Kalluru 
1360fefbfbaSSudarsana Kalluru 	u16				mtu;
137fe56b9e6SYuval Mintz };
138fe56b9e6SYuval Mintz 
139fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
140fe56b9e6SYuval Mintz 	u32	offset;
141fe56b9e6SYuval Mintz 	u32	param;
142fe56b9e6SYuval Mintz 	u32	resp;
143fe56b9e6SYuval Mintz 	u32	cmd;
144fe56b9e6SYuval Mintz };
145fe56b9e6SYuval Mintz 
146fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
147fe56b9e6SYuval Mintz 	u32	version;
148fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
149fe56b9e6SYuval Mintz };
150fe56b9e6SYuval Mintz 
1516c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1526c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1536c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1546c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1556c754246SSudarsana Reddy Kalluru };
1566c754246SSudarsana Reddy Kalluru 
1576c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1586c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1596c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1606c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1616c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1626c754246SSudarsana Reddy Kalluru };
1636c754246SSudarsana Reddy Kalluru 
1646c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1656c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1666c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1676c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1686c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1696c754246SSudarsana Reddy Kalluru };
1706c754246SSudarsana Reddy Kalluru 
1716c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1726c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1736c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1746c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1756c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1766c754246SSudarsana Reddy Kalluru };
1776c754246SSudarsana Reddy Kalluru 
1786c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1796c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1806c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1816c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1826c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1836c754246SSudarsana Reddy Kalluru };
1846c754246SSudarsana Reddy Kalluru 
1856c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1866c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1876c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1886c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1896c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1906c754246SSudarsana Reddy Kalluru };
1916c754246SSudarsana Reddy Kalluru 
1920fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1930fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1940fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1950fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1960fefbfbaSSudarsana Kalluru };
1970fefbfbaSSudarsana Kalluru 
1980fefbfbaSSudarsana Kalluru enum qed_ov_client {
1990fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
2000fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
2010fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
2020fefbfbaSSudarsana Kalluru };
2030fefbfbaSSudarsana Kalluru 
2040fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
2050fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
2060fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
2070fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
2080fefbfbaSSudarsana Kalluru };
2090fefbfbaSSudarsana Kalluru 
2100fefbfbaSSudarsana Kalluru enum qed_ov_wol {
2110fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
2120fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
2130fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
2140fefbfbaSSudarsana Kalluru };
2150fefbfbaSSudarsana Kalluru 
2162528c389SSudarsana Reddy Kalluru enum qed_mfw_tlv_type {
2172528c389SSudarsana Reddy Kalluru 	QED_MFW_TLV_GENERIC = 0x1,	/* Core driver TLVs */
2182528c389SSudarsana Reddy Kalluru 	QED_MFW_TLV_ETH = 0x2,		/* L2 driver TLVs */
219*f240b688SSudarsana Reddy Kalluru 	QED_MFW_TLV_FCOE = 0x4,		/* FCoE protocol TLVs */
220*f240b688SSudarsana Reddy Kalluru 	QED_MFW_TLV_MAX = 0x8,
2212528c389SSudarsana Reddy Kalluru };
2222528c389SSudarsana Reddy Kalluru 
2232528c389SSudarsana Reddy Kalluru struct qed_mfw_tlv_generic {
2242528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_FLAGS_SIZE	2
2252528c389SSudarsana Reddy Kalluru 	struct {
2262528c389SSudarsana Reddy Kalluru 		u8 ipv4_csum_offload;
2272528c389SSudarsana Reddy Kalluru 		u8 lso_supported;
2282528c389SSudarsana Reddy Kalluru 		bool b_set;
2292528c389SSudarsana Reddy Kalluru 	} flags;
2302528c389SSudarsana Reddy Kalluru 
2312528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_MAC_COUNT 3
2322528c389SSudarsana Reddy Kalluru 	/* First entry for primary MAC, 2 secondary MACs possible */
2332528c389SSudarsana Reddy Kalluru 	u8 mac[QED_MFW_TLV_MAC_COUNT][6];
2342528c389SSudarsana Reddy Kalluru 	bool mac_set[QED_MFW_TLV_MAC_COUNT];
2352528c389SSudarsana Reddy Kalluru 
2362528c389SSudarsana Reddy Kalluru 	u64 rx_frames;
2372528c389SSudarsana Reddy Kalluru 	bool rx_frames_set;
2382528c389SSudarsana Reddy Kalluru 	u64 rx_bytes;
2392528c389SSudarsana Reddy Kalluru 	bool rx_bytes_set;
2402528c389SSudarsana Reddy Kalluru 	u64 tx_frames;
2412528c389SSudarsana Reddy Kalluru 	bool tx_frames_set;
2422528c389SSudarsana Reddy Kalluru 	u64 tx_bytes;
2432528c389SSudarsana Reddy Kalluru 	bool tx_bytes_set;
2442528c389SSudarsana Reddy Kalluru };
2452528c389SSudarsana Reddy Kalluru 
2462528c389SSudarsana Reddy Kalluru union qed_mfw_tlv_data {
2472528c389SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_generic generic;
2482528c389SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_eth eth;
249*f240b688SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_fcoe fcoe;
2502528c389SSudarsana Reddy Kalluru };
2512528c389SSudarsana Reddy Kalluru 
252fe56b9e6SYuval Mintz /**
253cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
254cc875c2eSYuval Mintz  *
255cc875c2eSYuval Mintz  * @param p_hwfn
256cc875c2eSYuval Mintz  *
257cc875c2eSYuval Mintz  * @returns pointer to link params
258cc875c2eSYuval Mintz  */
259cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
260cc875c2eSYuval Mintz 
261cc875c2eSYuval Mintz /**
262cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
263cc875c2eSYuval Mintz  *
264cc875c2eSYuval Mintz  * @param p_hwfn
265cc875c2eSYuval Mintz  *
266cc875c2eSYuval Mintz  * @returns pointer to link state
267cc875c2eSYuval Mintz  */
268cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
269cc875c2eSYuval Mintz 
270cc875c2eSYuval Mintz /**
271cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
272cc875c2eSYuval Mintz  *
273cc875c2eSYuval Mintz  * @param p_hwfn
274cc875c2eSYuval Mintz  *
275cc875c2eSYuval Mintz  * @returns pointer to link capabilities
276cc875c2eSYuval Mintz  */
277cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
278cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
279cc875c2eSYuval Mintz 
280cc875c2eSYuval Mintz /**
281cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
282cc875c2eSYuval Mintz  *
283cc875c2eSYuval Mintz  * @param p_hwfn
284cc875c2eSYuval Mintz  * @param p_ptt
285cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
286cc875c2eSYuval Mintz  *
287cc875c2eSYuval Mintz  * @return int
288cc875c2eSYuval Mintz  */
289cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
290cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
291cc875c2eSYuval Mintz 		     bool               b_up);
292cc875c2eSYuval Mintz 
293cc875c2eSYuval Mintz /**
294fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
295fe56b9e6SYuval Mintz  *
2961408cc1fSYuval Mintz  * @param p_hwfn
2971408cc1fSYuval Mintz  * @param p_ptt
2981408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2991408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
300fe56b9e6SYuval Mintz  *
3011408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
302fe56b9e6SYuval Mintz  */
3031408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
3041408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
3051408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
306fe56b9e6SYuval Mintz 
307fe56b9e6SYuval Mintz /**
308ae33666aSTomer Tayar  * @brief Get the MBI version value
309ae33666aSTomer Tayar  *
310ae33666aSTomer Tayar  * @param p_hwfn
311ae33666aSTomer Tayar  * @param p_ptt
312ae33666aSTomer Tayar  * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version.
313ae33666aSTomer Tayar  *
314ae33666aSTomer Tayar  * @return int - 0 - operation was successful.
315ae33666aSTomer Tayar  */
316ae33666aSTomer Tayar int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
317ae33666aSTomer Tayar 			struct qed_ptt *p_ptt, u32 *p_mbi_ver);
318ae33666aSTomer Tayar 
319ae33666aSTomer Tayar /**
320cc875c2eSYuval Mintz  * @brief Get media type value of the port.
321cc875c2eSYuval Mintz  *
322cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
323cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
324cc875c2eSYuval Mintz  *
325cc875c2eSYuval Mintz  * @return int -
326cc875c2eSYuval Mintz  *      0 - Operation was successul.
327cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
328cc875c2eSYuval Mintz  */
329cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
330cc875c2eSYuval Mintz 			   u32                  *media_type);
331cc875c2eSYuval Mintz 
332cc875c2eSYuval Mintz /**
333fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
334fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
335fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
336fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
337fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
338fe56b9e6SYuval Mintz  *
339fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
340fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
341fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
342fe56b9e6SYuval Mintz  * @param param      - Optional param
343fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
344fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
345fe56b9e6SYuval Mintz  *                     response
346fe56b9e6SYuval Mintz  * @return int - 0 - operation
347fe56b9e6SYuval Mintz  * was successul.
348fe56b9e6SYuval Mintz  */
349fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
350fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
351fe56b9e6SYuval Mintz 		u32 cmd,
352fe56b9e6SYuval Mintz 		u32 param,
353fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
354fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
355fe56b9e6SYuval Mintz 
356fe56b9e6SYuval Mintz /**
357fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
358fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
359fe56b9e6SYuval Mintz  *
360fe56b9e6SYuval Mintz  * @param p_hwfn
361fe56b9e6SYuval Mintz  * @param p_ptt
362fe56b9e6SYuval Mintz  */
363fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
364fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
365fe56b9e6SYuval Mintz 
366fe56b9e6SYuval Mintz /**
367cee4d264SManish Chopra  * @brief Get the flash size value
368cee4d264SManish Chopra  *
369cee4d264SManish Chopra  * @param p_hwfn
370cee4d264SManish Chopra  * @param p_ptt
371cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
372cee4d264SManish Chopra  *
373cee4d264SManish Chopra  * @return int - 0 - operation was successul.
374cee4d264SManish Chopra  */
375cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
376cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
377cee4d264SManish Chopra 			   u32 *p_flash_size);
378cee4d264SManish Chopra 
379cee4d264SManish Chopra /**
380fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
381fe56b9e6SYuval Mintz  *
382fe56b9e6SYuval Mintz  * @param p_hwfn
383fe56b9e6SYuval Mintz  * @param p_ptt
384fe56b9e6SYuval Mintz  * @param version - Version value
385fe56b9e6SYuval Mintz  * @param name - Protocol driver name
386fe56b9e6SYuval Mintz  *
387fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
388fe56b9e6SYuval Mintz  */
389fe56b9e6SYuval Mintz int
390fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
391fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
392fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
393fe56b9e6SYuval Mintz 
39491420b83SSudarsana Kalluru /**
3950fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3960fefbfbaSSudarsana Kalluru  *
3970fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3980fefbfbaSSudarsana Kalluru  *  @param p_ptt
3990fefbfbaSSudarsana Kalluru  *  @param client - qed client type
4000fefbfbaSSudarsana Kalluru  *
4010fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4020fefbfbaSSudarsana Kalluru  */
4030fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
4040fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
4050fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
4060fefbfbaSSudarsana Kalluru 
4070fefbfbaSSudarsana Kalluru /**
4080fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
4090fefbfbaSSudarsana Kalluru  *
4100fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4110fefbfbaSSudarsana Kalluru  *  @param p_ptt
4120fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
4130fefbfbaSSudarsana Kalluru  *
4140fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4150fefbfbaSSudarsana Kalluru  */
4160fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
4170fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
4180fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
4190fefbfbaSSudarsana Kalluru 
4200fefbfbaSSudarsana Kalluru /**
4210fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
4220fefbfbaSSudarsana Kalluru  *
4230fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4240fefbfbaSSudarsana Kalluru  *  @param p_ptt
4250fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
4260fefbfbaSSudarsana Kalluru  *
4270fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4280fefbfbaSSudarsana Kalluru  */
4290fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
4300fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
4310fefbfbaSSudarsana Kalluru 
4320fefbfbaSSudarsana Kalluru /**
4330fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
4340fefbfbaSSudarsana Kalluru  *
4350fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4360fefbfbaSSudarsana Kalluru  *  @param p_ptt
4370fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
4380fefbfbaSSudarsana Kalluru  *
4390fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4400fefbfbaSSudarsana Kalluru  */
4410fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
4420fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
4430fefbfbaSSudarsana Kalluru 
4440fefbfbaSSudarsana Kalluru /**
4450fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
4460fefbfbaSSudarsana Kalluru  *
4470fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4480fefbfbaSSudarsana Kalluru  *  @param p_ptt
4490fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
4500fefbfbaSSudarsana Kalluru  *
4510fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4520fefbfbaSSudarsana Kalluru  */
4530fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
4540fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
4550fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
4560fefbfbaSSudarsana Kalluru 
4570fefbfbaSSudarsana Kalluru /**
45891420b83SSudarsana Kalluru  * @brief Set LED status
45991420b83SSudarsana Kalluru  *
46091420b83SSudarsana Kalluru  *  @param p_hwfn
46191420b83SSudarsana Kalluru  *  @param p_ptt
46291420b83SSudarsana Kalluru  *  @param mode - LED mode
46391420b83SSudarsana Kalluru  *
46491420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
46591420b83SSudarsana Kalluru  */
46691420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
46791420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
46891420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
46991420b83SSudarsana Kalluru 
47003dc76caSSudarsana Reddy Kalluru /**
4717a4b21b7SMintz, Yuval  * @brief Read from nvm
4727a4b21b7SMintz, Yuval  *
4737a4b21b7SMintz, Yuval  *  @param cdev
4747a4b21b7SMintz, Yuval  *  @param addr - nvm offset
4757a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
4767a4b21b7SMintz, Yuval  *  @param len - buffer len
4777a4b21b7SMintz, Yuval  *
4787a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4797a4b21b7SMintz, Yuval  */
4807a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
4817a4b21b7SMintz, Yuval 
48262e4d438SSudarsana Reddy Kalluru /**
48362e4d438SSudarsana Reddy Kalluru  * @brief Write to nvm
48462e4d438SSudarsana Reddy Kalluru  *
48562e4d438SSudarsana Reddy Kalluru  *  @param cdev
48662e4d438SSudarsana Reddy Kalluru  *  @param addr - nvm offset
48762e4d438SSudarsana Reddy Kalluru  *  @param cmd - nvm command
48862e4d438SSudarsana Reddy Kalluru  *  @param p_buf - nvm write buffer
48962e4d438SSudarsana Reddy Kalluru  *  @param len - buffer len
49062e4d438SSudarsana Reddy Kalluru  *
49162e4d438SSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
49262e4d438SSudarsana Reddy Kalluru  */
49362e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_write(struct qed_dev *cdev,
49462e4d438SSudarsana Reddy Kalluru 		      u32 cmd, u32 addr, u8 *p_buf, u32 len);
49562e4d438SSudarsana Reddy Kalluru 
49662e4d438SSudarsana Reddy Kalluru /**
49762e4d438SSudarsana Reddy Kalluru  * @brief Put file begin
49862e4d438SSudarsana Reddy Kalluru  *
49962e4d438SSudarsana Reddy Kalluru  *  @param cdev
50062e4d438SSudarsana Reddy Kalluru  *  @param addr - nvm offset
50162e4d438SSudarsana Reddy Kalluru  *
50262e4d438SSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
50362e4d438SSudarsana Reddy Kalluru  */
50462e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_put_file_begin(struct qed_dev *cdev, u32 addr);
50562e4d438SSudarsana Reddy Kalluru 
50662e4d438SSudarsana Reddy Kalluru /**
50762e4d438SSudarsana Reddy Kalluru  * @brief Check latest response
50862e4d438SSudarsana Reddy Kalluru  *
50962e4d438SSudarsana Reddy Kalluru  *  @param cdev
51062e4d438SSudarsana Reddy Kalluru  *  @param p_buf - nvm write buffer
51162e4d438SSudarsana Reddy Kalluru  *
51262e4d438SSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
51362e4d438SSudarsana Reddy Kalluru  */
51462e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf);
51562e4d438SSudarsana Reddy Kalluru 
51620675b37SMintz, Yuval struct qed_nvm_image_att {
51720675b37SMintz, Yuval 	u32 start_addr;
51820675b37SMintz, Yuval 	u32 length;
51920675b37SMintz, Yuval };
52020675b37SMintz, Yuval 
52120675b37SMintz, Yuval /**
52220675b37SMintz, Yuval  * @brief Allows reading a whole nvram image
52320675b37SMintz, Yuval  *
52420675b37SMintz, Yuval  * @param p_hwfn
5251ac4329aSDenis Bolotin  * @param image_id - image to get attributes for
5261ac4329aSDenis Bolotin  * @param p_image_att - image attributes structure into which to fill data
5271ac4329aSDenis Bolotin  *
5281ac4329aSDenis Bolotin  * @return int - 0 - operation was successful.
5291ac4329aSDenis Bolotin  */
5301ac4329aSDenis Bolotin int
5311ac4329aSDenis Bolotin qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
5321ac4329aSDenis Bolotin 			  enum qed_nvm_images image_id,
5331ac4329aSDenis Bolotin 			  struct qed_nvm_image_att *p_image_att);
5341ac4329aSDenis Bolotin 
5351ac4329aSDenis Bolotin /**
5361ac4329aSDenis Bolotin  * @brief Allows reading a whole nvram image
5371ac4329aSDenis Bolotin  *
5381ac4329aSDenis Bolotin  * @param p_hwfn
53920675b37SMintz, Yuval  * @param image_id - image requested for reading
54020675b37SMintz, Yuval  * @param p_buffer - allocated buffer into which to fill data
54120675b37SMintz, Yuval  * @param buffer_len - length of the allocated buffer.
54220675b37SMintz, Yuval  *
54320675b37SMintz, Yuval  * @return 0 iff p_buffer now contains the nvram image.
54420675b37SMintz, Yuval  */
54520675b37SMintz, Yuval int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
54620675b37SMintz, Yuval 			  enum qed_nvm_images image_id,
54720675b37SMintz, Yuval 			  u8 *p_buffer, u32 buffer_len);
54820675b37SMintz, Yuval 
5497a4b21b7SMintz, Yuval /**
55003dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
55103dc76caSSudarsana Reddy Kalluru  *
55203dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
55303dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
55403dc76caSSudarsana Reddy Kalluru  *
55503dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
55603dc76caSSudarsana Reddy Kalluru  */
55703dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
55803dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
55903dc76caSSudarsana Reddy Kalluru 
56003dc76caSSudarsana Reddy Kalluru /**
56103dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
56203dc76caSSudarsana Reddy Kalluru  *
56303dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
56403dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
56503dc76caSSudarsana Reddy Kalluru  *
56603dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
56703dc76caSSudarsana Reddy Kalluru  */
56803dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
56903dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
57003dc76caSSudarsana Reddy Kalluru 
5717a4b21b7SMintz, Yuval /**
5727a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
5737a4b21b7SMintz, Yuval  *
5747a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
5757a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
5767a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
5777a4b21b7SMintz, Yuval  *			  successful. 0 if not.
5787a4b21b7SMintz, Yuval  *
5797a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
5807a4b21b7SMintz, Yuval  */
58143645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,
5827a4b21b7SMintz, Yuval 				    struct qed_ptt *p_ptt,
5837a4b21b7SMintz, Yuval 				    u32 *num_images);
5847a4b21b7SMintz, Yuval 
5857a4b21b7SMintz, Yuval /**
5867a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
5877a4b21b7SMintz, Yuval  *
5887a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
5897a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
5907a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
5917a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
5927a4b21b7SMintz, Yuval  *
5937a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
5947a4b21b7SMintz, Yuval  */
59543645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn,
5967a4b21b7SMintz, Yuval 				   struct qed_ptt *p_ptt,
5977a4b21b7SMintz, Yuval 				   struct bist_nvm_image_att *p_image_att,
5987a4b21b7SMintz, Yuval 				   u32 image_index);
5997a4b21b7SMintz, Yuval 
6002528c389SSudarsana Reddy Kalluru /**
6012528c389SSudarsana Reddy Kalluru  * @brief - Processes the TLV request from MFW i.e., get the required TLV info
6022528c389SSudarsana Reddy Kalluru  *          from the qed client and send it to the MFW.
6032528c389SSudarsana Reddy Kalluru  *
6042528c389SSudarsana Reddy Kalluru  * @param p_hwfn
6052528c389SSudarsana Reddy Kalluru  * @param p_ptt
6062528c389SSudarsana Reddy Kalluru  *
6072528c389SSudarsana Reddy Kalluru  * @param return 0 upon success.
6082528c389SSudarsana Reddy Kalluru  */
6092528c389SSudarsana Reddy Kalluru int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6102528c389SSudarsana Reddy Kalluru 
611fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
612fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
613fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
614fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
615fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
616fe56b9e6SYuval Mintz  */
617fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
618fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
619fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
620fe56b9e6SYuval Mintz 					    rel_pfid)
621fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
622fe56b9e6SYuval Mintz 
623fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
62478cea9ffSTomer Tayar 				 ((_p_hwfn)->cdev->num_ports_in_engine * \
6259c79ddaaSMintz, Yuval 				  qed_device_num_engines((_p_hwfn)->cdev)))
6269c79ddaaSMintz, Yuval 
627fe56b9e6SYuval Mintz struct qed_mcp_info {
6284ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
6294ed1eea8STomer Tayar 	struct list_head			cmd_list;
6304ed1eea8STomer Tayar 
6314ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
6324ed1eea8STomer Tayar 	 * and the sending of the commands.
6334ed1eea8STomer Tayar 	 */
6344ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
63565ed2ffdSMintz, Yuval 
63665ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
63765ed2ffdSMintz, Yuval 	 * originating from attention context.
63865ed2ffdSMintz, Yuval 	 */
63965ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
6405529bad9STomer Tayar 	bool					block_mb_sending;
641fe56b9e6SYuval Mintz 	u32					public_base;
642fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
643fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
644fe56b9e6SYuval Mintz 	u32					port_addr;
645fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
646fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
647cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
648cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
649cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
650fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
651fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
652fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
653fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
6544ed1eea8STomer Tayar 	u32					mcp_hist;
655645874e5SSudarsana Reddy Kalluru 
656645874e5SSudarsana Reddy Kalluru 	/* Capabilties negotiated with the MFW */
657645874e5SSudarsana Reddy Kalluru 	u32					capabilities;
658fe56b9e6SYuval Mintz };
659fe56b9e6SYuval Mintz 
6605529bad9STomer Tayar struct qed_mcp_mb_params {
6615529bad9STomer Tayar 	u32			cmd;
6625529bad9STomer Tayar 	u32			param;
6632f67af8cSTomer Tayar 	void			*p_data_src;
6642f67af8cSTomer Tayar 	u8			data_src_size;
6652f67af8cSTomer Tayar 	void			*p_data_dst;
6662f67af8cSTomer Tayar 	u8			data_dst_size;
6675529bad9STomer Tayar 	u32			mcp_resp;
6685529bad9STomer Tayar 	u32			mcp_param;
6695529bad9STomer Tayar };
6705529bad9STomer Tayar 
6712528c389SSudarsana Reddy Kalluru struct qed_drv_tlv_hdr {
6722528c389SSudarsana Reddy Kalluru 	u8 tlv_type;
6732528c389SSudarsana Reddy Kalluru 	u8 tlv_length;	/* In dwords - not including this header */
6742528c389SSudarsana Reddy Kalluru 	u8 tlv_reserved;
6752528c389SSudarsana Reddy Kalluru #define QED_DRV_TLV_FLAGS_CHANGED 0x01
6762528c389SSudarsana Reddy Kalluru 	u8 tlv_flags;
6772528c389SSudarsana Reddy Kalluru };
6782528c389SSudarsana Reddy Kalluru 
679fe56b9e6SYuval Mintz /**
680fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
681fe56b9e6SYuval Mintz  *
682fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
683fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
684fe56b9e6SYuval Mintz  *
685fe56b9e6SYuval Mintz  * @return int
686fe56b9e6SYuval Mintz  */
687fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
688fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
689fe56b9e6SYuval Mintz 
690fe56b9e6SYuval Mintz /**
691fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
692fe56b9e6SYuval Mintz  *
693fe56b9e6SYuval Mintz  * @param p_hwfn
694fe56b9e6SYuval Mintz  * @param p_ptt
695fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
696fe56b9e6SYuval Mintz  */
697fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
698fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
699fe56b9e6SYuval Mintz /**
700fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
701fe56b9e6SYuval Mintz  *
702fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
703fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
704fe56b9e6SYuval Mintz  *
705fe56b9e6SYuval Mintz  * @return int
706fe56b9e6SYuval Mintz  */
707fe56b9e6SYuval Mintz 
708fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
709fe56b9e6SYuval Mintz 
710fe56b9e6SYuval Mintz /**
711cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
712cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
713cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
714cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
715cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
716cc875c2eSYuval Mintz  *
717cc875c2eSYuval Mintz  * @param p_hwfn - HW function
718cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
719cc875c2eSYuval Mintz  * @return int - 0 - operation
720cc875c2eSYuval Mintz  * was successul.
721cc875c2eSYuval Mintz  */
722cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
723cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
724cc875c2eSYuval Mintz 
7255d24bcf1STomer Tayar enum qed_drv_role {
7265d24bcf1STomer Tayar 	QED_DRV_ROLE_OS,
7275d24bcf1STomer Tayar 	QED_DRV_ROLE_KDUMP,
7285d24bcf1STomer Tayar };
7295d24bcf1STomer Tayar 
7305d24bcf1STomer Tayar struct qed_load_req_params {
7315d24bcf1STomer Tayar 	/* Input params */
7325d24bcf1STomer Tayar 	enum qed_drv_role drv_role;
7335d24bcf1STomer Tayar 	u8 timeout_val;
7345d24bcf1STomer Tayar 	bool avoid_eng_reset;
7355d24bcf1STomer Tayar 	enum qed_override_force_load override_force_load;
7365d24bcf1STomer Tayar 
7375d24bcf1STomer Tayar 	/* Output params */
7385d24bcf1STomer Tayar 	u32 load_code;
7395d24bcf1STomer Tayar };
7405d24bcf1STomer Tayar 
741cc875c2eSYuval Mintz /**
7425d24bcf1STomer Tayar  * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
7435d24bcf1STomer Tayar  *        returns whether this PF is the first on the engine/port or function.
744fe56b9e6SYuval Mintz  *
7455d24bcf1STomer Tayar  * @param p_hwfn
7465d24bcf1STomer Tayar  * @param p_ptt
7475d24bcf1STomer Tayar  * @param p_params
7485d24bcf1STomer Tayar  *
7495d24bcf1STomer Tayar  * @return int - 0 - Operation was successful.
750fe56b9e6SYuval Mintz  */
751fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
752fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
7535d24bcf1STomer Tayar 		     struct qed_load_req_params *p_params);
754fe56b9e6SYuval Mintz 
755fe56b9e6SYuval Mintz /**
7561226337aSTomer Tayar  * @brief Sends a UNLOAD_REQ message to the MFW
7571226337aSTomer Tayar  *
7581226337aSTomer Tayar  * @param p_hwfn
7591226337aSTomer Tayar  * @param p_ptt
7601226337aSTomer Tayar  *
7611226337aSTomer Tayar  * @return int - 0 - Operation was successful.
7621226337aSTomer Tayar  */
7631226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7641226337aSTomer Tayar 
7651226337aSTomer Tayar /**
7661226337aSTomer Tayar  * @brief Sends a UNLOAD_DONE message to the MFW
7671226337aSTomer Tayar  *
7681226337aSTomer Tayar  * @param p_hwfn
7691226337aSTomer Tayar  * @param p_ptt
7701226337aSTomer Tayar  *
7711226337aSTomer Tayar  * @return int - 0 - Operation was successful.
7721226337aSTomer Tayar  */
7731226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7741226337aSTomer Tayar 
7751226337aSTomer Tayar /**
776fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
777fe56b9e6SYuval Mintz  *
778fe56b9e6SYuval Mintz  * @param p_hwfn
779fe56b9e6SYuval Mintz  * @param p_ptt
780fe56b9e6SYuval Mintz  */
781fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
782fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
783fe56b9e6SYuval Mintz 
784fe56b9e6SYuval Mintz /**
7850b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
7860b55e27dSYuval Mintz  *
7870b55e27dSYuval Mintz  * @param p_hwfn
7880b55e27dSYuval Mintz  * @param p_ptt
7890b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
7900b55e27dSYuval Mintz  *
7910b55e27dSYuval Mintz  * @param return int - 0 upon success.
7920b55e27dSYuval Mintz  */
7930b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
7940b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
7950b55e27dSYuval Mintz 
7960b55e27dSYuval Mintz /**
797fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
798fe56b9e6SYuval Mintz  *
799fe56b9e6SYuval Mintz  * @param p_hwfn
800fe56b9e6SYuval Mintz  *
801fe56b9e6SYuval Mintz  * @param return 0 upon success.
802fe56b9e6SYuval Mintz  */
803fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
804fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
805fe56b9e6SYuval Mintz 
806fe56b9e6SYuval Mintz /**
807fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
808fe56b9e6SYuval Mintz  *
809fe56b9e6SYuval Mintz  * @param p_hwfn
810fe56b9e6SYuval Mintz  * @param p_ptt
811fe56b9e6SYuval Mintz  *
812fe56b9e6SYuval Mintz  * @param return 0 upon success.
813fe56b9e6SYuval Mintz  */
814fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
815fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
816fe56b9e6SYuval Mintz 
817fe56b9e6SYuval Mintz /**
8184102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
8194102426fSTomer Tayar  *        a buffer.
8204102426fSTomer Tayar  *
8214102426fSTomer Tayar  * @param p_hwfn
8224102426fSTomer Tayar  * @param p_ptt
8234102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
8244102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
8254102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
8264102426fSTomer Tayar  * @param o_mcp_resp - MCP response
8274102426fSTomer Tayar  * @param o_mcp_param - MCP response param
8284102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
8294102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
8304102426fSTomer Tayar  *
8314102426fSTomer Tayar  * @param return 0 upon success.
8324102426fSTomer Tayar  */
8334102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
8344102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
8354102426fSTomer Tayar 		       u32 cmd,
8364102426fSTomer Tayar 		       u32 param,
8374102426fSTomer Tayar 		       u32 *o_mcp_resp,
8384102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
8394102426fSTomer Tayar 
8404102426fSTomer Tayar /**
841fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
842fe56b9e6SYuval Mintz  *
843fe56b9e6SYuval Mintz  * @param p_hwfn
844fe56b9e6SYuval Mintz  *
845fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
846fe56b9e6SYuval Mintz  */
847fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
8481408cc1fSYuval Mintz 
8491408cc1fSYuval Mintz /**
8501408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
8511408cc1fSYuval Mintz  *
8521408cc1fSYuval Mintz  * @param p_hwfn
8531408cc1fSYuval Mintz  * @param p_ptt
8541408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
8551408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
8561408cc1fSYuval Mintz  *
8571408cc1fSYuval Mintz  * @return int
8581408cc1fSYuval Mintz  */
8591408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
8601408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
8611408cc1fSYuval Mintz 
8624102426fSTomer Tayar /**
8634102426fSTomer Tayar  * @brief - Halt the MCP.
8644102426fSTomer Tayar  *
8654102426fSTomer Tayar  * @param p_hwfn
8664102426fSTomer Tayar  * @param p_ptt
8674102426fSTomer Tayar  *
8684102426fSTomer Tayar  * @param return 0 upon success.
8694102426fSTomer Tayar  */
8704102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
8714102426fSTomer Tayar 
8724102426fSTomer Tayar /**
8734102426fSTomer Tayar  * @brief - Wake up the MCP.
8744102426fSTomer Tayar  *
8754102426fSTomer Tayar  * @param p_hwfn
8764102426fSTomer Tayar  * @param p_ptt
8774102426fSTomer Tayar  *
8784102426fSTomer Tayar  * @param return 0 upon success.
8794102426fSTomer Tayar  */
8804102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
8814102426fSTomer Tayar 
882a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
8834b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
8844b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
8854b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
8864b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
8874b01e519SManish Chopra 				     u8 max_bw);
888a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
889a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
890a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
891a64b02d5SManish Chopra 				     u8 min_bw);
892351a4dedSYuval Mintz 
8934102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
8944102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
8954102426fSTomer Tayar 
8960fefbfbaSSudarsana Kalluru /**
8979c8517c4STomer Tayar  * @brief - Sets the MFW's max value for the given resource
8989c8517c4STomer Tayar  *
8999c8517c4STomer Tayar  *  @param p_hwfn
9009c8517c4STomer Tayar  *  @param p_ptt
9019c8517c4STomer Tayar  *  @param res_id
9029c8517c4STomer Tayar  *  @param resc_max_val
9039c8517c4STomer Tayar  *  @param p_mcp_resp
9049c8517c4STomer Tayar  *
9059c8517c4STomer Tayar  * @return int - 0 - operation was successful.
9069c8517c4STomer Tayar  */
9079c8517c4STomer Tayar int
9089c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
9099c8517c4STomer Tayar 			 struct qed_ptt *p_ptt,
9109c8517c4STomer Tayar 			 enum qed_resources res_id,
9119c8517c4STomer Tayar 			 u32 resc_max_val, u32 *p_mcp_resp);
9129c8517c4STomer Tayar 
9139c8517c4STomer Tayar /**
9149c8517c4STomer Tayar  * @brief - Gets the MFW allocation info for the given resource
9159c8517c4STomer Tayar  *
9169c8517c4STomer Tayar  *  @param p_hwfn
9179c8517c4STomer Tayar  *  @param p_ptt
9189c8517c4STomer Tayar  *  @param res_id
9199c8517c4STomer Tayar  *  @param p_mcp_resp
9209c8517c4STomer Tayar  *  @param p_resc_num
9219c8517c4STomer Tayar  *  @param p_resc_start
9229c8517c4STomer Tayar  *
9239c8517c4STomer Tayar  * @return int - 0 - operation was successful.
9249c8517c4STomer Tayar  */
9259c8517c4STomer Tayar int
9269c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
9279c8517c4STomer Tayar 		      struct qed_ptt *p_ptt,
9289c8517c4STomer Tayar 		      enum qed_resources res_id,
9299c8517c4STomer Tayar 		      u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
9309c8517c4STomer Tayar 
9319c8517c4STomer Tayar /**
9320fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
9330fefbfbaSSudarsana Kalluru  *
9340fefbfbaSSudarsana Kalluru  *  @param p_hwfn
9350fefbfbaSSudarsana Kalluru  *  @param p_ptt
9360fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
9370fefbfbaSSudarsana Kalluru  *
9380fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
9390fefbfbaSSudarsana Kalluru  */
9400fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
9410fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
9420fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
9430fefbfbaSSudarsana Kalluru 
9449c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL       RESOURCE_DUMP
9459c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL       31
9469c8517c4STomer Tayar 
9479c8517c4STomer Tayar enum qed_resc_lock {
9489c8517c4STomer Tayar 	QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
949db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT0,
950db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT1,
951db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT2,
952db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT3,
953f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
954f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_INVALID
9559c8517c4STomer Tayar };
95618a69e36SMintz, Yuval 
95718a69e36SMintz, Yuval /**
95818a69e36SMintz, Yuval  * @brief - Initiates PF FLR
95918a69e36SMintz, Yuval  *
96018a69e36SMintz, Yuval  *  @param p_hwfn
96118a69e36SMintz, Yuval  *  @param p_ptt
96218a69e36SMintz, Yuval  *
96318a69e36SMintz, Yuval  * @return int - 0 - operation was successful.
96418a69e36SMintz, Yuval  */
96518a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
96695691c9cSTomer Tayar struct qed_resc_lock_params {
96795691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
96895691c9cSTomer Tayar 	u8 resource;
96995691c9cSTomer Tayar 
97095691c9cSTomer Tayar 	/* Lock timeout value in seconds [default, none or 1..254] */
97195691c9cSTomer Tayar 	u8 timeout;
97295691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT    0
97395691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE       255
97495691c9cSTomer Tayar 
97595691c9cSTomer Tayar 	/* Number of times to retry locking */
97695691c9cSTomer Tayar 	u8 retry_num;
977f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT        10
97895691c9cSTomer Tayar 
97995691c9cSTomer Tayar 	/* The interval in usec between retries */
98095691c9cSTomer Tayar 	u16 retry_interval;
981f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT        10000
98295691c9cSTomer Tayar 
98395691c9cSTomer Tayar 	/* Use sleep or delay between retries */
98495691c9cSTomer Tayar 	bool sleep_b4_retry;
98595691c9cSTomer Tayar 
98695691c9cSTomer Tayar 	/* Will be set as true if the resource is free and granted */
98795691c9cSTomer Tayar 	bool b_granted;
98895691c9cSTomer Tayar 
98995691c9cSTomer Tayar 	/* Will be filled with the resource owner.
99095691c9cSTomer Tayar 	 * [0..15 = PF0-15, 16 = MFW]
99195691c9cSTomer Tayar 	 */
99295691c9cSTomer Tayar 	u8 owner;
99395691c9cSTomer Tayar };
99495691c9cSTomer Tayar 
99595691c9cSTomer Tayar /**
99695691c9cSTomer Tayar  * @brief Acquires MFW generic resource lock
99795691c9cSTomer Tayar  *
99895691c9cSTomer Tayar  *  @param p_hwfn
99995691c9cSTomer Tayar  *  @param p_ptt
100095691c9cSTomer Tayar  *  @param p_params
100195691c9cSTomer Tayar  *
100295691c9cSTomer Tayar  * @return int - 0 - operation was successful.
100395691c9cSTomer Tayar  */
100495691c9cSTomer Tayar int
100595691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
100695691c9cSTomer Tayar 		  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
100795691c9cSTomer Tayar 
100895691c9cSTomer Tayar struct qed_resc_unlock_params {
100995691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
101095691c9cSTomer Tayar 	u8 resource;
101195691c9cSTomer Tayar 
101295691c9cSTomer Tayar 	/* Allow to release a resource even if belongs to another PF */
101395691c9cSTomer Tayar 	bool b_force;
101495691c9cSTomer Tayar 
101595691c9cSTomer Tayar 	/* Will be set as true if the resource is released */
101695691c9cSTomer Tayar 	bool b_released;
101795691c9cSTomer Tayar };
101895691c9cSTomer Tayar 
101995691c9cSTomer Tayar /**
102095691c9cSTomer Tayar  * @brief Releases MFW generic resource lock
102195691c9cSTomer Tayar  *
102295691c9cSTomer Tayar  *  @param p_hwfn
102395691c9cSTomer Tayar  *  @param p_ptt
102495691c9cSTomer Tayar  *  @param p_params
102595691c9cSTomer Tayar  *
102695691c9cSTomer Tayar  * @return int - 0 - operation was successful.
102795691c9cSTomer Tayar  */
102895691c9cSTomer Tayar int
102995691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
103095691c9cSTomer Tayar 		    struct qed_ptt *p_ptt,
103195691c9cSTomer Tayar 		    struct qed_resc_unlock_params *p_params);
103295691c9cSTomer Tayar 
1033f470f22cSsudarsana.kalluru@cavium.com /**
1034f470f22cSsudarsana.kalluru@cavium.com  * @brief - default initialization for lock/unlock resource structs
1035f470f22cSsudarsana.kalluru@cavium.com  *
1036f470f22cSsudarsana.kalluru@cavium.com  * @param p_lock - lock params struct to be initialized; Can be NULL
1037f470f22cSsudarsana.kalluru@cavium.com  * @param p_unlock - unlock params struct to be initialized; Can be NULL
1038f470f22cSsudarsana.kalluru@cavium.com  * @param resource - the requested resource
1039f470f22cSsudarsana.kalluru@cavium.com  * @paral b_is_permanent - disable retries & aging when set
1040f470f22cSsudarsana.kalluru@cavium.com  */
1041f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
1042f470f22cSsudarsana.kalluru@cavium.com 				    struct qed_resc_unlock_params *p_unlock,
1043f470f22cSsudarsana.kalluru@cavium.com 				    enum qed_resc_lock
1044f470f22cSsudarsana.kalluru@cavium.com 				    resource, bool b_is_permanent);
1045645874e5SSudarsana Reddy Kalluru /**
1046645874e5SSudarsana Reddy Kalluru  * @brief Learn of supported MFW features; To be done during early init
1047645874e5SSudarsana Reddy Kalluru  *
1048645874e5SSudarsana Reddy Kalluru  * @param p_hwfn
1049645874e5SSudarsana Reddy Kalluru  * @param p_ptt
1050645874e5SSudarsana Reddy Kalluru  */
1051645874e5SSudarsana Reddy Kalluru int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1052f470f22cSsudarsana.kalluru@cavium.com 
1053645874e5SSudarsana Reddy Kalluru /**
1054645874e5SSudarsana Reddy Kalluru  * @brief Inform MFW of set of features supported by driver. Should be done
1055645874e5SSudarsana Reddy Kalluru  * inside the content of the LOAD_REQ.
1056645874e5SSudarsana Reddy Kalluru  *
1057645874e5SSudarsana Reddy Kalluru  * @param p_hwfn
1058645874e5SSudarsana Reddy Kalluru  * @param p_ptt
1059645874e5SSudarsana Reddy Kalluru  */
1060645874e5SSudarsana Reddy Kalluru int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
106143645ce0SSudarsana Reddy Kalluru 
106243645ce0SSudarsana Reddy Kalluru /**
1063cac6f691SSudarsana Reddy Kalluru  * @brief Read ufp config from the shared memory.
1064cac6f691SSudarsana Reddy Kalluru  *
1065cac6f691SSudarsana Reddy Kalluru  * @param p_hwfn
1066cac6f691SSudarsana Reddy Kalluru  * @param p_ptt
1067cac6f691SSudarsana Reddy Kalluru  */
1068cac6f691SSudarsana Reddy Kalluru void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1069cac6f691SSudarsana Reddy Kalluru 
1070cac6f691SSudarsana Reddy Kalluru /**
107143645ce0SSudarsana Reddy Kalluru  * @brief Populate the nvm info shadow in the given hardware function
107243645ce0SSudarsana Reddy Kalluru  *
107343645ce0SSudarsana Reddy Kalluru  * @param p_hwfn
107443645ce0SSudarsana Reddy Kalluru  */
107543645ce0SSudarsana Reddy Kalluru int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
107643645ce0SSudarsana Reddy Kalluru 
1077fe56b9e6SYuval Mintz #endif
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