xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 95691c9cea3b14778bf699dcc1563cdc0c441105)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
3fe56b9e6SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
31fe56b9e6SYuval Mintz  */
32fe56b9e6SYuval Mintz 
33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
34fe56b9e6SYuval Mintz #define _QED_MCP_H
35fe56b9e6SYuval Mintz 
36fe56b9e6SYuval Mintz #include <linux/types.h>
37fe56b9e6SYuval Mintz #include <linux/delay.h>
38fe56b9e6SYuval Mintz #include <linux/slab.h>
395529bad9STomer Tayar #include <linux/spinlock.h>
401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
41fe56b9e6SYuval Mintz #include "qed_hsi.h"
425d24bcf1STomer Tayar #include "qed_dev_api.h"
43fe56b9e6SYuval Mintz 
44cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
45cc875c2eSYuval Mintz 	bool    autoneg;
46cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
47cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
48cc875c2eSYuval Mintz };
49cc875c2eSYuval Mintz 
50cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
51cc875c2eSYuval Mintz 	bool    autoneg;
52cc875c2eSYuval Mintz 	bool    forced_rx;
53cc875c2eSYuval Mintz 	bool    forced_tx;
54cc875c2eSYuval Mintz };
55cc875c2eSYuval Mintz 
56cc875c2eSYuval Mintz struct qed_mcp_link_params {
57cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
58cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
59cc875c2eSYuval Mintz 	u32				     loopback_mode;
60cc875c2eSYuval Mintz };
61cc875c2eSYuval Mintz 
62cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
63cc875c2eSYuval Mintz 	u32 speed_capabilities;
64cc875c2eSYuval Mintz };
65cc875c2eSYuval Mintz 
66cc875c2eSYuval Mintz struct qed_mcp_link_state {
67cc875c2eSYuval Mintz 	bool    link_up;
68cc875c2eSYuval Mintz 
69a64b02d5SManish Chopra 	u32	min_pf_rate;
70a64b02d5SManish Chopra 
714b01e519SManish Chopra 	/* Actual link speed in Mb/s */
724b01e519SManish Chopra 	u32	line_speed;
734b01e519SManish Chopra 
744b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
754b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
764b01e519SManish Chopra 	 */
774b01e519SManish Chopra 	u32     speed;
78cc875c2eSYuval Mintz 	bool    full_duplex;
79cc875c2eSYuval Mintz 
80cc875c2eSYuval Mintz 	bool    an;
81cc875c2eSYuval Mintz 	bool    an_complete;
82cc875c2eSYuval Mintz 	bool    parallel_detection;
83cc875c2eSYuval Mintz 	bool    pfc_enabled;
84cc875c2eSYuval Mintz 
85cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
86cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
87cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
88cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
89054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
90054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
91054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
92054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
93cc875c2eSYuval Mintz 	u32     partner_adv_speed;
94cc875c2eSYuval Mintz 
95cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
96cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
97cc875c2eSYuval Mintz 
98cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
100cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
101cc875c2eSYuval Mintz 	u8      partner_adv_pause;
102cc875c2eSYuval Mintz 
103cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
104cc875c2eSYuval Mintz };
105cc875c2eSYuval Mintz 
106fe56b9e6SYuval Mintz struct qed_mcp_function_info {
107fe56b9e6SYuval Mintz 	u8				pause_on_host;
108fe56b9e6SYuval Mintz 
109fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
110fe56b9e6SYuval Mintz 
111fe56b9e6SYuval Mintz 	u8				bandwidth_min;
112fe56b9e6SYuval Mintz 	u8				bandwidth_max;
113fe56b9e6SYuval Mintz 
114fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
115fe56b9e6SYuval Mintz 
116fe56b9e6SYuval Mintz 	u64				wwn_port;
117fe56b9e6SYuval Mintz 	u64				wwn_node;
118fe56b9e6SYuval Mintz 
119fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
120fe56b9e6SYuval Mintz 	u16				ovlan;
1210fefbfbaSSudarsana Kalluru 
1220fefbfbaSSudarsana Kalluru 	u16				mtu;
123fe56b9e6SYuval Mintz };
124fe56b9e6SYuval Mintz 
125fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
126fe56b9e6SYuval Mintz 	u32	offset;
127fe56b9e6SYuval Mintz 	u32	param;
128fe56b9e6SYuval Mintz 	u32	resp;
129fe56b9e6SYuval Mintz 	u32	cmd;
130fe56b9e6SYuval Mintz };
131fe56b9e6SYuval Mintz 
132fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
133fe56b9e6SYuval Mintz 	u32	version;
134fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
135fe56b9e6SYuval Mintz };
136fe56b9e6SYuval Mintz 
1376c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1386c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1396c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1406c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1416c754246SSudarsana Reddy Kalluru };
1426c754246SSudarsana Reddy Kalluru 
1436c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1446c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1456c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1466c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1476c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1486c754246SSudarsana Reddy Kalluru };
1496c754246SSudarsana Reddy Kalluru 
1506c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1516c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1526c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1536c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1546c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1556c754246SSudarsana Reddy Kalluru };
1566c754246SSudarsana Reddy Kalluru 
1576c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1586c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1596c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1606c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1616c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1626c754246SSudarsana Reddy Kalluru };
1636c754246SSudarsana Reddy Kalluru 
1646c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1656c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1666c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1676c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1686c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1696c754246SSudarsana Reddy Kalluru };
1706c754246SSudarsana Reddy Kalluru 
1716c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1726c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1736c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1746c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1756c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1766c754246SSudarsana Reddy Kalluru };
1776c754246SSudarsana Reddy Kalluru 
1780fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1790fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1800fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1810fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1820fefbfbaSSudarsana Kalluru };
1830fefbfbaSSudarsana Kalluru 
1840fefbfbaSSudarsana Kalluru enum qed_ov_client {
1850fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
1860fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
1870fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
1880fefbfbaSSudarsana Kalluru };
1890fefbfbaSSudarsana Kalluru 
1900fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
1910fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
1920fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
1930fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
1940fefbfbaSSudarsana Kalluru };
1950fefbfbaSSudarsana Kalluru 
1960fefbfbaSSudarsana Kalluru enum qed_ov_wol {
1970fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
1980fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
1990fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
2000fefbfbaSSudarsana Kalluru };
2010fefbfbaSSudarsana Kalluru 
202fe56b9e6SYuval Mintz /**
203cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
204cc875c2eSYuval Mintz  *
205cc875c2eSYuval Mintz  * @param p_hwfn
206cc875c2eSYuval Mintz  *
207cc875c2eSYuval Mintz  * @returns pointer to link params
208cc875c2eSYuval Mintz  */
209cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
210cc875c2eSYuval Mintz 
211cc875c2eSYuval Mintz /**
212cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
213cc875c2eSYuval Mintz  *
214cc875c2eSYuval Mintz  * @param p_hwfn
215cc875c2eSYuval Mintz  *
216cc875c2eSYuval Mintz  * @returns pointer to link state
217cc875c2eSYuval Mintz  */
218cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
219cc875c2eSYuval Mintz 
220cc875c2eSYuval Mintz /**
221cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
222cc875c2eSYuval Mintz  *
223cc875c2eSYuval Mintz  * @param p_hwfn
224cc875c2eSYuval Mintz  *
225cc875c2eSYuval Mintz  * @returns pointer to link capabilities
226cc875c2eSYuval Mintz  */
227cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
228cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
229cc875c2eSYuval Mintz 
230cc875c2eSYuval Mintz /**
231cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
232cc875c2eSYuval Mintz  *
233cc875c2eSYuval Mintz  * @param p_hwfn
234cc875c2eSYuval Mintz  * @param p_ptt
235cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
236cc875c2eSYuval Mintz  *
237cc875c2eSYuval Mintz  * @return int
238cc875c2eSYuval Mintz  */
239cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
240cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
241cc875c2eSYuval Mintz 		     bool               b_up);
242cc875c2eSYuval Mintz 
243cc875c2eSYuval Mintz /**
244fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
245fe56b9e6SYuval Mintz  *
2461408cc1fSYuval Mintz  * @param p_hwfn
2471408cc1fSYuval Mintz  * @param p_ptt
2481408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2491408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
250fe56b9e6SYuval Mintz  *
2511408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
252fe56b9e6SYuval Mintz  */
2531408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2541408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2551408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
256fe56b9e6SYuval Mintz 
257fe56b9e6SYuval Mintz /**
258cc875c2eSYuval Mintz  * @brief Get media type value of the port.
259cc875c2eSYuval Mintz  *
260cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
261cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
262cc875c2eSYuval Mintz  *
263cc875c2eSYuval Mintz  * @return int -
264cc875c2eSYuval Mintz  *      0 - Operation was successul.
265cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
266cc875c2eSYuval Mintz  */
267cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
268cc875c2eSYuval Mintz 			   u32                  *media_type);
269cc875c2eSYuval Mintz 
270cc875c2eSYuval Mintz /**
271fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
272fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
273fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
274fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
275fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
276fe56b9e6SYuval Mintz  *
277fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
278fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
279fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
280fe56b9e6SYuval Mintz  * @param param      - Optional param
281fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
282fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
283fe56b9e6SYuval Mintz  *                     response
284fe56b9e6SYuval Mintz  * @return int - 0 - operation
285fe56b9e6SYuval Mintz  * was successul.
286fe56b9e6SYuval Mintz  */
287fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
288fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
289fe56b9e6SYuval Mintz 		u32 cmd,
290fe56b9e6SYuval Mintz 		u32 param,
291fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
292fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
293fe56b9e6SYuval Mintz 
294fe56b9e6SYuval Mintz /**
295fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
296fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
297fe56b9e6SYuval Mintz  *
298fe56b9e6SYuval Mintz  * @param p_hwfn
299fe56b9e6SYuval Mintz  * @param p_ptt
300fe56b9e6SYuval Mintz  */
301fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
302fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
303fe56b9e6SYuval Mintz 
304fe56b9e6SYuval Mintz /**
305cee4d264SManish Chopra  * @brief Get the flash size value
306cee4d264SManish Chopra  *
307cee4d264SManish Chopra  * @param p_hwfn
308cee4d264SManish Chopra  * @param p_ptt
309cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
310cee4d264SManish Chopra  *
311cee4d264SManish Chopra  * @return int - 0 - operation was successul.
312cee4d264SManish Chopra  */
313cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
314cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
315cee4d264SManish Chopra 			   u32 *p_flash_size);
316cee4d264SManish Chopra 
317cee4d264SManish Chopra /**
318fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
319fe56b9e6SYuval Mintz  *
320fe56b9e6SYuval Mintz  * @param p_hwfn
321fe56b9e6SYuval Mintz  * @param p_ptt
322fe56b9e6SYuval Mintz  * @param version - Version value
323fe56b9e6SYuval Mintz  * @param name - Protocol driver name
324fe56b9e6SYuval Mintz  *
325fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
326fe56b9e6SYuval Mintz  */
327fe56b9e6SYuval Mintz int
328fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
329fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
330fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
331fe56b9e6SYuval Mintz 
33291420b83SSudarsana Kalluru /**
3330fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3340fefbfbaSSudarsana Kalluru  *
3350fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3360fefbfbaSSudarsana Kalluru  *  @param p_ptt
3370fefbfbaSSudarsana Kalluru  *  @param client - qed client type
3380fefbfbaSSudarsana Kalluru  *
3390fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3400fefbfbaSSudarsana Kalluru  */
3410fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
3420fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
3430fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
3440fefbfbaSSudarsana Kalluru 
3450fefbfbaSSudarsana Kalluru /**
3460fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
3470fefbfbaSSudarsana Kalluru  *
3480fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3490fefbfbaSSudarsana Kalluru  *  @param p_ptt
3500fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
3510fefbfbaSSudarsana Kalluru  *
3520fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3530fefbfbaSSudarsana Kalluru  */
3540fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
3550fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
3560fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
3570fefbfbaSSudarsana Kalluru 
3580fefbfbaSSudarsana Kalluru /**
3590fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
3600fefbfbaSSudarsana Kalluru  *
3610fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3620fefbfbaSSudarsana Kalluru  *  @param p_ptt
3630fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
3640fefbfbaSSudarsana Kalluru  *
3650fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3660fefbfbaSSudarsana Kalluru  */
3670fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
3680fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
3690fefbfbaSSudarsana Kalluru 
3700fefbfbaSSudarsana Kalluru /**
3710fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
3720fefbfbaSSudarsana Kalluru  *
3730fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3740fefbfbaSSudarsana Kalluru  *  @param p_ptt
3750fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
3760fefbfbaSSudarsana Kalluru  *
3770fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3780fefbfbaSSudarsana Kalluru  */
3790fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
3800fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
3810fefbfbaSSudarsana Kalluru 
3820fefbfbaSSudarsana Kalluru /**
3830fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
3840fefbfbaSSudarsana Kalluru  *
3850fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3860fefbfbaSSudarsana Kalluru  *  @param p_ptt
3870fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
3880fefbfbaSSudarsana Kalluru  *
3890fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3900fefbfbaSSudarsana Kalluru  */
3910fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
3920fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
3930fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
3940fefbfbaSSudarsana Kalluru 
3950fefbfbaSSudarsana Kalluru /**
39691420b83SSudarsana Kalluru  * @brief Set LED status
39791420b83SSudarsana Kalluru  *
39891420b83SSudarsana Kalluru  *  @param p_hwfn
39991420b83SSudarsana Kalluru  *  @param p_ptt
40091420b83SSudarsana Kalluru  *  @param mode - LED mode
40191420b83SSudarsana Kalluru  *
40291420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
40391420b83SSudarsana Kalluru  */
40491420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
40591420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
40691420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
40791420b83SSudarsana Kalluru 
40803dc76caSSudarsana Reddy Kalluru /**
4097a4b21b7SMintz, Yuval  * @brief Read from nvm
4107a4b21b7SMintz, Yuval  *
4117a4b21b7SMintz, Yuval  *  @param cdev
4127a4b21b7SMintz, Yuval  *  @param addr - nvm offset
4137a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
4147a4b21b7SMintz, Yuval  *  @param len - buffer len
4157a4b21b7SMintz, Yuval  *
4167a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4177a4b21b7SMintz, Yuval  */
4187a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
4197a4b21b7SMintz, Yuval 
4207a4b21b7SMintz, Yuval /**
42103dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
42203dc76caSSudarsana Reddy Kalluru  *
42303dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
42403dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
42503dc76caSSudarsana Reddy Kalluru  *
42603dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
42703dc76caSSudarsana Reddy Kalluru  */
42803dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
42903dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
43003dc76caSSudarsana Reddy Kalluru 
43103dc76caSSudarsana Reddy Kalluru /**
43203dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
43303dc76caSSudarsana Reddy Kalluru  *
43403dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
43503dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
43603dc76caSSudarsana Reddy Kalluru  *
43703dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
43803dc76caSSudarsana Reddy Kalluru  */
43903dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
44003dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
44103dc76caSSudarsana Reddy Kalluru 
4427a4b21b7SMintz, Yuval /**
4437a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
4447a4b21b7SMintz, Yuval  *
4457a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
4467a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
4477a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
4487a4b21b7SMintz, Yuval  *			  successful. 0 if not.
4497a4b21b7SMintz, Yuval  *
4507a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4517a4b21b7SMintz, Yuval  */
4527a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
4537a4b21b7SMintz, Yuval 					 struct qed_ptt *p_ptt,
4547a4b21b7SMintz, Yuval 					 u32 *num_images);
4557a4b21b7SMintz, Yuval 
4567a4b21b7SMintz, Yuval /**
4577a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
4587a4b21b7SMintz, Yuval  *
4597a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
4607a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
4617a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
4627a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
4637a4b21b7SMintz, Yuval  *
4647a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4657a4b21b7SMintz, Yuval  */
4667a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
4677a4b21b7SMintz, Yuval 					struct qed_ptt *p_ptt,
4687a4b21b7SMintz, Yuval 					struct bist_nvm_image_att *p_image_att,
4697a4b21b7SMintz, Yuval 					u32 image_index);
4707a4b21b7SMintz, Yuval 
471fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
472fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
473fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
474fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
475fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
476fe56b9e6SYuval Mintz  */
477fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
478fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
479fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
480fe56b9e6SYuval Mintz 					    rel_pfid)
481fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
482fe56b9e6SYuval Mintz 
483fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
4849c79ddaaSMintz, Yuval 				 ((_p_hwfn)->cdev->num_ports_in_engines * \
4859c79ddaaSMintz, Yuval 				  qed_device_num_engines((_p_hwfn)->cdev)))
4869c79ddaaSMintz, Yuval 
487fe56b9e6SYuval Mintz struct qed_mcp_info {
4884ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
4894ed1eea8STomer Tayar 	struct list_head			cmd_list;
4904ed1eea8STomer Tayar 
4914ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
4924ed1eea8STomer Tayar 	 * and the sending of the commands.
4934ed1eea8STomer Tayar 	 */
4944ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
49565ed2ffdSMintz, Yuval 
49665ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
49765ed2ffdSMintz, Yuval 	 * originating from attention context.
49865ed2ffdSMintz, Yuval 	 */
49965ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
5005529bad9STomer Tayar 	bool					block_mb_sending;
501fe56b9e6SYuval Mintz 	u32					public_base;
502fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
503fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
504fe56b9e6SYuval Mintz 	u32					port_addr;
505fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
506fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
507cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
508cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
509cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
510fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
511fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
512fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
513fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
5144ed1eea8STomer Tayar 	u32					mcp_hist;
515fe56b9e6SYuval Mintz };
516fe56b9e6SYuval Mintz 
5175529bad9STomer Tayar struct qed_mcp_mb_params {
5185529bad9STomer Tayar 	u32			cmd;
5195529bad9STomer Tayar 	u32			param;
5202f67af8cSTomer Tayar 	void			*p_data_src;
5212f67af8cSTomer Tayar 	u8			data_src_size;
5222f67af8cSTomer Tayar 	void			*p_data_dst;
5232f67af8cSTomer Tayar 	u8			data_dst_size;
5245529bad9STomer Tayar 	u32			mcp_resp;
5255529bad9STomer Tayar 	u32			mcp_param;
5265529bad9STomer Tayar };
5275529bad9STomer Tayar 
528fe56b9e6SYuval Mintz /**
529fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
530fe56b9e6SYuval Mintz  *
531fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
532fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
533fe56b9e6SYuval Mintz  *
534fe56b9e6SYuval Mintz  * @return int
535fe56b9e6SYuval Mintz  */
536fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
537fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
538fe56b9e6SYuval Mintz 
539fe56b9e6SYuval Mintz /**
540fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
541fe56b9e6SYuval Mintz  *
542fe56b9e6SYuval Mintz  * @param p_hwfn
543fe56b9e6SYuval Mintz  * @param p_ptt
544fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
545fe56b9e6SYuval Mintz  */
546fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
547fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
548fe56b9e6SYuval Mintz /**
549fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
550fe56b9e6SYuval Mintz  *
551fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
552fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
553fe56b9e6SYuval Mintz  *
554fe56b9e6SYuval Mintz  * @return int
555fe56b9e6SYuval Mintz  */
556fe56b9e6SYuval Mintz 
557fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
558fe56b9e6SYuval Mintz 
559fe56b9e6SYuval Mintz /**
560cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
561cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
562cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
563cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
564cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
565cc875c2eSYuval Mintz  *
566cc875c2eSYuval Mintz  * @param p_hwfn - HW function
567cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
568cc875c2eSYuval Mintz  * @return int - 0 - operation
569cc875c2eSYuval Mintz  * was successul.
570cc875c2eSYuval Mintz  */
571cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
572cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
573cc875c2eSYuval Mintz 
5745d24bcf1STomer Tayar enum qed_drv_role {
5755d24bcf1STomer Tayar 	QED_DRV_ROLE_OS,
5765d24bcf1STomer Tayar 	QED_DRV_ROLE_KDUMP,
5775d24bcf1STomer Tayar };
5785d24bcf1STomer Tayar 
5795d24bcf1STomer Tayar struct qed_load_req_params {
5805d24bcf1STomer Tayar 	/* Input params */
5815d24bcf1STomer Tayar 	enum qed_drv_role drv_role;
5825d24bcf1STomer Tayar 	u8 timeout_val;
5835d24bcf1STomer Tayar 	bool avoid_eng_reset;
5845d24bcf1STomer Tayar 	enum qed_override_force_load override_force_load;
5855d24bcf1STomer Tayar 
5865d24bcf1STomer Tayar 	/* Output params */
5875d24bcf1STomer Tayar 	u32 load_code;
5885d24bcf1STomer Tayar };
5895d24bcf1STomer Tayar 
590cc875c2eSYuval Mintz /**
5915d24bcf1STomer Tayar  * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
5925d24bcf1STomer Tayar  *        returns whether this PF is the first on the engine/port or function.
593fe56b9e6SYuval Mintz  *
5945d24bcf1STomer Tayar  * @param p_hwfn
5955d24bcf1STomer Tayar  * @param p_ptt
5965d24bcf1STomer Tayar  * @param p_params
5975d24bcf1STomer Tayar  *
5985d24bcf1STomer Tayar  * @return int - 0 - Operation was successful.
599fe56b9e6SYuval Mintz  */
600fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
601fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
6025d24bcf1STomer Tayar 		     struct qed_load_req_params *p_params);
603fe56b9e6SYuval Mintz 
604fe56b9e6SYuval Mintz /**
6051226337aSTomer Tayar  * @brief Sends a UNLOAD_REQ message to the MFW
6061226337aSTomer Tayar  *
6071226337aSTomer Tayar  * @param p_hwfn
6081226337aSTomer Tayar  * @param p_ptt
6091226337aSTomer Tayar  *
6101226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6111226337aSTomer Tayar  */
6121226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6131226337aSTomer Tayar 
6141226337aSTomer Tayar /**
6151226337aSTomer Tayar  * @brief Sends a UNLOAD_DONE message to the MFW
6161226337aSTomer Tayar  *
6171226337aSTomer Tayar  * @param p_hwfn
6181226337aSTomer Tayar  * @param p_ptt
6191226337aSTomer Tayar  *
6201226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6211226337aSTomer Tayar  */
6221226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6231226337aSTomer Tayar 
6241226337aSTomer Tayar /**
625fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
626fe56b9e6SYuval Mintz  *
627fe56b9e6SYuval Mintz  * @param p_hwfn
628fe56b9e6SYuval Mintz  * @param p_ptt
629fe56b9e6SYuval Mintz  */
630fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
631fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
632fe56b9e6SYuval Mintz 
633fe56b9e6SYuval Mintz /**
6340b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
6350b55e27dSYuval Mintz  *
6360b55e27dSYuval Mintz  * @param p_hwfn
6370b55e27dSYuval Mintz  * @param p_ptt
6380b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
6390b55e27dSYuval Mintz  *
6400b55e27dSYuval Mintz  * @param return int - 0 upon success.
6410b55e27dSYuval Mintz  */
6420b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
6430b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
6440b55e27dSYuval Mintz 
6450b55e27dSYuval Mintz /**
646fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
647fe56b9e6SYuval Mintz  *
648fe56b9e6SYuval Mintz  * @param p_hwfn
649fe56b9e6SYuval Mintz  *
650fe56b9e6SYuval Mintz  * @param return 0 upon success.
651fe56b9e6SYuval Mintz  */
652fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
653fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
654fe56b9e6SYuval Mintz 
655fe56b9e6SYuval Mintz /**
656fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
657fe56b9e6SYuval Mintz  *
658fe56b9e6SYuval Mintz  * @param p_hwfn
659fe56b9e6SYuval Mintz  * @param p_ptt
660fe56b9e6SYuval Mintz  *
661fe56b9e6SYuval Mintz  * @param return 0 upon success.
662fe56b9e6SYuval Mintz  */
663fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
664fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
665fe56b9e6SYuval Mintz 
666fe56b9e6SYuval Mintz /**
6674102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
6684102426fSTomer Tayar  *        a buffer.
6694102426fSTomer Tayar  *
6704102426fSTomer Tayar  * @param p_hwfn
6714102426fSTomer Tayar  * @param p_ptt
6724102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
6734102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
6744102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
6754102426fSTomer Tayar  * @param o_mcp_resp - MCP response
6764102426fSTomer Tayar  * @param o_mcp_param - MCP response param
6774102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
6784102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
6794102426fSTomer Tayar  *
6804102426fSTomer Tayar  * @param return 0 upon success.
6814102426fSTomer Tayar  */
6824102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
6834102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
6844102426fSTomer Tayar 		       u32 cmd,
6854102426fSTomer Tayar 		       u32 param,
6864102426fSTomer Tayar 		       u32 *o_mcp_resp,
6874102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
6884102426fSTomer Tayar 
6894102426fSTomer Tayar /**
690fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
691fe56b9e6SYuval Mintz  *
692fe56b9e6SYuval Mintz  * @param p_hwfn
693fe56b9e6SYuval Mintz  *
694fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
695fe56b9e6SYuval Mintz  */
696fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
6971408cc1fSYuval Mintz 
6981408cc1fSYuval Mintz /**
6991408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
7001408cc1fSYuval Mintz  *
7011408cc1fSYuval Mintz  * @param p_hwfn
7021408cc1fSYuval Mintz  * @param p_ptt
7031408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
7041408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
7051408cc1fSYuval Mintz  *
7061408cc1fSYuval Mintz  * @return int
7071408cc1fSYuval Mintz  */
7081408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
7091408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
7101408cc1fSYuval Mintz 
7114102426fSTomer Tayar /**
7124102426fSTomer Tayar  * @brief - Halt the MCP.
7134102426fSTomer Tayar  *
7144102426fSTomer Tayar  * @param p_hwfn
7154102426fSTomer Tayar  * @param p_ptt
7164102426fSTomer Tayar  *
7174102426fSTomer Tayar  * @param return 0 upon success.
7184102426fSTomer Tayar  */
7194102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7204102426fSTomer Tayar 
7214102426fSTomer Tayar /**
7224102426fSTomer Tayar  * @brief - Wake up the MCP.
7234102426fSTomer Tayar  *
7244102426fSTomer Tayar  * @param p_hwfn
7254102426fSTomer Tayar  * @param p_ptt
7264102426fSTomer Tayar  *
7274102426fSTomer Tayar  * @param return 0 upon success.
7284102426fSTomer Tayar  */
7294102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7304102426fSTomer Tayar 
731a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
7324b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
7334b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
7344b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
7354b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
7364b01e519SManish Chopra 				     u8 max_bw);
737a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
738a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
739a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
740a64b02d5SManish Chopra 				     u8 min_bw);
741351a4dedSYuval Mintz 
7424102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
7434102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
7444102426fSTomer Tayar 
7450fefbfbaSSudarsana Kalluru /**
7460fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
7470fefbfbaSSudarsana Kalluru  *
7480fefbfbaSSudarsana Kalluru  *  @param p_hwfn
7490fefbfbaSSudarsana Kalluru  *  @param p_ptt
7500fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
7510fefbfbaSSudarsana Kalluru  *
7520fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
7530fefbfbaSSudarsana Kalluru  */
7540fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
7550fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
7560fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
7570fefbfbaSSudarsana Kalluru 
7582edbff8dSTomer Tayar /**
7592edbff8dSTomer Tayar  * @brief - Gets the MFW allocation info for the given resource
7602edbff8dSTomer Tayar  *
7612edbff8dSTomer Tayar  *  @param p_hwfn
7622edbff8dSTomer Tayar  *  @param p_ptt
7632edbff8dSTomer Tayar  *  @param p_resc_info - descriptor of requested resource
7642edbff8dSTomer Tayar  *  @param p_mcp_resp
7652edbff8dSTomer Tayar  *  @param p_mcp_param
7662edbff8dSTomer Tayar  *
7672edbff8dSTomer Tayar  * @return int - 0 - operation was successful.
7682edbff8dSTomer Tayar  */
7692edbff8dSTomer Tayar int qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
7702edbff8dSTomer Tayar 			  struct qed_ptt *p_ptt,
7712edbff8dSTomer Tayar 			  struct resource_info *p_resc_info,
7722edbff8dSTomer Tayar 			  u32 *p_mcp_resp, u32 *p_mcp_param);
77318a69e36SMintz, Yuval 
77418a69e36SMintz, Yuval /**
77518a69e36SMintz, Yuval  * @brief - Initiates PF FLR
77618a69e36SMintz, Yuval  *
77718a69e36SMintz, Yuval  *  @param p_hwfn
77818a69e36SMintz, Yuval  *  @param p_ptt
77918a69e36SMintz, Yuval  *
78018a69e36SMintz, Yuval  * @return int - 0 - operation was successful.
78118a69e36SMintz, Yuval  */
78218a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
783*95691c9cSTomer Tayar struct qed_resc_lock_params {
784*95691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
785*95691c9cSTomer Tayar 	u8 resource;
786*95691c9cSTomer Tayar 
787*95691c9cSTomer Tayar 	/* Lock timeout value in seconds [default, none or 1..254] */
788*95691c9cSTomer Tayar 	u8 timeout;
789*95691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT    0
790*95691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE       255
791*95691c9cSTomer Tayar 
792*95691c9cSTomer Tayar 	/* Number of times to retry locking */
793*95691c9cSTomer Tayar 	u8 retry_num;
794*95691c9cSTomer Tayar 
795*95691c9cSTomer Tayar 	/* The interval in usec between retries */
796*95691c9cSTomer Tayar 	u16 retry_interval;
797*95691c9cSTomer Tayar 
798*95691c9cSTomer Tayar 	/* Use sleep or delay between retries */
799*95691c9cSTomer Tayar 	bool sleep_b4_retry;
800*95691c9cSTomer Tayar 
801*95691c9cSTomer Tayar 	/* Will be set as true if the resource is free and granted */
802*95691c9cSTomer Tayar 	bool b_granted;
803*95691c9cSTomer Tayar 
804*95691c9cSTomer Tayar 	/* Will be filled with the resource owner.
805*95691c9cSTomer Tayar 	 * [0..15 = PF0-15, 16 = MFW]
806*95691c9cSTomer Tayar 	 */
807*95691c9cSTomer Tayar 	u8 owner;
808*95691c9cSTomer Tayar };
809*95691c9cSTomer Tayar 
810*95691c9cSTomer Tayar /**
811*95691c9cSTomer Tayar  * @brief Acquires MFW generic resource lock
812*95691c9cSTomer Tayar  *
813*95691c9cSTomer Tayar  *  @param p_hwfn
814*95691c9cSTomer Tayar  *  @param p_ptt
815*95691c9cSTomer Tayar  *  @param p_params
816*95691c9cSTomer Tayar  *
817*95691c9cSTomer Tayar  * @return int - 0 - operation was successful.
818*95691c9cSTomer Tayar  */
819*95691c9cSTomer Tayar int
820*95691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
821*95691c9cSTomer Tayar 		  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
822*95691c9cSTomer Tayar 
823*95691c9cSTomer Tayar struct qed_resc_unlock_params {
824*95691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
825*95691c9cSTomer Tayar 	u8 resource;
826*95691c9cSTomer Tayar 
827*95691c9cSTomer Tayar 	/* Allow to release a resource even if belongs to another PF */
828*95691c9cSTomer Tayar 	bool b_force;
829*95691c9cSTomer Tayar 
830*95691c9cSTomer Tayar 	/* Will be set as true if the resource is released */
831*95691c9cSTomer Tayar 	bool b_released;
832*95691c9cSTomer Tayar };
833*95691c9cSTomer Tayar 
834*95691c9cSTomer Tayar /**
835*95691c9cSTomer Tayar  * @brief Releases MFW generic resource lock
836*95691c9cSTomer Tayar  *
837*95691c9cSTomer Tayar  *  @param p_hwfn
838*95691c9cSTomer Tayar  *  @param p_ptt
839*95691c9cSTomer Tayar  *  @param p_params
840*95691c9cSTomer Tayar  *
841*95691c9cSTomer Tayar  * @return int - 0 - operation was successful.
842*95691c9cSTomer Tayar  */
843*95691c9cSTomer Tayar int
844*95691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
845*95691c9cSTomer Tayar 		    struct qed_ptt *p_ptt,
846*95691c9cSTomer Tayar 		    struct qed_resc_unlock_params *p_params);
847*95691c9cSTomer Tayar 
848fe56b9e6SYuval Mintz #endif
849