xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 43645ce03e0063d7c4a5001215ca815188778881)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
3fe56b9e6SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
31fe56b9e6SYuval Mintz  */
32fe56b9e6SYuval Mintz 
33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
34fe56b9e6SYuval Mintz #define _QED_MCP_H
35fe56b9e6SYuval Mintz 
36fe56b9e6SYuval Mintz #include <linux/types.h>
37fe56b9e6SYuval Mintz #include <linux/delay.h>
38fe56b9e6SYuval Mintz #include <linux/slab.h>
395529bad9STomer Tayar #include <linux/spinlock.h>
401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
41fe56b9e6SYuval Mintz #include "qed_hsi.h"
425d24bcf1STomer Tayar #include "qed_dev_api.h"
43fe56b9e6SYuval Mintz 
44cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
45cc875c2eSYuval Mintz 	bool    autoneg;
46cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
47cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
48cc875c2eSYuval Mintz };
49cc875c2eSYuval Mintz 
50cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
51cc875c2eSYuval Mintz 	bool    autoneg;
52cc875c2eSYuval Mintz 	bool    forced_rx;
53cc875c2eSYuval Mintz 	bool    forced_tx;
54cc875c2eSYuval Mintz };
55cc875c2eSYuval Mintz 
56645874e5SSudarsana Reddy Kalluru enum qed_mcp_eee_mode {
57645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_DISABLED,
58645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_ENABLED,
59645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_UNSUPPORTED
60645874e5SSudarsana Reddy Kalluru };
61645874e5SSudarsana Reddy Kalluru 
62cc875c2eSYuval Mintz struct qed_mcp_link_params {
63cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params speed;
64cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params pause;
65cc875c2eSYuval Mintz 	u32 loopback_mode;
66645874e5SSudarsana Reddy Kalluru 	struct qed_link_eee_params eee;
67cc875c2eSYuval Mintz };
68cc875c2eSYuval Mintz 
69cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
70cc875c2eSYuval Mintz 	u32 speed_capabilities;
7134f9199cSsudarsana.kalluru@cavium.com 	bool default_speed_autoneg;
72645874e5SSudarsana Reddy Kalluru 	enum qed_mcp_eee_mode default_eee;
73645874e5SSudarsana Reddy Kalluru 	u32 eee_lpi_timer;
74645874e5SSudarsana Reddy Kalluru 	u8 eee_speed_caps;
75cc875c2eSYuval Mintz };
76cc875c2eSYuval Mintz 
77cc875c2eSYuval Mintz struct qed_mcp_link_state {
78cc875c2eSYuval Mintz 	bool    link_up;
79cc875c2eSYuval Mintz 
80a64b02d5SManish Chopra 	u32	min_pf_rate;
81a64b02d5SManish Chopra 
824b01e519SManish Chopra 	/* Actual link speed in Mb/s */
834b01e519SManish Chopra 	u32	line_speed;
844b01e519SManish Chopra 
854b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
864b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
874b01e519SManish Chopra 	 */
884b01e519SManish Chopra 	u32     speed;
89cc875c2eSYuval Mintz 	bool    full_duplex;
90cc875c2eSYuval Mintz 
91cc875c2eSYuval Mintz 	bool    an;
92cc875c2eSYuval Mintz 	bool    an_complete;
93cc875c2eSYuval Mintz 	bool    parallel_detection;
94cc875c2eSYuval Mintz 	bool    pfc_enabled;
95cc875c2eSYuval Mintz 
96cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
97cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
98cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
100054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
101054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
102054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
103054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
104cc875c2eSYuval Mintz 	u32     partner_adv_speed;
105cc875c2eSYuval Mintz 
106cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
107cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
108cc875c2eSYuval Mintz 
109cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
110cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
111cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
112cc875c2eSYuval Mintz 	u8      partner_adv_pause;
113cc875c2eSYuval Mintz 
114cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
115645874e5SSudarsana Reddy Kalluru 	bool    eee_active;
116645874e5SSudarsana Reddy Kalluru 	u8      eee_adv_caps;
117645874e5SSudarsana Reddy Kalluru 	u8      eee_lp_adv_caps;
118cc875c2eSYuval Mintz };
119cc875c2eSYuval Mintz 
120fe56b9e6SYuval Mintz struct qed_mcp_function_info {
121fe56b9e6SYuval Mintz 	u8				pause_on_host;
122fe56b9e6SYuval Mintz 
123fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
124fe56b9e6SYuval Mintz 
125fe56b9e6SYuval Mintz 	u8				bandwidth_min;
126fe56b9e6SYuval Mintz 	u8				bandwidth_max;
127fe56b9e6SYuval Mintz 
128fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
129fe56b9e6SYuval Mintz 
130fe56b9e6SYuval Mintz 	u64				wwn_port;
131fe56b9e6SYuval Mintz 	u64				wwn_node;
132fe56b9e6SYuval Mintz 
133fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
134fe56b9e6SYuval Mintz 	u16				ovlan;
1350fefbfbaSSudarsana Kalluru 
1360fefbfbaSSudarsana Kalluru 	u16				mtu;
137fe56b9e6SYuval Mintz };
138fe56b9e6SYuval Mintz 
139fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
140fe56b9e6SYuval Mintz 	u32	offset;
141fe56b9e6SYuval Mintz 	u32	param;
142fe56b9e6SYuval Mintz 	u32	resp;
143fe56b9e6SYuval Mintz 	u32	cmd;
144fe56b9e6SYuval Mintz };
145fe56b9e6SYuval Mintz 
146fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
147fe56b9e6SYuval Mintz 	u32	version;
148fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
149fe56b9e6SYuval Mintz };
150fe56b9e6SYuval Mintz 
1516c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1526c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1536c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1546c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1556c754246SSudarsana Reddy Kalluru };
1566c754246SSudarsana Reddy Kalluru 
1576c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1586c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1596c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1606c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1616c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1626c754246SSudarsana Reddy Kalluru };
1636c754246SSudarsana Reddy Kalluru 
1646c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1656c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1666c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1676c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1686c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1696c754246SSudarsana Reddy Kalluru };
1706c754246SSudarsana Reddy Kalluru 
1716c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1726c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1736c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1746c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1756c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1766c754246SSudarsana Reddy Kalluru };
1776c754246SSudarsana Reddy Kalluru 
1786c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1796c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1806c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1816c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1826c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1836c754246SSudarsana Reddy Kalluru };
1846c754246SSudarsana Reddy Kalluru 
1856c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1866c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1876c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1886c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1896c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1906c754246SSudarsana Reddy Kalluru };
1916c754246SSudarsana Reddy Kalluru 
1920fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1930fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1940fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1950fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1960fefbfbaSSudarsana Kalluru };
1970fefbfbaSSudarsana Kalluru 
1980fefbfbaSSudarsana Kalluru enum qed_ov_client {
1990fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
2000fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
2010fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
2020fefbfbaSSudarsana Kalluru };
2030fefbfbaSSudarsana Kalluru 
2040fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
2050fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
2060fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
2070fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
2080fefbfbaSSudarsana Kalluru };
2090fefbfbaSSudarsana Kalluru 
2100fefbfbaSSudarsana Kalluru enum qed_ov_wol {
2110fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
2120fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
2130fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
2140fefbfbaSSudarsana Kalluru };
2150fefbfbaSSudarsana Kalluru 
216fe56b9e6SYuval Mintz /**
217cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
218cc875c2eSYuval Mintz  *
219cc875c2eSYuval Mintz  * @param p_hwfn
220cc875c2eSYuval Mintz  *
221cc875c2eSYuval Mintz  * @returns pointer to link params
222cc875c2eSYuval Mintz  */
223cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
224cc875c2eSYuval Mintz 
225cc875c2eSYuval Mintz /**
226cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
227cc875c2eSYuval Mintz  *
228cc875c2eSYuval Mintz  * @param p_hwfn
229cc875c2eSYuval Mintz  *
230cc875c2eSYuval Mintz  * @returns pointer to link state
231cc875c2eSYuval Mintz  */
232cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
233cc875c2eSYuval Mintz 
234cc875c2eSYuval Mintz /**
235cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
236cc875c2eSYuval Mintz  *
237cc875c2eSYuval Mintz  * @param p_hwfn
238cc875c2eSYuval Mintz  *
239cc875c2eSYuval Mintz  * @returns pointer to link capabilities
240cc875c2eSYuval Mintz  */
241cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
242cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
243cc875c2eSYuval Mintz 
244cc875c2eSYuval Mintz /**
245cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
246cc875c2eSYuval Mintz  *
247cc875c2eSYuval Mintz  * @param p_hwfn
248cc875c2eSYuval Mintz  * @param p_ptt
249cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
250cc875c2eSYuval Mintz  *
251cc875c2eSYuval Mintz  * @return int
252cc875c2eSYuval Mintz  */
253cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
254cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
255cc875c2eSYuval Mintz 		     bool               b_up);
256cc875c2eSYuval Mintz 
257cc875c2eSYuval Mintz /**
258fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
259fe56b9e6SYuval Mintz  *
2601408cc1fSYuval Mintz  * @param p_hwfn
2611408cc1fSYuval Mintz  * @param p_ptt
2621408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2631408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
264fe56b9e6SYuval Mintz  *
2651408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
266fe56b9e6SYuval Mintz  */
2671408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2681408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2691408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
270fe56b9e6SYuval Mintz 
271fe56b9e6SYuval Mintz /**
272ae33666aSTomer Tayar  * @brief Get the MBI version value
273ae33666aSTomer Tayar  *
274ae33666aSTomer Tayar  * @param p_hwfn
275ae33666aSTomer Tayar  * @param p_ptt
276ae33666aSTomer Tayar  * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version.
277ae33666aSTomer Tayar  *
278ae33666aSTomer Tayar  * @return int - 0 - operation was successful.
279ae33666aSTomer Tayar  */
280ae33666aSTomer Tayar int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
281ae33666aSTomer Tayar 			struct qed_ptt *p_ptt, u32 *p_mbi_ver);
282ae33666aSTomer Tayar 
283ae33666aSTomer Tayar /**
284cc875c2eSYuval Mintz  * @brief Get media type value of the port.
285cc875c2eSYuval Mintz  *
286cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
287cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
288cc875c2eSYuval Mintz  *
289cc875c2eSYuval Mintz  * @return int -
290cc875c2eSYuval Mintz  *      0 - Operation was successul.
291cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
292cc875c2eSYuval Mintz  */
293cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
294cc875c2eSYuval Mintz 			   u32                  *media_type);
295cc875c2eSYuval Mintz 
296cc875c2eSYuval Mintz /**
297fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
298fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
299fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
300fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
301fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
302fe56b9e6SYuval Mintz  *
303fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
304fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
305fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
306fe56b9e6SYuval Mintz  * @param param      - Optional param
307fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
308fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
309fe56b9e6SYuval Mintz  *                     response
310fe56b9e6SYuval Mintz  * @return int - 0 - operation
311fe56b9e6SYuval Mintz  * was successul.
312fe56b9e6SYuval Mintz  */
313fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
314fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
315fe56b9e6SYuval Mintz 		u32 cmd,
316fe56b9e6SYuval Mintz 		u32 param,
317fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
318fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
319fe56b9e6SYuval Mintz 
320fe56b9e6SYuval Mintz /**
321fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
322fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
323fe56b9e6SYuval Mintz  *
324fe56b9e6SYuval Mintz  * @param p_hwfn
325fe56b9e6SYuval Mintz  * @param p_ptt
326fe56b9e6SYuval Mintz  */
327fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
328fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
329fe56b9e6SYuval Mintz 
330fe56b9e6SYuval Mintz /**
331cee4d264SManish Chopra  * @brief Get the flash size value
332cee4d264SManish Chopra  *
333cee4d264SManish Chopra  * @param p_hwfn
334cee4d264SManish Chopra  * @param p_ptt
335cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
336cee4d264SManish Chopra  *
337cee4d264SManish Chopra  * @return int - 0 - operation was successul.
338cee4d264SManish Chopra  */
339cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
340cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
341cee4d264SManish Chopra 			   u32 *p_flash_size);
342cee4d264SManish Chopra 
343cee4d264SManish Chopra /**
344fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
345fe56b9e6SYuval Mintz  *
346fe56b9e6SYuval Mintz  * @param p_hwfn
347fe56b9e6SYuval Mintz  * @param p_ptt
348fe56b9e6SYuval Mintz  * @param version - Version value
349fe56b9e6SYuval Mintz  * @param name - Protocol driver name
350fe56b9e6SYuval Mintz  *
351fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
352fe56b9e6SYuval Mintz  */
353fe56b9e6SYuval Mintz int
354fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
355fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
356fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
357fe56b9e6SYuval Mintz 
35891420b83SSudarsana Kalluru /**
3590fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3600fefbfbaSSudarsana Kalluru  *
3610fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3620fefbfbaSSudarsana Kalluru  *  @param p_ptt
3630fefbfbaSSudarsana Kalluru  *  @param client - qed client type
3640fefbfbaSSudarsana Kalluru  *
3650fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3660fefbfbaSSudarsana Kalluru  */
3670fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
3680fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
3690fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
3700fefbfbaSSudarsana Kalluru 
3710fefbfbaSSudarsana Kalluru /**
3720fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
3730fefbfbaSSudarsana Kalluru  *
3740fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3750fefbfbaSSudarsana Kalluru  *  @param p_ptt
3760fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
3770fefbfbaSSudarsana Kalluru  *
3780fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3790fefbfbaSSudarsana Kalluru  */
3800fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
3810fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
3820fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
3830fefbfbaSSudarsana Kalluru 
3840fefbfbaSSudarsana Kalluru /**
3850fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
3860fefbfbaSSudarsana Kalluru  *
3870fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3880fefbfbaSSudarsana Kalluru  *  @param p_ptt
3890fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
3900fefbfbaSSudarsana Kalluru  *
3910fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3920fefbfbaSSudarsana Kalluru  */
3930fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
3940fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
3950fefbfbaSSudarsana Kalluru 
3960fefbfbaSSudarsana Kalluru /**
3970fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
3980fefbfbaSSudarsana Kalluru  *
3990fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4000fefbfbaSSudarsana Kalluru  *  @param p_ptt
4010fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
4020fefbfbaSSudarsana Kalluru  *
4030fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4040fefbfbaSSudarsana Kalluru  */
4050fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
4060fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
4070fefbfbaSSudarsana Kalluru 
4080fefbfbaSSudarsana Kalluru /**
4090fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
4100fefbfbaSSudarsana Kalluru  *
4110fefbfbaSSudarsana Kalluru  *  @param p_hwfn
4120fefbfbaSSudarsana Kalluru  *  @param p_ptt
4130fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
4140fefbfbaSSudarsana Kalluru  *
4150fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
4160fefbfbaSSudarsana Kalluru  */
4170fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
4180fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
4190fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
4200fefbfbaSSudarsana Kalluru 
4210fefbfbaSSudarsana Kalluru /**
42291420b83SSudarsana Kalluru  * @brief Set LED status
42391420b83SSudarsana Kalluru  *
42491420b83SSudarsana Kalluru  *  @param p_hwfn
42591420b83SSudarsana Kalluru  *  @param p_ptt
42691420b83SSudarsana Kalluru  *  @param mode - LED mode
42791420b83SSudarsana Kalluru  *
42891420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
42991420b83SSudarsana Kalluru  */
43091420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
43191420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
43291420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
43391420b83SSudarsana Kalluru 
43403dc76caSSudarsana Reddy Kalluru /**
4357a4b21b7SMintz, Yuval  * @brief Read from nvm
4367a4b21b7SMintz, Yuval  *
4377a4b21b7SMintz, Yuval  *  @param cdev
4387a4b21b7SMintz, Yuval  *  @param addr - nvm offset
4397a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
4407a4b21b7SMintz, Yuval  *  @param len - buffer len
4417a4b21b7SMintz, Yuval  *
4427a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4437a4b21b7SMintz, Yuval  */
4447a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
4457a4b21b7SMintz, Yuval 
44620675b37SMintz, Yuval struct qed_nvm_image_att {
44720675b37SMintz, Yuval 	u32 start_addr;
44820675b37SMintz, Yuval 	u32 length;
44920675b37SMintz, Yuval };
45020675b37SMintz, Yuval 
45120675b37SMintz, Yuval /**
45220675b37SMintz, Yuval  * @brief Allows reading a whole nvram image
45320675b37SMintz, Yuval  *
45420675b37SMintz, Yuval  * @param p_hwfn
45520675b37SMintz, Yuval  * @param p_ptt
45620675b37SMintz, Yuval  * @param image_id - image requested for reading
45720675b37SMintz, Yuval  * @param p_buffer - allocated buffer into which to fill data
45820675b37SMintz, Yuval  * @param buffer_len - length of the allocated buffer.
45920675b37SMintz, Yuval  *
46020675b37SMintz, Yuval  * @return 0 iff p_buffer now contains the nvram image.
46120675b37SMintz, Yuval  */
46220675b37SMintz, Yuval int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
46320675b37SMintz, Yuval 			  struct qed_ptt *p_ptt,
46420675b37SMintz, Yuval 			  enum qed_nvm_images image_id,
46520675b37SMintz, Yuval 			  u8 *p_buffer, u32 buffer_len);
46620675b37SMintz, Yuval 
4677a4b21b7SMintz, Yuval /**
46803dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
46903dc76caSSudarsana Reddy Kalluru  *
47003dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
47103dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
47203dc76caSSudarsana Reddy Kalluru  *
47303dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
47403dc76caSSudarsana Reddy Kalluru  */
47503dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
47603dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
47703dc76caSSudarsana Reddy Kalluru 
47803dc76caSSudarsana Reddy Kalluru /**
47903dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
48003dc76caSSudarsana Reddy Kalluru  *
48103dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
48203dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
48303dc76caSSudarsana Reddy Kalluru  *
48403dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
48503dc76caSSudarsana Reddy Kalluru  */
48603dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
48703dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
48803dc76caSSudarsana Reddy Kalluru 
4897a4b21b7SMintz, Yuval /**
4907a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
4917a4b21b7SMintz, Yuval  *
4927a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
4937a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
4947a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
4957a4b21b7SMintz, Yuval  *			  successful. 0 if not.
4967a4b21b7SMintz, Yuval  *
4977a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4987a4b21b7SMintz, Yuval  */
499*43645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,
5007a4b21b7SMintz, Yuval 				    struct qed_ptt *p_ptt,
5017a4b21b7SMintz, Yuval 				    u32 *num_images);
5027a4b21b7SMintz, Yuval 
5037a4b21b7SMintz, Yuval /**
5047a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
5057a4b21b7SMintz, Yuval  *
5067a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
5077a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
5087a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
5097a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
5107a4b21b7SMintz, Yuval  *
5117a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
5127a4b21b7SMintz, Yuval  */
513*43645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn,
5147a4b21b7SMintz, Yuval 				   struct qed_ptt *p_ptt,
5157a4b21b7SMintz, Yuval 				   struct bist_nvm_image_att *p_image_att,
5167a4b21b7SMintz, Yuval 				   u32 image_index);
5177a4b21b7SMintz, Yuval 
518fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
519fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
520fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
521fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
522fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
523fe56b9e6SYuval Mintz  */
524fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
525fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
526fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
527fe56b9e6SYuval Mintz 					    rel_pfid)
528fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
529fe56b9e6SYuval Mintz 
530fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
53178cea9ffSTomer Tayar 				 ((_p_hwfn)->cdev->num_ports_in_engine * \
5329c79ddaaSMintz, Yuval 				  qed_device_num_engines((_p_hwfn)->cdev)))
5339c79ddaaSMintz, Yuval 
534fe56b9e6SYuval Mintz struct qed_mcp_info {
5354ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
5364ed1eea8STomer Tayar 	struct list_head			cmd_list;
5374ed1eea8STomer Tayar 
5384ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
5394ed1eea8STomer Tayar 	 * and the sending of the commands.
5404ed1eea8STomer Tayar 	 */
5414ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
54265ed2ffdSMintz, Yuval 
54365ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
54465ed2ffdSMintz, Yuval 	 * originating from attention context.
54565ed2ffdSMintz, Yuval 	 */
54665ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
5475529bad9STomer Tayar 	bool					block_mb_sending;
548fe56b9e6SYuval Mintz 	u32					public_base;
549fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
550fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
551fe56b9e6SYuval Mintz 	u32					port_addr;
552fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
553fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
554cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
555cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
556cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
557fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
558fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
559fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
560fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
5614ed1eea8STomer Tayar 	u32					mcp_hist;
562645874e5SSudarsana Reddy Kalluru 
563645874e5SSudarsana Reddy Kalluru 	/* Capabilties negotiated with the MFW */
564645874e5SSudarsana Reddy Kalluru 	u32					capabilities;
565fe56b9e6SYuval Mintz };
566fe56b9e6SYuval Mintz 
5675529bad9STomer Tayar struct qed_mcp_mb_params {
5685529bad9STomer Tayar 	u32			cmd;
5695529bad9STomer Tayar 	u32			param;
5702f67af8cSTomer Tayar 	void			*p_data_src;
5712f67af8cSTomer Tayar 	u8			data_src_size;
5722f67af8cSTomer Tayar 	void			*p_data_dst;
5732f67af8cSTomer Tayar 	u8			data_dst_size;
5745529bad9STomer Tayar 	u32			mcp_resp;
5755529bad9STomer Tayar 	u32			mcp_param;
5765529bad9STomer Tayar };
5775529bad9STomer Tayar 
578fe56b9e6SYuval Mintz /**
579fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
580fe56b9e6SYuval Mintz  *
581fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
582fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
583fe56b9e6SYuval Mintz  *
584fe56b9e6SYuval Mintz  * @return int
585fe56b9e6SYuval Mintz  */
586fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
587fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
588fe56b9e6SYuval Mintz 
589fe56b9e6SYuval Mintz /**
590fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
591fe56b9e6SYuval Mintz  *
592fe56b9e6SYuval Mintz  * @param p_hwfn
593fe56b9e6SYuval Mintz  * @param p_ptt
594fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
595fe56b9e6SYuval Mintz  */
596fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
597fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
598fe56b9e6SYuval Mintz /**
599fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
600fe56b9e6SYuval Mintz  *
601fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
602fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
603fe56b9e6SYuval Mintz  *
604fe56b9e6SYuval Mintz  * @return int
605fe56b9e6SYuval Mintz  */
606fe56b9e6SYuval Mintz 
607fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
608fe56b9e6SYuval Mintz 
609fe56b9e6SYuval Mintz /**
610cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
611cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
612cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
613cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
614cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
615cc875c2eSYuval Mintz  *
616cc875c2eSYuval Mintz  * @param p_hwfn - HW function
617cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
618cc875c2eSYuval Mintz  * @return int - 0 - operation
619cc875c2eSYuval Mintz  * was successul.
620cc875c2eSYuval Mintz  */
621cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
622cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
623cc875c2eSYuval Mintz 
6245d24bcf1STomer Tayar enum qed_drv_role {
6255d24bcf1STomer Tayar 	QED_DRV_ROLE_OS,
6265d24bcf1STomer Tayar 	QED_DRV_ROLE_KDUMP,
6275d24bcf1STomer Tayar };
6285d24bcf1STomer Tayar 
6295d24bcf1STomer Tayar struct qed_load_req_params {
6305d24bcf1STomer Tayar 	/* Input params */
6315d24bcf1STomer Tayar 	enum qed_drv_role drv_role;
6325d24bcf1STomer Tayar 	u8 timeout_val;
6335d24bcf1STomer Tayar 	bool avoid_eng_reset;
6345d24bcf1STomer Tayar 	enum qed_override_force_load override_force_load;
6355d24bcf1STomer Tayar 
6365d24bcf1STomer Tayar 	/* Output params */
6375d24bcf1STomer Tayar 	u32 load_code;
6385d24bcf1STomer Tayar };
6395d24bcf1STomer Tayar 
640cc875c2eSYuval Mintz /**
6415d24bcf1STomer Tayar  * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
6425d24bcf1STomer Tayar  *        returns whether this PF is the first on the engine/port or function.
643fe56b9e6SYuval Mintz  *
6445d24bcf1STomer Tayar  * @param p_hwfn
6455d24bcf1STomer Tayar  * @param p_ptt
6465d24bcf1STomer Tayar  * @param p_params
6475d24bcf1STomer Tayar  *
6485d24bcf1STomer Tayar  * @return int - 0 - Operation was successful.
649fe56b9e6SYuval Mintz  */
650fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
651fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
6525d24bcf1STomer Tayar 		     struct qed_load_req_params *p_params);
653fe56b9e6SYuval Mintz 
654fe56b9e6SYuval Mintz /**
6551226337aSTomer Tayar  * @brief Sends a UNLOAD_REQ message to the MFW
6561226337aSTomer Tayar  *
6571226337aSTomer Tayar  * @param p_hwfn
6581226337aSTomer Tayar  * @param p_ptt
6591226337aSTomer Tayar  *
6601226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6611226337aSTomer Tayar  */
6621226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6631226337aSTomer Tayar 
6641226337aSTomer Tayar /**
6651226337aSTomer Tayar  * @brief Sends a UNLOAD_DONE message to the MFW
6661226337aSTomer Tayar  *
6671226337aSTomer Tayar  * @param p_hwfn
6681226337aSTomer Tayar  * @param p_ptt
6691226337aSTomer Tayar  *
6701226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6711226337aSTomer Tayar  */
6721226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6731226337aSTomer Tayar 
6741226337aSTomer Tayar /**
675fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
676fe56b9e6SYuval Mintz  *
677fe56b9e6SYuval Mintz  * @param p_hwfn
678fe56b9e6SYuval Mintz  * @param p_ptt
679fe56b9e6SYuval Mintz  */
680fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
681fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
682fe56b9e6SYuval Mintz 
683fe56b9e6SYuval Mintz /**
6840b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
6850b55e27dSYuval Mintz  *
6860b55e27dSYuval Mintz  * @param p_hwfn
6870b55e27dSYuval Mintz  * @param p_ptt
6880b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
6890b55e27dSYuval Mintz  *
6900b55e27dSYuval Mintz  * @param return int - 0 upon success.
6910b55e27dSYuval Mintz  */
6920b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
6930b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
6940b55e27dSYuval Mintz 
6950b55e27dSYuval Mintz /**
696fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
697fe56b9e6SYuval Mintz  *
698fe56b9e6SYuval Mintz  * @param p_hwfn
699fe56b9e6SYuval Mintz  *
700fe56b9e6SYuval Mintz  * @param return 0 upon success.
701fe56b9e6SYuval Mintz  */
702fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
703fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
704fe56b9e6SYuval Mintz 
705fe56b9e6SYuval Mintz /**
706fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
707fe56b9e6SYuval Mintz  *
708fe56b9e6SYuval Mintz  * @param p_hwfn
709fe56b9e6SYuval Mintz  * @param p_ptt
710fe56b9e6SYuval Mintz  *
711fe56b9e6SYuval Mintz  * @param return 0 upon success.
712fe56b9e6SYuval Mintz  */
713fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
714fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
715fe56b9e6SYuval Mintz 
716fe56b9e6SYuval Mintz /**
7174102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
7184102426fSTomer Tayar  *        a buffer.
7194102426fSTomer Tayar  *
7204102426fSTomer Tayar  * @param p_hwfn
7214102426fSTomer Tayar  * @param p_ptt
7224102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
7234102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
7244102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
7254102426fSTomer Tayar  * @param o_mcp_resp - MCP response
7264102426fSTomer Tayar  * @param o_mcp_param - MCP response param
7274102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
7284102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
7294102426fSTomer Tayar  *
7304102426fSTomer Tayar  * @param return 0 upon success.
7314102426fSTomer Tayar  */
7324102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
7334102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
7344102426fSTomer Tayar 		       u32 cmd,
7354102426fSTomer Tayar 		       u32 param,
7364102426fSTomer Tayar 		       u32 *o_mcp_resp,
7374102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
7384102426fSTomer Tayar 
7394102426fSTomer Tayar /**
740fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
741fe56b9e6SYuval Mintz  *
742fe56b9e6SYuval Mintz  * @param p_hwfn
743fe56b9e6SYuval Mintz  *
744fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
745fe56b9e6SYuval Mintz  */
746fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
7471408cc1fSYuval Mintz 
7481408cc1fSYuval Mintz /**
7491408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
7501408cc1fSYuval Mintz  *
7511408cc1fSYuval Mintz  * @param p_hwfn
7521408cc1fSYuval Mintz  * @param p_ptt
7531408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
7541408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
7551408cc1fSYuval Mintz  *
7561408cc1fSYuval Mintz  * @return int
7571408cc1fSYuval Mintz  */
7581408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
7591408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
7601408cc1fSYuval Mintz 
7614102426fSTomer Tayar /**
7624102426fSTomer Tayar  * @brief - Halt the MCP.
7634102426fSTomer Tayar  *
7644102426fSTomer Tayar  * @param p_hwfn
7654102426fSTomer Tayar  * @param p_ptt
7664102426fSTomer Tayar  *
7674102426fSTomer Tayar  * @param return 0 upon success.
7684102426fSTomer Tayar  */
7694102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7704102426fSTomer Tayar 
7714102426fSTomer Tayar /**
7724102426fSTomer Tayar  * @brief - Wake up the MCP.
7734102426fSTomer Tayar  *
7744102426fSTomer Tayar  * @param p_hwfn
7754102426fSTomer Tayar  * @param p_ptt
7764102426fSTomer Tayar  *
7774102426fSTomer Tayar  * @param return 0 upon success.
7784102426fSTomer Tayar  */
7794102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7804102426fSTomer Tayar 
781a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
7824b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
7834b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
7844b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
7854b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
7864b01e519SManish Chopra 				     u8 max_bw);
787a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
788a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
789a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
790a64b02d5SManish Chopra 				     u8 min_bw);
791351a4dedSYuval Mintz 
7924102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
7934102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
7944102426fSTomer Tayar 
7950fefbfbaSSudarsana Kalluru /**
7969c8517c4STomer Tayar  * @brief - Sets the MFW's max value for the given resource
7979c8517c4STomer Tayar  *
7989c8517c4STomer Tayar  *  @param p_hwfn
7999c8517c4STomer Tayar  *  @param p_ptt
8009c8517c4STomer Tayar  *  @param res_id
8019c8517c4STomer Tayar  *  @param resc_max_val
8029c8517c4STomer Tayar  *  @param p_mcp_resp
8039c8517c4STomer Tayar  *
8049c8517c4STomer Tayar  * @return int - 0 - operation was successful.
8059c8517c4STomer Tayar  */
8069c8517c4STomer Tayar int
8079c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
8089c8517c4STomer Tayar 			 struct qed_ptt *p_ptt,
8099c8517c4STomer Tayar 			 enum qed_resources res_id,
8109c8517c4STomer Tayar 			 u32 resc_max_val, u32 *p_mcp_resp);
8119c8517c4STomer Tayar 
8129c8517c4STomer Tayar /**
8139c8517c4STomer Tayar  * @brief - Gets the MFW allocation info for the given resource
8149c8517c4STomer Tayar  *
8159c8517c4STomer Tayar  *  @param p_hwfn
8169c8517c4STomer Tayar  *  @param p_ptt
8179c8517c4STomer Tayar  *  @param res_id
8189c8517c4STomer Tayar  *  @param p_mcp_resp
8199c8517c4STomer Tayar  *  @param p_resc_num
8209c8517c4STomer Tayar  *  @param p_resc_start
8219c8517c4STomer Tayar  *
8229c8517c4STomer Tayar  * @return int - 0 - operation was successful.
8239c8517c4STomer Tayar  */
8249c8517c4STomer Tayar int
8259c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
8269c8517c4STomer Tayar 		      struct qed_ptt *p_ptt,
8279c8517c4STomer Tayar 		      enum qed_resources res_id,
8289c8517c4STomer Tayar 		      u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
8299c8517c4STomer Tayar 
8309c8517c4STomer Tayar /**
8310fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
8320fefbfbaSSudarsana Kalluru  *
8330fefbfbaSSudarsana Kalluru  *  @param p_hwfn
8340fefbfbaSSudarsana Kalluru  *  @param p_ptt
8350fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
8360fefbfbaSSudarsana Kalluru  *
8370fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
8380fefbfbaSSudarsana Kalluru  */
8390fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
8400fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
8410fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
8420fefbfbaSSudarsana Kalluru 
8439c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL       RESOURCE_DUMP
8449c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL       31
8459c8517c4STomer Tayar 
8469c8517c4STomer Tayar enum qed_resc_lock {
8479c8517c4STomer Tayar 	QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
848db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT0,
849db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT1,
850db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT2,
851db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT3,
852f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
853f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_INVALID
8549c8517c4STomer Tayar };
85518a69e36SMintz, Yuval 
85618a69e36SMintz, Yuval /**
85718a69e36SMintz, Yuval  * @brief - Initiates PF FLR
85818a69e36SMintz, Yuval  *
85918a69e36SMintz, Yuval  *  @param p_hwfn
86018a69e36SMintz, Yuval  *  @param p_ptt
86118a69e36SMintz, Yuval  *
86218a69e36SMintz, Yuval  * @return int - 0 - operation was successful.
86318a69e36SMintz, Yuval  */
86418a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
86595691c9cSTomer Tayar struct qed_resc_lock_params {
86695691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
86795691c9cSTomer Tayar 	u8 resource;
86895691c9cSTomer Tayar 
86995691c9cSTomer Tayar 	/* Lock timeout value in seconds [default, none or 1..254] */
87095691c9cSTomer Tayar 	u8 timeout;
87195691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT    0
87295691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE       255
87395691c9cSTomer Tayar 
87495691c9cSTomer Tayar 	/* Number of times to retry locking */
87595691c9cSTomer Tayar 	u8 retry_num;
876f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT        10
87795691c9cSTomer Tayar 
87895691c9cSTomer Tayar 	/* The interval in usec between retries */
87995691c9cSTomer Tayar 	u16 retry_interval;
880f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT        10000
88195691c9cSTomer Tayar 
88295691c9cSTomer Tayar 	/* Use sleep or delay between retries */
88395691c9cSTomer Tayar 	bool sleep_b4_retry;
88495691c9cSTomer Tayar 
88595691c9cSTomer Tayar 	/* Will be set as true if the resource is free and granted */
88695691c9cSTomer Tayar 	bool b_granted;
88795691c9cSTomer Tayar 
88895691c9cSTomer Tayar 	/* Will be filled with the resource owner.
88995691c9cSTomer Tayar 	 * [0..15 = PF0-15, 16 = MFW]
89095691c9cSTomer Tayar 	 */
89195691c9cSTomer Tayar 	u8 owner;
89295691c9cSTomer Tayar };
89395691c9cSTomer Tayar 
89495691c9cSTomer Tayar /**
89595691c9cSTomer Tayar  * @brief Acquires MFW generic resource lock
89695691c9cSTomer Tayar  *
89795691c9cSTomer Tayar  *  @param p_hwfn
89895691c9cSTomer Tayar  *  @param p_ptt
89995691c9cSTomer Tayar  *  @param p_params
90095691c9cSTomer Tayar  *
90195691c9cSTomer Tayar  * @return int - 0 - operation was successful.
90295691c9cSTomer Tayar  */
90395691c9cSTomer Tayar int
90495691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
90595691c9cSTomer Tayar 		  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
90695691c9cSTomer Tayar 
90795691c9cSTomer Tayar struct qed_resc_unlock_params {
90895691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
90995691c9cSTomer Tayar 	u8 resource;
91095691c9cSTomer Tayar 
91195691c9cSTomer Tayar 	/* Allow to release a resource even if belongs to another PF */
91295691c9cSTomer Tayar 	bool b_force;
91395691c9cSTomer Tayar 
91495691c9cSTomer Tayar 	/* Will be set as true if the resource is released */
91595691c9cSTomer Tayar 	bool b_released;
91695691c9cSTomer Tayar };
91795691c9cSTomer Tayar 
91895691c9cSTomer Tayar /**
91995691c9cSTomer Tayar  * @brief Releases MFW generic resource lock
92095691c9cSTomer Tayar  *
92195691c9cSTomer Tayar  *  @param p_hwfn
92295691c9cSTomer Tayar  *  @param p_ptt
92395691c9cSTomer Tayar  *  @param p_params
92495691c9cSTomer Tayar  *
92595691c9cSTomer Tayar  * @return int - 0 - operation was successful.
92695691c9cSTomer Tayar  */
92795691c9cSTomer Tayar int
92895691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
92995691c9cSTomer Tayar 		    struct qed_ptt *p_ptt,
93095691c9cSTomer Tayar 		    struct qed_resc_unlock_params *p_params);
93195691c9cSTomer Tayar 
932f470f22cSsudarsana.kalluru@cavium.com /**
933f470f22cSsudarsana.kalluru@cavium.com  * @brief - default initialization for lock/unlock resource structs
934f470f22cSsudarsana.kalluru@cavium.com  *
935f470f22cSsudarsana.kalluru@cavium.com  * @param p_lock - lock params struct to be initialized; Can be NULL
936f470f22cSsudarsana.kalluru@cavium.com  * @param p_unlock - unlock params struct to be initialized; Can be NULL
937f470f22cSsudarsana.kalluru@cavium.com  * @param resource - the requested resource
938f470f22cSsudarsana.kalluru@cavium.com  * @paral b_is_permanent - disable retries & aging when set
939f470f22cSsudarsana.kalluru@cavium.com  */
940f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
941f470f22cSsudarsana.kalluru@cavium.com 				    struct qed_resc_unlock_params *p_unlock,
942f470f22cSsudarsana.kalluru@cavium.com 				    enum qed_resc_lock
943f470f22cSsudarsana.kalluru@cavium.com 				    resource, bool b_is_permanent);
944645874e5SSudarsana Reddy Kalluru /**
945645874e5SSudarsana Reddy Kalluru  * @brief Learn of supported MFW features; To be done during early init
946645874e5SSudarsana Reddy Kalluru  *
947645874e5SSudarsana Reddy Kalluru  * @param p_hwfn
948645874e5SSudarsana Reddy Kalluru  * @param p_ptt
949645874e5SSudarsana Reddy Kalluru  */
950645874e5SSudarsana Reddy Kalluru int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
951f470f22cSsudarsana.kalluru@cavium.com 
952645874e5SSudarsana Reddy Kalluru /**
953645874e5SSudarsana Reddy Kalluru  * @brief Inform MFW of set of features supported by driver. Should be done
954645874e5SSudarsana Reddy Kalluru  * inside the content of the LOAD_REQ.
955645874e5SSudarsana Reddy Kalluru  *
956645874e5SSudarsana Reddy Kalluru  * @param p_hwfn
957645874e5SSudarsana Reddy Kalluru  * @param p_ptt
958645874e5SSudarsana Reddy Kalluru  */
959645874e5SSudarsana Reddy Kalluru int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
960*43645ce0SSudarsana Reddy Kalluru 
961*43645ce0SSudarsana Reddy Kalluru /**
962*43645ce0SSudarsana Reddy Kalluru  * @brief Populate the nvm info shadow in the given hardware function
963*43645ce0SSudarsana Reddy Kalluru  *
964*43645ce0SSudarsana Reddy Kalluru  * @param p_hwfn
965*43645ce0SSudarsana Reddy Kalluru  */
966*43645ce0SSudarsana Reddy Kalluru int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
967*43645ce0SSudarsana Reddy Kalluru 
968fe56b9e6SYuval Mintz #endif
969