11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd. 5fe56b9e6SYuval Mintz */ 6fe56b9e6SYuval Mintz 7fe56b9e6SYuval Mintz #ifndef _QED_MCP_H 8fe56b9e6SYuval Mintz #define _QED_MCP_H 9fe56b9e6SYuval Mintz 10fe56b9e6SYuval Mintz #include <linux/types.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/slab.h> 135529bad9STomer Tayar #include <linux/spinlock.h> 141e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h> 15fe56b9e6SYuval Mintz #include "qed_hsi.h" 165d24bcf1STomer Tayar #include "qed_dev_api.h" 17fe56b9e6SYuval Mintz 18cc875c2eSYuval Mintz struct qed_mcp_link_speed_params { 19cc875c2eSYuval Mintz bool autoneg; 20cc875c2eSYuval Mintz u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 21cc875c2eSYuval Mintz u32 forced_speed; /* In Mb/s */ 22cc875c2eSYuval Mintz }; 23cc875c2eSYuval Mintz 24cc875c2eSYuval Mintz struct qed_mcp_link_pause_params { 25cc875c2eSYuval Mintz bool autoneg; 26cc875c2eSYuval Mintz bool forced_rx; 27cc875c2eSYuval Mintz bool forced_tx; 28cc875c2eSYuval Mintz }; 29cc875c2eSYuval Mintz 30645874e5SSudarsana Reddy Kalluru enum qed_mcp_eee_mode { 31645874e5SSudarsana Reddy Kalluru QED_MCP_EEE_DISABLED, 32645874e5SSudarsana Reddy Kalluru QED_MCP_EEE_ENABLED, 33645874e5SSudarsana Reddy Kalluru QED_MCP_EEE_UNSUPPORTED 34645874e5SSudarsana Reddy Kalluru }; 35645874e5SSudarsana Reddy Kalluru 36cc875c2eSYuval Mintz struct qed_mcp_link_params { 37cc875c2eSYuval Mintz struct qed_mcp_link_speed_params speed; 38cc875c2eSYuval Mintz struct qed_mcp_link_pause_params pause; 39cc875c2eSYuval Mintz u32 loopback_mode; 40645874e5SSudarsana Reddy Kalluru struct qed_link_eee_params eee; 41cc875c2eSYuval Mintz }; 42cc875c2eSYuval Mintz 43cc875c2eSYuval Mintz struct qed_mcp_link_capabilities { 44cc875c2eSYuval Mintz u32 speed_capabilities; 4534f9199cSsudarsana.kalluru@cavium.com bool default_speed_autoneg; 46645874e5SSudarsana Reddy Kalluru enum qed_mcp_eee_mode default_eee; 47645874e5SSudarsana Reddy Kalluru u32 eee_lpi_timer; 48645874e5SSudarsana Reddy Kalluru u8 eee_speed_caps; 49cc875c2eSYuval Mintz }; 50cc875c2eSYuval Mintz 51cc875c2eSYuval Mintz struct qed_mcp_link_state { 52cc875c2eSYuval Mintz bool link_up; 53a64b02d5SManish Chopra u32 min_pf_rate; 54a64b02d5SManish Chopra 554b01e519SManish Chopra /* Actual link speed in Mb/s */ 564b01e519SManish Chopra u32 line_speed; 574b01e519SManish Chopra 584b01e519SManish Chopra /* PF max speed in Mb/s, deduced from line_speed 594b01e519SManish Chopra * according to PF max bandwidth configuration. 604b01e519SManish Chopra */ 614b01e519SManish Chopra u32 speed; 62cc875c2eSYuval Mintz 63*37237b5bSAlexander Lobakin bool full_duplex; 64cc875c2eSYuval Mintz bool an; 65cc875c2eSYuval Mintz bool an_complete; 66cc875c2eSYuval Mintz bool parallel_detection; 67cc875c2eSYuval Mintz bool pfc_enabled; 68cc875c2eSYuval Mintz 69*37237b5bSAlexander Lobakin u32 partner_adv_speed; 70cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 71cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 72cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G BIT(2) 73cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G BIT(3) 74054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G BIT(4) 75054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G BIT(5) 76054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G BIT(6) 77054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G BIT(7) 78cc875c2eSYuval Mintz 79cc875c2eSYuval Mintz bool partner_tx_flow_ctrl_en; 80cc875c2eSYuval Mintz bool partner_rx_flow_ctrl_en; 81cc875c2eSYuval Mintz 82cc875c2eSYuval Mintz u8 partner_adv_pause; 83*37237b5bSAlexander Lobakin #define QED_LINK_PARTNER_SYMMETRIC_PAUSE 0x1 84*37237b5bSAlexander Lobakin #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE 0x2 85*37237b5bSAlexander Lobakin #define QED_LINK_PARTNER_BOTH_PAUSE 0x3 86cc875c2eSYuval Mintz 87cc875c2eSYuval Mintz bool sfp_tx_fault; 88645874e5SSudarsana Reddy Kalluru bool eee_active; 89645874e5SSudarsana Reddy Kalluru u8 eee_adv_caps; 90645874e5SSudarsana Reddy Kalluru u8 eee_lp_adv_caps; 91cc875c2eSYuval Mintz }; 92cc875c2eSYuval Mintz 93fe56b9e6SYuval Mintz struct qed_mcp_function_info { 94fe56b9e6SYuval Mintz u8 pause_on_host; 95fe56b9e6SYuval Mintz 96fe56b9e6SYuval Mintz enum qed_pci_personality protocol; 97fe56b9e6SYuval Mintz 98fe56b9e6SYuval Mintz u8 bandwidth_min; 99fe56b9e6SYuval Mintz u8 bandwidth_max; 100fe56b9e6SYuval Mintz 101fe56b9e6SYuval Mintz u8 mac[ETH_ALEN]; 102fe56b9e6SYuval Mintz 103fe56b9e6SYuval Mintz u64 wwn_port; 104fe56b9e6SYuval Mintz u64 wwn_node; 105fe56b9e6SYuval Mintz 106fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET (0xffff) 107fe56b9e6SYuval Mintz u16 ovlan; 1080fefbfbaSSudarsana Kalluru 1090fefbfbaSSudarsana Kalluru u16 mtu; 110fe56b9e6SYuval Mintz }; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz struct qed_mcp_nvm_common { 113fe56b9e6SYuval Mintz u32 offset; 114fe56b9e6SYuval Mintz u32 param; 115fe56b9e6SYuval Mintz u32 resp; 116fe56b9e6SYuval Mintz u32 cmd; 117fe56b9e6SYuval Mintz }; 118fe56b9e6SYuval Mintz 119fe56b9e6SYuval Mintz struct qed_mcp_drv_version { 120fe56b9e6SYuval Mintz u32 version; 121fe56b9e6SYuval Mintz u8 name[MCP_DRV_VER_STR_SIZE - 4]; 122fe56b9e6SYuval Mintz }; 123fe56b9e6SYuval Mintz 1246c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats { 1256c754246SSudarsana Reddy Kalluru u64 ucast_rx_pkts; 1266c754246SSudarsana Reddy Kalluru u64 ucast_tx_pkts; 1276c754246SSudarsana Reddy Kalluru u32 fcs_err; 1286c754246SSudarsana Reddy Kalluru }; 1296c754246SSudarsana Reddy Kalluru 1306c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats { 1316c754246SSudarsana Reddy Kalluru u64 rx_pkts; 1326c754246SSudarsana Reddy Kalluru u64 tx_pkts; 1336c754246SSudarsana Reddy Kalluru u32 fcs_err; 1346c754246SSudarsana Reddy Kalluru u32 login_failure; 1356c754246SSudarsana Reddy Kalluru }; 1366c754246SSudarsana Reddy Kalluru 1376c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats { 1386c754246SSudarsana Reddy Kalluru u64 rx_pdus; 1396c754246SSudarsana Reddy Kalluru u64 tx_pdus; 1406c754246SSudarsana Reddy Kalluru u64 rx_bytes; 1416c754246SSudarsana Reddy Kalluru u64 tx_bytes; 1426c754246SSudarsana Reddy Kalluru }; 1436c754246SSudarsana Reddy Kalluru 1446c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats { 1456c754246SSudarsana Reddy Kalluru u64 rx_pkts; 1466c754246SSudarsana Reddy Kalluru u64 tx_pkts; 1476c754246SSudarsana Reddy Kalluru u64 rx_bytes; 1486c754246SSudarsana Reddy Kalluru u64 tx_byts; 1496c754246SSudarsana Reddy Kalluru }; 1506c754246SSudarsana Reddy Kalluru 1516c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type { 1526c754246SSudarsana Reddy Kalluru QED_MCP_LAN_STATS, 1536c754246SSudarsana Reddy Kalluru QED_MCP_FCOE_STATS, 1546c754246SSudarsana Reddy Kalluru QED_MCP_ISCSI_STATS, 1556c754246SSudarsana Reddy Kalluru QED_MCP_RDMA_STATS 1566c754246SSudarsana Reddy Kalluru }; 1576c754246SSudarsana Reddy Kalluru 1586c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats { 1596c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats lan_stats; 1606c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats fcoe_stats; 1616c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats iscsi_stats; 1626c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats rdma_stats; 1636c754246SSudarsana Reddy Kalluru }; 1646c754246SSudarsana Reddy Kalluru 1650fefbfbaSSudarsana Kalluru enum qed_ov_eswitch { 1660fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_NONE, 1670fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_VEB, 1680fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_VEPA 1690fefbfbaSSudarsana Kalluru }; 1700fefbfbaSSudarsana Kalluru 1710fefbfbaSSudarsana Kalluru enum qed_ov_client { 1720fefbfbaSSudarsana Kalluru QED_OV_CLIENT_DRV, 1730fefbfbaSSudarsana Kalluru QED_OV_CLIENT_USER, 1740fefbfbaSSudarsana Kalluru QED_OV_CLIENT_VENDOR_SPEC 1750fefbfbaSSudarsana Kalluru }; 1760fefbfbaSSudarsana Kalluru 1770fefbfbaSSudarsana Kalluru enum qed_ov_driver_state { 1780fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_NOT_LOADED, 1790fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_DISABLED, 1800fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_ACTIVE 1810fefbfbaSSudarsana Kalluru }; 1820fefbfbaSSudarsana Kalluru 1830fefbfbaSSudarsana Kalluru enum qed_ov_wol { 1840fefbfbaSSudarsana Kalluru QED_OV_WOL_DEFAULT, 1850fefbfbaSSudarsana Kalluru QED_OV_WOL_DISABLED, 1860fefbfbaSSudarsana Kalluru QED_OV_WOL_ENABLED 1870fefbfbaSSudarsana Kalluru }; 1880fefbfbaSSudarsana Kalluru 1892528c389SSudarsana Reddy Kalluru enum qed_mfw_tlv_type { 1902528c389SSudarsana Reddy Kalluru QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 1912528c389SSudarsana Reddy Kalluru QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 192f240b688SSudarsana Reddy Kalluru QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 19377a509e4SSudarsana Reddy Kalluru QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 19477a509e4SSudarsana Reddy Kalluru QED_MFW_TLV_MAX = 0x16, 1952528c389SSudarsana Reddy Kalluru }; 1962528c389SSudarsana Reddy Kalluru 1972528c389SSudarsana Reddy Kalluru struct qed_mfw_tlv_generic { 1982528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_FLAGS_SIZE 2 1992528c389SSudarsana Reddy Kalluru struct { 2002528c389SSudarsana Reddy Kalluru u8 ipv4_csum_offload; 2012528c389SSudarsana Reddy Kalluru u8 lso_supported; 2022528c389SSudarsana Reddy Kalluru bool b_set; 2032528c389SSudarsana Reddy Kalluru } flags; 2042528c389SSudarsana Reddy Kalluru 2052528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_MAC_COUNT 3 2062528c389SSudarsana Reddy Kalluru /* First entry for primary MAC, 2 secondary MACs possible */ 2072528c389SSudarsana Reddy Kalluru u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 2082528c389SSudarsana Reddy Kalluru bool mac_set[QED_MFW_TLV_MAC_COUNT]; 2092528c389SSudarsana Reddy Kalluru 2102528c389SSudarsana Reddy Kalluru u64 rx_frames; 2112528c389SSudarsana Reddy Kalluru bool rx_frames_set; 2122528c389SSudarsana Reddy Kalluru u64 rx_bytes; 2132528c389SSudarsana Reddy Kalluru bool rx_bytes_set; 2142528c389SSudarsana Reddy Kalluru u64 tx_frames; 2152528c389SSudarsana Reddy Kalluru bool tx_frames_set; 2162528c389SSudarsana Reddy Kalluru u64 tx_bytes; 2172528c389SSudarsana Reddy Kalluru bool tx_bytes_set; 2182528c389SSudarsana Reddy Kalluru }; 2192528c389SSudarsana Reddy Kalluru 2202528c389SSudarsana Reddy Kalluru union qed_mfw_tlv_data { 2212528c389SSudarsana Reddy Kalluru struct qed_mfw_tlv_generic generic; 2222528c389SSudarsana Reddy Kalluru struct qed_mfw_tlv_eth eth; 223f240b688SSudarsana Reddy Kalluru struct qed_mfw_tlv_fcoe fcoe; 22477a509e4SSudarsana Reddy Kalluru struct qed_mfw_tlv_iscsi iscsi; 2252528c389SSudarsana Reddy Kalluru }; 2262528c389SSudarsana Reddy Kalluru 22738eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_ALL BIT(0) 22838eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_INIT BIT(1) 22938eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_COMMIT BIT(2) 23038eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_FREE BIT(3) 23138eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_ENTITY_SEL BIT(4) 23238eabdf0SSudarsana Reddy Kalluru 233fe56b9e6SYuval Mintz /** 234cc875c2eSYuval Mintz * @brief - returns the link params of the hw function 235cc875c2eSYuval Mintz * 236cc875c2eSYuval Mintz * @param p_hwfn 237cc875c2eSYuval Mintz * 238cc875c2eSYuval Mintz * @returns pointer to link params 239cc875c2eSYuval Mintz */ 240cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 241cc875c2eSYuval Mintz 242cc875c2eSYuval Mintz /** 243cc875c2eSYuval Mintz * @brief - return the link state of the hw function 244cc875c2eSYuval Mintz * 245cc875c2eSYuval Mintz * @param p_hwfn 246cc875c2eSYuval Mintz * 247cc875c2eSYuval Mintz * @returns pointer to link state 248cc875c2eSYuval Mintz */ 249cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 250cc875c2eSYuval Mintz 251cc875c2eSYuval Mintz /** 252cc875c2eSYuval Mintz * @brief - return the link capabilities of the hw function 253cc875c2eSYuval Mintz * 254cc875c2eSYuval Mintz * @param p_hwfn 255cc875c2eSYuval Mintz * 256cc875c2eSYuval Mintz * @returns pointer to link capabilities 257cc875c2eSYuval Mintz */ 258cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 259cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 260cc875c2eSYuval Mintz 261cc875c2eSYuval Mintz /** 262cc875c2eSYuval Mintz * @brief Request the MFW to set the the link according to 'link_input'. 263cc875c2eSYuval Mintz * 264cc875c2eSYuval Mintz * @param p_hwfn 265cc875c2eSYuval Mintz * @param p_ptt 266cc875c2eSYuval Mintz * @param b_up - raise link if `true'. Reset link if `false'. 267cc875c2eSYuval Mintz * 268cc875c2eSYuval Mintz * @return int 269cc875c2eSYuval Mintz */ 270cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 271cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 272cc875c2eSYuval Mintz bool b_up); 273cc875c2eSYuval Mintz 274cc875c2eSYuval Mintz /** 275fe56b9e6SYuval Mintz * @brief Get the management firmware version value 276fe56b9e6SYuval Mintz * 2771408cc1fSYuval Mintz * @param p_hwfn 2781408cc1fSYuval Mintz * @param p_ptt 2791408cc1fSYuval Mintz * @param p_mfw_ver - mfw version value 2801408cc1fSYuval Mintz * @param p_running_bundle_id - image id in nvram; Optional. 281fe56b9e6SYuval Mintz * 2821408cc1fSYuval Mintz * @return int - 0 - operation was successful. 283fe56b9e6SYuval Mintz */ 2841408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 2851408cc1fSYuval Mintz struct qed_ptt *p_ptt, 2861408cc1fSYuval Mintz u32 *p_mfw_ver, u32 *p_running_bundle_id); 287fe56b9e6SYuval Mintz 288fe56b9e6SYuval Mintz /** 289ae33666aSTomer Tayar * @brief Get the MBI version value 290ae33666aSTomer Tayar * 291ae33666aSTomer Tayar * @param p_hwfn 292ae33666aSTomer Tayar * @param p_ptt 293ae33666aSTomer Tayar * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 294ae33666aSTomer Tayar * 295ae33666aSTomer Tayar * @return int - 0 - operation was successful. 296ae33666aSTomer Tayar */ 297ae33666aSTomer Tayar int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 298ae33666aSTomer Tayar struct qed_ptt *p_ptt, u32 *p_mbi_ver); 299ae33666aSTomer Tayar 300ae33666aSTomer Tayar /** 301cc875c2eSYuval Mintz * @brief Get media type value of the port. 302cc875c2eSYuval Mintz * 303cc875c2eSYuval Mintz * @param cdev - qed dev pointer 304706d0891SRahul Verma * @param p_ptt 305cc875c2eSYuval Mintz * @param mfw_ver - media type value 306cc875c2eSYuval Mintz * 307cc875c2eSYuval Mintz * @return int - 308cc875c2eSYuval Mintz * 0 - Operation was successul. 309cc875c2eSYuval Mintz * -EBUSY - Operation failed 310cc875c2eSYuval Mintz */ 311706d0891SRahul Verma int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn, 312706d0891SRahul Verma struct qed_ptt *p_ptt, u32 *media_type); 313cc875c2eSYuval Mintz 314cc875c2eSYuval Mintz /** 315c56a8be7SRahul Verma * @brief Get transceiver data of the port. 316c56a8be7SRahul Verma * 317c56a8be7SRahul Verma * @param cdev - qed dev pointer 318c56a8be7SRahul Verma * @param p_ptt 319c56a8be7SRahul Verma * @param p_transceiver_state - transceiver state. 320c56a8be7SRahul Verma * @param p_transceiver_type - media type value 321c56a8be7SRahul Verma * 322c56a8be7SRahul Verma * @return int - 323c56a8be7SRahul Verma * 0 - Operation was successful. 324c56a8be7SRahul Verma * -EBUSY - Operation failed 325c56a8be7SRahul Verma */ 326c56a8be7SRahul Verma int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn, 327c56a8be7SRahul Verma struct qed_ptt *p_ptt, 328c56a8be7SRahul Verma u32 *p_transceiver_state, 329c56a8be7SRahul Verma u32 *p_tranceiver_type); 330c56a8be7SRahul Verma 331c56a8be7SRahul Verma /** 332c56a8be7SRahul Verma * @brief Get transceiver supported speed mask. 333c56a8be7SRahul Verma * 334c56a8be7SRahul Verma * @param cdev - qed dev pointer 335c56a8be7SRahul Verma * @param p_ptt 336c56a8be7SRahul Verma * @param p_speed_mask - Bit mask of all supported speeds. 337c56a8be7SRahul Verma * 338c56a8be7SRahul Verma * @return int - 339c56a8be7SRahul Verma * 0 - Operation was successful. 340c56a8be7SRahul Verma * -EBUSY - Operation failed 341c56a8be7SRahul Verma */ 342c56a8be7SRahul Verma 343c56a8be7SRahul Verma int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn, 344c56a8be7SRahul Verma struct qed_ptt *p_ptt, u32 *p_speed_mask); 345c56a8be7SRahul Verma 346c56a8be7SRahul Verma /** 347c56a8be7SRahul Verma * @brief Get board configuration. 348c56a8be7SRahul Verma * 349c56a8be7SRahul Verma * @param cdev - qed dev pointer 350c56a8be7SRahul Verma * @param p_ptt 351c56a8be7SRahul Verma * @param p_board_config - Board config. 352c56a8be7SRahul Verma * 353c56a8be7SRahul Verma * @return int - 354c56a8be7SRahul Verma * 0 - Operation was successful. 355c56a8be7SRahul Verma * -EBUSY - Operation failed 356c56a8be7SRahul Verma */ 357c56a8be7SRahul Verma int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn, 358c56a8be7SRahul Verma struct qed_ptt *p_ptt, u32 *p_board_config); 359c56a8be7SRahul Verma 360c56a8be7SRahul Verma /** 361fe56b9e6SYuval Mintz * @brief General function for sending commands to the MCP 362fe56b9e6SYuval Mintz * mailbox. It acquire mutex lock for the entire 363fe56b9e6SYuval Mintz * operation, from sending the request until the MCP 364fe56b9e6SYuval Mintz * response. Waiting for MCP response will be checked up 365fe56b9e6SYuval Mintz * to 5 seconds every 5ms. 366fe56b9e6SYuval Mintz * 367fe56b9e6SYuval Mintz * @param p_hwfn - hw function 368fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 369fe56b9e6SYuval Mintz * @param cmd - command to be sent to the MCP. 370fe56b9e6SYuval Mintz * @param param - Optional param 371fe56b9e6SYuval Mintz * @param o_mcp_resp - The MCP response code (exclude sequence). 372fe56b9e6SYuval Mintz * @param o_mcp_param- Optional parameter provided by the MCP 373fe56b9e6SYuval Mintz * response 374fe56b9e6SYuval Mintz * @return int - 0 - operation 375fe56b9e6SYuval Mintz * was successul. 376fe56b9e6SYuval Mintz */ 377fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 378fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 379fe56b9e6SYuval Mintz u32 cmd, 380fe56b9e6SYuval Mintz u32 param, 381fe56b9e6SYuval Mintz u32 *o_mcp_resp, 382fe56b9e6SYuval Mintz u32 *o_mcp_param); 383fe56b9e6SYuval Mintz 384fe56b9e6SYuval Mintz /** 385fe56b9e6SYuval Mintz * @brief - drains the nig, allowing completion to pass in case of pauses. 386fe56b9e6SYuval Mintz * (Should be called only from sleepable context) 387fe56b9e6SYuval Mintz * 388fe56b9e6SYuval Mintz * @param p_hwfn 389fe56b9e6SYuval Mintz * @param p_ptt 390fe56b9e6SYuval Mintz */ 391fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, 392fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 393fe56b9e6SYuval Mintz 394fe56b9e6SYuval Mintz /** 395cee4d264SManish Chopra * @brief Get the flash size value 396cee4d264SManish Chopra * 397cee4d264SManish Chopra * @param p_hwfn 398cee4d264SManish Chopra * @param p_ptt 399cee4d264SManish Chopra * @param p_flash_size - flash size in bytes to be filled. 400cee4d264SManish Chopra * 401cee4d264SManish Chopra * @return int - 0 - operation was successul. 402cee4d264SManish Chopra */ 403cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 404cee4d264SManish Chopra struct qed_ptt *p_ptt, 405cee4d264SManish Chopra u32 *p_flash_size); 406cee4d264SManish Chopra 407cee4d264SManish Chopra /** 408fe56b9e6SYuval Mintz * @brief Send driver version to MFW 409fe56b9e6SYuval Mintz * 410fe56b9e6SYuval Mintz * @param p_hwfn 411fe56b9e6SYuval Mintz * @param p_ptt 412fe56b9e6SYuval Mintz * @param version - Version value 413fe56b9e6SYuval Mintz * @param name - Protocol driver name 414fe56b9e6SYuval Mintz * 415fe56b9e6SYuval Mintz * @return int - 0 - operation was successul. 416fe56b9e6SYuval Mintz */ 417fe56b9e6SYuval Mintz int 418fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 419fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 420fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver); 421fe56b9e6SYuval Mintz 42291420b83SSudarsana Kalluru /** 42364515dc8STomer Tayar * @brief Read the MFW process kill counter 42464515dc8STomer Tayar * 42564515dc8STomer Tayar * @param p_hwfn 42664515dc8STomer Tayar * @param p_ptt 42764515dc8STomer Tayar * 42864515dc8STomer Tayar * @return u32 42964515dc8STomer Tayar */ 43064515dc8STomer Tayar u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn, 43164515dc8STomer Tayar struct qed_ptt *p_ptt); 43264515dc8STomer Tayar 43364515dc8STomer Tayar /** 43464515dc8STomer Tayar * @brief Trigger a recovery process 43564515dc8STomer Tayar * 43664515dc8STomer Tayar * @param p_hwfn 43764515dc8STomer Tayar * @param p_ptt 43864515dc8STomer Tayar * 43964515dc8STomer Tayar * @return int 44064515dc8STomer Tayar */ 44164515dc8STomer Tayar int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 44264515dc8STomer Tayar 44364515dc8STomer Tayar /** 44464515dc8STomer Tayar * @brief A recovery handler must call this function as its first step. 44564515dc8STomer Tayar * It is assumed that the handler is not run from an interrupt context. 44664515dc8STomer Tayar * 44764515dc8STomer Tayar * @param cdev 44864515dc8STomer Tayar * @param p_ptt 44964515dc8STomer Tayar * 45064515dc8STomer Tayar * @return int 45164515dc8STomer Tayar */ 45264515dc8STomer Tayar int qed_recovery_prolog(struct qed_dev *cdev); 45364515dc8STomer Tayar 45464515dc8STomer Tayar /** 4550fefbfbaSSudarsana Kalluru * @brief Notify MFW about the change in base device properties 4560fefbfbaSSudarsana Kalluru * 4570fefbfbaSSudarsana Kalluru * @param p_hwfn 4580fefbfbaSSudarsana Kalluru * @param p_ptt 4590fefbfbaSSudarsana Kalluru * @param client - qed client type 4600fefbfbaSSudarsana Kalluru * 4610fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 4620fefbfbaSSudarsana Kalluru */ 4630fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 4640fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 4650fefbfbaSSudarsana Kalluru enum qed_ov_client client); 4660fefbfbaSSudarsana Kalluru 4670fefbfbaSSudarsana Kalluru /** 4680fefbfbaSSudarsana Kalluru * @brief Notify MFW about the driver state 4690fefbfbaSSudarsana Kalluru * 4700fefbfbaSSudarsana Kalluru * @param p_hwfn 4710fefbfbaSSudarsana Kalluru * @param p_ptt 4720fefbfbaSSudarsana Kalluru * @param drv_state - Driver state 4730fefbfbaSSudarsana Kalluru * 4740fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 4750fefbfbaSSudarsana Kalluru */ 4760fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 4770fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 4780fefbfbaSSudarsana Kalluru enum qed_ov_driver_state drv_state); 4790fefbfbaSSudarsana Kalluru 4800fefbfbaSSudarsana Kalluru /** 4810fefbfbaSSudarsana Kalluru * @brief Send MTU size to MFW 4820fefbfbaSSudarsana Kalluru * 4830fefbfbaSSudarsana Kalluru * @param p_hwfn 4840fefbfbaSSudarsana Kalluru * @param p_ptt 4850fefbfbaSSudarsana Kalluru * @param mtu - MTU size 4860fefbfbaSSudarsana Kalluru * 4870fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 4880fefbfbaSSudarsana Kalluru */ 4890fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 4900fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, u16 mtu); 4910fefbfbaSSudarsana Kalluru 4920fefbfbaSSudarsana Kalluru /** 4930fefbfbaSSudarsana Kalluru * @brief Send MAC address to MFW 4940fefbfbaSSudarsana Kalluru * 4950fefbfbaSSudarsana Kalluru * @param p_hwfn 4960fefbfbaSSudarsana Kalluru * @param p_ptt 4970fefbfbaSSudarsana Kalluru * @param mac - MAC address 4980fefbfbaSSudarsana Kalluru * 4990fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 5000fefbfbaSSudarsana Kalluru */ 5010fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 5020fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, u8 *mac); 5030fefbfbaSSudarsana Kalluru 5040fefbfbaSSudarsana Kalluru /** 5050fefbfbaSSudarsana Kalluru * @brief Send WOL mode to MFW 5060fefbfbaSSudarsana Kalluru * 5070fefbfbaSSudarsana Kalluru * @param p_hwfn 5080fefbfbaSSudarsana Kalluru * @param p_ptt 5090fefbfbaSSudarsana Kalluru * @param wol - WOL mode 5100fefbfbaSSudarsana Kalluru * 5110fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 5120fefbfbaSSudarsana Kalluru */ 5130fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 5140fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 5150fefbfbaSSudarsana Kalluru enum qed_ov_wol wol); 5160fefbfbaSSudarsana Kalluru 5170fefbfbaSSudarsana Kalluru /** 51891420b83SSudarsana Kalluru * @brief Set LED status 51991420b83SSudarsana Kalluru * 52091420b83SSudarsana Kalluru * @param p_hwfn 52191420b83SSudarsana Kalluru * @param p_ptt 52291420b83SSudarsana Kalluru * @param mode - LED mode 52391420b83SSudarsana Kalluru * 52491420b83SSudarsana Kalluru * @return int - 0 - operation was successful. 52591420b83SSudarsana Kalluru */ 52691420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 52791420b83SSudarsana Kalluru struct qed_ptt *p_ptt, 52891420b83SSudarsana Kalluru enum qed_led_mode mode); 52991420b83SSudarsana Kalluru 53003dc76caSSudarsana Reddy Kalluru /** 5317a4b21b7SMintz, Yuval * @brief Read from nvm 5327a4b21b7SMintz, Yuval * 5337a4b21b7SMintz, Yuval * @param cdev 5347a4b21b7SMintz, Yuval * @param addr - nvm offset 5357a4b21b7SMintz, Yuval * @param p_buf - nvm read buffer 5367a4b21b7SMintz, Yuval * @param len - buffer len 5377a4b21b7SMintz, Yuval * 5387a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 5397a4b21b7SMintz, Yuval */ 5407a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 5417a4b21b7SMintz, Yuval 54262e4d438SSudarsana Reddy Kalluru /** 54362e4d438SSudarsana Reddy Kalluru * @brief Write to nvm 54462e4d438SSudarsana Reddy Kalluru * 54562e4d438SSudarsana Reddy Kalluru * @param cdev 54662e4d438SSudarsana Reddy Kalluru * @param addr - nvm offset 54762e4d438SSudarsana Reddy Kalluru * @param cmd - nvm command 54862e4d438SSudarsana Reddy Kalluru * @param p_buf - nvm write buffer 54962e4d438SSudarsana Reddy Kalluru * @param len - buffer len 55062e4d438SSudarsana Reddy Kalluru * 55162e4d438SSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 55262e4d438SSudarsana Reddy Kalluru */ 55362e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_write(struct qed_dev *cdev, 55462e4d438SSudarsana Reddy Kalluru u32 cmd, u32 addr, u8 *p_buf, u32 len); 55562e4d438SSudarsana Reddy Kalluru 55662e4d438SSudarsana Reddy Kalluru /** 55762e4d438SSudarsana Reddy Kalluru * @brief Check latest response 55862e4d438SSudarsana Reddy Kalluru * 55962e4d438SSudarsana Reddy Kalluru * @param cdev 56062e4d438SSudarsana Reddy Kalluru * @param p_buf - nvm write buffer 56162e4d438SSudarsana Reddy Kalluru * 56262e4d438SSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 56362e4d438SSudarsana Reddy Kalluru */ 56462e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 56562e4d438SSudarsana Reddy Kalluru 56620675b37SMintz, Yuval struct qed_nvm_image_att { 56720675b37SMintz, Yuval u32 start_addr; 56820675b37SMintz, Yuval u32 length; 56920675b37SMintz, Yuval }; 57020675b37SMintz, Yuval 57120675b37SMintz, Yuval /** 57220675b37SMintz, Yuval * @brief Allows reading a whole nvram image 57320675b37SMintz, Yuval * 57420675b37SMintz, Yuval * @param p_hwfn 5751ac4329aSDenis Bolotin * @param image_id - image to get attributes for 5761ac4329aSDenis Bolotin * @param p_image_att - image attributes structure into which to fill data 5771ac4329aSDenis Bolotin * 5781ac4329aSDenis Bolotin * @return int - 0 - operation was successful. 5791ac4329aSDenis Bolotin */ 5801ac4329aSDenis Bolotin int 5811ac4329aSDenis Bolotin qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 5821ac4329aSDenis Bolotin enum qed_nvm_images image_id, 5831ac4329aSDenis Bolotin struct qed_nvm_image_att *p_image_att); 5841ac4329aSDenis Bolotin 5851ac4329aSDenis Bolotin /** 5861ac4329aSDenis Bolotin * @brief Allows reading a whole nvram image 5871ac4329aSDenis Bolotin * 5881ac4329aSDenis Bolotin * @param p_hwfn 58920675b37SMintz, Yuval * @param image_id - image requested for reading 59020675b37SMintz, Yuval * @param p_buffer - allocated buffer into which to fill data 59120675b37SMintz, Yuval * @param buffer_len - length of the allocated buffer. 59220675b37SMintz, Yuval * 59320675b37SMintz, Yuval * @return 0 iff p_buffer now contains the nvram image. 59420675b37SMintz, Yuval */ 59520675b37SMintz, Yuval int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 59620675b37SMintz, Yuval enum qed_nvm_images image_id, 59720675b37SMintz, Yuval u8 *p_buffer, u32 buffer_len); 59820675b37SMintz, Yuval 5997a4b21b7SMintz, Yuval /** 60003dc76caSSudarsana Reddy Kalluru * @brief Bist register test 60103dc76caSSudarsana Reddy Kalluru * 60203dc76caSSudarsana Reddy Kalluru * @param p_hwfn - hw function 60303dc76caSSudarsana Reddy Kalluru * @param p_ptt - PTT required for register access 60403dc76caSSudarsana Reddy Kalluru * 60503dc76caSSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 60603dc76caSSudarsana Reddy Kalluru */ 60703dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 60803dc76caSSudarsana Reddy Kalluru struct qed_ptt *p_ptt); 60903dc76caSSudarsana Reddy Kalluru 61003dc76caSSudarsana Reddy Kalluru /** 61103dc76caSSudarsana Reddy Kalluru * @brief Bist clock test 61203dc76caSSudarsana Reddy Kalluru * 61303dc76caSSudarsana Reddy Kalluru * @param p_hwfn - hw function 61403dc76caSSudarsana Reddy Kalluru * @param p_ptt - PTT required for register access 61503dc76caSSudarsana Reddy Kalluru * 61603dc76caSSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 61703dc76caSSudarsana Reddy Kalluru */ 61803dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 61903dc76caSSudarsana Reddy Kalluru struct qed_ptt *p_ptt); 62003dc76caSSudarsana Reddy Kalluru 6217a4b21b7SMintz, Yuval /** 6227a4b21b7SMintz, Yuval * @brief Bist nvm test - get number of images 6237a4b21b7SMintz, Yuval * 6247a4b21b7SMintz, Yuval * @param p_hwfn - hw function 6257a4b21b7SMintz, Yuval * @param p_ptt - PTT required for register access 6267a4b21b7SMintz, Yuval * @param num_images - number of images if operation was 6277a4b21b7SMintz, Yuval * successful. 0 if not. 6287a4b21b7SMintz, Yuval * 6297a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 6307a4b21b7SMintz, Yuval */ 63143645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 6327a4b21b7SMintz, Yuval struct qed_ptt *p_ptt, 6337a4b21b7SMintz, Yuval u32 *num_images); 6347a4b21b7SMintz, Yuval 6357a4b21b7SMintz, Yuval /** 6367a4b21b7SMintz, Yuval * @brief Bist nvm test - get image attributes by index 6377a4b21b7SMintz, Yuval * 6387a4b21b7SMintz, Yuval * @param p_hwfn - hw function 6397a4b21b7SMintz, Yuval * @param p_ptt - PTT required for register access 6407a4b21b7SMintz, Yuval * @param p_image_att - Attributes of image 6417a4b21b7SMintz, Yuval * @param image_index - Index of image to get information for 6427a4b21b7SMintz, Yuval * 6437a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 6447a4b21b7SMintz, Yuval */ 64543645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 6467a4b21b7SMintz, Yuval struct qed_ptt *p_ptt, 6477a4b21b7SMintz, Yuval struct bist_nvm_image_att *p_image_att, 6487a4b21b7SMintz, Yuval u32 image_index); 6497a4b21b7SMintz, Yuval 6502528c389SSudarsana Reddy Kalluru /** 6512528c389SSudarsana Reddy Kalluru * @brief - Processes the TLV request from MFW i.e., get the required TLV info 6522528c389SSudarsana Reddy Kalluru * from the qed client and send it to the MFW. 6532528c389SSudarsana Reddy Kalluru * 6542528c389SSudarsana Reddy Kalluru * @param p_hwfn 6552528c389SSudarsana Reddy Kalluru * @param p_ptt 6562528c389SSudarsana Reddy Kalluru * 6572528c389SSudarsana Reddy Kalluru * @param return 0 upon success. 6582528c389SSudarsana Reddy Kalluru */ 6592528c389SSudarsana Reddy Kalluru int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 6602528c389SSudarsana Reddy Kalluru 661d8d6c5a7SIgor Russkikh /** 662d8d6c5a7SIgor Russkikh * @brief Send raw debug data to the MFW 663d8d6c5a7SIgor Russkikh * 664d8d6c5a7SIgor Russkikh * @param p_hwfn 665d8d6c5a7SIgor Russkikh * @param p_ptt 666d8d6c5a7SIgor Russkikh * @param p_buf - raw debug data buffer 667d8d6c5a7SIgor Russkikh * @param size - buffer size 668d8d6c5a7SIgor Russkikh */ 669d8d6c5a7SIgor Russkikh int 670d8d6c5a7SIgor Russkikh qed_mcp_send_raw_debug_data(struct qed_hwfn *p_hwfn, 671d8d6c5a7SIgor Russkikh struct qed_ptt *p_ptt, u8 *p_buf, u32 size); 672d8d6c5a7SIgor Russkikh 673fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode, 674fe56b9e6SYuval Mintz * same pf_num may be used by two different hwfn 675fe56b9e6SYuval Mintz * TODO - this shouldn't really be in .h file, but until all fields 676fe56b9e6SYuval Mintz * required during hw-init will be placed in their correct place in shmem 677fe56b9e6SYuval Mintz * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 678fe56b9e6SYuval Mintz */ 679fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 680fe56b9e6SYuval Mintz ((rel_pfid) | \ 681fe56b9e6SYuval Mintz ((p_hwfn)->abs_pf_id & 1) << 3) : \ 682fe56b9e6SYuval Mintz rel_pfid) 683fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 684fe56b9e6SYuval Mintz 685fe56b9e6SYuval Mintz struct qed_mcp_info { 6864ed1eea8STomer Tayar /* List for mailbox commands which were sent and wait for a response */ 6874ed1eea8STomer Tayar struct list_head cmd_list; 6884ed1eea8STomer Tayar 6894ed1eea8STomer Tayar /* Spinlock used for protecting the access to the mailbox commands list 6904ed1eea8STomer Tayar * and the sending of the commands. 6914ed1eea8STomer Tayar */ 6924ed1eea8STomer Tayar spinlock_t cmd_lock; 69365ed2ffdSMintz, Yuval 694b310974eSTomer Tayar /* Flag to indicate whether sending a MFW mailbox command is blocked */ 695b310974eSTomer Tayar bool b_block_cmd; 696b310974eSTomer Tayar 69765ed2ffdSMintz, Yuval /* Spinlock used for syncing SW link-changes and link-changes 69865ed2ffdSMintz, Yuval * originating from attention context. 69965ed2ffdSMintz, Yuval */ 70065ed2ffdSMintz, Yuval spinlock_t link_lock; 701b310974eSTomer Tayar 702fe56b9e6SYuval Mintz u32 public_base; 703fe56b9e6SYuval Mintz u32 drv_mb_addr; 704fe56b9e6SYuval Mintz u32 mfw_mb_addr; 705fe56b9e6SYuval Mintz u32 port_addr; 706fe56b9e6SYuval Mintz u16 drv_mb_seq; 707fe56b9e6SYuval Mintz u16 drv_pulse_seq; 708cc875c2eSYuval Mintz struct qed_mcp_link_params link_input; 709cc875c2eSYuval Mintz struct qed_mcp_link_state link_output; 710cc875c2eSYuval Mintz struct qed_mcp_link_capabilities link_capabilities; 711fe56b9e6SYuval Mintz struct qed_mcp_function_info func_info; 712fe56b9e6SYuval Mintz u8 *mfw_mb_cur; 713fe56b9e6SYuval Mintz u8 *mfw_mb_shadow; 714fe56b9e6SYuval Mintz u16 mfw_mb_length; 7154ed1eea8STomer Tayar u32 mcp_hist; 716645874e5SSudarsana Reddy Kalluru 717645874e5SSudarsana Reddy Kalluru /* Capabilties negotiated with the MFW */ 718645874e5SSudarsana Reddy Kalluru u32 capabilities; 719d8d6c5a7SIgor Russkikh 720d8d6c5a7SIgor Russkikh /* S/N for debug data mailbox commands */ 721d8d6c5a7SIgor Russkikh atomic_t dbg_data_seq; 722fe56b9e6SYuval Mintz }; 723fe56b9e6SYuval Mintz 7245529bad9STomer Tayar struct qed_mcp_mb_params { 7255529bad9STomer Tayar u32 cmd; 7265529bad9STomer Tayar u32 param; 7272f67af8cSTomer Tayar void *p_data_src; 7282f67af8cSTomer Tayar void *p_data_dst; 729eaa50fc5STomer Tayar u8 data_src_size; 7302f67af8cSTomer Tayar u8 data_dst_size; 7315529bad9STomer Tayar u32 mcp_resp; 7325529bad9STomer Tayar u32 mcp_param; 733eaa50fc5STomer Tayar u32 flags; 734eaa50fc5STomer Tayar #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0) 735b310974eSTomer Tayar #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1) 736eaa50fc5STomer Tayar #define QED_MB_FLAGS_IS_SET(params, flag) \ 737eaa50fc5STomer Tayar ({ typeof(params) __params = (params); \ 738eaa50fc5STomer Tayar (__params && (__params->flags & QED_MB_FLAG_ ## flag)); }) 7395529bad9STomer Tayar }; 7405529bad9STomer Tayar 7412528c389SSudarsana Reddy Kalluru struct qed_drv_tlv_hdr { 7422528c389SSudarsana Reddy Kalluru u8 tlv_type; 7432528c389SSudarsana Reddy Kalluru u8 tlv_length; /* In dwords - not including this header */ 7442528c389SSudarsana Reddy Kalluru u8 tlv_reserved; 7452528c389SSudarsana Reddy Kalluru #define QED_DRV_TLV_FLAGS_CHANGED 0x01 7462528c389SSudarsana Reddy Kalluru u8 tlv_flags; 7472528c389SSudarsana Reddy Kalluru }; 7482528c389SSudarsana Reddy Kalluru 749fe56b9e6SYuval Mintz /** 750fe56b9e6SYuval Mintz * @brief Initialize the interface with the MCP 751fe56b9e6SYuval Mintz * 752fe56b9e6SYuval Mintz * @param p_hwfn - HW func 753fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 754fe56b9e6SYuval Mintz * 755fe56b9e6SYuval Mintz * @return int 756fe56b9e6SYuval Mintz */ 757fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 758fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 759fe56b9e6SYuval Mintz 760fe56b9e6SYuval Mintz /** 761fe56b9e6SYuval Mintz * @brief Initialize the port interface with the MCP 762fe56b9e6SYuval Mintz * 763fe56b9e6SYuval Mintz * @param p_hwfn 764fe56b9e6SYuval Mintz * @param p_ptt 765fe56b9e6SYuval Mintz * Can only be called after `num_ports_in_engines' is set 766fe56b9e6SYuval Mintz */ 767fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 768fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 769fe56b9e6SYuval Mintz /** 770fe56b9e6SYuval Mintz * @brief Releases resources allocated during the init process. 771fe56b9e6SYuval Mintz * 772fe56b9e6SYuval Mintz * @param p_hwfn - HW func 773fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 774fe56b9e6SYuval Mintz * 775fe56b9e6SYuval Mintz * @return int 776fe56b9e6SYuval Mintz */ 777fe56b9e6SYuval Mintz 778fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn); 779fe56b9e6SYuval Mintz 780fe56b9e6SYuval Mintz /** 781cc875c2eSYuval Mintz * @brief This function is called from the DPC context. After 782cc875c2eSYuval Mintz * pointing PTT to the mfw mb, check for events sent by the MCP 783cc875c2eSYuval Mintz * to the driver and ack them. In case a critical event 784cc875c2eSYuval Mintz * detected, it will be handled here, otherwise the work will be 785cc875c2eSYuval Mintz * queued to a sleepable work-queue. 786cc875c2eSYuval Mintz * 787cc875c2eSYuval Mintz * @param p_hwfn - HW function 788cc875c2eSYuval Mintz * @param p_ptt - PTT required for register access 789cc875c2eSYuval Mintz * @return int - 0 - operation 790cc875c2eSYuval Mintz * was successul. 791cc875c2eSYuval Mintz */ 792cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 793cc875c2eSYuval Mintz struct qed_ptt *p_ptt); 794cc875c2eSYuval Mintz 7955d24bcf1STomer Tayar enum qed_drv_role { 7965d24bcf1STomer Tayar QED_DRV_ROLE_OS, 7975d24bcf1STomer Tayar QED_DRV_ROLE_KDUMP, 7985d24bcf1STomer Tayar }; 7995d24bcf1STomer Tayar 8005d24bcf1STomer Tayar struct qed_load_req_params { 8015d24bcf1STomer Tayar /* Input params */ 8025d24bcf1STomer Tayar enum qed_drv_role drv_role; 8035d24bcf1STomer Tayar u8 timeout_val; 8045d24bcf1STomer Tayar bool avoid_eng_reset; 8055d24bcf1STomer Tayar enum qed_override_force_load override_force_load; 8065d24bcf1STomer Tayar 8075d24bcf1STomer Tayar /* Output params */ 8085d24bcf1STomer Tayar u32 load_code; 8095d24bcf1STomer Tayar }; 8105d24bcf1STomer Tayar 811cc875c2eSYuval Mintz /** 8125d24bcf1STomer Tayar * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 8135d24bcf1STomer Tayar * returns whether this PF is the first on the engine/port or function. 814fe56b9e6SYuval Mintz * 8155d24bcf1STomer Tayar * @param p_hwfn 8165d24bcf1STomer Tayar * @param p_ptt 8175d24bcf1STomer Tayar * @param p_params 8185d24bcf1STomer Tayar * 8195d24bcf1STomer Tayar * @return int - 0 - Operation was successful. 820fe56b9e6SYuval Mintz */ 821fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 822fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 8235d24bcf1STomer Tayar struct qed_load_req_params *p_params); 824fe56b9e6SYuval Mintz 825fe56b9e6SYuval Mintz /** 826666db486STomer Tayar * @brief Sends a LOAD_DONE message to the MFW 827666db486STomer Tayar * 828666db486STomer Tayar * @param p_hwfn 829666db486STomer Tayar * @param p_ptt 830666db486STomer Tayar * 831666db486STomer Tayar * @return int - 0 - Operation was successful. 832666db486STomer Tayar */ 833666db486STomer Tayar int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 834666db486STomer Tayar 835666db486STomer Tayar /** 8361226337aSTomer Tayar * @brief Sends a UNLOAD_REQ message to the MFW 8371226337aSTomer Tayar * 8381226337aSTomer Tayar * @param p_hwfn 8391226337aSTomer Tayar * @param p_ptt 8401226337aSTomer Tayar * 8411226337aSTomer Tayar * @return int - 0 - Operation was successful. 8421226337aSTomer Tayar */ 8431226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 8441226337aSTomer Tayar 8451226337aSTomer Tayar /** 8461226337aSTomer Tayar * @brief Sends a UNLOAD_DONE message to the MFW 8471226337aSTomer Tayar * 8481226337aSTomer Tayar * @param p_hwfn 8491226337aSTomer Tayar * @param p_ptt 8501226337aSTomer Tayar * 8511226337aSTomer Tayar * @return int - 0 - Operation was successful. 8521226337aSTomer Tayar */ 8531226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 8541226337aSTomer Tayar 8551226337aSTomer Tayar /** 856fe56b9e6SYuval Mintz * @brief Read the MFW mailbox into Current buffer. 857fe56b9e6SYuval Mintz * 858fe56b9e6SYuval Mintz * @param p_hwfn 859fe56b9e6SYuval Mintz * @param p_ptt 860fe56b9e6SYuval Mintz */ 861fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 862fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 863fe56b9e6SYuval Mintz 864fe56b9e6SYuval Mintz /** 8650b55e27dSYuval Mintz * @brief Ack to mfw that driver finished FLR process for VFs 8660b55e27dSYuval Mintz * 8670b55e27dSYuval Mintz * @param p_hwfn 8680b55e27dSYuval Mintz * @param p_ptt 8690b55e27dSYuval Mintz * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 8700b55e27dSYuval Mintz * 8710b55e27dSYuval Mintz * @param return int - 0 upon success. 8720b55e27dSYuval Mintz */ 8730b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 8740b55e27dSYuval Mintz struct qed_ptt *p_ptt, u32 *vfs_to_ack); 8750b55e27dSYuval Mintz 8760b55e27dSYuval Mintz /** 877fe56b9e6SYuval Mintz * @brief - calls during init to read shmem of all function-related info. 878fe56b9e6SYuval Mintz * 879fe56b9e6SYuval Mintz * @param p_hwfn 880fe56b9e6SYuval Mintz * 881fe56b9e6SYuval Mintz * @param return 0 upon success. 882fe56b9e6SYuval Mintz */ 883fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 884fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 885fe56b9e6SYuval Mintz 886fe56b9e6SYuval Mintz /** 887fe56b9e6SYuval Mintz * @brief - Reset the MCP using mailbox command. 888fe56b9e6SYuval Mintz * 889fe56b9e6SYuval Mintz * @param p_hwfn 890fe56b9e6SYuval Mintz * @param p_ptt 891fe56b9e6SYuval Mintz * 892fe56b9e6SYuval Mintz * @param return 0 upon success. 893fe56b9e6SYuval Mintz */ 894fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, 895fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 896fe56b9e6SYuval Mintz 897fe56b9e6SYuval Mintz /** 8984102426fSTomer Tayar * @brief - Sends an NVM read command request to the MFW to get 8994102426fSTomer Tayar * a buffer. 9004102426fSTomer Tayar * 9014102426fSTomer Tayar * @param p_hwfn 9024102426fSTomer Tayar * @param p_ptt 9034102426fSTomer Tayar * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 9044102426fSTomer Tayar * DRV_MSG_CODE_NVM_READ_NVRAM commands 9054102426fSTomer Tayar * @param param - [0:23] - Offset [24:31] - Size 9064102426fSTomer Tayar * @param o_mcp_resp - MCP response 9074102426fSTomer Tayar * @param o_mcp_param - MCP response param 9084102426fSTomer Tayar * @param o_txn_size - Buffer size output 9094102426fSTomer Tayar * @param o_buf - Pointer to the buffer returned by the MFW. 9104102426fSTomer Tayar * 9114102426fSTomer Tayar * @param return 0 upon success. 9124102426fSTomer Tayar */ 9134102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 9144102426fSTomer Tayar struct qed_ptt *p_ptt, 9154102426fSTomer Tayar u32 cmd, 9164102426fSTomer Tayar u32 param, 9174102426fSTomer Tayar u32 *o_mcp_resp, 9184102426fSTomer Tayar u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 9194102426fSTomer Tayar 9204102426fSTomer Tayar /** 921b51dab46SSudarsana Reddy Kalluru * @brief Read from sfp 922b51dab46SSudarsana Reddy Kalluru * 923b51dab46SSudarsana Reddy Kalluru * @param p_hwfn - hw function 924b51dab46SSudarsana Reddy Kalluru * @param p_ptt - PTT required for register access 925b51dab46SSudarsana Reddy Kalluru * @param port - transceiver port 926b51dab46SSudarsana Reddy Kalluru * @param addr - I2C address 927b51dab46SSudarsana Reddy Kalluru * @param offset - offset in sfp 928b51dab46SSudarsana Reddy Kalluru * @param len - buffer length 929b51dab46SSudarsana Reddy Kalluru * @param p_buf - buffer to read into 930b51dab46SSudarsana Reddy Kalluru * 931b51dab46SSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 932b51dab46SSudarsana Reddy Kalluru */ 933b51dab46SSudarsana Reddy Kalluru int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 934b51dab46SSudarsana Reddy Kalluru u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf); 935b51dab46SSudarsana Reddy Kalluru 936b51dab46SSudarsana Reddy Kalluru /** 937fe56b9e6SYuval Mintz * @brief indicates whether the MFW objects [under mcp_info] are accessible 938fe56b9e6SYuval Mintz * 939fe56b9e6SYuval Mintz * @param p_hwfn 940fe56b9e6SYuval Mintz * 941fe56b9e6SYuval Mintz * @return true iff MFW is running and mcp_info is initialized 942fe56b9e6SYuval Mintz */ 943fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 9441408cc1fSYuval Mintz 9451408cc1fSYuval Mintz /** 9461408cc1fSYuval Mintz * @brief request MFW to configure MSI-X for a VF 9471408cc1fSYuval Mintz * 9481408cc1fSYuval Mintz * @param p_hwfn 9491408cc1fSYuval Mintz * @param p_ptt 9501408cc1fSYuval Mintz * @param vf_id - absolute inside engine 9511408cc1fSYuval Mintz * @param num_sbs - number of entries to request 9521408cc1fSYuval Mintz * 9531408cc1fSYuval Mintz * @return int 9541408cc1fSYuval Mintz */ 9551408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 9561408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 vf_id, u8 num); 9571408cc1fSYuval Mintz 9584102426fSTomer Tayar /** 9594102426fSTomer Tayar * @brief - Halt the MCP. 9604102426fSTomer Tayar * 9614102426fSTomer Tayar * @param p_hwfn 9624102426fSTomer Tayar * @param p_ptt 9634102426fSTomer Tayar * 9644102426fSTomer Tayar * @param return 0 upon success. 9654102426fSTomer Tayar */ 9664102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 9674102426fSTomer Tayar 9684102426fSTomer Tayar /** 9694102426fSTomer Tayar * @brief - Wake up the MCP. 9704102426fSTomer Tayar * 9714102426fSTomer Tayar * @param p_hwfn 9724102426fSTomer Tayar * @param p_ptt 9734102426fSTomer Tayar * 9744102426fSTomer Tayar * @param return 0 upon success. 9754102426fSTomer Tayar */ 9764102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 9774102426fSTomer Tayar 978a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 9794b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 9804b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 9814b01e519SManish Chopra struct qed_ptt *p_ptt, 9824b01e519SManish Chopra struct qed_mcp_link_state *p_link, 9834b01e519SManish Chopra u8 max_bw); 984a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 985a64b02d5SManish Chopra struct qed_ptt *p_ptt, 986a64b02d5SManish Chopra struct qed_mcp_link_state *p_link, 987a64b02d5SManish Chopra u8 min_bw); 988351a4dedSYuval Mintz 9894102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 9904102426fSTomer Tayar struct qed_ptt *p_ptt, u32 mask_parities); 9914102426fSTomer Tayar 992ebf64bf4SIgor Russkikh /* @brief - Gets the mdump retained data from the MFW. 993ebf64bf4SIgor Russkikh * 994ebf64bf4SIgor Russkikh * @param p_hwfn 995ebf64bf4SIgor Russkikh * @param p_ptt 996ebf64bf4SIgor Russkikh * @param p_mdump_retain 997ebf64bf4SIgor Russkikh * 998ebf64bf4SIgor Russkikh * @param return 0 upon success. 999ebf64bf4SIgor Russkikh */ 1000ebf64bf4SIgor Russkikh int 1001ebf64bf4SIgor Russkikh qed_mcp_mdump_get_retain(struct qed_hwfn *p_hwfn, 1002ebf64bf4SIgor Russkikh struct qed_ptt *p_ptt, 1003ebf64bf4SIgor Russkikh struct mdump_retain_data_stc *p_mdump_retain); 1004ebf64bf4SIgor Russkikh 10050fefbfbaSSudarsana Kalluru /** 10069c8517c4STomer Tayar * @brief - Sets the MFW's max value for the given resource 10079c8517c4STomer Tayar * 10089c8517c4STomer Tayar * @param p_hwfn 10099c8517c4STomer Tayar * @param p_ptt 10109c8517c4STomer Tayar * @param res_id 10119c8517c4STomer Tayar * @param resc_max_val 10129c8517c4STomer Tayar * @param p_mcp_resp 10139c8517c4STomer Tayar * 10149c8517c4STomer Tayar * @return int - 0 - operation was successful. 10159c8517c4STomer Tayar */ 10169c8517c4STomer Tayar int 10179c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 10189c8517c4STomer Tayar struct qed_ptt *p_ptt, 10199c8517c4STomer Tayar enum qed_resources res_id, 10209c8517c4STomer Tayar u32 resc_max_val, u32 *p_mcp_resp); 10219c8517c4STomer Tayar 10229c8517c4STomer Tayar /** 10239c8517c4STomer Tayar * @brief - Gets the MFW allocation info for the given resource 10249c8517c4STomer Tayar * 10259c8517c4STomer Tayar * @param p_hwfn 10269c8517c4STomer Tayar * @param p_ptt 10279c8517c4STomer Tayar * @param res_id 10289c8517c4STomer Tayar * @param p_mcp_resp 10299c8517c4STomer Tayar * @param p_resc_num 10309c8517c4STomer Tayar * @param p_resc_start 10319c8517c4STomer Tayar * 10329c8517c4STomer Tayar * @return int - 0 - operation was successful. 10339c8517c4STomer Tayar */ 10349c8517c4STomer Tayar int 10359c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 10369c8517c4STomer Tayar struct qed_ptt *p_ptt, 10379c8517c4STomer Tayar enum qed_resources res_id, 10389c8517c4STomer Tayar u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 10399c8517c4STomer Tayar 10409c8517c4STomer Tayar /** 10410fefbfbaSSudarsana Kalluru * @brief Send eswitch mode to MFW 10420fefbfbaSSudarsana Kalluru * 10430fefbfbaSSudarsana Kalluru * @param p_hwfn 10440fefbfbaSSudarsana Kalluru * @param p_ptt 10450fefbfbaSSudarsana Kalluru * @param eswitch - eswitch mode 10460fefbfbaSSudarsana Kalluru * 10470fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 10480fefbfbaSSudarsana Kalluru */ 10490fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 10500fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 10510fefbfbaSSudarsana Kalluru enum qed_ov_eswitch eswitch); 10520fefbfbaSSudarsana Kalluru 10539c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 10549c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL 31 10559c8517c4STomer Tayar 10569c8517c4STomer Tayar enum qed_resc_lock { 10579c8517c4STomer Tayar QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 1058db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT0, 1059db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT1, 1060db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT2, 1061db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT3, 1062f470f22cSsudarsana.kalluru@cavium.com QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 1063f470f22cSsudarsana.kalluru@cavium.com QED_RESC_LOCK_RESC_INVALID 10649c8517c4STomer Tayar }; 106518a69e36SMintz, Yuval 106618a69e36SMintz, Yuval /** 106718a69e36SMintz, Yuval * @brief - Initiates PF FLR 106818a69e36SMintz, Yuval * 106918a69e36SMintz, Yuval * @param p_hwfn 107018a69e36SMintz, Yuval * @param p_ptt 107118a69e36SMintz, Yuval * 107218a69e36SMintz, Yuval * @return int - 0 - operation was successful. 107318a69e36SMintz, Yuval */ 107418a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 107595691c9cSTomer Tayar struct qed_resc_lock_params { 107695691c9cSTomer Tayar /* Resource number [valid values are 0..31] */ 107795691c9cSTomer Tayar u8 resource; 107895691c9cSTomer Tayar 107995691c9cSTomer Tayar /* Lock timeout value in seconds [default, none or 1..254] */ 108095691c9cSTomer Tayar u8 timeout; 108195691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 108295691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE 255 108395691c9cSTomer Tayar 108495691c9cSTomer Tayar /* Number of times to retry locking */ 108595691c9cSTomer Tayar u8 retry_num; 1086f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 108795691c9cSTomer Tayar 108895691c9cSTomer Tayar /* The interval in usec between retries */ 108995691c9cSTomer Tayar u16 retry_interval; 1090f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 109195691c9cSTomer Tayar 109295691c9cSTomer Tayar /* Use sleep or delay between retries */ 109395691c9cSTomer Tayar bool sleep_b4_retry; 109495691c9cSTomer Tayar 109595691c9cSTomer Tayar /* Will be set as true if the resource is free and granted */ 109695691c9cSTomer Tayar bool b_granted; 109795691c9cSTomer Tayar 109895691c9cSTomer Tayar /* Will be filled with the resource owner. 109995691c9cSTomer Tayar * [0..15 = PF0-15, 16 = MFW] 110095691c9cSTomer Tayar */ 110195691c9cSTomer Tayar u8 owner; 110295691c9cSTomer Tayar }; 110395691c9cSTomer Tayar 110495691c9cSTomer Tayar /** 110595691c9cSTomer Tayar * @brief Acquires MFW generic resource lock 110695691c9cSTomer Tayar * 110795691c9cSTomer Tayar * @param p_hwfn 110895691c9cSTomer Tayar * @param p_ptt 110995691c9cSTomer Tayar * @param p_params 111095691c9cSTomer Tayar * 111195691c9cSTomer Tayar * @return int - 0 - operation was successful. 111295691c9cSTomer Tayar */ 111395691c9cSTomer Tayar int 111495691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 111595691c9cSTomer Tayar struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 111695691c9cSTomer Tayar 111795691c9cSTomer Tayar struct qed_resc_unlock_params { 111895691c9cSTomer Tayar /* Resource number [valid values are 0..31] */ 111995691c9cSTomer Tayar u8 resource; 112095691c9cSTomer Tayar 112195691c9cSTomer Tayar /* Allow to release a resource even if belongs to another PF */ 112295691c9cSTomer Tayar bool b_force; 112395691c9cSTomer Tayar 112495691c9cSTomer Tayar /* Will be set as true if the resource is released */ 112595691c9cSTomer Tayar bool b_released; 112695691c9cSTomer Tayar }; 112795691c9cSTomer Tayar 112895691c9cSTomer Tayar /** 112995691c9cSTomer Tayar * @brief Releases MFW generic resource lock 113095691c9cSTomer Tayar * 113195691c9cSTomer Tayar * @param p_hwfn 113295691c9cSTomer Tayar * @param p_ptt 113395691c9cSTomer Tayar * @param p_params 113495691c9cSTomer Tayar * 113595691c9cSTomer Tayar * @return int - 0 - operation was successful. 113695691c9cSTomer Tayar */ 113795691c9cSTomer Tayar int 113895691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 113995691c9cSTomer Tayar struct qed_ptt *p_ptt, 114095691c9cSTomer Tayar struct qed_resc_unlock_params *p_params); 114195691c9cSTomer Tayar 1142f470f22cSsudarsana.kalluru@cavium.com /** 1143f470f22cSsudarsana.kalluru@cavium.com * @brief - default initialization for lock/unlock resource structs 1144f470f22cSsudarsana.kalluru@cavium.com * 1145f470f22cSsudarsana.kalluru@cavium.com * @param p_lock - lock params struct to be initialized; Can be NULL 1146f470f22cSsudarsana.kalluru@cavium.com * @param p_unlock - unlock params struct to be initialized; Can be NULL 1147f470f22cSsudarsana.kalluru@cavium.com * @param resource - the requested resource 1148f470f22cSsudarsana.kalluru@cavium.com * @paral b_is_permanent - disable retries & aging when set 1149f470f22cSsudarsana.kalluru@cavium.com */ 1150f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1151f470f22cSsudarsana.kalluru@cavium.com struct qed_resc_unlock_params *p_unlock, 1152f470f22cSsudarsana.kalluru@cavium.com enum qed_resc_lock 1153f470f22cSsudarsana.kalluru@cavium.com resource, bool b_is_permanent); 1154df9c716dSSudarsana Reddy Kalluru 1155df9c716dSSudarsana Reddy Kalluru /** 1156df9c716dSSudarsana Reddy Kalluru * @brief - Return whether management firmware support smart AN 1157df9c716dSSudarsana Reddy Kalluru * 1158df9c716dSSudarsana Reddy Kalluru * @param p_hwfn 1159df9c716dSSudarsana Reddy Kalluru * 1160df9c716dSSudarsana Reddy Kalluru * @return bool - true if feature is supported. 1161df9c716dSSudarsana Reddy Kalluru */ 1162df9c716dSSudarsana Reddy Kalluru bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn); 1163df9c716dSSudarsana Reddy Kalluru 1164645874e5SSudarsana Reddy Kalluru /** 1165645874e5SSudarsana Reddy Kalluru * @brief Learn of supported MFW features; To be done during early init 1166645874e5SSudarsana Reddy Kalluru * 1167645874e5SSudarsana Reddy Kalluru * @param p_hwfn 1168645874e5SSudarsana Reddy Kalluru * @param p_ptt 1169645874e5SSudarsana Reddy Kalluru */ 1170645874e5SSudarsana Reddy Kalluru int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1171f470f22cSsudarsana.kalluru@cavium.com 1172645874e5SSudarsana Reddy Kalluru /** 1173645874e5SSudarsana Reddy Kalluru * @brief Inform MFW of set of features supported by driver. Should be done 1174645874e5SSudarsana Reddy Kalluru * inside the content of the LOAD_REQ. 1175645874e5SSudarsana Reddy Kalluru * 1176645874e5SSudarsana Reddy Kalluru * @param p_hwfn 1177645874e5SSudarsana Reddy Kalluru * @param p_ptt 1178645874e5SSudarsana Reddy Kalluru */ 1179645874e5SSudarsana Reddy Kalluru int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 118043645ce0SSudarsana Reddy Kalluru 118143645ce0SSudarsana Reddy Kalluru /** 1182cac6f691SSudarsana Reddy Kalluru * @brief Read ufp config from the shared memory. 1183cac6f691SSudarsana Reddy Kalluru * 1184cac6f691SSudarsana Reddy Kalluru * @param p_hwfn 1185cac6f691SSudarsana Reddy Kalluru * @param p_ptt 1186cac6f691SSudarsana Reddy Kalluru */ 1187cac6f691SSudarsana Reddy Kalluru void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1188cac6f691SSudarsana Reddy Kalluru 1189cac6f691SSudarsana Reddy Kalluru /** 119043645ce0SSudarsana Reddy Kalluru * @brief Populate the nvm info shadow in the given hardware function 119143645ce0SSudarsana Reddy Kalluru * 119243645ce0SSudarsana Reddy Kalluru * @param p_hwfn 119343645ce0SSudarsana Reddy Kalluru */ 119443645ce0SSudarsana Reddy Kalluru int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 119543645ce0SSudarsana Reddy Kalluru 119679284adeSMichal Kalderon /** 119713cf8aabSSudarsana Reddy Kalluru * @brief Delete nvm info shadow in the given hardware function 119813cf8aabSSudarsana Reddy Kalluru * 119913cf8aabSSudarsana Reddy Kalluru * @param p_hwfn 120013cf8aabSSudarsana Reddy Kalluru */ 120113cf8aabSSudarsana Reddy Kalluru void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn); 120213cf8aabSSudarsana Reddy Kalluru 120313cf8aabSSudarsana Reddy Kalluru /** 120479284adeSMichal Kalderon * @brief Get the engine affinity configuration. 120579284adeSMichal Kalderon * 120679284adeSMichal Kalderon * @param p_hwfn 120779284adeSMichal Kalderon * @param p_ptt 120879284adeSMichal Kalderon */ 120979284adeSMichal Kalderon int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 121079284adeSMichal Kalderon 121179284adeSMichal Kalderon /** 121279284adeSMichal Kalderon * @brief Get the PPFID bitmap. 121379284adeSMichal Kalderon * 121479284adeSMichal Kalderon * @param p_hwfn 121579284adeSMichal Kalderon * @param p_ptt 121679284adeSMichal Kalderon */ 121779284adeSMichal Kalderon int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 121879284adeSMichal Kalderon 121938eabdf0SSudarsana Reddy Kalluru /** 12202d4c8495SSudarsana Reddy Kalluru * @brief Get NVM config attribute value. 12212d4c8495SSudarsana Reddy Kalluru * 12222d4c8495SSudarsana Reddy Kalluru * @param p_hwfn 12232d4c8495SSudarsana Reddy Kalluru * @param p_ptt 12242d4c8495SSudarsana Reddy Kalluru * @param option_id 12252d4c8495SSudarsana Reddy Kalluru * @param entity_id 12262d4c8495SSudarsana Reddy Kalluru * @param flags 12272d4c8495SSudarsana Reddy Kalluru * @param p_buf 12282d4c8495SSudarsana Reddy Kalluru * @param p_len 12292d4c8495SSudarsana Reddy Kalluru */ 12302d4c8495SSudarsana Reddy Kalluru int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 12312d4c8495SSudarsana Reddy Kalluru u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 12322d4c8495SSudarsana Reddy Kalluru u32 *p_len); 12332d4c8495SSudarsana Reddy Kalluru 12342d4c8495SSudarsana Reddy Kalluru /** 123538eabdf0SSudarsana Reddy Kalluru * @brief Set NVM config attribute value. 123638eabdf0SSudarsana Reddy Kalluru * 123738eabdf0SSudarsana Reddy Kalluru * @param p_hwfn 123838eabdf0SSudarsana Reddy Kalluru * @param p_ptt 123938eabdf0SSudarsana Reddy Kalluru * @param option_id 124038eabdf0SSudarsana Reddy Kalluru * @param entity_id 124138eabdf0SSudarsana Reddy Kalluru * @param flags 124238eabdf0SSudarsana Reddy Kalluru * @param p_buf 124338eabdf0SSudarsana Reddy Kalluru * @param len 124438eabdf0SSudarsana Reddy Kalluru */ 124538eabdf0SSudarsana Reddy Kalluru int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 124638eabdf0SSudarsana Reddy Kalluru u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 124738eabdf0SSudarsana Reddy Kalluru u32 len); 1248fe56b9e6SYuval Mintz #endif 1249