xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 2f67af8c596e16760dc7e7d28ee0edd7ce59f2b4)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
3fe56b9e6SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
31fe56b9e6SYuval Mintz  */
32fe56b9e6SYuval Mintz 
33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
34fe56b9e6SYuval Mintz #define _QED_MCP_H
35fe56b9e6SYuval Mintz 
36fe56b9e6SYuval Mintz #include <linux/types.h>
37fe56b9e6SYuval Mintz #include <linux/delay.h>
38fe56b9e6SYuval Mintz #include <linux/slab.h>
395529bad9STomer Tayar #include <linux/spinlock.h>
401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
41fe56b9e6SYuval Mintz #include "qed_hsi.h"
42fe56b9e6SYuval Mintz 
43cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
44cc875c2eSYuval Mintz 	bool    autoneg;
45cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
46cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
47cc875c2eSYuval Mintz };
48cc875c2eSYuval Mintz 
49cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
50cc875c2eSYuval Mintz 	bool    autoneg;
51cc875c2eSYuval Mintz 	bool    forced_rx;
52cc875c2eSYuval Mintz 	bool    forced_tx;
53cc875c2eSYuval Mintz };
54cc875c2eSYuval Mintz 
55cc875c2eSYuval Mintz struct qed_mcp_link_params {
56cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
57cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
58cc875c2eSYuval Mintz 	u32				     loopback_mode;
59cc875c2eSYuval Mintz };
60cc875c2eSYuval Mintz 
61cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
62cc875c2eSYuval Mintz 	u32 speed_capabilities;
63cc875c2eSYuval Mintz };
64cc875c2eSYuval Mintz 
65cc875c2eSYuval Mintz struct qed_mcp_link_state {
66cc875c2eSYuval Mintz 	bool    link_up;
67cc875c2eSYuval Mintz 
68a64b02d5SManish Chopra 	u32	min_pf_rate;
69a64b02d5SManish Chopra 
704b01e519SManish Chopra 	/* Actual link speed in Mb/s */
714b01e519SManish Chopra 	u32	line_speed;
724b01e519SManish Chopra 
734b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
744b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
754b01e519SManish Chopra 	 */
764b01e519SManish Chopra 	u32     speed;
77cc875c2eSYuval Mintz 	bool    full_duplex;
78cc875c2eSYuval Mintz 
79cc875c2eSYuval Mintz 	bool    an;
80cc875c2eSYuval Mintz 	bool    an_complete;
81cc875c2eSYuval Mintz 	bool    parallel_detection;
82cc875c2eSYuval Mintz 	bool    pfc_enabled;
83cc875c2eSYuval Mintz 
84cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
85cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
86cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
87cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
88054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
89054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
90054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
91054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
92cc875c2eSYuval Mintz 	u32     partner_adv_speed;
93cc875c2eSYuval Mintz 
94cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
95cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
96cc875c2eSYuval Mintz 
97cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
98cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
100cc875c2eSYuval Mintz 	u8      partner_adv_pause;
101cc875c2eSYuval Mintz 
102cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
103cc875c2eSYuval Mintz };
104cc875c2eSYuval Mintz 
105fe56b9e6SYuval Mintz struct qed_mcp_function_info {
106fe56b9e6SYuval Mintz 	u8				pause_on_host;
107fe56b9e6SYuval Mintz 
108fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
109fe56b9e6SYuval Mintz 
110fe56b9e6SYuval Mintz 	u8				bandwidth_min;
111fe56b9e6SYuval Mintz 	u8				bandwidth_max;
112fe56b9e6SYuval Mintz 
113fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
114fe56b9e6SYuval Mintz 
115fe56b9e6SYuval Mintz 	u64				wwn_port;
116fe56b9e6SYuval Mintz 	u64				wwn_node;
117fe56b9e6SYuval Mintz 
118fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
119fe56b9e6SYuval Mintz 	u16				ovlan;
1200fefbfbaSSudarsana Kalluru 
1210fefbfbaSSudarsana Kalluru 	u16				mtu;
122fe56b9e6SYuval Mintz };
123fe56b9e6SYuval Mintz 
124fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
125fe56b9e6SYuval Mintz 	u32	offset;
126fe56b9e6SYuval Mintz 	u32	param;
127fe56b9e6SYuval Mintz 	u32	resp;
128fe56b9e6SYuval Mintz 	u32	cmd;
129fe56b9e6SYuval Mintz };
130fe56b9e6SYuval Mintz 
131fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
132fe56b9e6SYuval Mintz 	u32	version;
133fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
134fe56b9e6SYuval Mintz };
135fe56b9e6SYuval Mintz 
1366c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1376c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1386c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1396c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1406c754246SSudarsana Reddy Kalluru };
1416c754246SSudarsana Reddy Kalluru 
1426c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1436c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1446c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1456c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1466c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1476c754246SSudarsana Reddy Kalluru };
1486c754246SSudarsana Reddy Kalluru 
1496c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1506c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1516c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1526c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1536c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1546c754246SSudarsana Reddy Kalluru };
1556c754246SSudarsana Reddy Kalluru 
1566c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1576c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1586c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1596c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1606c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1616c754246SSudarsana Reddy Kalluru };
1626c754246SSudarsana Reddy Kalluru 
1636c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1646c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1656c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1666c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1676c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1686c754246SSudarsana Reddy Kalluru };
1696c754246SSudarsana Reddy Kalluru 
1706c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1716c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1726c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1736c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1746c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1756c754246SSudarsana Reddy Kalluru };
1766c754246SSudarsana Reddy Kalluru 
1770fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1780fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1790fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1800fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1810fefbfbaSSudarsana Kalluru };
1820fefbfbaSSudarsana Kalluru 
1830fefbfbaSSudarsana Kalluru enum qed_ov_client {
1840fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
1850fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
1860fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
1870fefbfbaSSudarsana Kalluru };
1880fefbfbaSSudarsana Kalluru 
1890fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
1900fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
1910fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
1920fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
1930fefbfbaSSudarsana Kalluru };
1940fefbfbaSSudarsana Kalluru 
1950fefbfbaSSudarsana Kalluru enum qed_ov_wol {
1960fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
1970fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
1980fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
1990fefbfbaSSudarsana Kalluru };
2000fefbfbaSSudarsana Kalluru 
201fe56b9e6SYuval Mintz /**
202cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
203cc875c2eSYuval Mintz  *
204cc875c2eSYuval Mintz  * @param p_hwfn
205cc875c2eSYuval Mintz  *
206cc875c2eSYuval Mintz  * @returns pointer to link params
207cc875c2eSYuval Mintz  */
208cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
209cc875c2eSYuval Mintz 
210cc875c2eSYuval Mintz /**
211cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
212cc875c2eSYuval Mintz  *
213cc875c2eSYuval Mintz  * @param p_hwfn
214cc875c2eSYuval Mintz  *
215cc875c2eSYuval Mintz  * @returns pointer to link state
216cc875c2eSYuval Mintz  */
217cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
218cc875c2eSYuval Mintz 
219cc875c2eSYuval Mintz /**
220cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
221cc875c2eSYuval Mintz  *
222cc875c2eSYuval Mintz  * @param p_hwfn
223cc875c2eSYuval Mintz  *
224cc875c2eSYuval Mintz  * @returns pointer to link capabilities
225cc875c2eSYuval Mintz  */
226cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
227cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
228cc875c2eSYuval Mintz 
229cc875c2eSYuval Mintz /**
230cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
231cc875c2eSYuval Mintz  *
232cc875c2eSYuval Mintz  * @param p_hwfn
233cc875c2eSYuval Mintz  * @param p_ptt
234cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
235cc875c2eSYuval Mintz  *
236cc875c2eSYuval Mintz  * @return int
237cc875c2eSYuval Mintz  */
238cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
239cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
240cc875c2eSYuval Mintz 		     bool               b_up);
241cc875c2eSYuval Mintz 
242cc875c2eSYuval Mintz /**
243fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
244fe56b9e6SYuval Mintz  *
2451408cc1fSYuval Mintz  * @param p_hwfn
2461408cc1fSYuval Mintz  * @param p_ptt
2471408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2481408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
249fe56b9e6SYuval Mintz  *
2501408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
251fe56b9e6SYuval Mintz  */
2521408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2531408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2541408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
255fe56b9e6SYuval Mintz 
256fe56b9e6SYuval Mintz /**
257cc875c2eSYuval Mintz  * @brief Get media type value of the port.
258cc875c2eSYuval Mintz  *
259cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
260cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
261cc875c2eSYuval Mintz  *
262cc875c2eSYuval Mintz  * @return int -
263cc875c2eSYuval Mintz  *      0 - Operation was successul.
264cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
265cc875c2eSYuval Mintz  */
266cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
267cc875c2eSYuval Mintz 			   u32                  *media_type);
268cc875c2eSYuval Mintz 
269cc875c2eSYuval Mintz /**
270fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
271fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
272fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
273fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
274fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
275fe56b9e6SYuval Mintz  *
276fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
277fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
278fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
279fe56b9e6SYuval Mintz  * @param param      - Optional param
280fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
281fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
282fe56b9e6SYuval Mintz  *                     response
283fe56b9e6SYuval Mintz  * @return int - 0 - operation
284fe56b9e6SYuval Mintz  * was successul.
285fe56b9e6SYuval Mintz  */
286fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
287fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
288fe56b9e6SYuval Mintz 		u32 cmd,
289fe56b9e6SYuval Mintz 		u32 param,
290fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
291fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
292fe56b9e6SYuval Mintz 
293fe56b9e6SYuval Mintz /**
294fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
295fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
296fe56b9e6SYuval Mintz  *
297fe56b9e6SYuval Mintz  * @param p_hwfn
298fe56b9e6SYuval Mintz  * @param p_ptt
299fe56b9e6SYuval Mintz  */
300fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
301fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
302fe56b9e6SYuval Mintz 
303fe56b9e6SYuval Mintz /**
304cee4d264SManish Chopra  * @brief Get the flash size value
305cee4d264SManish Chopra  *
306cee4d264SManish Chopra  * @param p_hwfn
307cee4d264SManish Chopra  * @param p_ptt
308cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
309cee4d264SManish Chopra  *
310cee4d264SManish Chopra  * @return int - 0 - operation was successul.
311cee4d264SManish Chopra  */
312cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
313cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
314cee4d264SManish Chopra 			   u32 *p_flash_size);
315cee4d264SManish Chopra 
316cee4d264SManish Chopra /**
317fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
318fe56b9e6SYuval Mintz  *
319fe56b9e6SYuval Mintz  * @param p_hwfn
320fe56b9e6SYuval Mintz  * @param p_ptt
321fe56b9e6SYuval Mintz  * @param version - Version value
322fe56b9e6SYuval Mintz  * @param name - Protocol driver name
323fe56b9e6SYuval Mintz  *
324fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
325fe56b9e6SYuval Mintz  */
326fe56b9e6SYuval Mintz int
327fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
328fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
329fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
330fe56b9e6SYuval Mintz 
33191420b83SSudarsana Kalluru /**
3320fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3330fefbfbaSSudarsana Kalluru  *
3340fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3350fefbfbaSSudarsana Kalluru  *  @param p_ptt
3360fefbfbaSSudarsana Kalluru  *  @param client - qed client type
3370fefbfbaSSudarsana Kalluru  *
3380fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3390fefbfbaSSudarsana Kalluru  */
3400fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
3410fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
3420fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
3430fefbfbaSSudarsana Kalluru 
3440fefbfbaSSudarsana Kalluru /**
3450fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
3460fefbfbaSSudarsana Kalluru  *
3470fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3480fefbfbaSSudarsana Kalluru  *  @param p_ptt
3490fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
3500fefbfbaSSudarsana Kalluru  *
3510fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3520fefbfbaSSudarsana Kalluru  */
3530fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
3540fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
3550fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
3560fefbfbaSSudarsana Kalluru 
3570fefbfbaSSudarsana Kalluru /**
3580fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
3590fefbfbaSSudarsana Kalluru  *
3600fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3610fefbfbaSSudarsana Kalluru  *  @param p_ptt
3620fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
3630fefbfbaSSudarsana Kalluru  *
3640fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3650fefbfbaSSudarsana Kalluru  */
3660fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
3670fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
3680fefbfbaSSudarsana Kalluru 
3690fefbfbaSSudarsana Kalluru /**
3700fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
3710fefbfbaSSudarsana Kalluru  *
3720fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3730fefbfbaSSudarsana Kalluru  *  @param p_ptt
3740fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
3750fefbfbaSSudarsana Kalluru  *
3760fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3770fefbfbaSSudarsana Kalluru  */
3780fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
3790fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
3800fefbfbaSSudarsana Kalluru 
3810fefbfbaSSudarsana Kalluru /**
3820fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
3830fefbfbaSSudarsana Kalluru  *
3840fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3850fefbfbaSSudarsana Kalluru  *  @param p_ptt
3860fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
3870fefbfbaSSudarsana Kalluru  *
3880fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3890fefbfbaSSudarsana Kalluru  */
3900fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
3910fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
3920fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
3930fefbfbaSSudarsana Kalluru 
3940fefbfbaSSudarsana Kalluru /**
39591420b83SSudarsana Kalluru  * @brief Set LED status
39691420b83SSudarsana Kalluru  *
39791420b83SSudarsana Kalluru  *  @param p_hwfn
39891420b83SSudarsana Kalluru  *  @param p_ptt
39991420b83SSudarsana Kalluru  *  @param mode - LED mode
40091420b83SSudarsana Kalluru  *
40191420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
40291420b83SSudarsana Kalluru  */
40391420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
40491420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
40591420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
40691420b83SSudarsana Kalluru 
40703dc76caSSudarsana Reddy Kalluru /**
4087a4b21b7SMintz, Yuval  * @brief Read from nvm
4097a4b21b7SMintz, Yuval  *
4107a4b21b7SMintz, Yuval  *  @param cdev
4117a4b21b7SMintz, Yuval  *  @param addr - nvm offset
4127a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
4137a4b21b7SMintz, Yuval  *  @param len - buffer len
4147a4b21b7SMintz, Yuval  *
4157a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4167a4b21b7SMintz, Yuval  */
4177a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
4187a4b21b7SMintz, Yuval 
4197a4b21b7SMintz, Yuval /**
42003dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
42103dc76caSSudarsana Reddy Kalluru  *
42203dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
42303dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
42403dc76caSSudarsana Reddy Kalluru  *
42503dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
42603dc76caSSudarsana Reddy Kalluru  */
42703dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
42803dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
42903dc76caSSudarsana Reddy Kalluru 
43003dc76caSSudarsana Reddy Kalluru /**
43103dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
43203dc76caSSudarsana Reddy Kalluru  *
43303dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
43403dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
43503dc76caSSudarsana Reddy Kalluru  *
43603dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
43703dc76caSSudarsana Reddy Kalluru  */
43803dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
43903dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
44003dc76caSSudarsana Reddy Kalluru 
4417a4b21b7SMintz, Yuval /**
4427a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
4437a4b21b7SMintz, Yuval  *
4447a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
4457a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
4467a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
4477a4b21b7SMintz, Yuval  *			  successful. 0 if not.
4487a4b21b7SMintz, Yuval  *
4497a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4507a4b21b7SMintz, Yuval  */
4517a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
4527a4b21b7SMintz, Yuval 					 struct qed_ptt *p_ptt,
4537a4b21b7SMintz, Yuval 					 u32 *num_images);
4547a4b21b7SMintz, Yuval 
4557a4b21b7SMintz, Yuval /**
4567a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
4577a4b21b7SMintz, Yuval  *
4587a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
4597a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
4607a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
4617a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
4627a4b21b7SMintz, Yuval  *
4637a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4647a4b21b7SMintz, Yuval  */
4657a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
4667a4b21b7SMintz, Yuval 					struct qed_ptt *p_ptt,
4677a4b21b7SMintz, Yuval 					struct bist_nvm_image_att *p_image_att,
4687a4b21b7SMintz, Yuval 					u32 image_index);
4697a4b21b7SMintz, Yuval 
470fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
471fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
472fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
473fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
474fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
475fe56b9e6SYuval Mintz  */
476fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
477fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
478fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
479fe56b9e6SYuval Mintz 					    rel_pfid)
480fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
481fe56b9e6SYuval Mintz 
482fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
4839c79ddaaSMintz, Yuval 				 ((_p_hwfn)->cdev->num_ports_in_engines * \
4849c79ddaaSMintz, Yuval 				  qed_device_num_engines((_p_hwfn)->cdev)))
4859c79ddaaSMintz, Yuval 
486fe56b9e6SYuval Mintz struct qed_mcp_info {
4874ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
4884ed1eea8STomer Tayar 	struct list_head			cmd_list;
4894ed1eea8STomer Tayar 
4904ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
4914ed1eea8STomer Tayar 	 * and the sending of the commands.
4924ed1eea8STomer Tayar 	 */
4934ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
49465ed2ffdSMintz, Yuval 
49565ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
49665ed2ffdSMintz, Yuval 	 * originating from attention context.
49765ed2ffdSMintz, Yuval 	 */
49865ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
4995529bad9STomer Tayar 	bool					block_mb_sending;
500fe56b9e6SYuval Mintz 	u32					public_base;
501fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
502fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
503fe56b9e6SYuval Mintz 	u32					port_addr;
504fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
505fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
506cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
507cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
508cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
509fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
510fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
511fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
512fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
5134ed1eea8STomer Tayar 	u32					mcp_hist;
514fe56b9e6SYuval Mintz };
515fe56b9e6SYuval Mintz 
5165529bad9STomer Tayar struct qed_mcp_mb_params {
5175529bad9STomer Tayar 	u32			cmd;
5185529bad9STomer Tayar 	u32			param;
519*2f67af8cSTomer Tayar 	void			*p_data_src;
520*2f67af8cSTomer Tayar 	u8			data_src_size;
521*2f67af8cSTomer Tayar 	void			*p_data_dst;
522*2f67af8cSTomer Tayar 	u8			data_dst_size;
5235529bad9STomer Tayar 	u32			mcp_resp;
5245529bad9STomer Tayar 	u32			mcp_param;
5255529bad9STomer Tayar };
5265529bad9STomer Tayar 
527fe56b9e6SYuval Mintz /**
528fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
529fe56b9e6SYuval Mintz  *
530fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
531fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
532fe56b9e6SYuval Mintz  *
533fe56b9e6SYuval Mintz  * @return int
534fe56b9e6SYuval Mintz  */
535fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
536fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
537fe56b9e6SYuval Mintz 
538fe56b9e6SYuval Mintz /**
539fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
540fe56b9e6SYuval Mintz  *
541fe56b9e6SYuval Mintz  * @param p_hwfn
542fe56b9e6SYuval Mintz  * @param p_ptt
543fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
544fe56b9e6SYuval Mintz  */
545fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
546fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
547fe56b9e6SYuval Mintz /**
548fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
549fe56b9e6SYuval Mintz  *
550fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
551fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
552fe56b9e6SYuval Mintz  *
553fe56b9e6SYuval Mintz  * @return int
554fe56b9e6SYuval Mintz  */
555fe56b9e6SYuval Mintz 
556fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
557fe56b9e6SYuval Mintz 
558fe56b9e6SYuval Mintz /**
559cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
560cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
561cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
562cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
563cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
564cc875c2eSYuval Mintz  *
565cc875c2eSYuval Mintz  * @param p_hwfn - HW function
566cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
567cc875c2eSYuval Mintz  * @return int - 0 - operation
568cc875c2eSYuval Mintz  * was successul.
569cc875c2eSYuval Mintz  */
570cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
571cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
572cc875c2eSYuval Mintz 
573cc875c2eSYuval Mintz /**
574fe56b9e6SYuval Mintz  * @brief Sends a LOAD_REQ to the MFW, and in case operation
575fe56b9e6SYuval Mintz  *        succeed, returns whether this PF is the first on the
576fe56b9e6SYuval Mintz  *        chip/engine/port or function. This function should be
577fe56b9e6SYuval Mintz  *        called when driver is ready to accept MFW events after
578fe56b9e6SYuval Mintz  *        Storms initializations are done.
579fe56b9e6SYuval Mintz  *
580fe56b9e6SYuval Mintz  * @param p_hwfn       - hw function
581fe56b9e6SYuval Mintz  * @param p_ptt        - PTT required for register access
582fe56b9e6SYuval Mintz  * @param p_load_code  - The MCP response param containing one
583fe56b9e6SYuval Mintz  *      of the following:
584fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_ENGINE
585fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_PORT
586fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_FUNCTION
587fe56b9e6SYuval Mintz  * @return int -
588fe56b9e6SYuval Mintz  *      0 - Operation was successul.
589fe56b9e6SYuval Mintz  *      -EBUSY - Operation failed
590fe56b9e6SYuval Mintz  */
591fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
592fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
593fe56b9e6SYuval Mintz 		     u32 *p_load_code);
594fe56b9e6SYuval Mintz 
595fe56b9e6SYuval Mintz /**
596fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
597fe56b9e6SYuval Mintz  *
598fe56b9e6SYuval Mintz  * @param p_hwfn
599fe56b9e6SYuval Mintz  * @param p_ptt
600fe56b9e6SYuval Mintz  */
601fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
602fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
603fe56b9e6SYuval Mintz 
604fe56b9e6SYuval Mintz /**
6050b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
6060b55e27dSYuval Mintz  *
6070b55e27dSYuval Mintz  * @param p_hwfn
6080b55e27dSYuval Mintz  * @param p_ptt
6090b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
6100b55e27dSYuval Mintz  *
6110b55e27dSYuval Mintz  * @param return int - 0 upon success.
6120b55e27dSYuval Mintz  */
6130b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
6140b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
6150b55e27dSYuval Mintz 
6160b55e27dSYuval Mintz /**
617fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
618fe56b9e6SYuval Mintz  *
619fe56b9e6SYuval Mintz  * @param p_hwfn
620fe56b9e6SYuval Mintz  *
621fe56b9e6SYuval Mintz  * @param return 0 upon success.
622fe56b9e6SYuval Mintz  */
623fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
624fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
625fe56b9e6SYuval Mintz 
626fe56b9e6SYuval Mintz /**
627fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
628fe56b9e6SYuval Mintz  *
629fe56b9e6SYuval Mintz  * @param p_hwfn
630fe56b9e6SYuval Mintz  * @param p_ptt
631fe56b9e6SYuval Mintz  *
632fe56b9e6SYuval Mintz  * @param return 0 upon success.
633fe56b9e6SYuval Mintz  */
634fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
635fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
636fe56b9e6SYuval Mintz 
637fe56b9e6SYuval Mintz /**
6384102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
6394102426fSTomer Tayar  *        a buffer.
6404102426fSTomer Tayar  *
6414102426fSTomer Tayar  * @param p_hwfn
6424102426fSTomer Tayar  * @param p_ptt
6434102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
6444102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
6454102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
6464102426fSTomer Tayar  * @param o_mcp_resp - MCP response
6474102426fSTomer Tayar  * @param o_mcp_param - MCP response param
6484102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
6494102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
6504102426fSTomer Tayar  *
6514102426fSTomer Tayar  * @param return 0 upon success.
6524102426fSTomer Tayar  */
6534102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
6544102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
6554102426fSTomer Tayar 		       u32 cmd,
6564102426fSTomer Tayar 		       u32 param,
6574102426fSTomer Tayar 		       u32 *o_mcp_resp,
6584102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
6594102426fSTomer Tayar 
6604102426fSTomer Tayar /**
661fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
662fe56b9e6SYuval Mintz  *
663fe56b9e6SYuval Mintz  * @param p_hwfn
664fe56b9e6SYuval Mintz  *
665fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
666fe56b9e6SYuval Mintz  */
667fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
6681408cc1fSYuval Mintz 
6691408cc1fSYuval Mintz /**
6701408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
6711408cc1fSYuval Mintz  *
6721408cc1fSYuval Mintz  * @param p_hwfn
6731408cc1fSYuval Mintz  * @param p_ptt
6741408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
6751408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
6761408cc1fSYuval Mintz  *
6771408cc1fSYuval Mintz  * @return int
6781408cc1fSYuval Mintz  */
6791408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
6801408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
6811408cc1fSYuval Mintz 
6824102426fSTomer Tayar /**
6834102426fSTomer Tayar  * @brief - Halt the MCP.
6844102426fSTomer Tayar  *
6854102426fSTomer Tayar  * @param p_hwfn
6864102426fSTomer Tayar  * @param p_ptt
6874102426fSTomer Tayar  *
6884102426fSTomer Tayar  * @param return 0 upon success.
6894102426fSTomer Tayar  */
6904102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6914102426fSTomer Tayar 
6924102426fSTomer Tayar /**
6934102426fSTomer Tayar  * @brief - Wake up the MCP.
6944102426fSTomer Tayar  *
6954102426fSTomer Tayar  * @param p_hwfn
6964102426fSTomer Tayar  * @param p_ptt
6974102426fSTomer Tayar  *
6984102426fSTomer Tayar  * @param return 0 upon success.
6994102426fSTomer Tayar  */
7004102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7014102426fSTomer Tayar 
702a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
7034b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
7044b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
7054b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
7064b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
7074b01e519SManish Chopra 				     u8 max_bw);
708a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
709a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
710a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
711a64b02d5SManish Chopra 				     u8 min_bw);
712351a4dedSYuval Mintz 
7134102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
7144102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
7154102426fSTomer Tayar 
7160fefbfbaSSudarsana Kalluru /**
7170fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
7180fefbfbaSSudarsana Kalluru  *
7190fefbfbaSSudarsana Kalluru  *  @param p_hwfn
7200fefbfbaSSudarsana Kalluru  *  @param p_ptt
7210fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
7220fefbfbaSSudarsana Kalluru  *
7230fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
7240fefbfbaSSudarsana Kalluru  */
7250fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
7260fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
7270fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
7280fefbfbaSSudarsana Kalluru 
7292edbff8dSTomer Tayar /**
7302edbff8dSTomer Tayar  * @brief - Gets the MFW allocation info for the given resource
7312edbff8dSTomer Tayar  *
7322edbff8dSTomer Tayar  *  @param p_hwfn
7332edbff8dSTomer Tayar  *  @param p_ptt
7342edbff8dSTomer Tayar  *  @param p_resc_info - descriptor of requested resource
7352edbff8dSTomer Tayar  *  @param p_mcp_resp
7362edbff8dSTomer Tayar  *  @param p_mcp_param
7372edbff8dSTomer Tayar  *
7382edbff8dSTomer Tayar  * @return int - 0 - operation was successful.
7392edbff8dSTomer Tayar  */
7402edbff8dSTomer Tayar int qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
7412edbff8dSTomer Tayar 			  struct qed_ptt *p_ptt,
7422edbff8dSTomer Tayar 			  struct resource_info *p_resc_info,
7432edbff8dSTomer Tayar 			  u32 *p_mcp_resp, u32 *p_mcp_param);
744fe56b9e6SYuval Mintz #endif
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