xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 2edbff8dcb5da324fd4c4fe953629e4f6ca73c99)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2fe56b9e6SYuval Mintz  * Copyright (c) 2015 QLogic Corporation
3fe56b9e6SYuval Mintz  *
4fe56b9e6SYuval Mintz  * This software is available under the terms of the GNU General Public License
5fe56b9e6SYuval Mintz  * (GPL) Version 2, available from the file COPYING in the main directory of
6fe56b9e6SYuval Mintz  * this source tree.
7fe56b9e6SYuval Mintz  */
8fe56b9e6SYuval Mintz 
9fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
10fe56b9e6SYuval Mintz #define _QED_MCP_H
11fe56b9e6SYuval Mintz 
12fe56b9e6SYuval Mintz #include <linux/types.h>
13fe56b9e6SYuval Mintz #include <linux/delay.h>
14fe56b9e6SYuval Mintz #include <linux/slab.h>
155529bad9STomer Tayar #include <linux/spinlock.h>
16fe56b9e6SYuval Mintz #include "qed_hsi.h"
17fe56b9e6SYuval Mintz 
18cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
19cc875c2eSYuval Mintz 	bool    autoneg;
20cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
21cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
22cc875c2eSYuval Mintz };
23cc875c2eSYuval Mintz 
24cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
25cc875c2eSYuval Mintz 	bool    autoneg;
26cc875c2eSYuval Mintz 	bool    forced_rx;
27cc875c2eSYuval Mintz 	bool    forced_tx;
28cc875c2eSYuval Mintz };
29cc875c2eSYuval Mintz 
30cc875c2eSYuval Mintz struct qed_mcp_link_params {
31cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
32cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
33cc875c2eSYuval Mintz 	u32				     loopback_mode;
34cc875c2eSYuval Mintz };
35cc875c2eSYuval Mintz 
36cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
37cc875c2eSYuval Mintz 	u32 speed_capabilities;
38cc875c2eSYuval Mintz };
39cc875c2eSYuval Mintz 
40cc875c2eSYuval Mintz struct qed_mcp_link_state {
41cc875c2eSYuval Mintz 	bool    link_up;
42cc875c2eSYuval Mintz 
43a64b02d5SManish Chopra 	u32	min_pf_rate;
44a64b02d5SManish Chopra 
454b01e519SManish Chopra 	/* Actual link speed in Mb/s */
464b01e519SManish Chopra 	u32	line_speed;
474b01e519SManish Chopra 
484b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
494b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
504b01e519SManish Chopra 	 */
514b01e519SManish Chopra 	u32     speed;
52cc875c2eSYuval Mintz 	bool    full_duplex;
53cc875c2eSYuval Mintz 
54cc875c2eSYuval Mintz 	bool    an;
55cc875c2eSYuval Mintz 	bool    an_complete;
56cc875c2eSYuval Mintz 	bool    parallel_detection;
57cc875c2eSYuval Mintz 	bool    pfc_enabled;
58cc875c2eSYuval Mintz 
59cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
60cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
61cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
62cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
63054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
64054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
65054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
66054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
67cc875c2eSYuval Mintz 	u32     partner_adv_speed;
68cc875c2eSYuval Mintz 
69cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
70cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
71cc875c2eSYuval Mintz 
72cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
73cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
74cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
75cc875c2eSYuval Mintz 	u8      partner_adv_pause;
76cc875c2eSYuval Mintz 
77cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
78cc875c2eSYuval Mintz };
79cc875c2eSYuval Mintz 
80fe56b9e6SYuval Mintz struct qed_mcp_function_info {
81fe56b9e6SYuval Mintz 	u8				pause_on_host;
82fe56b9e6SYuval Mintz 
83fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
84fe56b9e6SYuval Mintz 
85fe56b9e6SYuval Mintz 	u8				bandwidth_min;
86fe56b9e6SYuval Mintz 	u8				bandwidth_max;
87fe56b9e6SYuval Mintz 
88fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
89fe56b9e6SYuval Mintz 
90fe56b9e6SYuval Mintz 	u64				wwn_port;
91fe56b9e6SYuval Mintz 	u64				wwn_node;
92fe56b9e6SYuval Mintz 
93fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
94fe56b9e6SYuval Mintz 	u16				ovlan;
950fefbfbaSSudarsana Kalluru 
960fefbfbaSSudarsana Kalluru 	u16				mtu;
97fe56b9e6SYuval Mintz };
98fe56b9e6SYuval Mintz 
99fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
100fe56b9e6SYuval Mintz 	u32	offset;
101fe56b9e6SYuval Mintz 	u32	param;
102fe56b9e6SYuval Mintz 	u32	resp;
103fe56b9e6SYuval Mintz 	u32	cmd;
104fe56b9e6SYuval Mintz };
105fe56b9e6SYuval Mintz 
106fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
107fe56b9e6SYuval Mintz 	u32	version;
108fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
109fe56b9e6SYuval Mintz };
110fe56b9e6SYuval Mintz 
1116c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1126c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1136c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1146c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1156c754246SSudarsana Reddy Kalluru };
1166c754246SSudarsana Reddy Kalluru 
1176c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1186c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1196c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1206c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1216c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1226c754246SSudarsana Reddy Kalluru };
1236c754246SSudarsana Reddy Kalluru 
1246c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1256c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1266c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1276c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1286c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1296c754246SSudarsana Reddy Kalluru };
1306c754246SSudarsana Reddy Kalluru 
1316c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1326c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1336c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1346c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1356c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1366c754246SSudarsana Reddy Kalluru };
1376c754246SSudarsana Reddy Kalluru 
1386c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1396c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1406c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1416c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1426c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1436c754246SSudarsana Reddy Kalluru };
1446c754246SSudarsana Reddy Kalluru 
1456c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1466c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1476c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1486c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1496c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1506c754246SSudarsana Reddy Kalluru };
1516c754246SSudarsana Reddy Kalluru 
1520fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1530fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1540fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1550fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1560fefbfbaSSudarsana Kalluru };
1570fefbfbaSSudarsana Kalluru 
1580fefbfbaSSudarsana Kalluru enum qed_ov_client {
1590fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
1600fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
1610fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
1620fefbfbaSSudarsana Kalluru };
1630fefbfbaSSudarsana Kalluru 
1640fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
1650fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
1660fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
1670fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
1680fefbfbaSSudarsana Kalluru };
1690fefbfbaSSudarsana Kalluru 
1700fefbfbaSSudarsana Kalluru enum qed_ov_wol {
1710fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
1720fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
1730fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
1740fefbfbaSSudarsana Kalluru };
1750fefbfbaSSudarsana Kalluru 
176fe56b9e6SYuval Mintz /**
177cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
178cc875c2eSYuval Mintz  *
179cc875c2eSYuval Mintz  * @param p_hwfn
180cc875c2eSYuval Mintz  *
181cc875c2eSYuval Mintz  * @returns pointer to link params
182cc875c2eSYuval Mintz  */
183cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
184cc875c2eSYuval Mintz 
185cc875c2eSYuval Mintz /**
186cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
187cc875c2eSYuval Mintz  *
188cc875c2eSYuval Mintz  * @param p_hwfn
189cc875c2eSYuval Mintz  *
190cc875c2eSYuval Mintz  * @returns pointer to link state
191cc875c2eSYuval Mintz  */
192cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
193cc875c2eSYuval Mintz 
194cc875c2eSYuval Mintz /**
195cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
196cc875c2eSYuval Mintz  *
197cc875c2eSYuval Mintz  * @param p_hwfn
198cc875c2eSYuval Mintz  *
199cc875c2eSYuval Mintz  * @returns pointer to link capabilities
200cc875c2eSYuval Mintz  */
201cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
202cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
203cc875c2eSYuval Mintz 
204cc875c2eSYuval Mintz /**
205cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
206cc875c2eSYuval Mintz  *
207cc875c2eSYuval Mintz  * @param p_hwfn
208cc875c2eSYuval Mintz  * @param p_ptt
209cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
210cc875c2eSYuval Mintz  *
211cc875c2eSYuval Mintz  * @return int
212cc875c2eSYuval Mintz  */
213cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
214cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
215cc875c2eSYuval Mintz 		     bool               b_up);
216cc875c2eSYuval Mintz 
217cc875c2eSYuval Mintz /**
218fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
219fe56b9e6SYuval Mintz  *
2201408cc1fSYuval Mintz  * @param p_hwfn
2211408cc1fSYuval Mintz  * @param p_ptt
2221408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2231408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
224fe56b9e6SYuval Mintz  *
2251408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
226fe56b9e6SYuval Mintz  */
2271408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2281408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2291408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
230fe56b9e6SYuval Mintz 
231fe56b9e6SYuval Mintz /**
232cc875c2eSYuval Mintz  * @brief Get media type value of the port.
233cc875c2eSYuval Mintz  *
234cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
235cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
236cc875c2eSYuval Mintz  *
237cc875c2eSYuval Mintz  * @return int -
238cc875c2eSYuval Mintz  *      0 - Operation was successul.
239cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
240cc875c2eSYuval Mintz  */
241cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
242cc875c2eSYuval Mintz 			   u32                  *media_type);
243cc875c2eSYuval Mintz 
244cc875c2eSYuval Mintz /**
245fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
246fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
247fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
248fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
249fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
250fe56b9e6SYuval Mintz  *
251fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
252fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
253fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
254fe56b9e6SYuval Mintz  * @param param      - Optional param
255fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
256fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
257fe56b9e6SYuval Mintz  *                     response
258fe56b9e6SYuval Mintz  * @return int - 0 - operation
259fe56b9e6SYuval Mintz  * was successul.
260fe56b9e6SYuval Mintz  */
261fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
262fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
263fe56b9e6SYuval Mintz 		u32 cmd,
264fe56b9e6SYuval Mintz 		u32 param,
265fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
266fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
267fe56b9e6SYuval Mintz 
268fe56b9e6SYuval Mintz /**
269fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
270fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
271fe56b9e6SYuval Mintz  *
272fe56b9e6SYuval Mintz  * @param p_hwfn
273fe56b9e6SYuval Mintz  * @param p_ptt
274fe56b9e6SYuval Mintz  */
275fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
276fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
277fe56b9e6SYuval Mintz 
278fe56b9e6SYuval Mintz /**
279cee4d264SManish Chopra  * @brief Get the flash size value
280cee4d264SManish Chopra  *
281cee4d264SManish Chopra  * @param p_hwfn
282cee4d264SManish Chopra  * @param p_ptt
283cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
284cee4d264SManish Chopra  *
285cee4d264SManish Chopra  * @return int - 0 - operation was successul.
286cee4d264SManish Chopra  */
287cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
288cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
289cee4d264SManish Chopra 			   u32 *p_flash_size);
290cee4d264SManish Chopra 
291cee4d264SManish Chopra /**
292fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
293fe56b9e6SYuval Mintz  *
294fe56b9e6SYuval Mintz  * @param p_hwfn
295fe56b9e6SYuval Mintz  * @param p_ptt
296fe56b9e6SYuval Mintz  * @param version - Version value
297fe56b9e6SYuval Mintz  * @param name - Protocol driver name
298fe56b9e6SYuval Mintz  *
299fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
300fe56b9e6SYuval Mintz  */
301fe56b9e6SYuval Mintz int
302fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
303fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
304fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
305fe56b9e6SYuval Mintz 
30691420b83SSudarsana Kalluru /**
3070fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3080fefbfbaSSudarsana Kalluru  *
3090fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3100fefbfbaSSudarsana Kalluru  *  @param p_ptt
3110fefbfbaSSudarsana Kalluru  *  @param client - qed client type
3120fefbfbaSSudarsana Kalluru  *
3130fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3140fefbfbaSSudarsana Kalluru  */
3150fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
3160fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
3170fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
3180fefbfbaSSudarsana Kalluru 
3190fefbfbaSSudarsana Kalluru /**
3200fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
3210fefbfbaSSudarsana Kalluru  *
3220fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3230fefbfbaSSudarsana Kalluru  *  @param p_ptt
3240fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
3250fefbfbaSSudarsana Kalluru  *
3260fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3270fefbfbaSSudarsana Kalluru  */
3280fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
3290fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
3300fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
3310fefbfbaSSudarsana Kalluru 
3320fefbfbaSSudarsana Kalluru /**
3330fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
3340fefbfbaSSudarsana Kalluru  *
3350fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3360fefbfbaSSudarsana Kalluru  *  @param p_ptt
3370fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
3380fefbfbaSSudarsana Kalluru  *
3390fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3400fefbfbaSSudarsana Kalluru  */
3410fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
3420fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
3430fefbfbaSSudarsana Kalluru 
3440fefbfbaSSudarsana Kalluru /**
3450fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
3460fefbfbaSSudarsana Kalluru  *
3470fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3480fefbfbaSSudarsana Kalluru  *  @param p_ptt
3490fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
3500fefbfbaSSudarsana Kalluru  *
3510fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3520fefbfbaSSudarsana Kalluru  */
3530fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
3540fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
3550fefbfbaSSudarsana Kalluru 
3560fefbfbaSSudarsana Kalluru /**
3570fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
3580fefbfbaSSudarsana Kalluru  *
3590fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3600fefbfbaSSudarsana Kalluru  *  @param p_ptt
3610fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
3620fefbfbaSSudarsana Kalluru  *
3630fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3640fefbfbaSSudarsana Kalluru  */
3650fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
3660fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
3670fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
3680fefbfbaSSudarsana Kalluru 
3690fefbfbaSSudarsana Kalluru /**
37091420b83SSudarsana Kalluru  * @brief Set LED status
37191420b83SSudarsana Kalluru  *
37291420b83SSudarsana Kalluru  *  @param p_hwfn
37391420b83SSudarsana Kalluru  *  @param p_ptt
37491420b83SSudarsana Kalluru  *  @param mode - LED mode
37591420b83SSudarsana Kalluru  *
37691420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
37791420b83SSudarsana Kalluru  */
37891420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
37991420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
38091420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
38191420b83SSudarsana Kalluru 
38203dc76caSSudarsana Reddy Kalluru /**
3837a4b21b7SMintz, Yuval  * @brief Read from nvm
3847a4b21b7SMintz, Yuval  *
3857a4b21b7SMintz, Yuval  *  @param cdev
3867a4b21b7SMintz, Yuval  *  @param addr - nvm offset
3877a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
3887a4b21b7SMintz, Yuval  *  @param len - buffer len
3897a4b21b7SMintz, Yuval  *
3907a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
3917a4b21b7SMintz, Yuval  */
3927a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
3937a4b21b7SMintz, Yuval 
3947a4b21b7SMintz, Yuval /**
39503dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
39603dc76caSSudarsana Reddy Kalluru  *
39703dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
39803dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
39903dc76caSSudarsana Reddy Kalluru  *
40003dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
40103dc76caSSudarsana Reddy Kalluru  */
40203dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
40303dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
40403dc76caSSudarsana Reddy Kalluru 
40503dc76caSSudarsana Reddy Kalluru /**
40603dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
40703dc76caSSudarsana Reddy Kalluru  *
40803dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
40903dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
41003dc76caSSudarsana Reddy Kalluru  *
41103dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
41203dc76caSSudarsana Reddy Kalluru  */
41303dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
41403dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
41503dc76caSSudarsana Reddy Kalluru 
4167a4b21b7SMintz, Yuval /**
4177a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
4187a4b21b7SMintz, Yuval  *
4197a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
4207a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
4217a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
4227a4b21b7SMintz, Yuval  *			  successful. 0 if not.
4237a4b21b7SMintz, Yuval  *
4247a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4257a4b21b7SMintz, Yuval  */
4267a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
4277a4b21b7SMintz, Yuval 					 struct qed_ptt *p_ptt,
4287a4b21b7SMintz, Yuval 					 u32 *num_images);
4297a4b21b7SMintz, Yuval 
4307a4b21b7SMintz, Yuval /**
4317a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
4327a4b21b7SMintz, Yuval  *
4337a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
4347a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
4357a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
4367a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
4377a4b21b7SMintz, Yuval  *
4387a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4397a4b21b7SMintz, Yuval  */
4407a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
4417a4b21b7SMintz, Yuval 					struct qed_ptt *p_ptt,
4427a4b21b7SMintz, Yuval 					struct bist_nvm_image_att *p_image_att,
4437a4b21b7SMintz, Yuval 					u32 image_index);
4447a4b21b7SMintz, Yuval 
445fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
446fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
447fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
448fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
449fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
450fe56b9e6SYuval Mintz  */
451fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
452fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
453fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
454fe56b9e6SYuval Mintz 					    rel_pfid)
455fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
456fe56b9e6SYuval Mintz 
457fe56b9e6SYuval Mintz /* TODO - this is only correct as long as only BB is supported, and
458fe56b9e6SYuval Mintz  * no port-swapping is implemented; Afterwards we'll need to fix it.
459fe56b9e6SYuval Mintz  */
460fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %	\
461fe56b9e6SYuval Mintz 				 ((_p_hwfn)->cdev->num_ports_in_engines * 2))
462fe56b9e6SYuval Mintz struct qed_mcp_info {
4635529bad9STomer Tayar 	spinlock_t				lock;
4645529bad9STomer Tayar 	bool					block_mb_sending;
465fe56b9e6SYuval Mintz 	u32					public_base;
466fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
467fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
468fe56b9e6SYuval Mintz 	u32					port_addr;
469fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
470fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
471cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
472cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
473cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
474fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
475fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
476fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
477fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
478fe56b9e6SYuval Mintz 	u16					mcp_hist;
479fe56b9e6SYuval Mintz };
480fe56b9e6SYuval Mintz 
4815529bad9STomer Tayar struct qed_mcp_mb_params {
4825529bad9STomer Tayar 	u32			cmd;
4835529bad9STomer Tayar 	u32			param;
4845529bad9STomer Tayar 	union drv_union_data	*p_data_src;
4855529bad9STomer Tayar 	union drv_union_data	*p_data_dst;
4865529bad9STomer Tayar 	u32			mcp_resp;
4875529bad9STomer Tayar 	u32			mcp_param;
4885529bad9STomer Tayar };
4895529bad9STomer Tayar 
490fe56b9e6SYuval Mintz /**
491fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
492fe56b9e6SYuval Mintz  *
493fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
494fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
495fe56b9e6SYuval Mintz  *
496fe56b9e6SYuval Mintz  * @return int
497fe56b9e6SYuval Mintz  */
498fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
499fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
500fe56b9e6SYuval Mintz 
501fe56b9e6SYuval Mintz /**
502fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
503fe56b9e6SYuval Mintz  *
504fe56b9e6SYuval Mintz  * @param p_hwfn
505fe56b9e6SYuval Mintz  * @param p_ptt
506fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
507fe56b9e6SYuval Mintz  */
508fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
509fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
510fe56b9e6SYuval Mintz /**
511fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
512fe56b9e6SYuval Mintz  *
513fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
514fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
515fe56b9e6SYuval Mintz  *
516fe56b9e6SYuval Mintz  * @return int
517fe56b9e6SYuval Mintz  */
518fe56b9e6SYuval Mintz 
519fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
520fe56b9e6SYuval Mintz 
521fe56b9e6SYuval Mintz /**
522cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
523cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
524cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
525cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
526cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
527cc875c2eSYuval Mintz  *
528cc875c2eSYuval Mintz  * @param p_hwfn - HW function
529cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
530cc875c2eSYuval Mintz  * @return int - 0 - operation
531cc875c2eSYuval Mintz  * was successul.
532cc875c2eSYuval Mintz  */
533cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
534cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
535cc875c2eSYuval Mintz 
536cc875c2eSYuval Mintz /**
537fe56b9e6SYuval Mintz  * @brief Sends a LOAD_REQ to the MFW, and in case operation
538fe56b9e6SYuval Mintz  *        succeed, returns whether this PF is the first on the
539fe56b9e6SYuval Mintz  *        chip/engine/port or function. This function should be
540fe56b9e6SYuval Mintz  *        called when driver is ready to accept MFW events after
541fe56b9e6SYuval Mintz  *        Storms initializations are done.
542fe56b9e6SYuval Mintz  *
543fe56b9e6SYuval Mintz  * @param p_hwfn       - hw function
544fe56b9e6SYuval Mintz  * @param p_ptt        - PTT required for register access
545fe56b9e6SYuval Mintz  * @param p_load_code  - The MCP response param containing one
546fe56b9e6SYuval Mintz  *      of the following:
547fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_ENGINE
548fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_PORT
549fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_FUNCTION
550fe56b9e6SYuval Mintz  * @return int -
551fe56b9e6SYuval Mintz  *      0 - Operation was successul.
552fe56b9e6SYuval Mintz  *      -EBUSY - Operation failed
553fe56b9e6SYuval Mintz  */
554fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
555fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
556fe56b9e6SYuval Mintz 		     u32 *p_load_code);
557fe56b9e6SYuval Mintz 
558fe56b9e6SYuval Mintz /**
559fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
560fe56b9e6SYuval Mintz  *
561fe56b9e6SYuval Mintz  * @param p_hwfn
562fe56b9e6SYuval Mintz  * @param p_ptt
563fe56b9e6SYuval Mintz  */
564fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
565fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
566fe56b9e6SYuval Mintz 
567fe56b9e6SYuval Mintz /**
5680b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
5690b55e27dSYuval Mintz  *
5700b55e27dSYuval Mintz  * @param p_hwfn
5710b55e27dSYuval Mintz  * @param p_ptt
5720b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
5730b55e27dSYuval Mintz  *
5740b55e27dSYuval Mintz  * @param return int - 0 upon success.
5750b55e27dSYuval Mintz  */
5760b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
5770b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
5780b55e27dSYuval Mintz 
5790b55e27dSYuval Mintz /**
580fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
581fe56b9e6SYuval Mintz  *
582fe56b9e6SYuval Mintz  * @param p_hwfn
583fe56b9e6SYuval Mintz  *
584fe56b9e6SYuval Mintz  * @param return 0 upon success.
585fe56b9e6SYuval Mintz  */
586fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
587fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
588fe56b9e6SYuval Mintz 
589fe56b9e6SYuval Mintz /**
590fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
591fe56b9e6SYuval Mintz  *
592fe56b9e6SYuval Mintz  * @param p_hwfn
593fe56b9e6SYuval Mintz  * @param p_ptt
594fe56b9e6SYuval Mintz  *
595fe56b9e6SYuval Mintz  * @param return 0 upon success.
596fe56b9e6SYuval Mintz  */
597fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
598fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
599fe56b9e6SYuval Mintz 
600fe56b9e6SYuval Mintz /**
6014102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
6024102426fSTomer Tayar  *        a buffer.
6034102426fSTomer Tayar  *
6044102426fSTomer Tayar  * @param p_hwfn
6054102426fSTomer Tayar  * @param p_ptt
6064102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
6074102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
6084102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
6094102426fSTomer Tayar  * @param o_mcp_resp - MCP response
6104102426fSTomer Tayar  * @param o_mcp_param - MCP response param
6114102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
6124102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
6134102426fSTomer Tayar  *
6144102426fSTomer Tayar  * @param return 0 upon success.
6154102426fSTomer Tayar  */
6164102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
6174102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
6184102426fSTomer Tayar 		       u32 cmd,
6194102426fSTomer Tayar 		       u32 param,
6204102426fSTomer Tayar 		       u32 *o_mcp_resp,
6214102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
6224102426fSTomer Tayar 
6234102426fSTomer Tayar /**
624fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
625fe56b9e6SYuval Mintz  *
626fe56b9e6SYuval Mintz  * @param p_hwfn
627fe56b9e6SYuval Mintz  *
628fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
629fe56b9e6SYuval Mintz  */
630fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
6311408cc1fSYuval Mintz 
6321408cc1fSYuval Mintz /**
6331408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
6341408cc1fSYuval Mintz  *
6351408cc1fSYuval Mintz  * @param p_hwfn
6361408cc1fSYuval Mintz  * @param p_ptt
6371408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
6381408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
6391408cc1fSYuval Mintz  *
6401408cc1fSYuval Mintz  * @return int
6411408cc1fSYuval Mintz  */
6421408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
6431408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
6441408cc1fSYuval Mintz 
6454102426fSTomer Tayar /**
6464102426fSTomer Tayar  * @brief - Halt the MCP.
6474102426fSTomer Tayar  *
6484102426fSTomer Tayar  * @param p_hwfn
6494102426fSTomer Tayar  * @param p_ptt
6504102426fSTomer Tayar  *
6514102426fSTomer Tayar  * @param return 0 upon success.
6524102426fSTomer Tayar  */
6534102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6544102426fSTomer Tayar 
6554102426fSTomer Tayar /**
6564102426fSTomer Tayar  * @brief - Wake up the MCP.
6574102426fSTomer Tayar  *
6584102426fSTomer Tayar  * @param p_hwfn
6594102426fSTomer Tayar  * @param p_ptt
6604102426fSTomer Tayar  *
6614102426fSTomer Tayar  * @param return 0 upon success.
6624102426fSTomer Tayar  */
6634102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6644102426fSTomer Tayar 
665a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
6664b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
6674b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
6684b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
6694b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
6704b01e519SManish Chopra 				     u8 max_bw);
671a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
672a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
673a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
674a64b02d5SManish Chopra 				     u8 min_bw);
675351a4dedSYuval Mintz 
6764102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
6774102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
6784102426fSTomer Tayar 
6790fefbfbaSSudarsana Kalluru /**
6800fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
6810fefbfbaSSudarsana Kalluru  *
6820fefbfbaSSudarsana Kalluru  *  @param p_hwfn
6830fefbfbaSSudarsana Kalluru  *  @param p_ptt
6840fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
6850fefbfbaSSudarsana Kalluru  *
6860fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
6870fefbfbaSSudarsana Kalluru  */
6880fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
6890fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
6900fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
6910fefbfbaSSudarsana Kalluru 
692*2edbff8dSTomer Tayar /**
693*2edbff8dSTomer Tayar  * @brief - Gets the MFW allocation info for the given resource
694*2edbff8dSTomer Tayar  *
695*2edbff8dSTomer Tayar  *  @param p_hwfn
696*2edbff8dSTomer Tayar  *  @param p_ptt
697*2edbff8dSTomer Tayar  *  @param p_resc_info - descriptor of requested resource
698*2edbff8dSTomer Tayar  *  @param p_mcp_resp
699*2edbff8dSTomer Tayar  *  @param p_mcp_param
700*2edbff8dSTomer Tayar  *
701*2edbff8dSTomer Tayar  * @return int - 0 - operation was successful.
702*2edbff8dSTomer Tayar  */
703*2edbff8dSTomer Tayar int qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
704*2edbff8dSTomer Tayar 			  struct qed_ptt *p_ptt,
705*2edbff8dSTomer Tayar 			  struct resource_info *p_resc_info,
706*2edbff8dSTomer Tayar 			  u32 *p_mcp_resp, u32 *p_mcp_param);
707fe56b9e6SYuval Mintz #endif
708