1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 3fe56b9e6SYuval Mintz * 4e8f1cb50SMintz, Yuval * This software is available to you under a choice of one of two 5e8f1cb50SMintz, Yuval * licenses. You may choose to be licensed under the terms of the GNU 6e8f1cb50SMintz, Yuval * General Public License (GPL) Version 2, available from the file 7e8f1cb50SMintz, Yuval * COPYING in the main directory of this source tree, or the 8e8f1cb50SMintz, Yuval * OpenIB.org BSD license below: 9e8f1cb50SMintz, Yuval * 10e8f1cb50SMintz, Yuval * Redistribution and use in source and binary forms, with or 11e8f1cb50SMintz, Yuval * without modification, are permitted provided that the following 12e8f1cb50SMintz, Yuval * conditions are met: 13e8f1cb50SMintz, Yuval * 14e8f1cb50SMintz, Yuval * - Redistributions of source code must retain the above 15e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 16e8f1cb50SMintz, Yuval * disclaimer. 17e8f1cb50SMintz, Yuval * 18e8f1cb50SMintz, Yuval * - Redistributions in binary form must reproduce the above 19e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 20e8f1cb50SMintz, Yuval * disclaimer in the documentation and /or other materials 21e8f1cb50SMintz, Yuval * provided with the distribution. 22e8f1cb50SMintz, Yuval * 23e8f1cb50SMintz, Yuval * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e8f1cb50SMintz, Yuval * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e8f1cb50SMintz, Yuval * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e8f1cb50SMintz, Yuval * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e8f1cb50SMintz, Yuval * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e8f1cb50SMintz, Yuval * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e8f1cb50SMintz, Yuval * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e8f1cb50SMintz, Yuval * SOFTWARE. 31fe56b9e6SYuval Mintz */ 32fe56b9e6SYuval Mintz 33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H 34fe56b9e6SYuval Mintz #define _QED_MCP_H 35fe56b9e6SYuval Mintz 36fe56b9e6SYuval Mintz #include <linux/types.h> 37fe56b9e6SYuval Mintz #include <linux/delay.h> 38fe56b9e6SYuval Mintz #include <linux/slab.h> 395529bad9STomer Tayar #include <linux/spinlock.h> 401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h> 41fe56b9e6SYuval Mintz #include "qed_hsi.h" 425d24bcf1STomer Tayar #include "qed_dev_api.h" 43fe56b9e6SYuval Mintz 44cc875c2eSYuval Mintz struct qed_mcp_link_speed_params { 45cc875c2eSYuval Mintz bool autoneg; 46cc875c2eSYuval Mintz u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 47cc875c2eSYuval Mintz u32 forced_speed; /* In Mb/s */ 48cc875c2eSYuval Mintz }; 49cc875c2eSYuval Mintz 50cc875c2eSYuval Mintz struct qed_mcp_link_pause_params { 51cc875c2eSYuval Mintz bool autoneg; 52cc875c2eSYuval Mintz bool forced_rx; 53cc875c2eSYuval Mintz bool forced_tx; 54cc875c2eSYuval Mintz }; 55cc875c2eSYuval Mintz 56cc875c2eSYuval Mintz struct qed_mcp_link_params { 57cc875c2eSYuval Mintz struct qed_mcp_link_speed_params speed; 58cc875c2eSYuval Mintz struct qed_mcp_link_pause_params pause; 59cc875c2eSYuval Mintz u32 loopback_mode; 60cc875c2eSYuval Mintz }; 61cc875c2eSYuval Mintz 62cc875c2eSYuval Mintz struct qed_mcp_link_capabilities { 63cc875c2eSYuval Mintz u32 speed_capabilities; 6434f9199cSsudarsana.kalluru@cavium.com bool default_speed_autoneg; 65cc875c2eSYuval Mintz }; 66cc875c2eSYuval Mintz 67cc875c2eSYuval Mintz struct qed_mcp_link_state { 68cc875c2eSYuval Mintz bool link_up; 69cc875c2eSYuval Mintz 70a64b02d5SManish Chopra u32 min_pf_rate; 71a64b02d5SManish Chopra 724b01e519SManish Chopra /* Actual link speed in Mb/s */ 734b01e519SManish Chopra u32 line_speed; 744b01e519SManish Chopra 754b01e519SManish Chopra /* PF max speed in Mb/s, deduced from line_speed 764b01e519SManish Chopra * according to PF max bandwidth configuration. 774b01e519SManish Chopra */ 784b01e519SManish Chopra u32 speed; 79cc875c2eSYuval Mintz bool full_duplex; 80cc875c2eSYuval Mintz 81cc875c2eSYuval Mintz bool an; 82cc875c2eSYuval Mintz bool an_complete; 83cc875c2eSYuval Mintz bool parallel_detection; 84cc875c2eSYuval Mintz bool pfc_enabled; 85cc875c2eSYuval Mintz 86cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 87cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 88cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G BIT(2) 89cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G BIT(3) 90054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G BIT(4) 91054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G BIT(5) 92054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G BIT(6) 93054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G BIT(7) 94cc875c2eSYuval Mintz u32 partner_adv_speed; 95cc875c2eSYuval Mintz 96cc875c2eSYuval Mintz bool partner_tx_flow_ctrl_en; 97cc875c2eSYuval Mintz bool partner_rx_flow_ctrl_en; 98cc875c2eSYuval Mintz 99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 100cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 101cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3) 102cc875c2eSYuval Mintz u8 partner_adv_pause; 103cc875c2eSYuval Mintz 104cc875c2eSYuval Mintz bool sfp_tx_fault; 105cc875c2eSYuval Mintz }; 106cc875c2eSYuval Mintz 107fe56b9e6SYuval Mintz struct qed_mcp_function_info { 108fe56b9e6SYuval Mintz u8 pause_on_host; 109fe56b9e6SYuval Mintz 110fe56b9e6SYuval Mintz enum qed_pci_personality protocol; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz u8 bandwidth_min; 113fe56b9e6SYuval Mintz u8 bandwidth_max; 114fe56b9e6SYuval Mintz 115fe56b9e6SYuval Mintz u8 mac[ETH_ALEN]; 116fe56b9e6SYuval Mintz 117fe56b9e6SYuval Mintz u64 wwn_port; 118fe56b9e6SYuval Mintz u64 wwn_node; 119fe56b9e6SYuval Mintz 120fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET (0xffff) 121fe56b9e6SYuval Mintz u16 ovlan; 1220fefbfbaSSudarsana Kalluru 1230fefbfbaSSudarsana Kalluru u16 mtu; 124fe56b9e6SYuval Mintz }; 125fe56b9e6SYuval Mintz 126fe56b9e6SYuval Mintz struct qed_mcp_nvm_common { 127fe56b9e6SYuval Mintz u32 offset; 128fe56b9e6SYuval Mintz u32 param; 129fe56b9e6SYuval Mintz u32 resp; 130fe56b9e6SYuval Mintz u32 cmd; 131fe56b9e6SYuval Mintz }; 132fe56b9e6SYuval Mintz 133fe56b9e6SYuval Mintz struct qed_mcp_drv_version { 134fe56b9e6SYuval Mintz u32 version; 135fe56b9e6SYuval Mintz u8 name[MCP_DRV_VER_STR_SIZE - 4]; 136fe56b9e6SYuval Mintz }; 137fe56b9e6SYuval Mintz 1386c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats { 1396c754246SSudarsana Reddy Kalluru u64 ucast_rx_pkts; 1406c754246SSudarsana Reddy Kalluru u64 ucast_tx_pkts; 1416c754246SSudarsana Reddy Kalluru u32 fcs_err; 1426c754246SSudarsana Reddy Kalluru }; 1436c754246SSudarsana Reddy Kalluru 1446c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats { 1456c754246SSudarsana Reddy Kalluru u64 rx_pkts; 1466c754246SSudarsana Reddy Kalluru u64 tx_pkts; 1476c754246SSudarsana Reddy Kalluru u32 fcs_err; 1486c754246SSudarsana Reddy Kalluru u32 login_failure; 1496c754246SSudarsana Reddy Kalluru }; 1506c754246SSudarsana Reddy Kalluru 1516c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats { 1526c754246SSudarsana Reddy Kalluru u64 rx_pdus; 1536c754246SSudarsana Reddy Kalluru u64 tx_pdus; 1546c754246SSudarsana Reddy Kalluru u64 rx_bytes; 1556c754246SSudarsana Reddy Kalluru u64 tx_bytes; 1566c754246SSudarsana Reddy Kalluru }; 1576c754246SSudarsana Reddy Kalluru 1586c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats { 1596c754246SSudarsana Reddy Kalluru u64 rx_pkts; 1606c754246SSudarsana Reddy Kalluru u64 tx_pkts; 1616c754246SSudarsana Reddy Kalluru u64 rx_bytes; 1626c754246SSudarsana Reddy Kalluru u64 tx_byts; 1636c754246SSudarsana Reddy Kalluru }; 1646c754246SSudarsana Reddy Kalluru 1656c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type { 1666c754246SSudarsana Reddy Kalluru QED_MCP_LAN_STATS, 1676c754246SSudarsana Reddy Kalluru QED_MCP_FCOE_STATS, 1686c754246SSudarsana Reddy Kalluru QED_MCP_ISCSI_STATS, 1696c754246SSudarsana Reddy Kalluru QED_MCP_RDMA_STATS 1706c754246SSudarsana Reddy Kalluru }; 1716c754246SSudarsana Reddy Kalluru 1726c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats { 1736c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats lan_stats; 1746c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats fcoe_stats; 1756c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats iscsi_stats; 1766c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats rdma_stats; 1776c754246SSudarsana Reddy Kalluru }; 1786c754246SSudarsana Reddy Kalluru 1790fefbfbaSSudarsana Kalluru enum qed_ov_eswitch { 1800fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_NONE, 1810fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_VEB, 1820fefbfbaSSudarsana Kalluru QED_OV_ESWITCH_VEPA 1830fefbfbaSSudarsana Kalluru }; 1840fefbfbaSSudarsana Kalluru 1850fefbfbaSSudarsana Kalluru enum qed_ov_client { 1860fefbfbaSSudarsana Kalluru QED_OV_CLIENT_DRV, 1870fefbfbaSSudarsana Kalluru QED_OV_CLIENT_USER, 1880fefbfbaSSudarsana Kalluru QED_OV_CLIENT_VENDOR_SPEC 1890fefbfbaSSudarsana Kalluru }; 1900fefbfbaSSudarsana Kalluru 1910fefbfbaSSudarsana Kalluru enum qed_ov_driver_state { 1920fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_NOT_LOADED, 1930fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_DISABLED, 1940fefbfbaSSudarsana Kalluru QED_OV_DRIVER_STATE_ACTIVE 1950fefbfbaSSudarsana Kalluru }; 1960fefbfbaSSudarsana Kalluru 1970fefbfbaSSudarsana Kalluru enum qed_ov_wol { 1980fefbfbaSSudarsana Kalluru QED_OV_WOL_DEFAULT, 1990fefbfbaSSudarsana Kalluru QED_OV_WOL_DISABLED, 2000fefbfbaSSudarsana Kalluru QED_OV_WOL_ENABLED 2010fefbfbaSSudarsana Kalluru }; 2020fefbfbaSSudarsana Kalluru 203fe56b9e6SYuval Mintz /** 204cc875c2eSYuval Mintz * @brief - returns the link params of the hw function 205cc875c2eSYuval Mintz * 206cc875c2eSYuval Mintz * @param p_hwfn 207cc875c2eSYuval Mintz * 208cc875c2eSYuval Mintz * @returns pointer to link params 209cc875c2eSYuval Mintz */ 210cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 211cc875c2eSYuval Mintz 212cc875c2eSYuval Mintz /** 213cc875c2eSYuval Mintz * @brief - return the link state of the hw function 214cc875c2eSYuval Mintz * 215cc875c2eSYuval Mintz * @param p_hwfn 216cc875c2eSYuval Mintz * 217cc875c2eSYuval Mintz * @returns pointer to link state 218cc875c2eSYuval Mintz */ 219cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 220cc875c2eSYuval Mintz 221cc875c2eSYuval Mintz /** 222cc875c2eSYuval Mintz * @brief - return the link capabilities of the hw function 223cc875c2eSYuval Mintz * 224cc875c2eSYuval Mintz * @param p_hwfn 225cc875c2eSYuval Mintz * 226cc875c2eSYuval Mintz * @returns pointer to link capabilities 227cc875c2eSYuval Mintz */ 228cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 229cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 230cc875c2eSYuval Mintz 231cc875c2eSYuval Mintz /** 232cc875c2eSYuval Mintz * @brief Request the MFW to set the the link according to 'link_input'. 233cc875c2eSYuval Mintz * 234cc875c2eSYuval Mintz * @param p_hwfn 235cc875c2eSYuval Mintz * @param p_ptt 236cc875c2eSYuval Mintz * @param b_up - raise link if `true'. Reset link if `false'. 237cc875c2eSYuval Mintz * 238cc875c2eSYuval Mintz * @return int 239cc875c2eSYuval Mintz */ 240cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 241cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 242cc875c2eSYuval Mintz bool b_up); 243cc875c2eSYuval Mintz 244cc875c2eSYuval Mintz /** 245fe56b9e6SYuval Mintz * @brief Get the management firmware version value 246fe56b9e6SYuval Mintz * 2471408cc1fSYuval Mintz * @param p_hwfn 2481408cc1fSYuval Mintz * @param p_ptt 2491408cc1fSYuval Mintz * @param p_mfw_ver - mfw version value 2501408cc1fSYuval Mintz * @param p_running_bundle_id - image id in nvram; Optional. 251fe56b9e6SYuval Mintz * 2521408cc1fSYuval Mintz * @return int - 0 - operation was successful. 253fe56b9e6SYuval Mintz */ 2541408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 2551408cc1fSYuval Mintz struct qed_ptt *p_ptt, 2561408cc1fSYuval Mintz u32 *p_mfw_ver, u32 *p_running_bundle_id); 257fe56b9e6SYuval Mintz 258fe56b9e6SYuval Mintz /** 259ae33666aSTomer Tayar * @brief Get the MBI version value 260ae33666aSTomer Tayar * 261ae33666aSTomer Tayar * @param p_hwfn 262ae33666aSTomer Tayar * @param p_ptt 263ae33666aSTomer Tayar * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 264ae33666aSTomer Tayar * 265ae33666aSTomer Tayar * @return int - 0 - operation was successful. 266ae33666aSTomer Tayar */ 267ae33666aSTomer Tayar int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 268ae33666aSTomer Tayar struct qed_ptt *p_ptt, u32 *p_mbi_ver); 269ae33666aSTomer Tayar 270ae33666aSTomer Tayar /** 271cc875c2eSYuval Mintz * @brief Get media type value of the port. 272cc875c2eSYuval Mintz * 273cc875c2eSYuval Mintz * @param cdev - qed dev pointer 274cc875c2eSYuval Mintz * @param mfw_ver - media type value 275cc875c2eSYuval Mintz * 276cc875c2eSYuval Mintz * @return int - 277cc875c2eSYuval Mintz * 0 - Operation was successul. 278cc875c2eSYuval Mintz * -EBUSY - Operation failed 279cc875c2eSYuval Mintz */ 280cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev *cdev, 281cc875c2eSYuval Mintz u32 *media_type); 282cc875c2eSYuval Mintz 283cc875c2eSYuval Mintz /** 284fe56b9e6SYuval Mintz * @brief General function for sending commands to the MCP 285fe56b9e6SYuval Mintz * mailbox. It acquire mutex lock for the entire 286fe56b9e6SYuval Mintz * operation, from sending the request until the MCP 287fe56b9e6SYuval Mintz * response. Waiting for MCP response will be checked up 288fe56b9e6SYuval Mintz * to 5 seconds every 5ms. 289fe56b9e6SYuval Mintz * 290fe56b9e6SYuval Mintz * @param p_hwfn - hw function 291fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 292fe56b9e6SYuval Mintz * @param cmd - command to be sent to the MCP. 293fe56b9e6SYuval Mintz * @param param - Optional param 294fe56b9e6SYuval Mintz * @param o_mcp_resp - The MCP response code (exclude sequence). 295fe56b9e6SYuval Mintz * @param o_mcp_param- Optional parameter provided by the MCP 296fe56b9e6SYuval Mintz * response 297fe56b9e6SYuval Mintz * @return int - 0 - operation 298fe56b9e6SYuval Mintz * was successul. 299fe56b9e6SYuval Mintz */ 300fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 301fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 302fe56b9e6SYuval Mintz u32 cmd, 303fe56b9e6SYuval Mintz u32 param, 304fe56b9e6SYuval Mintz u32 *o_mcp_resp, 305fe56b9e6SYuval Mintz u32 *o_mcp_param); 306fe56b9e6SYuval Mintz 307fe56b9e6SYuval Mintz /** 308fe56b9e6SYuval Mintz * @brief - drains the nig, allowing completion to pass in case of pauses. 309fe56b9e6SYuval Mintz * (Should be called only from sleepable context) 310fe56b9e6SYuval Mintz * 311fe56b9e6SYuval Mintz * @param p_hwfn 312fe56b9e6SYuval Mintz * @param p_ptt 313fe56b9e6SYuval Mintz */ 314fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, 315fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 316fe56b9e6SYuval Mintz 317fe56b9e6SYuval Mintz /** 318cee4d264SManish Chopra * @brief Get the flash size value 319cee4d264SManish Chopra * 320cee4d264SManish Chopra * @param p_hwfn 321cee4d264SManish Chopra * @param p_ptt 322cee4d264SManish Chopra * @param p_flash_size - flash size in bytes to be filled. 323cee4d264SManish Chopra * 324cee4d264SManish Chopra * @return int - 0 - operation was successul. 325cee4d264SManish Chopra */ 326cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 327cee4d264SManish Chopra struct qed_ptt *p_ptt, 328cee4d264SManish Chopra u32 *p_flash_size); 329cee4d264SManish Chopra 330cee4d264SManish Chopra /** 331fe56b9e6SYuval Mintz * @brief Send driver version to MFW 332fe56b9e6SYuval Mintz * 333fe56b9e6SYuval Mintz * @param p_hwfn 334fe56b9e6SYuval Mintz * @param p_ptt 335fe56b9e6SYuval Mintz * @param version - Version value 336fe56b9e6SYuval Mintz * @param name - Protocol driver name 337fe56b9e6SYuval Mintz * 338fe56b9e6SYuval Mintz * @return int - 0 - operation was successul. 339fe56b9e6SYuval Mintz */ 340fe56b9e6SYuval Mintz int 341fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 342fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 343fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver); 344fe56b9e6SYuval Mintz 34591420b83SSudarsana Kalluru /** 3460fefbfbaSSudarsana Kalluru * @brief Notify MFW about the change in base device properties 3470fefbfbaSSudarsana Kalluru * 3480fefbfbaSSudarsana Kalluru * @param p_hwfn 3490fefbfbaSSudarsana Kalluru * @param p_ptt 3500fefbfbaSSudarsana Kalluru * @param client - qed client type 3510fefbfbaSSudarsana Kalluru * 3520fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 3530fefbfbaSSudarsana Kalluru */ 3540fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 3550fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 3560fefbfbaSSudarsana Kalluru enum qed_ov_client client); 3570fefbfbaSSudarsana Kalluru 3580fefbfbaSSudarsana Kalluru /** 3590fefbfbaSSudarsana Kalluru * @brief Notify MFW about the driver state 3600fefbfbaSSudarsana Kalluru * 3610fefbfbaSSudarsana Kalluru * @param p_hwfn 3620fefbfbaSSudarsana Kalluru * @param p_ptt 3630fefbfbaSSudarsana Kalluru * @param drv_state - Driver state 3640fefbfbaSSudarsana Kalluru * 3650fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 3660fefbfbaSSudarsana Kalluru */ 3670fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 3680fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 3690fefbfbaSSudarsana Kalluru enum qed_ov_driver_state drv_state); 3700fefbfbaSSudarsana Kalluru 3710fefbfbaSSudarsana Kalluru /** 3720fefbfbaSSudarsana Kalluru * @brief Send MTU size to MFW 3730fefbfbaSSudarsana Kalluru * 3740fefbfbaSSudarsana Kalluru * @param p_hwfn 3750fefbfbaSSudarsana Kalluru * @param p_ptt 3760fefbfbaSSudarsana Kalluru * @param mtu - MTU size 3770fefbfbaSSudarsana Kalluru * 3780fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 3790fefbfbaSSudarsana Kalluru */ 3800fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 3810fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, u16 mtu); 3820fefbfbaSSudarsana Kalluru 3830fefbfbaSSudarsana Kalluru /** 3840fefbfbaSSudarsana Kalluru * @brief Send MAC address to MFW 3850fefbfbaSSudarsana Kalluru * 3860fefbfbaSSudarsana Kalluru * @param p_hwfn 3870fefbfbaSSudarsana Kalluru * @param p_ptt 3880fefbfbaSSudarsana Kalluru * @param mac - MAC address 3890fefbfbaSSudarsana Kalluru * 3900fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 3910fefbfbaSSudarsana Kalluru */ 3920fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 3930fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, u8 *mac); 3940fefbfbaSSudarsana Kalluru 3950fefbfbaSSudarsana Kalluru /** 3960fefbfbaSSudarsana Kalluru * @brief Send WOL mode to MFW 3970fefbfbaSSudarsana Kalluru * 3980fefbfbaSSudarsana Kalluru * @param p_hwfn 3990fefbfbaSSudarsana Kalluru * @param p_ptt 4000fefbfbaSSudarsana Kalluru * @param wol - WOL mode 4010fefbfbaSSudarsana Kalluru * 4020fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 4030fefbfbaSSudarsana Kalluru */ 4040fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 4050fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 4060fefbfbaSSudarsana Kalluru enum qed_ov_wol wol); 4070fefbfbaSSudarsana Kalluru 4080fefbfbaSSudarsana Kalluru /** 40991420b83SSudarsana Kalluru * @brief Set LED status 41091420b83SSudarsana Kalluru * 41191420b83SSudarsana Kalluru * @param p_hwfn 41291420b83SSudarsana Kalluru * @param p_ptt 41391420b83SSudarsana Kalluru * @param mode - LED mode 41491420b83SSudarsana Kalluru * 41591420b83SSudarsana Kalluru * @return int - 0 - operation was successful. 41691420b83SSudarsana Kalluru */ 41791420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 41891420b83SSudarsana Kalluru struct qed_ptt *p_ptt, 41991420b83SSudarsana Kalluru enum qed_led_mode mode); 42091420b83SSudarsana Kalluru 42103dc76caSSudarsana Reddy Kalluru /** 4227a4b21b7SMintz, Yuval * @brief Read from nvm 4237a4b21b7SMintz, Yuval * 4247a4b21b7SMintz, Yuval * @param cdev 4257a4b21b7SMintz, Yuval * @param addr - nvm offset 4267a4b21b7SMintz, Yuval * @param p_buf - nvm read buffer 4277a4b21b7SMintz, Yuval * @param len - buffer len 4287a4b21b7SMintz, Yuval * 4297a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 4307a4b21b7SMintz, Yuval */ 4317a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 4327a4b21b7SMintz, Yuval 433*20675b37SMintz, Yuval struct qed_nvm_image_att { 434*20675b37SMintz, Yuval u32 start_addr; 435*20675b37SMintz, Yuval u32 length; 436*20675b37SMintz, Yuval }; 437*20675b37SMintz, Yuval 438*20675b37SMintz, Yuval /** 439*20675b37SMintz, Yuval * @brief Allows reading a whole nvram image 440*20675b37SMintz, Yuval * 441*20675b37SMintz, Yuval * @param p_hwfn 442*20675b37SMintz, Yuval * @param p_ptt 443*20675b37SMintz, Yuval * @param image_id - image requested for reading 444*20675b37SMintz, Yuval * @param p_buffer - allocated buffer into which to fill data 445*20675b37SMintz, Yuval * @param buffer_len - length of the allocated buffer. 446*20675b37SMintz, Yuval * 447*20675b37SMintz, Yuval * @return 0 iff p_buffer now contains the nvram image. 448*20675b37SMintz, Yuval */ 449*20675b37SMintz, Yuval int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 450*20675b37SMintz, Yuval struct qed_ptt *p_ptt, 451*20675b37SMintz, Yuval enum qed_nvm_images image_id, 452*20675b37SMintz, Yuval u8 *p_buffer, u32 buffer_len); 453*20675b37SMintz, Yuval 4547a4b21b7SMintz, Yuval /** 45503dc76caSSudarsana Reddy Kalluru * @brief Bist register test 45603dc76caSSudarsana Reddy Kalluru * 45703dc76caSSudarsana Reddy Kalluru * @param p_hwfn - hw function 45803dc76caSSudarsana Reddy Kalluru * @param p_ptt - PTT required for register access 45903dc76caSSudarsana Reddy Kalluru * 46003dc76caSSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 46103dc76caSSudarsana Reddy Kalluru */ 46203dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 46303dc76caSSudarsana Reddy Kalluru struct qed_ptt *p_ptt); 46403dc76caSSudarsana Reddy Kalluru 46503dc76caSSudarsana Reddy Kalluru /** 46603dc76caSSudarsana Reddy Kalluru * @brief Bist clock test 46703dc76caSSudarsana Reddy Kalluru * 46803dc76caSSudarsana Reddy Kalluru * @param p_hwfn - hw function 46903dc76caSSudarsana Reddy Kalluru * @param p_ptt - PTT required for register access 47003dc76caSSudarsana Reddy Kalluru * 47103dc76caSSudarsana Reddy Kalluru * @return int - 0 - operation was successful. 47203dc76caSSudarsana Reddy Kalluru */ 47303dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 47403dc76caSSudarsana Reddy Kalluru struct qed_ptt *p_ptt); 47503dc76caSSudarsana Reddy Kalluru 4767a4b21b7SMintz, Yuval /** 4777a4b21b7SMintz, Yuval * @brief Bist nvm test - get number of images 4787a4b21b7SMintz, Yuval * 4797a4b21b7SMintz, Yuval * @param p_hwfn - hw function 4807a4b21b7SMintz, Yuval * @param p_ptt - PTT required for register access 4817a4b21b7SMintz, Yuval * @param num_images - number of images if operation was 4827a4b21b7SMintz, Yuval * successful. 0 if not. 4837a4b21b7SMintz, Yuval * 4847a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 4857a4b21b7SMintz, Yuval */ 4867a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn, 4877a4b21b7SMintz, Yuval struct qed_ptt *p_ptt, 4887a4b21b7SMintz, Yuval u32 *num_images); 4897a4b21b7SMintz, Yuval 4907a4b21b7SMintz, Yuval /** 4917a4b21b7SMintz, Yuval * @brief Bist nvm test - get image attributes by index 4927a4b21b7SMintz, Yuval * 4937a4b21b7SMintz, Yuval * @param p_hwfn - hw function 4947a4b21b7SMintz, Yuval * @param p_ptt - PTT required for register access 4957a4b21b7SMintz, Yuval * @param p_image_att - Attributes of image 4967a4b21b7SMintz, Yuval * @param image_index - Index of image to get information for 4977a4b21b7SMintz, Yuval * 4987a4b21b7SMintz, Yuval * @return int - 0 - operation was successful. 4997a4b21b7SMintz, Yuval */ 5007a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn, 5017a4b21b7SMintz, Yuval struct qed_ptt *p_ptt, 5027a4b21b7SMintz, Yuval struct bist_nvm_image_att *p_image_att, 5037a4b21b7SMintz, Yuval u32 image_index); 5047a4b21b7SMintz, Yuval 505fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode, 506fe56b9e6SYuval Mintz * same pf_num may be used by two different hwfn 507fe56b9e6SYuval Mintz * TODO - this shouldn't really be in .h file, but until all fields 508fe56b9e6SYuval Mintz * required during hw-init will be placed in their correct place in shmem 509fe56b9e6SYuval Mintz * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 510fe56b9e6SYuval Mintz */ 511fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 512fe56b9e6SYuval Mintz ((rel_pfid) | \ 513fe56b9e6SYuval Mintz ((p_hwfn)->abs_pf_id & 1) << 3) : \ 514fe56b9e6SYuval Mintz rel_pfid) 515fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 516fe56b9e6SYuval Mintz 517fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \ 51878cea9ffSTomer Tayar ((_p_hwfn)->cdev->num_ports_in_engine * \ 5199c79ddaaSMintz, Yuval qed_device_num_engines((_p_hwfn)->cdev))) 5209c79ddaaSMintz, Yuval 521fe56b9e6SYuval Mintz struct qed_mcp_info { 5224ed1eea8STomer Tayar /* List for mailbox commands which were sent and wait for a response */ 5234ed1eea8STomer Tayar struct list_head cmd_list; 5244ed1eea8STomer Tayar 5254ed1eea8STomer Tayar /* Spinlock used for protecting the access to the mailbox commands list 5264ed1eea8STomer Tayar * and the sending of the commands. 5274ed1eea8STomer Tayar */ 5284ed1eea8STomer Tayar spinlock_t cmd_lock; 52965ed2ffdSMintz, Yuval 53065ed2ffdSMintz, Yuval /* Spinlock used for syncing SW link-changes and link-changes 53165ed2ffdSMintz, Yuval * originating from attention context. 53265ed2ffdSMintz, Yuval */ 53365ed2ffdSMintz, Yuval spinlock_t link_lock; 5345529bad9STomer Tayar bool block_mb_sending; 535fe56b9e6SYuval Mintz u32 public_base; 536fe56b9e6SYuval Mintz u32 drv_mb_addr; 537fe56b9e6SYuval Mintz u32 mfw_mb_addr; 538fe56b9e6SYuval Mintz u32 port_addr; 539fe56b9e6SYuval Mintz u16 drv_mb_seq; 540fe56b9e6SYuval Mintz u16 drv_pulse_seq; 541cc875c2eSYuval Mintz struct qed_mcp_link_params link_input; 542cc875c2eSYuval Mintz struct qed_mcp_link_state link_output; 543cc875c2eSYuval Mintz struct qed_mcp_link_capabilities link_capabilities; 544fe56b9e6SYuval Mintz struct qed_mcp_function_info func_info; 545fe56b9e6SYuval Mintz u8 *mfw_mb_cur; 546fe56b9e6SYuval Mintz u8 *mfw_mb_shadow; 547fe56b9e6SYuval Mintz u16 mfw_mb_length; 5484ed1eea8STomer Tayar u32 mcp_hist; 549fe56b9e6SYuval Mintz }; 550fe56b9e6SYuval Mintz 5515529bad9STomer Tayar struct qed_mcp_mb_params { 5525529bad9STomer Tayar u32 cmd; 5535529bad9STomer Tayar u32 param; 5542f67af8cSTomer Tayar void *p_data_src; 5552f67af8cSTomer Tayar u8 data_src_size; 5562f67af8cSTomer Tayar void *p_data_dst; 5572f67af8cSTomer Tayar u8 data_dst_size; 5585529bad9STomer Tayar u32 mcp_resp; 5595529bad9STomer Tayar u32 mcp_param; 5605529bad9STomer Tayar }; 5615529bad9STomer Tayar 562fe56b9e6SYuval Mintz /** 563fe56b9e6SYuval Mintz * @brief Initialize the interface with the MCP 564fe56b9e6SYuval Mintz * 565fe56b9e6SYuval Mintz * @param p_hwfn - HW func 566fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 567fe56b9e6SYuval Mintz * 568fe56b9e6SYuval Mintz * @return int 569fe56b9e6SYuval Mintz */ 570fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 571fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 572fe56b9e6SYuval Mintz 573fe56b9e6SYuval Mintz /** 574fe56b9e6SYuval Mintz * @brief Initialize the port interface with the MCP 575fe56b9e6SYuval Mintz * 576fe56b9e6SYuval Mintz * @param p_hwfn 577fe56b9e6SYuval Mintz * @param p_ptt 578fe56b9e6SYuval Mintz * Can only be called after `num_ports_in_engines' is set 579fe56b9e6SYuval Mintz */ 580fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 581fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 582fe56b9e6SYuval Mintz /** 583fe56b9e6SYuval Mintz * @brief Releases resources allocated during the init process. 584fe56b9e6SYuval Mintz * 585fe56b9e6SYuval Mintz * @param p_hwfn - HW func 586fe56b9e6SYuval Mintz * @param p_ptt - PTT required for register access 587fe56b9e6SYuval Mintz * 588fe56b9e6SYuval Mintz * @return int 589fe56b9e6SYuval Mintz */ 590fe56b9e6SYuval Mintz 591fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn); 592fe56b9e6SYuval Mintz 593fe56b9e6SYuval Mintz /** 594cc875c2eSYuval Mintz * @brief This function is called from the DPC context. After 595cc875c2eSYuval Mintz * pointing PTT to the mfw mb, check for events sent by the MCP 596cc875c2eSYuval Mintz * to the driver and ack them. In case a critical event 597cc875c2eSYuval Mintz * detected, it will be handled here, otherwise the work will be 598cc875c2eSYuval Mintz * queued to a sleepable work-queue. 599cc875c2eSYuval Mintz * 600cc875c2eSYuval Mintz * @param p_hwfn - HW function 601cc875c2eSYuval Mintz * @param p_ptt - PTT required for register access 602cc875c2eSYuval Mintz * @return int - 0 - operation 603cc875c2eSYuval Mintz * was successul. 604cc875c2eSYuval Mintz */ 605cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 606cc875c2eSYuval Mintz struct qed_ptt *p_ptt); 607cc875c2eSYuval Mintz 6085d24bcf1STomer Tayar enum qed_drv_role { 6095d24bcf1STomer Tayar QED_DRV_ROLE_OS, 6105d24bcf1STomer Tayar QED_DRV_ROLE_KDUMP, 6115d24bcf1STomer Tayar }; 6125d24bcf1STomer Tayar 6135d24bcf1STomer Tayar struct qed_load_req_params { 6145d24bcf1STomer Tayar /* Input params */ 6155d24bcf1STomer Tayar enum qed_drv_role drv_role; 6165d24bcf1STomer Tayar u8 timeout_val; 6175d24bcf1STomer Tayar bool avoid_eng_reset; 6185d24bcf1STomer Tayar enum qed_override_force_load override_force_load; 6195d24bcf1STomer Tayar 6205d24bcf1STomer Tayar /* Output params */ 6215d24bcf1STomer Tayar u32 load_code; 6225d24bcf1STomer Tayar }; 6235d24bcf1STomer Tayar 624cc875c2eSYuval Mintz /** 6255d24bcf1STomer Tayar * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 6265d24bcf1STomer Tayar * returns whether this PF is the first on the engine/port or function. 627fe56b9e6SYuval Mintz * 6285d24bcf1STomer Tayar * @param p_hwfn 6295d24bcf1STomer Tayar * @param p_ptt 6305d24bcf1STomer Tayar * @param p_params 6315d24bcf1STomer Tayar * 6325d24bcf1STomer Tayar * @return int - 0 - Operation was successful. 633fe56b9e6SYuval Mintz */ 634fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 635fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 6365d24bcf1STomer Tayar struct qed_load_req_params *p_params); 637fe56b9e6SYuval Mintz 638fe56b9e6SYuval Mintz /** 6391226337aSTomer Tayar * @brief Sends a UNLOAD_REQ message to the MFW 6401226337aSTomer Tayar * 6411226337aSTomer Tayar * @param p_hwfn 6421226337aSTomer Tayar * @param p_ptt 6431226337aSTomer Tayar * 6441226337aSTomer Tayar * @return int - 0 - Operation was successful. 6451226337aSTomer Tayar */ 6461226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 6471226337aSTomer Tayar 6481226337aSTomer Tayar /** 6491226337aSTomer Tayar * @brief Sends a UNLOAD_DONE message to the MFW 6501226337aSTomer Tayar * 6511226337aSTomer Tayar * @param p_hwfn 6521226337aSTomer Tayar * @param p_ptt 6531226337aSTomer Tayar * 6541226337aSTomer Tayar * @return int - 0 - Operation was successful. 6551226337aSTomer Tayar */ 6561226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 6571226337aSTomer Tayar 6581226337aSTomer Tayar /** 659fe56b9e6SYuval Mintz * @brief Read the MFW mailbox into Current buffer. 660fe56b9e6SYuval Mintz * 661fe56b9e6SYuval Mintz * @param p_hwfn 662fe56b9e6SYuval Mintz * @param p_ptt 663fe56b9e6SYuval Mintz */ 664fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 665fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 666fe56b9e6SYuval Mintz 667fe56b9e6SYuval Mintz /** 6680b55e27dSYuval Mintz * @brief Ack to mfw that driver finished FLR process for VFs 6690b55e27dSYuval Mintz * 6700b55e27dSYuval Mintz * @param p_hwfn 6710b55e27dSYuval Mintz * @param p_ptt 6720b55e27dSYuval Mintz * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 6730b55e27dSYuval Mintz * 6740b55e27dSYuval Mintz * @param return int - 0 upon success. 6750b55e27dSYuval Mintz */ 6760b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 6770b55e27dSYuval Mintz struct qed_ptt *p_ptt, u32 *vfs_to_ack); 6780b55e27dSYuval Mintz 6790b55e27dSYuval Mintz /** 680fe56b9e6SYuval Mintz * @brief - calls during init to read shmem of all function-related info. 681fe56b9e6SYuval Mintz * 682fe56b9e6SYuval Mintz * @param p_hwfn 683fe56b9e6SYuval Mintz * 684fe56b9e6SYuval Mintz * @param return 0 upon success. 685fe56b9e6SYuval Mintz */ 686fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 687fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 688fe56b9e6SYuval Mintz 689fe56b9e6SYuval Mintz /** 690fe56b9e6SYuval Mintz * @brief - Reset the MCP using mailbox command. 691fe56b9e6SYuval Mintz * 692fe56b9e6SYuval Mintz * @param p_hwfn 693fe56b9e6SYuval Mintz * @param p_ptt 694fe56b9e6SYuval Mintz * 695fe56b9e6SYuval Mintz * @param return 0 upon success. 696fe56b9e6SYuval Mintz */ 697fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, 698fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 699fe56b9e6SYuval Mintz 700fe56b9e6SYuval Mintz /** 7014102426fSTomer Tayar * @brief - Sends an NVM read command request to the MFW to get 7024102426fSTomer Tayar * a buffer. 7034102426fSTomer Tayar * 7044102426fSTomer Tayar * @param p_hwfn 7054102426fSTomer Tayar * @param p_ptt 7064102426fSTomer Tayar * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 7074102426fSTomer Tayar * DRV_MSG_CODE_NVM_READ_NVRAM commands 7084102426fSTomer Tayar * @param param - [0:23] - Offset [24:31] - Size 7094102426fSTomer Tayar * @param o_mcp_resp - MCP response 7104102426fSTomer Tayar * @param o_mcp_param - MCP response param 7114102426fSTomer Tayar * @param o_txn_size - Buffer size output 7124102426fSTomer Tayar * @param o_buf - Pointer to the buffer returned by the MFW. 7134102426fSTomer Tayar * 7144102426fSTomer Tayar * @param return 0 upon success. 7154102426fSTomer Tayar */ 7164102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 7174102426fSTomer Tayar struct qed_ptt *p_ptt, 7184102426fSTomer Tayar u32 cmd, 7194102426fSTomer Tayar u32 param, 7204102426fSTomer Tayar u32 *o_mcp_resp, 7214102426fSTomer Tayar u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 7224102426fSTomer Tayar 7234102426fSTomer Tayar /** 724fe56b9e6SYuval Mintz * @brief indicates whether the MFW objects [under mcp_info] are accessible 725fe56b9e6SYuval Mintz * 726fe56b9e6SYuval Mintz * @param p_hwfn 727fe56b9e6SYuval Mintz * 728fe56b9e6SYuval Mintz * @return true iff MFW is running and mcp_info is initialized 729fe56b9e6SYuval Mintz */ 730fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 7311408cc1fSYuval Mintz 7321408cc1fSYuval Mintz /** 7331408cc1fSYuval Mintz * @brief request MFW to configure MSI-X for a VF 7341408cc1fSYuval Mintz * 7351408cc1fSYuval Mintz * @param p_hwfn 7361408cc1fSYuval Mintz * @param p_ptt 7371408cc1fSYuval Mintz * @param vf_id - absolute inside engine 7381408cc1fSYuval Mintz * @param num_sbs - number of entries to request 7391408cc1fSYuval Mintz * 7401408cc1fSYuval Mintz * @return int 7411408cc1fSYuval Mintz */ 7421408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 7431408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 vf_id, u8 num); 7441408cc1fSYuval Mintz 7454102426fSTomer Tayar /** 7464102426fSTomer Tayar * @brief - Halt the MCP. 7474102426fSTomer Tayar * 7484102426fSTomer Tayar * @param p_hwfn 7494102426fSTomer Tayar * @param p_ptt 7504102426fSTomer Tayar * 7514102426fSTomer Tayar * @param return 0 upon success. 7524102426fSTomer Tayar */ 7534102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 7544102426fSTomer Tayar 7554102426fSTomer Tayar /** 7564102426fSTomer Tayar * @brief - Wake up the MCP. 7574102426fSTomer Tayar * 7584102426fSTomer Tayar * @param p_hwfn 7594102426fSTomer Tayar * @param p_ptt 7604102426fSTomer Tayar * 7614102426fSTomer Tayar * @param return 0 upon success. 7624102426fSTomer Tayar */ 7634102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 7644102426fSTomer Tayar 765a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 7664b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 7674b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 7684b01e519SManish Chopra struct qed_ptt *p_ptt, 7694b01e519SManish Chopra struct qed_mcp_link_state *p_link, 7704b01e519SManish Chopra u8 max_bw); 771a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 772a64b02d5SManish Chopra struct qed_ptt *p_ptt, 773a64b02d5SManish Chopra struct qed_mcp_link_state *p_link, 774a64b02d5SManish Chopra u8 min_bw); 775351a4dedSYuval Mintz 7764102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 7774102426fSTomer Tayar struct qed_ptt *p_ptt, u32 mask_parities); 7784102426fSTomer Tayar 7790fefbfbaSSudarsana Kalluru /** 7809c8517c4STomer Tayar * @brief - Sets the MFW's max value for the given resource 7819c8517c4STomer Tayar * 7829c8517c4STomer Tayar * @param p_hwfn 7839c8517c4STomer Tayar * @param p_ptt 7849c8517c4STomer Tayar * @param res_id 7859c8517c4STomer Tayar * @param resc_max_val 7869c8517c4STomer Tayar * @param p_mcp_resp 7879c8517c4STomer Tayar * 7889c8517c4STomer Tayar * @return int - 0 - operation was successful. 7899c8517c4STomer Tayar */ 7909c8517c4STomer Tayar int 7919c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 7929c8517c4STomer Tayar struct qed_ptt *p_ptt, 7939c8517c4STomer Tayar enum qed_resources res_id, 7949c8517c4STomer Tayar u32 resc_max_val, u32 *p_mcp_resp); 7959c8517c4STomer Tayar 7969c8517c4STomer Tayar /** 7979c8517c4STomer Tayar * @brief - Gets the MFW allocation info for the given resource 7989c8517c4STomer Tayar * 7999c8517c4STomer Tayar * @param p_hwfn 8009c8517c4STomer Tayar * @param p_ptt 8019c8517c4STomer Tayar * @param res_id 8029c8517c4STomer Tayar * @param p_mcp_resp 8039c8517c4STomer Tayar * @param p_resc_num 8049c8517c4STomer Tayar * @param p_resc_start 8059c8517c4STomer Tayar * 8069c8517c4STomer Tayar * @return int - 0 - operation was successful. 8079c8517c4STomer Tayar */ 8089c8517c4STomer Tayar int 8099c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 8109c8517c4STomer Tayar struct qed_ptt *p_ptt, 8119c8517c4STomer Tayar enum qed_resources res_id, 8129c8517c4STomer Tayar u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 8139c8517c4STomer Tayar 8149c8517c4STomer Tayar /** 8150fefbfbaSSudarsana Kalluru * @brief Send eswitch mode to MFW 8160fefbfbaSSudarsana Kalluru * 8170fefbfbaSSudarsana Kalluru * @param p_hwfn 8180fefbfbaSSudarsana Kalluru * @param p_ptt 8190fefbfbaSSudarsana Kalluru * @param eswitch - eswitch mode 8200fefbfbaSSudarsana Kalluru * 8210fefbfbaSSudarsana Kalluru * @return int - 0 - operation was successful. 8220fefbfbaSSudarsana Kalluru */ 8230fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 8240fefbfbaSSudarsana Kalluru struct qed_ptt *p_ptt, 8250fefbfbaSSudarsana Kalluru enum qed_ov_eswitch eswitch); 8260fefbfbaSSudarsana Kalluru 8279c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 8289c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL 31 8299c8517c4STomer Tayar 8309c8517c4STomer Tayar enum qed_resc_lock { 8319c8517c4STomer Tayar QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 832db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT0, 833db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT1, 834db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT2, 835db82f70eSsudarsana.kalluru@cavium.com QED_RESC_LOCK_PTP_PORT3, 836f470f22cSsudarsana.kalluru@cavium.com QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 837f470f22cSsudarsana.kalluru@cavium.com QED_RESC_LOCK_RESC_INVALID 8389c8517c4STomer Tayar }; 83918a69e36SMintz, Yuval 84018a69e36SMintz, Yuval /** 84118a69e36SMintz, Yuval * @brief - Initiates PF FLR 84218a69e36SMintz, Yuval * 84318a69e36SMintz, Yuval * @param p_hwfn 84418a69e36SMintz, Yuval * @param p_ptt 84518a69e36SMintz, Yuval * 84618a69e36SMintz, Yuval * @return int - 0 - operation was successful. 84718a69e36SMintz, Yuval */ 84818a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 84995691c9cSTomer Tayar struct qed_resc_lock_params { 85095691c9cSTomer Tayar /* Resource number [valid values are 0..31] */ 85195691c9cSTomer Tayar u8 resource; 85295691c9cSTomer Tayar 85395691c9cSTomer Tayar /* Lock timeout value in seconds [default, none or 1..254] */ 85495691c9cSTomer Tayar u8 timeout; 85595691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 85695691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE 255 85795691c9cSTomer Tayar 85895691c9cSTomer Tayar /* Number of times to retry locking */ 85995691c9cSTomer Tayar u8 retry_num; 860f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 86195691c9cSTomer Tayar 86295691c9cSTomer Tayar /* The interval in usec between retries */ 86395691c9cSTomer Tayar u16 retry_interval; 864f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 86595691c9cSTomer Tayar 86695691c9cSTomer Tayar /* Use sleep or delay between retries */ 86795691c9cSTomer Tayar bool sleep_b4_retry; 86895691c9cSTomer Tayar 86995691c9cSTomer Tayar /* Will be set as true if the resource is free and granted */ 87095691c9cSTomer Tayar bool b_granted; 87195691c9cSTomer Tayar 87295691c9cSTomer Tayar /* Will be filled with the resource owner. 87395691c9cSTomer Tayar * [0..15 = PF0-15, 16 = MFW] 87495691c9cSTomer Tayar */ 87595691c9cSTomer Tayar u8 owner; 87695691c9cSTomer Tayar }; 87795691c9cSTomer Tayar 87895691c9cSTomer Tayar /** 87995691c9cSTomer Tayar * @brief Acquires MFW generic resource lock 88095691c9cSTomer Tayar * 88195691c9cSTomer Tayar * @param p_hwfn 88295691c9cSTomer Tayar * @param p_ptt 88395691c9cSTomer Tayar * @param p_params 88495691c9cSTomer Tayar * 88595691c9cSTomer Tayar * @return int - 0 - operation was successful. 88695691c9cSTomer Tayar */ 88795691c9cSTomer Tayar int 88895691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 88995691c9cSTomer Tayar struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 89095691c9cSTomer Tayar 89195691c9cSTomer Tayar struct qed_resc_unlock_params { 89295691c9cSTomer Tayar /* Resource number [valid values are 0..31] */ 89395691c9cSTomer Tayar u8 resource; 89495691c9cSTomer Tayar 89595691c9cSTomer Tayar /* Allow to release a resource even if belongs to another PF */ 89695691c9cSTomer Tayar bool b_force; 89795691c9cSTomer Tayar 89895691c9cSTomer Tayar /* Will be set as true if the resource is released */ 89995691c9cSTomer Tayar bool b_released; 90095691c9cSTomer Tayar }; 90195691c9cSTomer Tayar 90295691c9cSTomer Tayar /** 90395691c9cSTomer Tayar * @brief Releases MFW generic resource lock 90495691c9cSTomer Tayar * 90595691c9cSTomer Tayar * @param p_hwfn 90695691c9cSTomer Tayar * @param p_ptt 90795691c9cSTomer Tayar * @param p_params 90895691c9cSTomer Tayar * 90995691c9cSTomer Tayar * @return int - 0 - operation was successful. 91095691c9cSTomer Tayar */ 91195691c9cSTomer Tayar int 91295691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 91395691c9cSTomer Tayar struct qed_ptt *p_ptt, 91495691c9cSTomer Tayar struct qed_resc_unlock_params *p_params); 91595691c9cSTomer Tayar 916f470f22cSsudarsana.kalluru@cavium.com /** 917f470f22cSsudarsana.kalluru@cavium.com * @brief - default initialization for lock/unlock resource structs 918f470f22cSsudarsana.kalluru@cavium.com * 919f470f22cSsudarsana.kalluru@cavium.com * @param p_lock - lock params struct to be initialized; Can be NULL 920f470f22cSsudarsana.kalluru@cavium.com * @param p_unlock - unlock params struct to be initialized; Can be NULL 921f470f22cSsudarsana.kalluru@cavium.com * @param resource - the requested resource 922f470f22cSsudarsana.kalluru@cavium.com * @paral b_is_permanent - disable retries & aging when set 923f470f22cSsudarsana.kalluru@cavium.com */ 924f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 925f470f22cSsudarsana.kalluru@cavium.com struct qed_resc_unlock_params *p_unlock, 926f470f22cSsudarsana.kalluru@cavium.com enum qed_resc_lock 927f470f22cSsudarsana.kalluru@cavium.com resource, bool b_is_permanent); 928f470f22cSsudarsana.kalluru@cavium.com 929fe56b9e6SYuval Mintz #endif 930