xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 0fefbfbaad298162737d5418eb85065879f99b3e)
1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2fe56b9e6SYuval Mintz  * Copyright (c) 2015 QLogic Corporation
3fe56b9e6SYuval Mintz  *
4fe56b9e6SYuval Mintz  * This software is available under the terms of the GNU General Public License
5fe56b9e6SYuval Mintz  * (GPL) Version 2, available from the file COPYING in the main directory of
6fe56b9e6SYuval Mintz  * this source tree.
7fe56b9e6SYuval Mintz  */
8fe56b9e6SYuval Mintz 
9fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
10fe56b9e6SYuval Mintz #define _QED_MCP_H
11fe56b9e6SYuval Mintz 
12fe56b9e6SYuval Mintz #include <linux/types.h>
13fe56b9e6SYuval Mintz #include <linux/delay.h>
14fe56b9e6SYuval Mintz #include <linux/slab.h>
155529bad9STomer Tayar #include <linux/spinlock.h>
16fe56b9e6SYuval Mintz #include "qed_hsi.h"
17fe56b9e6SYuval Mintz 
18cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
19cc875c2eSYuval Mintz 	bool    autoneg;
20cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
21cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
22cc875c2eSYuval Mintz };
23cc875c2eSYuval Mintz 
24cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
25cc875c2eSYuval Mintz 	bool    autoneg;
26cc875c2eSYuval Mintz 	bool    forced_rx;
27cc875c2eSYuval Mintz 	bool    forced_tx;
28cc875c2eSYuval Mintz };
29cc875c2eSYuval Mintz 
30cc875c2eSYuval Mintz struct qed_mcp_link_params {
31cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
32cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
33cc875c2eSYuval Mintz 	u32				     loopback_mode;
34cc875c2eSYuval Mintz };
35cc875c2eSYuval Mintz 
36cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
37cc875c2eSYuval Mintz 	u32 speed_capabilities;
38cc875c2eSYuval Mintz };
39cc875c2eSYuval Mintz 
40cc875c2eSYuval Mintz struct qed_mcp_link_state {
41cc875c2eSYuval Mintz 	bool    link_up;
42cc875c2eSYuval Mintz 
43a64b02d5SManish Chopra 	u32	min_pf_rate;
44a64b02d5SManish Chopra 
454b01e519SManish Chopra 	/* Actual link speed in Mb/s */
464b01e519SManish Chopra 	u32	line_speed;
474b01e519SManish Chopra 
484b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
494b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
504b01e519SManish Chopra 	 */
514b01e519SManish Chopra 	u32     speed;
52cc875c2eSYuval Mintz 	bool    full_duplex;
53cc875c2eSYuval Mintz 
54cc875c2eSYuval Mintz 	bool    an;
55cc875c2eSYuval Mintz 	bool    an_complete;
56cc875c2eSYuval Mintz 	bool    parallel_detection;
57cc875c2eSYuval Mintz 	bool    pfc_enabled;
58cc875c2eSYuval Mintz 
59cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
60cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
61cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
62cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
63054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
64054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
65054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
66054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
67cc875c2eSYuval Mintz 	u32     partner_adv_speed;
68cc875c2eSYuval Mintz 
69cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
70cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
71cc875c2eSYuval Mintz 
72cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
73cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
74cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
75cc875c2eSYuval Mintz 	u8      partner_adv_pause;
76cc875c2eSYuval Mintz 
77cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
78cc875c2eSYuval Mintz };
79cc875c2eSYuval Mintz 
80fe56b9e6SYuval Mintz struct qed_mcp_function_info {
81fe56b9e6SYuval Mintz 	u8				pause_on_host;
82fe56b9e6SYuval Mintz 
83fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
84fe56b9e6SYuval Mintz 
85fe56b9e6SYuval Mintz 	u8				bandwidth_min;
86fe56b9e6SYuval Mintz 	u8				bandwidth_max;
87fe56b9e6SYuval Mintz 
88fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
89fe56b9e6SYuval Mintz 
90fe56b9e6SYuval Mintz 	u64				wwn_port;
91fe56b9e6SYuval Mintz 	u64				wwn_node;
92fe56b9e6SYuval Mintz 
93fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
94fe56b9e6SYuval Mintz 	u16				ovlan;
95*0fefbfbaSSudarsana Kalluru 
96*0fefbfbaSSudarsana Kalluru 	u16				mtu;
97fe56b9e6SYuval Mintz };
98fe56b9e6SYuval Mintz 
99fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
100fe56b9e6SYuval Mintz 	u32	offset;
101fe56b9e6SYuval Mintz 	u32	param;
102fe56b9e6SYuval Mintz 	u32	resp;
103fe56b9e6SYuval Mintz 	u32	cmd;
104fe56b9e6SYuval Mintz };
105fe56b9e6SYuval Mintz 
106fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
107fe56b9e6SYuval Mintz 	u32	version;
108fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
109fe56b9e6SYuval Mintz };
110fe56b9e6SYuval Mintz 
1116c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1126c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1136c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1146c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1156c754246SSudarsana Reddy Kalluru };
1166c754246SSudarsana Reddy Kalluru 
1176c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1186c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1196c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1206c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1216c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1226c754246SSudarsana Reddy Kalluru };
1236c754246SSudarsana Reddy Kalluru 
1246c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1256c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1266c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1276c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1286c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1296c754246SSudarsana Reddy Kalluru };
1306c754246SSudarsana Reddy Kalluru 
1316c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1326c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1336c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1346c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1356c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1366c754246SSudarsana Reddy Kalluru };
1376c754246SSudarsana Reddy Kalluru 
1386c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1396c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1406c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1416c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1426c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1436c754246SSudarsana Reddy Kalluru };
1446c754246SSudarsana Reddy Kalluru 
1456c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1466c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1476c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1486c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1496c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1506c754246SSudarsana Reddy Kalluru };
1516c754246SSudarsana Reddy Kalluru 
152*0fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
153*0fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
154*0fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
155*0fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
156*0fefbfbaSSudarsana Kalluru };
157*0fefbfbaSSudarsana Kalluru 
158*0fefbfbaSSudarsana Kalluru enum qed_ov_client {
159*0fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
160*0fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
161*0fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
162*0fefbfbaSSudarsana Kalluru };
163*0fefbfbaSSudarsana Kalluru 
164*0fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
165*0fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
166*0fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
167*0fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
168*0fefbfbaSSudarsana Kalluru };
169*0fefbfbaSSudarsana Kalluru 
170*0fefbfbaSSudarsana Kalluru enum qed_ov_wol {
171*0fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
172*0fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
173*0fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
174*0fefbfbaSSudarsana Kalluru };
175*0fefbfbaSSudarsana Kalluru 
176fe56b9e6SYuval Mintz /**
177cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
178cc875c2eSYuval Mintz  *
179cc875c2eSYuval Mintz  * @param p_hwfn
180cc875c2eSYuval Mintz  *
181cc875c2eSYuval Mintz  * @returns pointer to link params
182cc875c2eSYuval Mintz  */
183cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
184cc875c2eSYuval Mintz 
185cc875c2eSYuval Mintz /**
186cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
187cc875c2eSYuval Mintz  *
188cc875c2eSYuval Mintz  * @param p_hwfn
189cc875c2eSYuval Mintz  *
190cc875c2eSYuval Mintz  * @returns pointer to link state
191cc875c2eSYuval Mintz  */
192cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
193cc875c2eSYuval Mintz 
194cc875c2eSYuval Mintz /**
195cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
196cc875c2eSYuval Mintz  *
197cc875c2eSYuval Mintz  * @param p_hwfn
198cc875c2eSYuval Mintz  *
199cc875c2eSYuval Mintz  * @returns pointer to link capabilities
200cc875c2eSYuval Mintz  */
201cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
202cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
203cc875c2eSYuval Mintz 
204cc875c2eSYuval Mintz /**
205cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
206cc875c2eSYuval Mintz  *
207cc875c2eSYuval Mintz  * @param p_hwfn
208cc875c2eSYuval Mintz  * @param p_ptt
209cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
210cc875c2eSYuval Mintz  *
211cc875c2eSYuval Mintz  * @return int
212cc875c2eSYuval Mintz  */
213cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
214cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
215cc875c2eSYuval Mintz 		     bool               b_up);
216cc875c2eSYuval Mintz 
217cc875c2eSYuval Mintz /**
218fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
219fe56b9e6SYuval Mintz  *
2201408cc1fSYuval Mintz  * @param p_hwfn
2211408cc1fSYuval Mintz  * @param p_ptt
2221408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2231408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
224fe56b9e6SYuval Mintz  *
2251408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
226fe56b9e6SYuval Mintz  */
2271408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2281408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2291408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
230fe56b9e6SYuval Mintz 
231fe56b9e6SYuval Mintz /**
232cc875c2eSYuval Mintz  * @brief Get media type value of the port.
233cc875c2eSYuval Mintz  *
234cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
235cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
236cc875c2eSYuval Mintz  *
237cc875c2eSYuval Mintz  * @return int -
238cc875c2eSYuval Mintz  *      0 - Operation was successul.
239cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
240cc875c2eSYuval Mintz  */
241cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
242cc875c2eSYuval Mintz 			   u32                  *media_type);
243cc875c2eSYuval Mintz 
244cc875c2eSYuval Mintz /**
245fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
246fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
247fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
248fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
249fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
250fe56b9e6SYuval Mintz  *
251fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
252fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
253fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
254fe56b9e6SYuval Mintz  * @param param      - Optional param
255fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
256fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
257fe56b9e6SYuval Mintz  *                     response
258fe56b9e6SYuval Mintz  * @return int - 0 - operation
259fe56b9e6SYuval Mintz  * was successul.
260fe56b9e6SYuval Mintz  */
261fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
262fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
263fe56b9e6SYuval Mintz 		u32 cmd,
264fe56b9e6SYuval Mintz 		u32 param,
265fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
266fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
267fe56b9e6SYuval Mintz 
268fe56b9e6SYuval Mintz /**
269fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
270fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
271fe56b9e6SYuval Mintz  *
272fe56b9e6SYuval Mintz  * @param p_hwfn
273fe56b9e6SYuval Mintz  * @param p_ptt
274fe56b9e6SYuval Mintz  */
275fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
276fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
277fe56b9e6SYuval Mintz 
278fe56b9e6SYuval Mintz /**
279cee4d264SManish Chopra  * @brief Get the flash size value
280cee4d264SManish Chopra  *
281cee4d264SManish Chopra  * @param p_hwfn
282cee4d264SManish Chopra  * @param p_ptt
283cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
284cee4d264SManish Chopra  *
285cee4d264SManish Chopra  * @return int - 0 - operation was successul.
286cee4d264SManish Chopra  */
287cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
288cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
289cee4d264SManish Chopra 			   u32 *p_flash_size);
290cee4d264SManish Chopra 
291cee4d264SManish Chopra /**
292fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
293fe56b9e6SYuval Mintz  *
294fe56b9e6SYuval Mintz  * @param p_hwfn
295fe56b9e6SYuval Mintz  * @param p_ptt
296fe56b9e6SYuval Mintz  * @param version - Version value
297fe56b9e6SYuval Mintz  * @param name - Protocol driver name
298fe56b9e6SYuval Mintz  *
299fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
300fe56b9e6SYuval Mintz  */
301fe56b9e6SYuval Mintz int
302fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
303fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
304fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
305fe56b9e6SYuval Mintz 
30691420b83SSudarsana Kalluru /**
307*0fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
308*0fefbfbaSSudarsana Kalluru  *
309*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
310*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
311*0fefbfbaSSudarsana Kalluru  *  @param client - qed client type
312*0fefbfbaSSudarsana Kalluru  *
313*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
314*0fefbfbaSSudarsana Kalluru  */
315*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
316*0fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
317*0fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
318*0fefbfbaSSudarsana Kalluru 
319*0fefbfbaSSudarsana Kalluru /**
320*0fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
321*0fefbfbaSSudarsana Kalluru  *
322*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
323*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
324*0fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
325*0fefbfbaSSudarsana Kalluru  *
326*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
327*0fefbfbaSSudarsana Kalluru  */
328*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
329*0fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
330*0fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
331*0fefbfbaSSudarsana Kalluru 
332*0fefbfbaSSudarsana Kalluru /**
333*0fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
334*0fefbfbaSSudarsana Kalluru  *
335*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
336*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
337*0fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
338*0fefbfbaSSudarsana Kalluru  *
339*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
340*0fefbfbaSSudarsana Kalluru  */
341*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
342*0fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
343*0fefbfbaSSudarsana Kalluru 
344*0fefbfbaSSudarsana Kalluru /**
345*0fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
346*0fefbfbaSSudarsana Kalluru  *
347*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
348*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
349*0fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
350*0fefbfbaSSudarsana Kalluru  *
351*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
352*0fefbfbaSSudarsana Kalluru  */
353*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
354*0fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
355*0fefbfbaSSudarsana Kalluru 
356*0fefbfbaSSudarsana Kalluru /**
357*0fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
358*0fefbfbaSSudarsana Kalluru  *
359*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
360*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
361*0fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
362*0fefbfbaSSudarsana Kalluru  *
363*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
364*0fefbfbaSSudarsana Kalluru  */
365*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
366*0fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
367*0fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
368*0fefbfbaSSudarsana Kalluru 
369*0fefbfbaSSudarsana Kalluru /**
37091420b83SSudarsana Kalluru  * @brief Set LED status
37191420b83SSudarsana Kalluru  *
37291420b83SSudarsana Kalluru  *  @param p_hwfn
37391420b83SSudarsana Kalluru  *  @param p_ptt
37491420b83SSudarsana Kalluru  *  @param mode - LED mode
37591420b83SSudarsana Kalluru  *
37691420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
37791420b83SSudarsana Kalluru  */
37891420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
37991420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
38091420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
38191420b83SSudarsana Kalluru 
38203dc76caSSudarsana Reddy Kalluru /**
38303dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
38403dc76caSSudarsana Reddy Kalluru  *
38503dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
38603dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
38703dc76caSSudarsana Reddy Kalluru  *
38803dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
38903dc76caSSudarsana Reddy Kalluru  */
39003dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
39103dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
39203dc76caSSudarsana Reddy Kalluru 
39303dc76caSSudarsana Reddy Kalluru /**
39403dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
39503dc76caSSudarsana Reddy Kalluru  *
39603dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
39703dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
39803dc76caSSudarsana Reddy Kalluru  *
39903dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
40003dc76caSSudarsana Reddy Kalluru  */
40103dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
40203dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
40303dc76caSSudarsana Reddy Kalluru 
404fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
405fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
406fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
407fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
408fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
409fe56b9e6SYuval Mintz  */
410fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
411fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
412fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
413fe56b9e6SYuval Mintz 					    rel_pfid)
414fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
415fe56b9e6SYuval Mintz 
416fe56b9e6SYuval Mintz /* TODO - this is only correct as long as only BB is supported, and
417fe56b9e6SYuval Mintz  * no port-swapping is implemented; Afterwards we'll need to fix it.
418fe56b9e6SYuval Mintz  */
419fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %	\
420fe56b9e6SYuval Mintz 				 ((_p_hwfn)->cdev->num_ports_in_engines * 2))
421fe56b9e6SYuval Mintz struct qed_mcp_info {
4225529bad9STomer Tayar 	spinlock_t				lock;
4235529bad9STomer Tayar 	bool					block_mb_sending;
424fe56b9e6SYuval Mintz 	u32					public_base;
425fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
426fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
427fe56b9e6SYuval Mintz 	u32					port_addr;
428fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
429fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
430cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
431cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
432cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
433fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
434fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
435fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
436fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
437fe56b9e6SYuval Mintz 	u16					mcp_hist;
438fe56b9e6SYuval Mintz };
439fe56b9e6SYuval Mintz 
4405529bad9STomer Tayar struct qed_mcp_mb_params {
4415529bad9STomer Tayar 	u32			cmd;
4425529bad9STomer Tayar 	u32			param;
4435529bad9STomer Tayar 	union drv_union_data	*p_data_src;
4445529bad9STomer Tayar 	union drv_union_data	*p_data_dst;
4455529bad9STomer Tayar 	u32			mcp_resp;
4465529bad9STomer Tayar 	u32			mcp_param;
4475529bad9STomer Tayar };
4485529bad9STomer Tayar 
449fe56b9e6SYuval Mintz /**
450fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
451fe56b9e6SYuval Mintz  *
452fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
453fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
454fe56b9e6SYuval Mintz  *
455fe56b9e6SYuval Mintz  * @return int
456fe56b9e6SYuval Mintz  */
457fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
458fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
459fe56b9e6SYuval Mintz 
460fe56b9e6SYuval Mintz /**
461fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
462fe56b9e6SYuval Mintz  *
463fe56b9e6SYuval Mintz  * @param p_hwfn
464fe56b9e6SYuval Mintz  * @param p_ptt
465fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
466fe56b9e6SYuval Mintz  */
467fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
468fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
469fe56b9e6SYuval Mintz /**
470fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
471fe56b9e6SYuval Mintz  *
472fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
473fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
474fe56b9e6SYuval Mintz  *
475fe56b9e6SYuval Mintz  * @return int
476fe56b9e6SYuval Mintz  */
477fe56b9e6SYuval Mintz 
478fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
479fe56b9e6SYuval Mintz 
480fe56b9e6SYuval Mintz /**
481cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
482cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
483cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
484cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
485cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
486cc875c2eSYuval Mintz  *
487cc875c2eSYuval Mintz  * @param p_hwfn - HW function
488cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
489cc875c2eSYuval Mintz  * @return int - 0 - operation
490cc875c2eSYuval Mintz  * was successul.
491cc875c2eSYuval Mintz  */
492cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
493cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
494cc875c2eSYuval Mintz 
495cc875c2eSYuval Mintz /**
496fe56b9e6SYuval Mintz  * @brief Sends a LOAD_REQ to the MFW, and in case operation
497fe56b9e6SYuval Mintz  *        succeed, returns whether this PF is the first on the
498fe56b9e6SYuval Mintz  *        chip/engine/port or function. This function should be
499fe56b9e6SYuval Mintz  *        called when driver is ready to accept MFW events after
500fe56b9e6SYuval Mintz  *        Storms initializations are done.
501fe56b9e6SYuval Mintz  *
502fe56b9e6SYuval Mintz  * @param p_hwfn       - hw function
503fe56b9e6SYuval Mintz  * @param p_ptt        - PTT required for register access
504fe56b9e6SYuval Mintz  * @param p_load_code  - The MCP response param containing one
505fe56b9e6SYuval Mintz  *      of the following:
506fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_ENGINE
507fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_PORT
508fe56b9e6SYuval Mintz  *      FW_MSG_CODE_DRV_LOAD_FUNCTION
509fe56b9e6SYuval Mintz  * @return int -
510fe56b9e6SYuval Mintz  *      0 - Operation was successul.
511fe56b9e6SYuval Mintz  *      -EBUSY - Operation failed
512fe56b9e6SYuval Mintz  */
513fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
514fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
515fe56b9e6SYuval Mintz 		     u32 *p_load_code);
516fe56b9e6SYuval Mintz 
517fe56b9e6SYuval Mintz /**
518fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
519fe56b9e6SYuval Mintz  *
520fe56b9e6SYuval Mintz  * @param p_hwfn
521fe56b9e6SYuval Mintz  * @param p_ptt
522fe56b9e6SYuval Mintz  */
523fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
524fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
525fe56b9e6SYuval Mintz 
526fe56b9e6SYuval Mintz /**
5270b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
5280b55e27dSYuval Mintz  *
5290b55e27dSYuval Mintz  * @param p_hwfn
5300b55e27dSYuval Mintz  * @param p_ptt
5310b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
5320b55e27dSYuval Mintz  *
5330b55e27dSYuval Mintz  * @param return int - 0 upon success.
5340b55e27dSYuval Mintz  */
5350b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
5360b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
5370b55e27dSYuval Mintz 
5380b55e27dSYuval Mintz /**
539fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
540fe56b9e6SYuval Mintz  *
541fe56b9e6SYuval Mintz  * @param p_hwfn
542fe56b9e6SYuval Mintz  *
543fe56b9e6SYuval Mintz  * @param return 0 upon success.
544fe56b9e6SYuval Mintz  */
545fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
546fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
547fe56b9e6SYuval Mintz 
548fe56b9e6SYuval Mintz /**
549fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
550fe56b9e6SYuval Mintz  *
551fe56b9e6SYuval Mintz  * @param p_hwfn
552fe56b9e6SYuval Mintz  * @param p_ptt
553fe56b9e6SYuval Mintz  *
554fe56b9e6SYuval Mintz  * @param return 0 upon success.
555fe56b9e6SYuval Mintz  */
556fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
557fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
558fe56b9e6SYuval Mintz 
559fe56b9e6SYuval Mintz /**
5604102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
5614102426fSTomer Tayar  *        a buffer.
5624102426fSTomer Tayar  *
5634102426fSTomer Tayar  * @param p_hwfn
5644102426fSTomer Tayar  * @param p_ptt
5654102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
5664102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
5674102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
5684102426fSTomer Tayar  * @param o_mcp_resp - MCP response
5694102426fSTomer Tayar  * @param o_mcp_param - MCP response param
5704102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
5714102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
5724102426fSTomer Tayar  *
5734102426fSTomer Tayar  * @param return 0 upon success.
5744102426fSTomer Tayar  */
5754102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
5764102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
5774102426fSTomer Tayar 		       u32 cmd,
5784102426fSTomer Tayar 		       u32 param,
5794102426fSTomer Tayar 		       u32 *o_mcp_resp,
5804102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
5814102426fSTomer Tayar 
5824102426fSTomer Tayar /**
583fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
584fe56b9e6SYuval Mintz  *
585fe56b9e6SYuval Mintz  * @param p_hwfn
586fe56b9e6SYuval Mintz  *
587fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
588fe56b9e6SYuval Mintz  */
589fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
5901408cc1fSYuval Mintz 
5911408cc1fSYuval Mintz /**
5921408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
5931408cc1fSYuval Mintz  *
5941408cc1fSYuval Mintz  * @param p_hwfn
5951408cc1fSYuval Mintz  * @param p_ptt
5961408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
5971408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
5981408cc1fSYuval Mintz  *
5991408cc1fSYuval Mintz  * @return int
6001408cc1fSYuval Mintz  */
6011408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
6021408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
6031408cc1fSYuval Mintz 
6044102426fSTomer Tayar /**
6054102426fSTomer Tayar  * @brief - Halt the MCP.
6064102426fSTomer Tayar  *
6074102426fSTomer Tayar  * @param p_hwfn
6084102426fSTomer Tayar  * @param p_ptt
6094102426fSTomer Tayar  *
6104102426fSTomer Tayar  * @param return 0 upon success.
6114102426fSTomer Tayar  */
6124102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6134102426fSTomer Tayar 
6144102426fSTomer Tayar /**
6154102426fSTomer Tayar  * @brief - Wake up the MCP.
6164102426fSTomer Tayar  *
6174102426fSTomer Tayar  * @param p_hwfn
6184102426fSTomer Tayar  * @param p_ptt
6194102426fSTomer Tayar  *
6204102426fSTomer Tayar  * @param return 0 upon success.
6214102426fSTomer Tayar  */
6224102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6234102426fSTomer Tayar 
624a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
6254b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
6264b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
6274b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
6284b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
6294b01e519SManish Chopra 				     u8 max_bw);
630a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
631a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
632a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
633a64b02d5SManish Chopra 				     u8 min_bw);
634351a4dedSYuval Mintz 
6354102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
6364102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
6374102426fSTomer Tayar 
638*0fefbfbaSSudarsana Kalluru /**
639*0fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
640*0fefbfbaSSudarsana Kalluru  *
641*0fefbfbaSSudarsana Kalluru  *  @param p_hwfn
642*0fefbfbaSSudarsana Kalluru  *  @param p_ptt
643*0fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
644*0fefbfbaSSudarsana Kalluru  *
645*0fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
646*0fefbfbaSSudarsana Kalluru  */
647*0fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
648*0fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
649*0fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
650*0fefbfbaSSudarsana Kalluru 
651fe56b9e6SYuval Mintz #endif
652