xref: /linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
3e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
4663eacd8SAlexander Lobakin  * Copyright (c) 2019-2020 Marvell International Ltd.
5fe56b9e6SYuval Mintz  */
6fe56b9e6SYuval Mintz 
7fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
8fe56b9e6SYuval Mintz #define _QED_MCP_H
9fe56b9e6SYuval Mintz 
10fe56b9e6SYuval Mintz #include <linux/types.h>
11fe56b9e6SYuval Mintz #include <linux/delay.h>
12fe56b9e6SYuval Mintz #include <linux/slab.h>
135529bad9STomer Tayar #include <linux/spinlock.h>
141e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
15fe56b9e6SYuval Mintz #include "qed_hsi.h"
165d24bcf1STomer Tayar #include "qed_dev_api.h"
17fe56b9e6SYuval Mintz 
180cc3a801SManish Chopra #define QED_MFW_REPORT_STR_SIZE	256
190cc3a801SManish Chopra 
20cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
21cc875c2eSYuval Mintz 	bool					autoneg;
2299785a87SAlexander Lobakin 
235d4193c6SAlexander Lobakin 	u32					advertised_speeds;
2499785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_RES			0x1
2599785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_1G			0x2
2699785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_10G			0x4
2799785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_20G			0x8
2899785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_25G			0x10
2999785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_40G			0x20
3099785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_50G_R		0x40
3199785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_50G_R2		0x80
3299785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_100G_R2		0x100
3399785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_100G_R4		0x200
3499785a87SAlexander Lobakin #define QED_EXT_SPEED_MASK_100G_P4		0x400
3599785a87SAlexander Lobakin 
36cc875c2eSYuval Mintz 	u32					forced_speed;	   /* In Mb/s */
3799785a87SAlexander Lobakin #define QED_EXT_SPEED_1G			0x1
3899785a87SAlexander Lobakin #define QED_EXT_SPEED_10G			0x2
3999785a87SAlexander Lobakin #define QED_EXT_SPEED_20G			0x4
4099785a87SAlexander Lobakin #define QED_EXT_SPEED_25G			0x8
4199785a87SAlexander Lobakin #define QED_EXT_SPEED_40G			0x10
4299785a87SAlexander Lobakin #define QED_EXT_SPEED_50G_R			0x20
4399785a87SAlexander Lobakin #define QED_EXT_SPEED_50G_R2			0x40
4499785a87SAlexander Lobakin #define QED_EXT_SPEED_100G_R2			0x80
4599785a87SAlexander Lobakin #define QED_EXT_SPEED_100G_R4			0x100
4699785a87SAlexander Lobakin #define QED_EXT_SPEED_100G_P4			0x200
47cc875c2eSYuval Mintz };
48cc875c2eSYuval Mintz 
49cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
50cc875c2eSYuval Mintz 	bool					autoneg;
51cc875c2eSYuval Mintz 	bool					forced_rx;
52cc875c2eSYuval Mintz 	bool					forced_tx;
53cc875c2eSYuval Mintz };
54cc875c2eSYuval Mintz 
55645874e5SSudarsana Reddy Kalluru enum qed_mcp_eee_mode {
56645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_DISABLED,
57645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_ENABLED,
58645874e5SSudarsana Reddy Kalluru 	QED_MCP_EEE_UNSUPPORTED
59645874e5SSudarsana Reddy Kalluru };
60645874e5SSudarsana Reddy Kalluru 
61cc875c2eSYuval Mintz struct qed_mcp_link_params {
62cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
63cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
64cc875c2eSYuval Mintz 	u32					loopback_mode;
65645874e5SSudarsana Reddy Kalluru 	struct qed_link_eee_params		eee;
66ae7e6937SAlexander Lobakin 	u32					fec;
6799785a87SAlexander Lobakin 
6899785a87SAlexander Lobakin 	struct qed_mcp_link_speed_params	ext_speed;
6999785a87SAlexander Lobakin 	u32					ext_fec_mode;
70cc875c2eSYuval Mintz };
71cc875c2eSYuval Mintz 
72cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
73cc875c2eSYuval Mintz 	u32					speed_capabilities;
7434f9199cSsudarsana.kalluru@cavium.com 	bool					default_speed_autoneg;
75ae7e6937SAlexander Lobakin 	u32					fec_default;
76645874e5SSudarsana Reddy Kalluru 	enum qed_mcp_eee_mode			default_eee;
77645874e5SSudarsana Reddy Kalluru 	u32					eee_lpi_timer;
78645874e5SSudarsana Reddy Kalluru 	u8					eee_speed_caps;
7999785a87SAlexander Lobakin 
8099785a87SAlexander Lobakin 	u32					default_ext_speed_caps;
8199785a87SAlexander Lobakin 	u32					default_ext_autoneg;
8299785a87SAlexander Lobakin 	u32					default_ext_speed;
8399785a87SAlexander Lobakin 	u32					default_ext_fec;
84cc875c2eSYuval Mintz };
85cc875c2eSYuval Mintz 
86cc875c2eSYuval Mintz struct qed_mcp_link_state {
87cc875c2eSYuval Mintz 	bool					link_up;
88a64b02d5SManish Chopra 	u32					min_pf_rate;
89a64b02d5SManish Chopra 
904b01e519SManish Chopra 	/* Actual link speed in Mb/s */
914b01e519SManish Chopra 	u32					line_speed;
924b01e519SManish Chopra 
934b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
944b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
954b01e519SManish Chopra 	 */
964b01e519SManish Chopra 	u32					speed;
97cc875c2eSYuval Mintz 
9837237b5bSAlexander Lobakin 	bool					full_duplex;
99cc875c2eSYuval Mintz 	bool					an;
100cc875c2eSYuval Mintz 	bool					an_complete;
101cc875c2eSYuval Mintz 	bool					parallel_detection;
102cc875c2eSYuval Mintz 	bool					pfc_enabled;
103cc875c2eSYuval Mintz 
10437237b5bSAlexander Lobakin 	u32					partner_adv_speed;
105cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD		BIT(0)
106cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD		BIT(1)
107cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G		BIT(2)
108cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G		BIT(3)
109054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G		BIT(4)
110054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G		BIT(5)
111054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G		BIT(6)
112054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G		BIT(7)
113cc875c2eSYuval Mintz 
114cc875c2eSYuval Mintz 	bool					partner_tx_flow_ctrl_en;
115cc875c2eSYuval Mintz 	bool					partner_rx_flow_ctrl_en;
116cc875c2eSYuval Mintz 
117cc875c2eSYuval Mintz 	u8					partner_adv_pause;
11837237b5bSAlexander Lobakin #define QED_LINK_PARTNER_SYMMETRIC_PAUSE	0x1
11937237b5bSAlexander Lobakin #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE	0x2
12037237b5bSAlexander Lobakin #define QED_LINK_PARTNER_BOTH_PAUSE		0x3
121cc875c2eSYuval Mintz 
122cc875c2eSYuval Mintz 	bool					sfp_tx_fault;
123645874e5SSudarsana Reddy Kalluru 	bool					eee_active;
124645874e5SSudarsana Reddy Kalluru 	u8					eee_adv_caps;
125645874e5SSudarsana Reddy Kalluru 	u8					eee_lp_adv_caps;
126ae7e6937SAlexander Lobakin 
127ae7e6937SAlexander Lobakin 	u32					fec_active;
128cc875c2eSYuval Mintz };
129cc875c2eSYuval Mintz 
130fe56b9e6SYuval Mintz struct qed_mcp_function_info {
131fe56b9e6SYuval Mintz 	u8				pause_on_host;
132fe56b9e6SYuval Mintz 
133fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
134fe56b9e6SYuval Mintz 
135fe56b9e6SYuval Mintz 	u8				bandwidth_min;
136fe56b9e6SYuval Mintz 	u8				bandwidth_max;
137fe56b9e6SYuval Mintz 
138fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
139fe56b9e6SYuval Mintz 
140fe56b9e6SYuval Mintz 	u64				wwn_port;
141fe56b9e6SYuval Mintz 	u64				wwn_node;
142fe56b9e6SYuval Mintz 
143fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
144fe56b9e6SYuval Mintz 	u16				ovlan;
1450fefbfbaSSudarsana Kalluru 
1460fefbfbaSSudarsana Kalluru 	u16				mtu;
147fe56b9e6SYuval Mintz };
148fe56b9e6SYuval Mintz 
149fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
150fe56b9e6SYuval Mintz 	u32	offset;
151fe56b9e6SYuval Mintz 	u32	param;
152fe56b9e6SYuval Mintz 	u32	resp;
153fe56b9e6SYuval Mintz 	u32	cmd;
154fe56b9e6SYuval Mintz };
155fe56b9e6SYuval Mintz 
156fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
157fe56b9e6SYuval Mintz 	u32	version;
158fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
159fe56b9e6SYuval Mintz };
160fe56b9e6SYuval Mintz 
1616c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1626c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1636c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1646c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1656c754246SSudarsana Reddy Kalluru };
1666c754246SSudarsana Reddy Kalluru 
1676c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1686c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1696c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1706c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1716c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1726c754246SSudarsana Reddy Kalluru };
1736c754246SSudarsana Reddy Kalluru 
1746c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1756c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1766c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1776c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1786c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1796c754246SSudarsana Reddy Kalluru };
1806c754246SSudarsana Reddy Kalluru 
1816c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1826c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1836c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1846c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1856c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1866c754246SSudarsana Reddy Kalluru };
1876c754246SSudarsana Reddy Kalluru 
1886c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1896c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1906c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1916c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1926c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1936c754246SSudarsana Reddy Kalluru };
1946c754246SSudarsana Reddy Kalluru 
1956c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1966c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1976c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1986c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1996c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
2006c754246SSudarsana Reddy Kalluru };
2016c754246SSudarsana Reddy Kalluru 
2020fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
2030fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
2040fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
2050fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
2060fefbfbaSSudarsana Kalluru };
2070fefbfbaSSudarsana Kalluru 
2080fefbfbaSSudarsana Kalluru enum qed_ov_client {
2090fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
2100fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
2110fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
2120fefbfbaSSudarsana Kalluru };
2130fefbfbaSSudarsana Kalluru 
2140fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
2150fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
2160fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
2170fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
2180fefbfbaSSudarsana Kalluru };
2190fefbfbaSSudarsana Kalluru 
2200fefbfbaSSudarsana Kalluru enum qed_ov_wol {
2210fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
2220fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
2230fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
2240fefbfbaSSudarsana Kalluru };
2250fefbfbaSSudarsana Kalluru 
2262528c389SSudarsana Reddy Kalluru enum qed_mfw_tlv_type {
2272528c389SSudarsana Reddy Kalluru 	QED_MFW_TLV_GENERIC = 0x1,	/* Core driver TLVs */
2282528c389SSudarsana Reddy Kalluru 	QED_MFW_TLV_ETH = 0x2,		/* L2 driver TLVs */
229f240b688SSudarsana Reddy Kalluru 	QED_MFW_TLV_FCOE = 0x4,		/* FCoE protocol TLVs */
23077a509e4SSudarsana Reddy Kalluru 	QED_MFW_TLV_ISCSI = 0x8,	/* SCSI protocol TLVs */
23177a509e4SSudarsana Reddy Kalluru 	QED_MFW_TLV_MAX = 0x16,
2322528c389SSudarsana Reddy Kalluru };
2332528c389SSudarsana Reddy Kalluru 
2342528c389SSudarsana Reddy Kalluru struct qed_mfw_tlv_generic {
2352528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_FLAGS_SIZE	2
2362528c389SSudarsana Reddy Kalluru 	struct {
2372528c389SSudarsana Reddy Kalluru 		u8 ipv4_csum_offload;
2382528c389SSudarsana Reddy Kalluru 		u8 lso_supported;
2392528c389SSudarsana Reddy Kalluru 		bool b_set;
2402528c389SSudarsana Reddy Kalluru 	} flags;
2412528c389SSudarsana Reddy Kalluru 
2422528c389SSudarsana Reddy Kalluru #define QED_MFW_TLV_MAC_COUNT 3
2432528c389SSudarsana Reddy Kalluru 	/* First entry for primary MAC, 2 secondary MACs possible */
2442528c389SSudarsana Reddy Kalluru 	u8 mac[QED_MFW_TLV_MAC_COUNT][6];
2452528c389SSudarsana Reddy Kalluru 	bool mac_set[QED_MFW_TLV_MAC_COUNT];
2462528c389SSudarsana Reddy Kalluru 
2472528c389SSudarsana Reddy Kalluru 	u64 rx_frames;
2482528c389SSudarsana Reddy Kalluru 	bool rx_frames_set;
2492528c389SSudarsana Reddy Kalluru 	u64 rx_bytes;
2502528c389SSudarsana Reddy Kalluru 	bool rx_bytes_set;
2512528c389SSudarsana Reddy Kalluru 	u64 tx_frames;
2522528c389SSudarsana Reddy Kalluru 	bool tx_frames_set;
2532528c389SSudarsana Reddy Kalluru 	u64 tx_bytes;
2542528c389SSudarsana Reddy Kalluru 	bool tx_bytes_set;
2552528c389SSudarsana Reddy Kalluru };
2562528c389SSudarsana Reddy Kalluru 
2572528c389SSudarsana Reddy Kalluru union qed_mfw_tlv_data {
2582528c389SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_generic generic;
2592528c389SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_eth eth;
260f240b688SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_fcoe fcoe;
26177a509e4SSudarsana Reddy Kalluru 	struct qed_mfw_tlv_iscsi iscsi;
2622528c389SSudarsana Reddy Kalluru };
2632528c389SSudarsana Reddy Kalluru 
26438eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_ALL		BIT(0)
26538eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_INIT		BIT(1)
26638eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_COMMIT       BIT(2)
26738eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_FREE		BIT(3)
26838eabdf0SSudarsana Reddy Kalluru #define QED_NVM_CFG_OPTION_ENTITY_SEL	BIT(4)
26938eabdf0SSudarsana Reddy Kalluru 
270fe56b9e6SYuval Mintz /**
27119198e4eSPrabhakar Kushwaha  * qed_mcp_get_link_params(): Returns the link params of the hw function.
272cc875c2eSYuval Mintz  *
27319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
274cc875c2eSYuval Mintz  *
27519198e4eSPrabhakar Kushwaha  * Returns: Pointer to link params.
276cc875c2eSYuval Mintz  */
27719198e4eSPrabhakar Kushwaha struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn);
278cc875c2eSYuval Mintz 
279cc875c2eSYuval Mintz /**
28019198e4eSPrabhakar Kushwaha  * qed_mcp_get_link_state(): Return the link state of the hw function.
281cc875c2eSYuval Mintz  *
28219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
283cc875c2eSYuval Mintz  *
28419198e4eSPrabhakar Kushwaha  * Returns: Pointer to link state.
285cc875c2eSYuval Mintz  */
28619198e4eSPrabhakar Kushwaha struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn);
287cc875c2eSYuval Mintz 
288cc875c2eSYuval Mintz /**
28919198e4eSPrabhakar Kushwaha  * qed_mcp_get_link_capabilities(): Return the link capabilities of the
29019198e4eSPrabhakar Kushwaha  *                                  hw function.
291cc875c2eSYuval Mintz  *
29219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
293cc875c2eSYuval Mintz  *
29419198e4eSPrabhakar Kushwaha  * Returns: Pointer to link capabilities.
295cc875c2eSYuval Mintz  */
296cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
297cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
298cc875c2eSYuval Mintz 
299cc875c2eSYuval Mintz /**
30019198e4eSPrabhakar Kushwaha  * qed_mcp_set_link(): Request the MFW to set the link according
30119198e4eSPrabhakar Kushwaha  *                     to 'link_input'.
302cc875c2eSYuval Mintz  *
30319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
30419198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
30519198e4eSPrabhakar Kushwaha  * @b_up: Raise link if `true'. Reset link if `false'.
306cc875c2eSYuval Mintz  *
30719198e4eSPrabhakar Kushwaha  * Return: Int.
308cc875c2eSYuval Mintz  */
309cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
310cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
311cc875c2eSYuval Mintz 		     bool               b_up);
312cc875c2eSYuval Mintz 
313cc875c2eSYuval Mintz /**
31419198e4eSPrabhakar Kushwaha  * qed_mcp_get_mfw_ver(): Get the management firmware version value.
315fe56b9e6SYuval Mintz  *
31619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
31719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
31819198e4eSPrabhakar Kushwaha  * @p_mfw_ver: MFW version value.
31919198e4eSPrabhakar Kushwaha  * @p_running_bundle_id: Image id in nvram; Optional.
320fe56b9e6SYuval Mintz  *
32119198e4eSPrabhakar Kushwaha  * Return: Int - 0 - operation was successful.
322fe56b9e6SYuval Mintz  */
3231408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
3241408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
3251408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
326fe56b9e6SYuval Mintz 
327fe56b9e6SYuval Mintz /**
32819198e4eSPrabhakar Kushwaha  * qed_mcp_get_mbi_ver(): Get the MBI version value.
329ae33666aSTomer Tayar  *
33019198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
33119198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
33219198e4eSPrabhakar Kushwaha  * @p_mbi_ver: A pointer to a variable to be filled with the MBI version.
333ae33666aSTomer Tayar  *
33419198e4eSPrabhakar Kushwaha  * Return: Int - 0 - operation was successful.
335ae33666aSTomer Tayar  */
336ae33666aSTomer Tayar int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
337ae33666aSTomer Tayar 			struct qed_ptt *p_ptt, u32 *p_mbi_ver);
338ae33666aSTomer Tayar 
339ae33666aSTomer Tayar /**
34019198e4eSPrabhakar Kushwaha  * qed_mcp_get_media_type(): Get media type value of the port.
341cc875c2eSYuval Mintz  *
34219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
34319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
34419198e4eSPrabhakar Kushwaha  * @media_type: Media type value
345cc875c2eSYuval Mintz  *
34619198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
347cc875c2eSYuval Mintz  *              -EBUSY - Operation failed
348cc875c2eSYuval Mintz  */
349706d0891SRahul Verma int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn,
350706d0891SRahul Verma 			   struct qed_ptt *p_ptt, u32 *media_type);
351cc875c2eSYuval Mintz 
352cc875c2eSYuval Mintz /**
35319198e4eSPrabhakar Kushwaha  * qed_mcp_get_transceiver_data(): Get transceiver data of the port.
354c56a8be7SRahul Verma  *
35519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
35619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
35719198e4eSPrabhakar Kushwaha  * @p_transceiver_state: Transceiver state.
35819198e4eSPrabhakar Kushwaha  * @p_tranceiver_type: Media type value.
359c56a8be7SRahul Verma  *
36019198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
361c56a8be7SRahul Verma  *              -EBUSY - Operation failed
362c56a8be7SRahul Verma  */
363c56a8be7SRahul Verma int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn,
364c56a8be7SRahul Verma 				 struct qed_ptt *p_ptt,
365c56a8be7SRahul Verma 				 u32 *p_transceiver_state,
366c56a8be7SRahul Verma 				 u32 *p_tranceiver_type);
367c56a8be7SRahul Verma 
368c56a8be7SRahul Verma /**
36919198e4eSPrabhakar Kushwaha  * qed_mcp_trans_speed_mask(): Get transceiver supported speed mask.
370c56a8be7SRahul Verma  *
37119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
37219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
37319198e4eSPrabhakar Kushwaha  * @p_speed_mask: Bit mask of all supported speeds.
374c56a8be7SRahul Verma  *
37519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
376c56a8be7SRahul Verma  *              -EBUSY - Operation failed
377c56a8be7SRahul Verma  */
378c56a8be7SRahul Verma 
379c56a8be7SRahul Verma int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn,
380c56a8be7SRahul Verma 			     struct qed_ptt *p_ptt, u32 *p_speed_mask);
381c56a8be7SRahul Verma 
382c56a8be7SRahul Verma /**
38319198e4eSPrabhakar Kushwaha  * qed_mcp_get_board_config(): Get board configuration.
384c56a8be7SRahul Verma  *
38519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
38619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
38719198e4eSPrabhakar Kushwaha  * @p_board_config: Board config.
388c56a8be7SRahul Verma  *
38919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
390c56a8be7SRahul Verma  *              -EBUSY - Operation failed
391c56a8be7SRahul Verma  */
392c56a8be7SRahul Verma int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn,
393c56a8be7SRahul Verma 			     struct qed_ptt *p_ptt, u32 *p_board_config);
394c56a8be7SRahul Verma 
395c56a8be7SRahul Verma /**
396ef10bd49SVenkata Sudheer Kumar Bhavaraju  * qed_mcp_cmd(): Sleepable function for sending commands to the MCP
397fe56b9e6SYuval Mintz  *                mailbox. It acquire mutex lock for the entire
398fe56b9e6SYuval Mintz  *                operation, from sending the request until the MCP
399fe56b9e6SYuval Mintz  *                response. Waiting for MCP response will be checked up
400ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                to 5 seconds every 10ms. Should not be called from atomic
401ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                context.
402fe56b9e6SYuval Mintz  *
40319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
40419198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
40519198e4eSPrabhakar Kushwaha  * @cmd: command to be sent to the MCP.
40619198e4eSPrabhakar Kushwaha  * @param: Optional param
40719198e4eSPrabhakar Kushwaha  * @o_mcp_resp: The MCP response code (exclude sequence).
40819198e4eSPrabhakar Kushwaha  * @o_mcp_param: Optional parameter provided by the MCP
409fe56b9e6SYuval Mintz  *                     response
41019198e4eSPrabhakar Kushwaha  *
41119198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
412fe56b9e6SYuval Mintz  */
413fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
414fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
415fe56b9e6SYuval Mintz 		u32 cmd,
416fe56b9e6SYuval Mintz 		u32 param,
417fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
418fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
419fe56b9e6SYuval Mintz 
420fe56b9e6SYuval Mintz /**
421ef10bd49SVenkata Sudheer Kumar Bhavaraju  * qed_mcp_cmd_nosleep(): Function for sending commands to the MCP
422ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                        mailbox. It acquire mutex lock for the entire
423ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                        operation, from sending the request until the MCP
424ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                        response. Waiting for MCP response will be checked up
425ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                        to 5 seconds every 10us. Should be called when sleep
426ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                        is not allowed.
427ef10bd49SVenkata Sudheer Kumar Bhavaraju  *
428ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @p_hwfn: HW device data.
429ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @p_ptt: PTT required for register access.
430ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @cmd: command to be sent to the MCP.
431ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @param: Optional param
432ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @o_mcp_resp: The MCP response code (exclude sequence).
433ef10bd49SVenkata Sudheer Kumar Bhavaraju  * @o_mcp_param: Optional parameter provided by the MCP
434ef10bd49SVenkata Sudheer Kumar Bhavaraju  *                     response
435ef10bd49SVenkata Sudheer Kumar Bhavaraju  *
436ef10bd49SVenkata Sudheer Kumar Bhavaraju  * Return: Int - 0 - Operation was successul.
437ef10bd49SVenkata Sudheer Kumar Bhavaraju  */
438ef10bd49SVenkata Sudheer Kumar Bhavaraju int qed_mcp_cmd_nosleep(struct qed_hwfn *p_hwfn,
439ef10bd49SVenkata Sudheer Kumar Bhavaraju 			struct qed_ptt *p_ptt,
440ef10bd49SVenkata Sudheer Kumar Bhavaraju 			u32 cmd,
441ef10bd49SVenkata Sudheer Kumar Bhavaraju 			u32 param,
442ef10bd49SVenkata Sudheer Kumar Bhavaraju 			u32 *o_mcp_resp,
443ef10bd49SVenkata Sudheer Kumar Bhavaraju 			u32 *o_mcp_param);
444ef10bd49SVenkata Sudheer Kumar Bhavaraju 
445ef10bd49SVenkata Sudheer Kumar Bhavaraju /**
44619198e4eSPrabhakar Kushwaha  * qed_mcp_drain(): drains the nig, allowing completion to pass in
44719198e4eSPrabhakar Kushwaha  *                  case of pauses.
448fe56b9e6SYuval Mintz  *                  (Should be called only from sleepable context)
449fe56b9e6SYuval Mintz  *
45019198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
45119198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
45219198e4eSPrabhakar Kushwaha  *
45319198e4eSPrabhakar Kushwaha  * Return: Int.
454fe56b9e6SYuval Mintz  */
455fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
456fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
457fe56b9e6SYuval Mintz 
458fe56b9e6SYuval Mintz /**
45919198e4eSPrabhakar Kushwaha  * qed_mcp_get_flash_size(): Get the flash size value.
460cee4d264SManish Chopra  *
46119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
46219198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
46319198e4eSPrabhakar Kushwaha  * @p_flash_size: Flash size in bytes to be filled.
464cee4d264SManish Chopra  *
46519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
466cee4d264SManish Chopra  */
467cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
468cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
469cee4d264SManish Chopra 			   u32 *p_flash_size);
470cee4d264SManish Chopra 
471cee4d264SManish Chopra /**
47219198e4eSPrabhakar Kushwaha  * qed_mcp_send_drv_version(): Send driver version to MFW.
473fe56b9e6SYuval Mintz  *
47419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
47519198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
47619198e4eSPrabhakar Kushwaha  * @p_ver: Version value.
477fe56b9e6SYuval Mintz  *
47819198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
479fe56b9e6SYuval Mintz  */
480fe56b9e6SYuval Mintz int
481fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
482fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
483fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
484fe56b9e6SYuval Mintz 
48591420b83SSudarsana Kalluru /**
48619198e4eSPrabhakar Kushwaha  * qed_get_process_kill_counter(): Read the MFW process kill counter.
48764515dc8STomer Tayar  *
48819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
48919198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
49064515dc8STomer Tayar  *
49119198e4eSPrabhakar Kushwaha  * Return: u32.
49264515dc8STomer Tayar  */
49364515dc8STomer Tayar u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn,
49464515dc8STomer Tayar 				 struct qed_ptt *p_ptt);
49564515dc8STomer Tayar 
49664515dc8STomer Tayar /**
49719198e4eSPrabhakar Kushwaha  * qed_start_recovery_process(): Trigger a recovery process.
49864515dc8STomer Tayar  *
49919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
50019198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
50164515dc8STomer Tayar  *
50219198e4eSPrabhakar Kushwaha  * Return: Int.
50364515dc8STomer Tayar  */
50464515dc8STomer Tayar int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
50564515dc8STomer Tayar 
50664515dc8STomer Tayar /**
50719198e4eSPrabhakar Kushwaha  * qed_recovery_prolog(): A recovery handler must call this function
50819198e4eSPrabhakar Kushwaha  *                        as its first step.
50919198e4eSPrabhakar Kushwaha  *                        It is assumed that the handler is not run from
51019198e4eSPrabhakar Kushwaha  *                        an interrupt context.
51164515dc8STomer Tayar  *
51219198e4eSPrabhakar Kushwaha  * @cdev: Qed dev pointer.
51364515dc8STomer Tayar  *
51419198e4eSPrabhakar Kushwaha  * Return: int.
51564515dc8STomer Tayar  */
51664515dc8STomer Tayar int qed_recovery_prolog(struct qed_dev *cdev);
51764515dc8STomer Tayar 
51864515dc8STomer Tayar /**
51919198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_current_config(): Notify MFW about the change in base
52019198e4eSPrabhakar Kushwaha  *                                    device properties
5210fefbfbaSSudarsana Kalluru  *
52219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
52319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
52419198e4eSPrabhakar Kushwaha  * @client: Qed client type.
5250fefbfbaSSudarsana Kalluru  *
52619198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
5270fefbfbaSSudarsana Kalluru  */
5280fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
5290fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
5300fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
5310fefbfbaSSudarsana Kalluru 
5320fefbfbaSSudarsana Kalluru /**
53319198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_driver_state(): Notify MFW about the driver state.
5340fefbfbaSSudarsana Kalluru  *
53519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
53619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
53719198e4eSPrabhakar Kushwaha  * @drv_state: Driver state.
5380fefbfbaSSudarsana Kalluru  *
53919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
5400fefbfbaSSudarsana Kalluru  */
5410fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
5420fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
5430fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
5440fefbfbaSSudarsana Kalluru 
5450fefbfbaSSudarsana Kalluru /**
54619198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_mtu(): Send MTU size to MFW.
5470fefbfbaSSudarsana Kalluru  *
54819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
54919198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
55019198e4eSPrabhakar Kushwaha  * @mtu: MTU size.
5510fefbfbaSSudarsana Kalluru  *
55219198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
5530fefbfbaSSudarsana Kalluru  */
5540fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
5550fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
5560fefbfbaSSudarsana Kalluru 
5570fefbfbaSSudarsana Kalluru /**
55819198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_mac(): Send MAC address to MFW.
5590fefbfbaSSudarsana Kalluru  *
56019198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
56119198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
56219198e4eSPrabhakar Kushwaha  * @mac: MAC address.
5630fefbfbaSSudarsana Kalluru  *
56419198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
5650fefbfbaSSudarsana Kalluru  */
5660fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
56776660757SJakub Kicinski 			  struct qed_ptt *p_ptt, const u8 *mac);
5680fefbfbaSSudarsana Kalluru 
5690fefbfbaSSudarsana Kalluru /**
57019198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_wol(): Send WOL mode to MFW.
5710fefbfbaSSudarsana Kalluru  *
57219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
57319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
57419198e4eSPrabhakar Kushwaha  * @wol: WOL mode.
5750fefbfbaSSudarsana Kalluru  *
57619198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
5770fefbfbaSSudarsana Kalluru  */
5780fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
5790fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
5800fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
5810fefbfbaSSudarsana Kalluru 
5820fefbfbaSSudarsana Kalluru /**
58319198e4eSPrabhakar Kushwaha  * qed_mcp_set_led(): Set LED status.
58491420b83SSudarsana Kalluru  *
58519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
58619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
58719198e4eSPrabhakar Kushwaha  * @mode: LED mode.
58891420b83SSudarsana Kalluru  *
58919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
59091420b83SSudarsana Kalluru  */
59191420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
59291420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
59391420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
59491420b83SSudarsana Kalluru 
59503dc76caSSudarsana Reddy Kalluru /**
59619198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_read(): Read from NVM.
5977a4b21b7SMintz, Yuval  *
59819198e4eSPrabhakar Kushwaha  * @cdev: Qed dev pointer.
59919198e4eSPrabhakar Kushwaha  * @addr: NVM offset.
60019198e4eSPrabhakar Kushwaha  * @p_buf: NVM read buffer.
60119198e4eSPrabhakar Kushwaha  * @len: Buffer len.
6027a4b21b7SMintz, Yuval  *
60319198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
6047a4b21b7SMintz, Yuval  */
6057a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
6067a4b21b7SMintz, Yuval 
60762e4d438SSudarsana Reddy Kalluru /**
60819198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_write(): Write to NVM.
60962e4d438SSudarsana Reddy Kalluru  *
61019198e4eSPrabhakar Kushwaha  * @cdev: Qed dev pointer.
61119198e4eSPrabhakar Kushwaha  * @addr: NVM offset.
61219198e4eSPrabhakar Kushwaha  * @cmd: NVM command.
61319198e4eSPrabhakar Kushwaha  * @p_buf: NVM write buffer.
61419198e4eSPrabhakar Kushwaha  * @len: Buffer len.
61562e4d438SSudarsana Reddy Kalluru  *
61619198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
61762e4d438SSudarsana Reddy Kalluru  */
61862e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_write(struct qed_dev *cdev,
61962e4d438SSudarsana Reddy Kalluru 		      u32 cmd, u32 addr, u8 *p_buf, u32 len);
62062e4d438SSudarsana Reddy Kalluru 
62162e4d438SSudarsana Reddy Kalluru /**
62219198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_resp(): Check latest response.
62362e4d438SSudarsana Reddy Kalluru  *
62419198e4eSPrabhakar Kushwaha  * @cdev: Qed dev pointer.
62519198e4eSPrabhakar Kushwaha  * @p_buf: NVM write buffer.
62662e4d438SSudarsana Reddy Kalluru  *
62719198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
62862e4d438SSudarsana Reddy Kalluru  */
62962e4d438SSudarsana Reddy Kalluru int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf);
63062e4d438SSudarsana Reddy Kalluru 
63120675b37SMintz, Yuval struct qed_nvm_image_att {
63220675b37SMintz, Yuval 	u32 start_addr;
63320675b37SMintz, Yuval 	u32 length;
63420675b37SMintz, Yuval };
63520675b37SMintz, Yuval 
63620675b37SMintz, Yuval /**
63719198e4eSPrabhakar Kushwaha  * qed_mcp_get_nvm_image_att(): Allows reading a whole nvram image.
63820675b37SMintz, Yuval  *
63919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
64019198e4eSPrabhakar Kushwaha  * @image_id: Image to get attributes for.
64119198e4eSPrabhakar Kushwaha  * @p_image_att: Image attributes structure into which to fill data.
6421ac4329aSDenis Bolotin  *
64319198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
6441ac4329aSDenis Bolotin  */
6451ac4329aSDenis Bolotin int
6461ac4329aSDenis Bolotin qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
6471ac4329aSDenis Bolotin 			  enum qed_nvm_images image_id,
6481ac4329aSDenis Bolotin 			  struct qed_nvm_image_att *p_image_att);
6491ac4329aSDenis Bolotin 
6501ac4329aSDenis Bolotin /**
65119198e4eSPrabhakar Kushwaha  * qed_mcp_get_nvm_image(): Allows reading a whole nvram image.
6521ac4329aSDenis Bolotin  *
65319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
65419198e4eSPrabhakar Kushwaha  * @image_id: image requested for reading.
65519198e4eSPrabhakar Kushwaha  * @p_buffer: allocated buffer into which to fill data.
65619198e4eSPrabhakar Kushwaha  * @buffer_len: length of the allocated buffer.
65720675b37SMintz, Yuval  *
65819198e4eSPrabhakar Kushwaha  * Return: 0 if p_buffer now contains the nvram image.
65920675b37SMintz, Yuval  */
66020675b37SMintz, Yuval int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
66120675b37SMintz, Yuval 			  enum qed_nvm_images image_id,
66220675b37SMintz, Yuval 			  u8 *p_buffer, u32 buffer_len);
66320675b37SMintz, Yuval 
6647a4b21b7SMintz, Yuval /**
66519198e4eSPrabhakar Kushwaha  * qed_mcp_bist_register_test(): Bist register test.
66603dc76caSSudarsana Reddy Kalluru  *
66719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
66819198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
66903dc76caSSudarsana Reddy Kalluru  *
67019198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
67103dc76caSSudarsana Reddy Kalluru  */
67203dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
67303dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
67403dc76caSSudarsana Reddy Kalluru 
67503dc76caSSudarsana Reddy Kalluru /**
67619198e4eSPrabhakar Kushwaha  * qed_mcp_bist_clock_test(): Bist clock test.
67703dc76caSSudarsana Reddy Kalluru  *
67819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
67919198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
68003dc76caSSudarsana Reddy Kalluru  *
68119198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
68203dc76caSSudarsana Reddy Kalluru  */
68303dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
68403dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
68503dc76caSSudarsana Reddy Kalluru 
6867a4b21b7SMintz, Yuval /**
68719198e4eSPrabhakar Kushwaha  * qed_mcp_bist_nvm_get_num_images(): Bist nvm test - get number of images.
6887a4b21b7SMintz, Yuval  *
68919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
69019198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
69119198e4eSPrabhakar Kushwaha  * @num_images: number of images if operation was
6927a4b21b7SMintz, Yuval  *			  successful. 0 if not.
6937a4b21b7SMintz, Yuval  *
69419198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
6957a4b21b7SMintz, Yuval  */
69643645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,
6977a4b21b7SMintz, Yuval 				    struct qed_ptt *p_ptt,
6987a4b21b7SMintz, Yuval 				    u32 *num_images);
6997a4b21b7SMintz, Yuval 
7007a4b21b7SMintz, Yuval /**
70119198e4eSPrabhakar Kushwaha  * qed_mcp_bist_nvm_get_image_att(): Bist nvm test - get image attributes
70219198e4eSPrabhakar Kushwaha  *                                   by index.
7037a4b21b7SMintz, Yuval  *
70419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
70519198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
70619198e4eSPrabhakar Kushwaha  * @p_image_att: Attributes of image.
70719198e4eSPrabhakar Kushwaha  * @image_index: Index of image to get information for.
7087a4b21b7SMintz, Yuval  *
70919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
7107a4b21b7SMintz, Yuval  */
71143645ce0SSudarsana Reddy Kalluru int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn,
7127a4b21b7SMintz, Yuval 				   struct qed_ptt *p_ptt,
7137a4b21b7SMintz, Yuval 				   struct bist_nvm_image_att *p_image_att,
7147a4b21b7SMintz, Yuval 				   u32 image_index);
7157a4b21b7SMintz, Yuval 
7162528c389SSudarsana Reddy Kalluru /**
71719198e4eSPrabhakar Kushwaha  * qed_mfw_process_tlv_req(): Processes the TLV request from MFW i.e.,
71819198e4eSPrabhakar Kushwaha  *                            get the required TLV info
7192528c389SSudarsana Reddy Kalluru  *                            from the qed client and send it to the MFW.
7202528c389SSudarsana Reddy Kalluru  *
72119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
72219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
7232528c389SSudarsana Reddy Kalluru  *
72419198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
7252528c389SSudarsana Reddy Kalluru  */
7262528c389SSudarsana Reddy Kalluru int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7272528c389SSudarsana Reddy Kalluru 
728d8d6c5a7SIgor Russkikh /**
72919198e4eSPrabhakar Kushwaha  * qed_mcp_send_raw_debug_data(): Send raw debug data to the MFW
730d8d6c5a7SIgor Russkikh  *
73119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
73219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
73319198e4eSPrabhakar Kushwaha  * @p_buf: raw debug data buffer.
73419198e4eSPrabhakar Kushwaha  * @size: Buffer size.
73519198e4eSPrabhakar Kushwaha  *
73619198e4eSPrabhakar Kushwaha  * Return : Int.
737d8d6c5a7SIgor Russkikh  */
738d8d6c5a7SIgor Russkikh int
739d8d6c5a7SIgor Russkikh qed_mcp_send_raw_debug_data(struct qed_hwfn *p_hwfn,
740d8d6c5a7SIgor Russkikh 			    struct qed_ptt *p_ptt, u8 *p_buf, u32 size);
741d8d6c5a7SIgor Russkikh 
742fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
743fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
744fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
745fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
746fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
747fe56b9e6SYuval Mintz  */
748fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
749fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
750fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
751fe56b9e6SYuval Mintz 					    rel_pfid)
752fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
753fe56b9e6SYuval Mintz 
754fe56b9e6SYuval Mintz struct qed_mcp_info {
7554ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
7564ed1eea8STomer Tayar 	struct list_head			cmd_list;
7574ed1eea8STomer Tayar 
7584ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
7594ed1eea8STomer Tayar 	 * and the sending of the commands.
7604ed1eea8STomer Tayar 	 */
7614ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
76265ed2ffdSMintz, Yuval 
763b310974eSTomer Tayar 	/* Flag to indicate whether sending a MFW mailbox command is blocked */
764b310974eSTomer Tayar 	bool					b_block_cmd;
765b310974eSTomer Tayar 
76665ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
76765ed2ffdSMintz, Yuval 	 * originating from attention context.
76865ed2ffdSMintz, Yuval 	 */
76965ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
770b310974eSTomer Tayar 
771fe56b9e6SYuval Mintz 	u32					public_base;
772fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
773fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
774fe56b9e6SYuval Mintz 	u32					port_addr;
775fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
776fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
777cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
778cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
779cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
780fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
781fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
782fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
783fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
7844ed1eea8STomer Tayar 	u32					mcp_hist;
785645874e5SSudarsana Reddy Kalluru 
786645874e5SSudarsana Reddy Kalluru 	/* Capabilties negotiated with the MFW */
787645874e5SSudarsana Reddy Kalluru 	u32					capabilities;
788d8d6c5a7SIgor Russkikh 
789d8d6c5a7SIgor Russkikh 	/* S/N for debug data mailbox commands */
790d8d6c5a7SIgor Russkikh 	atomic_t dbg_data_seq;
791*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 
792*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 	/* Spinlock used to sync the flag mcp_handling_status with
793*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 	 * the mfw events handler
794*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 	 */
795*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 	spinlock_t unload_lock;
796*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju 	unsigned long mcp_handling_status;
797*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju #define QED_MCP_BYPASS_PROC_BIT 0
798*ca2d5f1fSVenkata Sudheer Kumar Bhavaraju #define QED_MCP_IN_PROCESSING_BIT       1
799fe56b9e6SYuval Mintz };
800fe56b9e6SYuval Mintz 
8015529bad9STomer Tayar struct qed_mcp_mb_params {
8025529bad9STomer Tayar 	u32 cmd;
8035529bad9STomer Tayar 	u32 param;
8042f67af8cSTomer Tayar 	void *p_data_src;
8052f67af8cSTomer Tayar 	void *p_data_dst;
806eaa50fc5STomer Tayar 	u8 data_src_size;
8072f67af8cSTomer Tayar 	u8 data_dst_size;
8085529bad9STomer Tayar 	u32 mcp_resp;
8095529bad9STomer Tayar 	u32 mcp_param;
810eaa50fc5STomer Tayar 	u32 flags;
811eaa50fc5STomer Tayar #define QED_MB_FLAG_CAN_SLEEP	(0x1 << 0)
812b310974eSTomer Tayar #define QED_MB_FLAG_AVOID_BLOCK	(0x1 << 1)
813eaa50fc5STomer Tayar #define QED_MB_FLAGS_IS_SET(params, flag) \
814eaa50fc5STomer Tayar 	({ typeof(params) __params = (params); \
815eaa50fc5STomer Tayar 	   (__params && (__params->flags & QED_MB_FLAG_ ## flag)); })
8165529bad9STomer Tayar };
8175529bad9STomer Tayar 
8182528c389SSudarsana Reddy Kalluru struct qed_drv_tlv_hdr {
8192528c389SSudarsana Reddy Kalluru 	u8 tlv_type;
8202528c389SSudarsana Reddy Kalluru 	u8 tlv_length;	/* In dwords - not including this header */
8212528c389SSudarsana Reddy Kalluru 	u8 tlv_reserved;
8222528c389SSudarsana Reddy Kalluru #define QED_DRV_TLV_FLAGS_CHANGED 0x01
8232528c389SSudarsana Reddy Kalluru 	u8 tlv_flags;
8242528c389SSudarsana Reddy Kalluru };
8252528c389SSudarsana Reddy Kalluru 
826fe56b9e6SYuval Mintz /**
82799785a87SAlexander Lobakin  * qed_mcp_is_ext_speed_supported() - Check if management firmware supports
82899785a87SAlexander Lobakin  *                                    extended speeds.
82999785a87SAlexander Lobakin  * @p_hwfn: HW device data.
83099785a87SAlexander Lobakin  *
83199785a87SAlexander Lobakin  * Return: true if supported, false otherwise.
83299785a87SAlexander Lobakin  */
83399785a87SAlexander Lobakin static inline bool
qed_mcp_is_ext_speed_supported(const struct qed_hwfn * p_hwfn)83499785a87SAlexander Lobakin qed_mcp_is_ext_speed_supported(const struct qed_hwfn *p_hwfn)
83599785a87SAlexander Lobakin {
83699785a87SAlexander Lobakin 	return !!(p_hwfn->mcp_info->capabilities &
83799785a87SAlexander Lobakin 		  FW_MB_PARAM_FEATURE_SUPPORT_EXT_SPEED_FEC_CONTROL);
83899785a87SAlexander Lobakin }
83999785a87SAlexander Lobakin 
84099785a87SAlexander Lobakin /**
84119198e4eSPrabhakar Kushwaha  * qed_mcp_cmd_init(): Initialize the interface with the MCP.
842fe56b9e6SYuval Mintz  *
84319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
84419198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
845fe56b9e6SYuval Mintz  *
84619198e4eSPrabhakar Kushwaha  * Return: Int.
847fe56b9e6SYuval Mintz  */
848fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
849fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
850fe56b9e6SYuval Mintz 
851fe56b9e6SYuval Mintz /**
85219198e4eSPrabhakar Kushwaha  * qed_mcp_cmd_port_init(): Initialize the port interface with the MCP
853fe56b9e6SYuval Mintz  *
85419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
85519198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
85619198e4eSPrabhakar Kushwaha  *
85719198e4eSPrabhakar Kushwaha  * Return: Void.
85819198e4eSPrabhakar Kushwaha  *
859fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
860fe56b9e6SYuval Mintz  */
861fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
862fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
863fe56b9e6SYuval Mintz /**
86419198e4eSPrabhakar Kushwaha  * qed_mcp_free(): Releases resources allocated during the init process.
865fe56b9e6SYuval Mintz  *
86619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW function.
867fe56b9e6SYuval Mintz  *
86819198e4eSPrabhakar Kushwaha  * Return: Int.
869fe56b9e6SYuval Mintz  */
870fe56b9e6SYuval Mintz 
871fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
872fe56b9e6SYuval Mintz 
873fe56b9e6SYuval Mintz /**
87419198e4eSPrabhakar Kushwaha  * qed_mcp_handle_events(): This function is called from the DPC context.
87519198e4eSPrabhakar Kushwaha  *           After pointing PTT to the mfw mb, check for events sent by
87619198e4eSPrabhakar Kushwaha  *           the MCP to the driver and ack them. In case a critical event
877cc875c2eSYuval Mintz  *           detected, it will be handled here, otherwise the work will be
878cc875c2eSYuval Mintz  *            queued to a sleepable work-queue.
879cc875c2eSYuval Mintz  *
88019198e4eSPrabhakar Kushwaha  * @p_hwfn: HW function.
88119198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
88219198e4eSPrabhakar Kushwaha  *
88319198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
884cc875c2eSYuval Mintz  */
885cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
886cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
887cc875c2eSYuval Mintz 
8885d24bcf1STomer Tayar enum qed_drv_role {
8895d24bcf1STomer Tayar 	QED_DRV_ROLE_OS,
8905d24bcf1STomer Tayar 	QED_DRV_ROLE_KDUMP,
8915d24bcf1STomer Tayar };
8925d24bcf1STomer Tayar 
8935d24bcf1STomer Tayar struct qed_load_req_params {
8945d24bcf1STomer Tayar 	/* Input params */
8955d24bcf1STomer Tayar 	enum qed_drv_role drv_role;
8965d24bcf1STomer Tayar 	u8 timeout_val;
8975d24bcf1STomer Tayar 	bool avoid_eng_reset;
8985d24bcf1STomer Tayar 	enum qed_override_force_load override_force_load;
8995d24bcf1STomer Tayar 
9005d24bcf1STomer Tayar 	/* Output params */
9015d24bcf1STomer Tayar 	u32 load_code;
9025d24bcf1STomer Tayar };
9035d24bcf1STomer Tayar 
904cc875c2eSYuval Mintz /**
90519198e4eSPrabhakar Kushwaha  * qed_mcp_load_req(): Sends a LOAD_REQ to the MFW, and in case the
90619198e4eSPrabhakar Kushwaha  *                     operation succeeds, returns whether this PF is
90719198e4eSPrabhakar Kushwaha  *                     the first on the engine/port or function.
908fe56b9e6SYuval Mintz  *
90919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
91019198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
91119198e4eSPrabhakar Kushwaha  * @p_params: Params.
9125d24bcf1STomer Tayar  *
91319198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
914fe56b9e6SYuval Mintz  */
915fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
916fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
9175d24bcf1STomer Tayar 		     struct qed_load_req_params *p_params);
918fe56b9e6SYuval Mintz 
919fe56b9e6SYuval Mintz /**
92019198e4eSPrabhakar Kushwaha  * qed_mcp_load_done(): Sends a LOAD_DONE message to the MFW.
921666db486STomer Tayar  *
92219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
92319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
924666db486STomer Tayar  *
92519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
926666db486STomer Tayar  */
927666db486STomer Tayar int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
928666db486STomer Tayar 
929666db486STomer Tayar /**
93019198e4eSPrabhakar Kushwaha  * qed_mcp_unload_req(): Sends a UNLOAD_REQ message to the MFW.
9311226337aSTomer Tayar  *
93219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
93319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
9341226337aSTomer Tayar  *
93519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
9361226337aSTomer Tayar  */
9371226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
9381226337aSTomer Tayar 
9391226337aSTomer Tayar /**
94019198e4eSPrabhakar Kushwaha  * qed_mcp_unload_done(): Sends a UNLOAD_DONE message to the MFW
9411226337aSTomer Tayar  *
94219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
94319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
9441226337aSTomer Tayar  *
94519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
9461226337aSTomer Tayar  */
9471226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
9481226337aSTomer Tayar 
9491226337aSTomer Tayar /**
95019198e4eSPrabhakar Kushwaha  * qed_mcp_read_mb(): Read the MFW mailbox into Current buffer.
951fe56b9e6SYuval Mintz  *
95219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
95319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
95419198e4eSPrabhakar Kushwaha  *
95519198e4eSPrabhakar Kushwaha  * Return: Void.
956fe56b9e6SYuval Mintz  */
957fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
958fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
959fe56b9e6SYuval Mintz 
960fe56b9e6SYuval Mintz /**
96119198e4eSPrabhakar Kushwaha  * qed_mcp_ack_vf_flr(): Ack to mfw that driver finished FLR process for VFs
9620b55e27dSYuval Mintz  *
96319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
96419198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
96519198e4eSPrabhakar Kushwaha  * @vfs_to_ack: bit mask of all engine VFs for which the PF acks.
9660b55e27dSYuval Mintz  *
96719198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
9680b55e27dSYuval Mintz  */
9690b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
9700b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
9710b55e27dSYuval Mintz 
9720b55e27dSYuval Mintz /**
97319198e4eSPrabhakar Kushwaha  * qed_mcp_fill_shmem_func_info(): Calls during init to read shmem of
97419198e4eSPrabhakar Kushwaha  *                                 all function-related info.
975fe56b9e6SYuval Mintz  *
97619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
97719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
978fe56b9e6SYuval Mintz  *
97919198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
980fe56b9e6SYuval Mintz  */
981fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
982fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
983fe56b9e6SYuval Mintz 
984fe56b9e6SYuval Mintz /**
98519198e4eSPrabhakar Kushwaha  * qed_mcp_reset(): Reset the MCP using mailbox command.
986fe56b9e6SYuval Mintz  *
98719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
98819198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
989fe56b9e6SYuval Mintz  *
99019198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
991fe56b9e6SYuval Mintz  */
992fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
993fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
994fe56b9e6SYuval Mintz 
995fe56b9e6SYuval Mintz /**
99619198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_rd_cmd(): Sends an NVM read command request to the MFW to get
9974102426fSTomer Tayar  *                       a buffer.
9984102426fSTomer Tayar  *
99919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
100019198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
100119198e4eSPrabhakar Kushwaha  * @cmd: (Command) DRV_MSG_CODE_NVM_GET_FILE_DATA or
100219198e4eSPrabhakar Kushwaha  *            DRV_MSG_CODE_NVM_READ_NVRAM commands.
100319198e4eSPrabhakar Kushwaha  * @param: [0:23] - Offset [24:31] - Size.
100419198e4eSPrabhakar Kushwaha  * @o_mcp_resp: MCP response.
100519198e4eSPrabhakar Kushwaha  * @o_mcp_param: MCP response param.
100619198e4eSPrabhakar Kushwaha  * @o_txn_size: Buffer size output.
100719198e4eSPrabhakar Kushwaha  * @o_buf: Pointer to the buffer returned by the MFW.
10086c95dd8fSPrabhakar Kushwaha  * @b_can_sleep: Can sleep.
10094102426fSTomer Tayar  *
101019198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
10114102426fSTomer Tayar  */
10124102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
10134102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
10144102426fSTomer Tayar 		       u32 cmd,
10154102426fSTomer Tayar 		       u32 param,
10164102426fSTomer Tayar 		       u32 *o_mcp_resp,
10176c95dd8fSPrabhakar Kushwaha 		       u32 *o_mcp_param,
10186c95dd8fSPrabhakar Kushwaha 		       u32 *o_txn_size, u32 *o_buf, bool b_can_sleep);
10194102426fSTomer Tayar 
10204102426fSTomer Tayar /**
102119198e4eSPrabhakar Kushwaha  * qed_mcp_phy_sfp_read(): Read from sfp.
1022b51dab46SSudarsana Reddy Kalluru  *
102319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
102419198e4eSPrabhakar Kushwaha  * @p_ptt: PTT required for register access.
102519198e4eSPrabhakar Kushwaha  * @port: transceiver port.
102619198e4eSPrabhakar Kushwaha  * @addr: I2C address.
102719198e4eSPrabhakar Kushwaha  * @offset: offset in sfp.
102819198e4eSPrabhakar Kushwaha  * @len: buffer length.
102919198e4eSPrabhakar Kushwaha  * @p_buf: buffer to read into.
1030b51dab46SSudarsana Reddy Kalluru  *
103119198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
1032b51dab46SSudarsana Reddy Kalluru  */
1033b51dab46SSudarsana Reddy Kalluru int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1034b51dab46SSudarsana Reddy Kalluru 			 u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf);
1035b51dab46SSudarsana Reddy Kalluru 
1036b51dab46SSudarsana Reddy Kalluru /**
103719198e4eSPrabhakar Kushwaha  * qed_mcp_is_init(): indicates whether the MFW objects [under mcp_info]
103819198e4eSPrabhakar Kushwaha  *                    are accessible
1039fe56b9e6SYuval Mintz  *
104019198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
1041fe56b9e6SYuval Mintz  *
104219198e4eSPrabhakar Kushwaha  * Return: true if MFW is running and mcp_info is initialized.
1043fe56b9e6SYuval Mintz  */
1044fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
10451408cc1fSYuval Mintz 
10461408cc1fSYuval Mintz /**
104719198e4eSPrabhakar Kushwaha  * qed_mcp_config_vf_msix(): Request MFW to configure MSI-X for a VF.
10481408cc1fSYuval Mintz  *
104919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
105019198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
105119198e4eSPrabhakar Kushwaha  * @vf_id: absolute inside engine.
105219198e4eSPrabhakar Kushwaha  * @num: number of entries to request.
10531408cc1fSYuval Mintz  *
105419198e4eSPrabhakar Kushwaha  * Return: Int.
10551408cc1fSYuval Mintz  */
10561408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
10571408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
10581408cc1fSYuval Mintz 
10594102426fSTomer Tayar /**
106019198e4eSPrabhakar Kushwaha  * qed_mcp_halt(): Halt the MCP.
10614102426fSTomer Tayar  *
106219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
106319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
10644102426fSTomer Tayar  *
106519198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
10664102426fSTomer Tayar  */
10674102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
10684102426fSTomer Tayar 
10694102426fSTomer Tayar /**
107019198e4eSPrabhakar Kushwaha  * qed_mcp_resume: Wake up the MCP.
10714102426fSTomer Tayar  *
107219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
107319198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
10744102426fSTomer Tayar  *
107519198e4eSPrabhakar Kushwaha  * Return: 0 upon success.
10764102426fSTomer Tayar  */
10774102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
10784102426fSTomer Tayar 
1079a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
10804b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
10814b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
10824b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
10834b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
10844b01e519SManish Chopra 				     u8 max_bw);
1085a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
1086a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
1087a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
1088a64b02d5SManish Chopra 				     u8 min_bw);
1089351a4dedSYuval Mintz 
10904102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
10914102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
10924102426fSTomer Tayar 
109319198e4eSPrabhakar Kushwaha /* qed_mcp_mdump_get_retain(): Gets the mdump retained data from the MFW.
1094ebf64bf4SIgor Russkikh  *
109519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
109619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
109719198e4eSPrabhakar Kushwaha  * @p_mdump_retain: mdump retain.
1098ebf64bf4SIgor Russkikh  *
109919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
1100ebf64bf4SIgor Russkikh  */
1101ebf64bf4SIgor Russkikh int
1102ebf64bf4SIgor Russkikh qed_mcp_mdump_get_retain(struct qed_hwfn *p_hwfn,
1103ebf64bf4SIgor Russkikh 			 struct qed_ptt *p_ptt,
1104ebf64bf4SIgor Russkikh 			 struct mdump_retain_data_stc *p_mdump_retain);
1105ebf64bf4SIgor Russkikh 
11060fefbfbaSSudarsana Kalluru /**
110719198e4eSPrabhakar Kushwaha  * qed_mcp_set_resc_max_val(): Sets the MFW's max value for the given resource.
11089c8517c4STomer Tayar  *
110919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
111019198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
111119198e4eSPrabhakar Kushwaha  * @res_id: RES ID.
111219198e4eSPrabhakar Kushwaha  * @resc_max_val: Resec max val.
111319198e4eSPrabhakar Kushwaha  * @p_mcp_resp: MCP Resp
11149c8517c4STomer Tayar  *
111519198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
11169c8517c4STomer Tayar  */
11179c8517c4STomer Tayar int
11189c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
11199c8517c4STomer Tayar 			 struct qed_ptt *p_ptt,
11209c8517c4STomer Tayar 			 enum qed_resources res_id,
11219c8517c4STomer Tayar 			 u32 resc_max_val, u32 *p_mcp_resp);
11229c8517c4STomer Tayar 
11239c8517c4STomer Tayar /**
112419198e4eSPrabhakar Kushwaha  * qed_mcp_get_resc_info(): Gets the MFW allocation info for the given
112519198e4eSPrabhakar Kushwaha  *                          resource.
11269c8517c4STomer Tayar  *
112719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
112819198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
112919198e4eSPrabhakar Kushwaha  * @res_id: Res ID.
113019198e4eSPrabhakar Kushwaha  * @p_mcp_resp: MCP resp.
113119198e4eSPrabhakar Kushwaha  * @p_resc_num: Resc num.
113219198e4eSPrabhakar Kushwaha  * @p_resc_start: Resc start.
11339c8517c4STomer Tayar  *
113419198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
11359c8517c4STomer Tayar  */
11369c8517c4STomer Tayar int
11379c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
11389c8517c4STomer Tayar 		      struct qed_ptt *p_ptt,
11399c8517c4STomer Tayar 		      enum qed_resources res_id,
11409c8517c4STomer Tayar 		      u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
11419c8517c4STomer Tayar 
11429c8517c4STomer Tayar /**
114319198e4eSPrabhakar Kushwaha  * qed_mcp_ov_update_eswitch(): Send eswitch mode to MFW.
11440fefbfbaSSudarsana Kalluru  *
114519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
114619198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
114719198e4eSPrabhakar Kushwaha  * @eswitch: eswitch mode.
11480fefbfbaSSudarsana Kalluru  *
114919198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
11500fefbfbaSSudarsana Kalluru  */
11510fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
11520fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
11530fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
11540fefbfbaSSudarsana Kalluru 
11559c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL       RESOURCE_DUMP
11569c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL       31
11579c8517c4STomer Tayar 
11589c8517c4STomer Tayar enum qed_resc_lock {
11599c8517c4STomer Tayar 	QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
1160db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT0,
1161db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT1,
1162db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT2,
1163db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT3,
1164f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
1165f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_INVALID
11669c8517c4STomer Tayar };
116718a69e36SMintz, Yuval 
116818a69e36SMintz, Yuval /**
116919198e4eSPrabhakar Kushwaha  * qed_mcp_initiate_pf_flr(): Initiates PF FLR.
117018a69e36SMintz, Yuval  *
117119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
117219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
117318a69e36SMintz, Yuval  *
117419198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
117518a69e36SMintz, Yuval  */
117618a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
117795691c9cSTomer Tayar struct qed_resc_lock_params {
117895691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
117995691c9cSTomer Tayar 	u8 resource;
118095691c9cSTomer Tayar 
118195691c9cSTomer Tayar 	/* Lock timeout value in seconds [default, none or 1..254] */
118295691c9cSTomer Tayar 	u8 timeout;
118395691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT    0
118495691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE       255
118595691c9cSTomer Tayar 
118695691c9cSTomer Tayar 	/* Number of times to retry locking */
118795691c9cSTomer Tayar 	u8 retry_num;
1188f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT        10
118995691c9cSTomer Tayar 
119095691c9cSTomer Tayar 	/* The interval in usec between retries */
119195691c9cSTomer Tayar 	u16 retry_interval;
1192f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT        10000
119395691c9cSTomer Tayar 
119495691c9cSTomer Tayar 	/* Use sleep or delay between retries */
119595691c9cSTomer Tayar 	bool sleep_b4_retry;
119695691c9cSTomer Tayar 
119795691c9cSTomer Tayar 	/* Will be set as true if the resource is free and granted */
119895691c9cSTomer Tayar 	bool b_granted;
119995691c9cSTomer Tayar 
120095691c9cSTomer Tayar 	/* Will be filled with the resource owner.
120195691c9cSTomer Tayar 	 * [0..15 = PF0-15, 16 = MFW]
120295691c9cSTomer Tayar 	 */
120395691c9cSTomer Tayar 	u8 owner;
120495691c9cSTomer Tayar };
120595691c9cSTomer Tayar 
120695691c9cSTomer Tayar /**
120719198e4eSPrabhakar Kushwaha  * qed_mcp_resc_lock(): Acquires MFW generic resource lock.
120895691c9cSTomer Tayar  *
120919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
121019198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
121119198e4eSPrabhakar Kushwaha  * @p_params: Params.
121295691c9cSTomer Tayar  *
121319198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
121495691c9cSTomer Tayar  */
121595691c9cSTomer Tayar int
121695691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
121795691c9cSTomer Tayar 		  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
121895691c9cSTomer Tayar 
121995691c9cSTomer Tayar struct qed_resc_unlock_params {
122095691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
122195691c9cSTomer Tayar 	u8 resource;
122295691c9cSTomer Tayar 
122395691c9cSTomer Tayar 	/* Allow to release a resource even if belongs to another PF */
122495691c9cSTomer Tayar 	bool b_force;
122595691c9cSTomer Tayar 
122695691c9cSTomer Tayar 	/* Will be set as true if the resource is released */
122795691c9cSTomer Tayar 	bool b_released;
122895691c9cSTomer Tayar };
122995691c9cSTomer Tayar 
123095691c9cSTomer Tayar /**
123119198e4eSPrabhakar Kushwaha  * qed_mcp_resc_unlock(): Releases MFW generic resource lock.
123295691c9cSTomer Tayar  *
123319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
123419198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
123519198e4eSPrabhakar Kushwaha  * @p_params: Params.
123695691c9cSTomer Tayar  *
123719198e4eSPrabhakar Kushwaha  * Return: Int - 0 - Operation was successul.
123895691c9cSTomer Tayar  */
123995691c9cSTomer Tayar int
124095691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
124195691c9cSTomer Tayar 		    struct qed_ptt *p_ptt,
124295691c9cSTomer Tayar 		    struct qed_resc_unlock_params *p_params);
124395691c9cSTomer Tayar 
1244f470f22cSsudarsana.kalluru@cavium.com /**
124519198e4eSPrabhakar Kushwaha  * qed_mcp_resc_lock_default_init(): Default initialization for
124619198e4eSPrabhakar Kushwaha  *                                   lock/unlock resource structs.
1247f470f22cSsudarsana.kalluru@cavium.com  *
124819198e4eSPrabhakar Kushwaha  * @p_lock: lock params struct to be initialized; Can be NULL.
124919198e4eSPrabhakar Kushwaha  * @p_unlock: unlock params struct to be initialized; Can be NULL.
125019198e4eSPrabhakar Kushwaha  * @resource: the requested resource.
125119198e4eSPrabhakar Kushwaha  * @b_is_permanent: disable retries & aging when set.
125219198e4eSPrabhakar Kushwaha  *
125319198e4eSPrabhakar Kushwaha  * Return: Void.
1254f470f22cSsudarsana.kalluru@cavium.com  */
1255f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
1256f470f22cSsudarsana.kalluru@cavium.com 				    struct qed_resc_unlock_params *p_unlock,
1257f470f22cSsudarsana.kalluru@cavium.com 				    enum qed_resc_lock
1258f470f22cSsudarsana.kalluru@cavium.com 				    resource, bool b_is_permanent);
1259df9c716dSSudarsana Reddy Kalluru 
1260df9c716dSSudarsana Reddy Kalluru /**
126119198e4eSPrabhakar Kushwaha  * qed_mcp_is_smart_an_supported(): Return whether management firmware
126219198e4eSPrabhakar Kushwaha  *                                  support smart AN
1263df9c716dSSudarsana Reddy Kalluru  *
126419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
1265df9c716dSSudarsana Reddy Kalluru  *
126619198e4eSPrabhakar Kushwaha  * Return: bool true if feature is supported.
1267df9c716dSSudarsana Reddy Kalluru  */
1268df9c716dSSudarsana Reddy Kalluru bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn);
1269df9c716dSSudarsana Reddy Kalluru 
1270645874e5SSudarsana Reddy Kalluru /**
127119198e4eSPrabhakar Kushwaha  * qed_mcp_get_capabilities(): Learn of supported MFW features;
127219198e4eSPrabhakar Kushwaha  *                             To be done during early init.
1273645874e5SSudarsana Reddy Kalluru  *
127419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
127519198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
127619198e4eSPrabhakar Kushwaha  *
127719198e4eSPrabhakar Kushwaha  * Return: Int.
1278645874e5SSudarsana Reddy Kalluru  */
1279645874e5SSudarsana Reddy Kalluru int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1280f470f22cSsudarsana.kalluru@cavium.com 
1281645874e5SSudarsana Reddy Kalluru /**
128219198e4eSPrabhakar Kushwaha  * qed_mcp_set_capabilities(): Inform MFW of set of features supported
128319198e4eSPrabhakar Kushwaha  *                             by driver. Should be done inside the content
128419198e4eSPrabhakar Kushwaha  *                             of the LOAD_REQ.
1285645874e5SSudarsana Reddy Kalluru  *
128619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
128719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
128819198e4eSPrabhakar Kushwaha  *
128919198e4eSPrabhakar Kushwaha  * Return: Int.
1290645874e5SSudarsana Reddy Kalluru  */
1291645874e5SSudarsana Reddy Kalluru int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
129243645ce0SSudarsana Reddy Kalluru 
129343645ce0SSudarsana Reddy Kalluru /**
129419198e4eSPrabhakar Kushwaha  * qed_mcp_read_ufp_config(): Read ufp config from the shared memory.
1295cac6f691SSudarsana Reddy Kalluru  *
129619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
129719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
129819198e4eSPrabhakar Kushwaha  *
129919198e4eSPrabhakar Kushwaha  * Return: Void.
1300cac6f691SSudarsana Reddy Kalluru  */
1301cac6f691SSudarsana Reddy Kalluru void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1302cac6f691SSudarsana Reddy Kalluru 
1303cac6f691SSudarsana Reddy Kalluru /**
130419198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_info_populate(): Populate the nvm info shadow in the given
130519198e4eSPrabhakar Kushwaha  *                              hardware function.
130643645ce0SSudarsana Reddy Kalluru  *
130719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
130819198e4eSPrabhakar Kushwaha  *
130919198e4eSPrabhakar Kushwaha  * Return: Int.
131043645ce0SSudarsana Reddy Kalluru  */
131143645ce0SSudarsana Reddy Kalluru int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
131243645ce0SSudarsana Reddy Kalluru 
131379284adeSMichal Kalderon /**
131419198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_info_free(): Delete nvm info shadow in the given
131519198e4eSPrabhakar Kushwaha  *                          hardware function.
131613cf8aabSSudarsana Reddy Kalluru  *
131719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
131819198e4eSPrabhakar Kushwaha  *
131919198e4eSPrabhakar Kushwaha  * Return: Void.
132013cf8aabSSudarsana Reddy Kalluru  */
132113cf8aabSSudarsana Reddy Kalluru void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn);
132213cf8aabSSudarsana Reddy Kalluru 
132313cf8aabSSudarsana Reddy Kalluru /**
132419198e4eSPrabhakar Kushwaha  * qed_mcp_get_engine_config(): Get the engine affinity configuration.
132579284adeSMichal Kalderon  *
132619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
132719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
132819198e4eSPrabhakar Kushwaha  *
132919198e4eSPrabhakar Kushwaha  * Return: Int.
133079284adeSMichal Kalderon  */
133179284adeSMichal Kalderon int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
133279284adeSMichal Kalderon 
133379284adeSMichal Kalderon /**
133419198e4eSPrabhakar Kushwaha  * qed_mcp_get_ppfid_bitmap(): Get the PPFID bitmap.
133579284adeSMichal Kalderon  *
133619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
133719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
133819198e4eSPrabhakar Kushwaha  *
133919198e4eSPrabhakar Kushwaha  * Return: Int.
134079284adeSMichal Kalderon  */
134179284adeSMichal Kalderon int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
134279284adeSMichal Kalderon 
134338eabdf0SSudarsana Reddy Kalluru /**
134419198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_get_cfg(): Get NVM config attribute value.
13452d4c8495SSudarsana Reddy Kalluru  *
134619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
134719198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
134819198e4eSPrabhakar Kushwaha  * @option_id: Option ID.
134919198e4eSPrabhakar Kushwaha  * @entity_id: Entity ID.
135019198e4eSPrabhakar Kushwaha  * @flags: Flags.
135119198e4eSPrabhakar Kushwaha  * @p_buf: Buf.
135219198e4eSPrabhakar Kushwaha  * @p_len: Len.
135319198e4eSPrabhakar Kushwaha  *
135419198e4eSPrabhakar Kushwaha  * Return: Int.
13552d4c8495SSudarsana Reddy Kalluru  */
13562d4c8495SSudarsana Reddy Kalluru int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
13572d4c8495SSudarsana Reddy Kalluru 			u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
13582d4c8495SSudarsana Reddy Kalluru 			u32 *p_len);
13592d4c8495SSudarsana Reddy Kalluru 
13602d4c8495SSudarsana Reddy Kalluru /**
136119198e4eSPrabhakar Kushwaha  * qed_mcp_nvm_set_cfg(): Set NVM config attribute value.
136238eabdf0SSudarsana Reddy Kalluru  *
136319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
136419198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
136519198e4eSPrabhakar Kushwaha  * @option_id: Option ID.
136619198e4eSPrabhakar Kushwaha  * @entity_id: Entity ID.
136719198e4eSPrabhakar Kushwaha  * @flags: Flags.
136819198e4eSPrabhakar Kushwaha  * @p_buf: Buf.
136919198e4eSPrabhakar Kushwaha  * @len: Len.
137019198e4eSPrabhakar Kushwaha  *
137119198e4eSPrabhakar Kushwaha  * Return: Int.
137238eabdf0SSudarsana Reddy Kalluru  */
137338eabdf0SSudarsana Reddy Kalluru int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
137438eabdf0SSudarsana Reddy Kalluru 			u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
137538eabdf0SSudarsana Reddy Kalluru 			u32 len);
1376823163baSManish Chopra 
1377823163baSManish Chopra /**
1378823163baSManish Chopra  * qed_mcp_is_esl_supported(): Return whether management firmware support ESL or not.
1379823163baSManish Chopra  *
1380823163baSManish Chopra  * @p_hwfn: hw function pointer
1381823163baSManish Chopra  *
1382823163baSManish Chopra  * Return: true if esl is supported, otherwise return false
1383823163baSManish Chopra  */
1384823163baSManish Chopra bool qed_mcp_is_esl_supported(struct qed_hwfn *p_hwfn);
1385823163baSManish Chopra 
1386823163baSManish Chopra /**
1387823163baSManish Chopra  * qed_mcp_get_esl_status(): Get enhanced system lockdown status
1388823163baSManish Chopra  *
1389823163baSManish Chopra  * @p_hwfn: hw function pointer
1390823163baSManish Chopra  * @p_ptt: ptt resource pointer
1391823163baSManish Chopra  * @active: ESL active status data pointer
1392823163baSManish Chopra  *
1393823163baSManish Chopra  * Return: 0 with esl status info on success, otherwise return error
1394823163baSManish Chopra  */
1395823163baSManish Chopra int qed_mcp_get_esl_status(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool *active);
1396fe56b9e6SYuval Mintz #endif
1397