1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data) 162 { 163 struct qed_hwfn *p_hwfn = cxt; 164 struct qed_ll2_buffer *buffer = data->cookie; 165 struct qed_dev *cdev = p_hwfn->cdev; 166 dma_addr_t new_phys_addr; 167 struct sk_buff *skb; 168 bool reuse = false; 169 int rc = -EINVAL; 170 u8 *new_data; 171 172 DP_VERBOSE(p_hwfn, 173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 175 (u64)data->rx_buf_addr, 176 data->u.placement_offset, 177 data->length.packet_length, 178 data->parse_flags, 179 data->vlan, data->opaque_data_0, data->opaque_data_1); 180 181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 182 print_hex_dump(KERN_INFO, "", 183 DUMP_PREFIX_OFFSET, 16, 1, 184 buffer->data, data->length.packet_length, false); 185 } 186 187 /* Determine if data is valid */ 188 if (data->length.packet_length < ETH_HLEN) 189 reuse = true; 190 191 /* Allocate a replacement for buffer; Reuse upon failure */ 192 if (!reuse) 193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 194 &new_phys_addr); 195 196 /* If need to reuse or there's no replacement buffer, repost this */ 197 if (rc) 198 goto out_post; 199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 200 cdev->ll2->rx_size, DMA_FROM_DEVICE); 201 202 skb = build_skb(buffer->data, 0); 203 if (!skb) { 204 rc = -ENOMEM; 205 goto out_post; 206 } 207 208 data->u.placement_offset += NET_SKB_PAD; 209 skb_reserve(skb, data->u.placement_offset); 210 skb_put(skb, data->length.packet_length); 211 skb_checksum_none_assert(skb); 212 213 /* Get parital ethernet information instead of eth_type_trans(), 214 * Since we don't have an associated net_device. 215 */ 216 skb_reset_mac_header(skb); 217 skb->protocol = eth_hdr(skb)->h_proto; 218 219 /* Pass SKB onward */ 220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 221 if (data->vlan) 222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 223 data->vlan); 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 225 data->opaque_data_0, 226 data->opaque_data_1); 227 } 228 229 /* Update Buffer information and update FW producer */ 230 buffer->data = new_data; 231 buffer->phys_addr = new_phys_addr; 232 233 out_post: 234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 235 buffer->phys_addr, 0, buffer, 1); 236 237 if (rc) 238 qed_ll2_dealloc_buffer(cdev, buffer); 239 } 240 241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 242 u8 connection_handle, 243 bool b_lock, 244 bool b_only_active) 245 { 246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 247 248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 249 return NULL; 250 251 if (!p_hwfn->p_ll2_info) 252 return NULL; 253 254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 255 256 if (b_only_active) { 257 if (b_lock) 258 mutex_lock(&p_ll2_conn->mutex); 259 if (p_ll2_conn->b_active) 260 p_ret = p_ll2_conn; 261 if (b_lock) 262 mutex_unlock(&p_ll2_conn->mutex); 263 } else { 264 p_ret = p_ll2_conn; 265 } 266 267 return p_ret; 268 } 269 270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 271 u8 connection_handle) 272 { 273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 274 } 275 276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 277 u8 connection_handle) 278 { 279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 280 } 281 282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 283 *p_hwfn, 284 u8 connection_handle) 285 { 286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 287 } 288 289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 290 { 291 bool b_last_packet = false, b_last_frag = false; 292 struct qed_ll2_tx_packet *p_pkt = NULL; 293 struct qed_ll2_info *p_ll2_conn; 294 struct qed_ll2_tx_queue *p_tx; 295 dma_addr_t tx_frag; 296 297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 298 if (!p_ll2_conn) 299 return; 300 301 p_tx = &p_ll2_conn->tx_queue; 302 303 while (!list_empty(&p_tx->active_descq)) { 304 p_pkt = list_first_entry(&p_tx->active_descq, 305 struct qed_ll2_tx_packet, list_entry); 306 if (!p_pkt) 307 break; 308 309 list_del(&p_pkt->list_entry); 310 b_last_packet = list_empty(&p_tx->active_descq); 311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 313 struct qed_ooo_buffer *p_buffer; 314 315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 317 p_buffer); 318 } else { 319 p_tx->cur_completing_packet = *p_pkt; 320 p_tx->cur_completing_bd_idx = 1; 321 b_last_frag = 322 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 323 tx_frag = p_pkt->bds_set[0].tx_frag; 324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 325 p_ll2_conn->my_id, 326 p_pkt->cookie, 327 tx_frag, 328 b_last_frag, 329 b_last_packet); 330 } 331 } 332 } 333 334 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 335 { 336 struct qed_ll2_info *p_ll2_conn = p_cookie; 337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 339 struct qed_ll2_tx_packet *p_pkt; 340 bool b_last_frag = false; 341 unsigned long flags; 342 int rc = -EINVAL; 343 344 spin_lock_irqsave(&p_tx->lock, flags); 345 if (p_tx->b_completing_packet) { 346 rc = -EBUSY; 347 goto out; 348 } 349 350 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 352 while (num_bds) { 353 if (list_empty(&p_tx->active_descq)) 354 goto out; 355 356 p_pkt = list_first_entry(&p_tx->active_descq, 357 struct qed_ll2_tx_packet, list_entry); 358 if (!p_pkt) 359 goto out; 360 361 p_tx->b_completing_packet = true; 362 p_tx->cur_completing_packet = *p_pkt; 363 num_bds_in_packet = p_pkt->bd_used; 364 list_del(&p_pkt->list_entry); 365 366 if (num_bds < num_bds_in_packet) { 367 DP_NOTICE(p_hwfn, 368 "Rest of BDs does not cover whole packet\n"); 369 goto out; 370 } 371 372 num_bds -= num_bds_in_packet; 373 p_tx->bds_idx += num_bds_in_packet; 374 while (num_bds_in_packet--) 375 qed_chain_consume(&p_tx->txq_chain); 376 377 p_tx->cur_completing_bd_idx = 1; 378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 380 381 spin_unlock_irqrestore(&p_tx->lock, flags); 382 383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 384 p_ll2_conn->my_id, 385 p_pkt->cookie, 386 p_pkt->bds_set[0].tx_frag, 387 b_last_frag, !num_bds); 388 389 spin_lock_irqsave(&p_tx->lock, flags); 390 } 391 392 p_tx->b_completing_packet = false; 393 rc = 0; 394 out: 395 spin_unlock_irqrestore(&p_tx->lock, flags); 396 return rc; 397 } 398 399 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 400 union core_rx_cqe_union *p_cqe, 401 struct qed_ll2_comp_rx_data *data) 402 { 403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 409 } 410 411 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 412 union core_rx_cqe_union *p_cqe, 413 struct qed_ll2_comp_rx_data *data) 414 { 415 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 416 data->length.packet_length = 417 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 418 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 419 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 420 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 421 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 422 } 423 424 static int 425 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 426 struct qed_ll2_info *p_ll2_conn, 427 union core_rx_cqe_union *p_cqe, 428 unsigned long *p_lock_flags, bool b_last_cqe) 429 { 430 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 431 struct qed_ll2_rx_packet *p_pkt = NULL; 432 struct qed_ll2_comp_rx_data data; 433 434 if (!list_empty(&p_rx->active_descq)) 435 p_pkt = list_first_entry(&p_rx->active_descq, 436 struct qed_ll2_rx_packet, list_entry); 437 if (!p_pkt) { 438 DP_NOTICE(p_hwfn, 439 "[%d] LL2 Rx completion but active_descq is empty\n", 440 p_ll2_conn->input.conn_type); 441 442 return -EIO; 443 } 444 list_del(&p_pkt->list_entry); 445 446 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 447 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 448 else 449 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 450 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 451 DP_NOTICE(p_hwfn, 452 "Mismatch between active_descq and the LL2 Rx chain\n"); 453 454 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 455 456 data.connection_handle = p_ll2_conn->my_id; 457 data.cookie = p_pkt->cookie; 458 data.rx_buf_addr = p_pkt->rx_buf_addr; 459 data.b_last_packet = b_last_cqe; 460 461 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 462 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 463 464 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 465 466 return 0; 467 } 468 469 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 470 { 471 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 472 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 473 union core_rx_cqe_union *cqe = NULL; 474 u16 cq_new_idx = 0, cq_old_idx = 0; 475 unsigned long flags = 0; 476 int rc = 0; 477 478 spin_lock_irqsave(&p_rx->lock, flags); 479 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 480 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 481 482 while (cq_new_idx != cq_old_idx) { 483 bool b_last_cqe = (cq_new_idx == cq_old_idx); 484 485 cqe = 486 (union core_rx_cqe_union *) 487 qed_chain_consume(&p_rx->rcq_chain); 488 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 489 490 DP_VERBOSE(p_hwfn, 491 QED_MSG_LL2, 492 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 493 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 494 495 switch (cqe->rx_cqe_sp.type) { 496 case CORE_RX_CQE_TYPE_SLOW_PATH: 497 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n"); 498 rc = -EINVAL; 499 break; 500 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 501 case CORE_RX_CQE_TYPE_REGULAR: 502 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 503 cqe, &flags, 504 b_last_cqe); 505 break; 506 default: 507 rc = -EIO; 508 } 509 } 510 511 spin_unlock_irqrestore(&p_rx->lock, flags); 512 return rc; 513 } 514 515 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 516 { 517 struct qed_ll2_info *p_ll2_conn = NULL; 518 struct qed_ll2_rx_packet *p_pkt = NULL; 519 struct qed_ll2_rx_queue *p_rx; 520 521 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 522 if (!p_ll2_conn) 523 return; 524 525 p_rx = &p_ll2_conn->rx_queue; 526 527 while (!list_empty(&p_rx->active_descq)) { 528 p_pkt = list_first_entry(&p_rx->active_descq, 529 struct qed_ll2_rx_packet, list_entry); 530 if (!p_pkt) 531 break; 532 533 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 534 535 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 536 struct qed_ooo_buffer *p_buffer; 537 538 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 539 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 540 p_buffer); 541 } else { 542 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 543 void *cookie = p_pkt->cookie; 544 bool b_last; 545 546 b_last = list_empty(&p_rx->active_descq); 547 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 548 p_ll2_conn->my_id, 549 cookie, 550 rx_buf_addr, b_last); 551 } 552 } 553 } 554 555 static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags) 556 { 557 u8 bd_flags = 0; 558 559 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST)) 560 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1); 561 562 return bd_flags; 563 } 564 565 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 566 struct qed_ll2_info *p_ll2_conn) 567 { 568 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 569 u16 packet_length = 0, parse_flags = 0, vlan = 0; 570 struct qed_ll2_rx_packet *p_pkt = NULL; 571 u32 num_ooo_add_to_peninsula = 0, cid; 572 union core_rx_cqe_union *cqe = NULL; 573 u16 cq_new_idx = 0, cq_old_idx = 0; 574 struct qed_ooo_buffer *p_buffer; 575 struct ooo_opaque *iscsi_ooo; 576 u8 placement_offset = 0; 577 u8 cqe_type; 578 579 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 580 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 581 if (cq_new_idx == cq_old_idx) 582 return 0; 583 584 while (cq_new_idx != cq_old_idx) { 585 struct core_rx_fast_path_cqe *p_cqe_fp; 586 587 cqe = qed_chain_consume(&p_rx->rcq_chain); 588 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 589 cqe_type = cqe->rx_cqe_sp.type; 590 591 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 592 DP_NOTICE(p_hwfn, 593 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 594 cqe_type); 595 return -EINVAL; 596 } 597 p_cqe_fp = &cqe->rx_cqe_fp; 598 599 placement_offset = p_cqe_fp->placement_offset; 600 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 601 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 602 vlan = le16_to_cpu(p_cqe_fp->vlan); 603 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 604 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 605 iscsi_ooo); 606 cid = le32_to_cpu(iscsi_ooo->cid); 607 608 /* Process delete isle first */ 609 if (iscsi_ooo->drop_size) 610 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 611 iscsi_ooo->drop_isle, 612 iscsi_ooo->drop_size); 613 614 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 615 continue; 616 617 /* Now process create/add/join isles */ 618 if (list_empty(&p_rx->active_descq)) { 619 DP_NOTICE(p_hwfn, 620 "LL2 OOO RX chain has no submitted buffers\n" 621 ); 622 return -EIO; 623 } 624 625 p_pkt = list_first_entry(&p_rx->active_descq, 626 struct qed_ll2_rx_packet, list_entry); 627 628 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 629 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 630 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 631 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 632 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 633 if (!p_pkt) { 634 DP_NOTICE(p_hwfn, 635 "LL2 OOO RX packet is not valid\n"); 636 return -EIO; 637 } 638 list_del(&p_pkt->list_entry); 639 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 640 p_buffer->packet_length = packet_length; 641 p_buffer->parse_flags = parse_flags; 642 p_buffer->vlan = vlan; 643 p_buffer->placement_offset = placement_offset; 644 qed_chain_consume(&p_rx->rxq_chain); 645 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 646 647 switch (iscsi_ooo->ooo_opcode) { 648 case TCP_EVENT_ADD_NEW_ISLE: 649 qed_ooo_add_new_isle(p_hwfn, 650 p_hwfn->p_ooo_info, 651 cid, 652 iscsi_ooo->ooo_isle, 653 p_buffer); 654 break; 655 case TCP_EVENT_ADD_ISLE_RIGHT: 656 qed_ooo_add_new_buffer(p_hwfn, 657 p_hwfn->p_ooo_info, 658 cid, 659 iscsi_ooo->ooo_isle, 660 p_buffer, 661 QED_OOO_RIGHT_BUF); 662 break; 663 case TCP_EVENT_ADD_ISLE_LEFT: 664 qed_ooo_add_new_buffer(p_hwfn, 665 p_hwfn->p_ooo_info, 666 cid, 667 iscsi_ooo->ooo_isle, 668 p_buffer, 669 QED_OOO_LEFT_BUF); 670 break; 671 case TCP_EVENT_JOIN: 672 qed_ooo_add_new_buffer(p_hwfn, 673 p_hwfn->p_ooo_info, 674 cid, 675 iscsi_ooo->ooo_isle + 676 1, 677 p_buffer, 678 QED_OOO_LEFT_BUF); 679 qed_ooo_join_isles(p_hwfn, 680 p_hwfn->p_ooo_info, 681 cid, iscsi_ooo->ooo_isle); 682 break; 683 case TCP_EVENT_ADD_PEN: 684 num_ooo_add_to_peninsula++; 685 qed_ooo_put_ready_buffer(p_hwfn, 686 p_hwfn->p_ooo_info, 687 p_buffer, true); 688 break; 689 } 690 } else { 691 DP_NOTICE(p_hwfn, 692 "Unexpected event (%d) TX OOO completion\n", 693 iscsi_ooo->ooo_opcode); 694 } 695 } 696 697 return 0; 698 } 699 700 static void 701 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 702 struct qed_ll2_info *p_ll2_conn) 703 { 704 struct qed_ll2_tx_pkt_info tx_pkt; 705 struct qed_ooo_buffer *p_buffer; 706 u16 l4_hdr_offset_w; 707 dma_addr_t first_frag; 708 u16 parse_flags; 709 u8 bd_flags; 710 int rc; 711 712 /* Submit Tx buffers here */ 713 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 714 p_hwfn->p_ooo_info))) { 715 l4_hdr_offset_w = 0; 716 bd_flags = 0; 717 718 first_frag = p_buffer->rx_buffer_phys_addr + 719 p_buffer->placement_offset; 720 parse_flags = p_buffer->parse_flags; 721 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags); 722 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 723 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 724 725 memset(&tx_pkt, 0, sizeof(tx_pkt)); 726 tx_pkt.num_of_bds = 1; 727 tx_pkt.vlan = p_buffer->vlan; 728 tx_pkt.bd_flags = bd_flags; 729 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 730 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 731 tx_pkt.first_frag = first_frag; 732 tx_pkt.first_frag_len = p_buffer->packet_length; 733 tx_pkt.cookie = p_buffer; 734 735 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 736 &tx_pkt, true); 737 if (rc) { 738 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 739 p_buffer, false); 740 break; 741 } 742 } 743 } 744 745 static void 746 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 747 struct qed_ll2_info *p_ll2_conn) 748 { 749 struct qed_ooo_buffer *p_buffer; 750 int rc; 751 752 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 753 p_hwfn->p_ooo_info))) { 754 rc = qed_ll2_post_rx_buffer(p_hwfn, 755 p_ll2_conn->my_id, 756 p_buffer->rx_buffer_phys_addr, 757 0, p_buffer, true); 758 if (rc) { 759 qed_ooo_put_free_buffer(p_hwfn, 760 p_hwfn->p_ooo_info, p_buffer); 761 break; 762 } 763 } 764 } 765 766 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 767 { 768 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 769 int rc; 770 771 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 772 if (rc) 773 return rc; 774 775 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 776 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 777 778 return 0; 779 } 780 781 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 782 { 783 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 784 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 785 struct qed_ll2_tx_packet *p_pkt = NULL; 786 struct qed_ooo_buffer *p_buffer; 787 bool b_dont_submit_rx = false; 788 u16 new_idx = 0, num_bds = 0; 789 int rc; 790 791 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 792 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 793 794 if (!num_bds) 795 return 0; 796 797 while (num_bds) { 798 if (list_empty(&p_tx->active_descq)) 799 return -EINVAL; 800 801 p_pkt = list_first_entry(&p_tx->active_descq, 802 struct qed_ll2_tx_packet, list_entry); 803 if (!p_pkt) 804 return -EINVAL; 805 806 if (p_pkt->bd_used != 1) { 807 DP_NOTICE(p_hwfn, 808 "Unexpectedly many BDs(%d) in TX OOO completion\n", 809 p_pkt->bd_used); 810 return -EINVAL; 811 } 812 813 list_del(&p_pkt->list_entry); 814 815 num_bds--; 816 p_tx->bds_idx++; 817 qed_chain_consume(&p_tx->txq_chain); 818 819 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 820 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 821 822 if (b_dont_submit_rx) { 823 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 824 p_buffer); 825 continue; 826 } 827 828 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 829 p_buffer->rx_buffer_phys_addr, 0, 830 p_buffer, true); 831 if (rc != 0) { 832 qed_ooo_put_free_buffer(p_hwfn, 833 p_hwfn->p_ooo_info, p_buffer); 834 b_dont_submit_rx = true; 835 } 836 } 837 838 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 839 840 return 0; 841 } 842 843 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 844 { 845 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 846 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 847 848 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 849 *handle); 850 851 qed_ll2_terminate_connection(hwfn, *handle); 852 qed_ll2_release_connection(hwfn, *handle); 853 *handle = QED_LL2_UNUSED_HANDLE; 854 } 855 856 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 857 struct qed_ll2_info *p_ll2_conn, 858 u8 action_on_error) 859 { 860 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 861 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 862 struct core_rx_start_ramrod_data *p_ramrod = NULL; 863 struct qed_spq_entry *p_ent = NULL; 864 struct qed_sp_init_data init_data; 865 u16 cqe_pbl_size; 866 int rc = 0; 867 868 /* Get SPQ entry */ 869 memset(&init_data, 0, sizeof(init_data)); 870 init_data.cid = p_ll2_conn->cid; 871 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 872 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 873 874 rc = qed_sp_init_request(p_hwfn, &p_ent, 875 CORE_RAMROD_RX_QUEUE_START, 876 PROTOCOLID_CORE, &init_data); 877 if (rc) 878 return rc; 879 880 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 881 882 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 883 p_ramrod->sb_index = p_rx->rx_sb_index; 884 p_ramrod->complete_event_flg = 1; 885 886 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 887 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 888 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 889 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 890 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 891 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 892 893 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 894 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en; 895 p_ramrod->queue_id = p_ll2_conn->queue_id; 896 p_ramrod->main_func_queue = (conn_type == QED_LL2_TYPE_OOO) ? 0 : 1; 897 898 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) && 899 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) && 900 (conn_type != QED_LL2_TYPE_IWARP)) { 901 p_ramrod->mf_si_bcast_accept_all = 1; 902 p_ramrod->mf_si_mcast_accept_all = 1; 903 } else { 904 p_ramrod->mf_si_bcast_accept_all = 0; 905 p_ramrod->mf_si_mcast_accept_all = 0; 906 } 907 908 p_ramrod->action_on_error.error_type = action_on_error; 909 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 910 return qed_spq_post(p_hwfn, p_ent, NULL); 911 } 912 913 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 914 struct qed_ll2_info *p_ll2_conn) 915 { 916 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 917 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 918 struct core_tx_start_ramrod_data *p_ramrod = NULL; 919 struct qed_spq_entry *p_ent = NULL; 920 struct qed_sp_init_data init_data; 921 u16 pq_id = 0, pbl_size; 922 int rc = -EINVAL; 923 924 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 925 return 0; 926 927 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 928 p_ll2_conn->tx_stats_en = 0; 929 else 930 p_ll2_conn->tx_stats_en = 1; 931 932 /* Get SPQ entry */ 933 memset(&init_data, 0, sizeof(init_data)); 934 init_data.cid = p_ll2_conn->cid; 935 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 936 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 937 938 rc = qed_sp_init_request(p_hwfn, &p_ent, 939 CORE_RAMROD_TX_QUEUE_START, 940 PROTOCOLID_CORE, &init_data); 941 if (rc) 942 return rc; 943 944 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 945 946 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 947 p_ramrod->sb_index = p_tx->tx_sb_index; 948 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 949 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 950 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 951 952 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 953 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 954 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 955 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 956 957 switch (p_ll2_conn->input.tx_tc) { 958 case PURE_LB_TC: 959 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 960 break; 961 case PKT_LB_TC: 962 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 963 break; 964 default: 965 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 966 break; 967 } 968 969 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 970 971 switch (conn_type) { 972 case QED_LL2_TYPE_FCOE: 973 p_ramrod->conn_type = PROTOCOLID_FCOE; 974 break; 975 case QED_LL2_TYPE_ISCSI: 976 p_ramrod->conn_type = PROTOCOLID_ISCSI; 977 break; 978 case QED_LL2_TYPE_ROCE: 979 p_ramrod->conn_type = PROTOCOLID_ROCE; 980 break; 981 case QED_LL2_TYPE_IWARP: 982 p_ramrod->conn_type = PROTOCOLID_IWARP; 983 break; 984 case QED_LL2_TYPE_OOO: 985 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 986 p_ramrod->conn_type = PROTOCOLID_ISCSI; 987 else 988 p_ramrod->conn_type = PROTOCOLID_IWARP; 989 break; 990 default: 991 p_ramrod->conn_type = PROTOCOLID_ETH; 992 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 993 } 994 995 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 996 997 return qed_spq_post(p_hwfn, p_ent, NULL); 998 } 999 1000 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1001 struct qed_ll2_info *p_ll2_conn) 1002 { 1003 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1004 struct qed_spq_entry *p_ent = NULL; 1005 struct qed_sp_init_data init_data; 1006 int rc = -EINVAL; 1007 1008 /* Get SPQ entry */ 1009 memset(&init_data, 0, sizeof(init_data)); 1010 init_data.cid = p_ll2_conn->cid; 1011 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1012 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1013 1014 rc = qed_sp_init_request(p_hwfn, &p_ent, 1015 CORE_RAMROD_RX_QUEUE_STOP, 1016 PROTOCOLID_CORE, &init_data); 1017 if (rc) 1018 return rc; 1019 1020 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1021 1022 p_ramrod->complete_event_flg = 1; 1023 p_ramrod->queue_id = p_ll2_conn->queue_id; 1024 1025 return qed_spq_post(p_hwfn, p_ent, NULL); 1026 } 1027 1028 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1029 struct qed_ll2_info *p_ll2_conn) 1030 { 1031 struct qed_spq_entry *p_ent = NULL; 1032 struct qed_sp_init_data init_data; 1033 int rc = -EINVAL; 1034 1035 /* Get SPQ entry */ 1036 memset(&init_data, 0, sizeof(init_data)); 1037 init_data.cid = p_ll2_conn->cid; 1038 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1039 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1040 1041 rc = qed_sp_init_request(p_hwfn, &p_ent, 1042 CORE_RAMROD_TX_QUEUE_STOP, 1043 PROTOCOLID_CORE, &init_data); 1044 if (rc) 1045 return rc; 1046 1047 return qed_spq_post(p_hwfn, p_ent, NULL); 1048 } 1049 1050 static int 1051 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1052 struct qed_ll2_info *p_ll2_info) 1053 { 1054 struct qed_ll2_rx_packet *p_descq; 1055 u32 capacity; 1056 int rc = 0; 1057 1058 if (!p_ll2_info->input.rx_num_desc) 1059 goto out; 1060 1061 rc = qed_chain_alloc(p_hwfn->cdev, 1062 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1063 QED_CHAIN_MODE_NEXT_PTR, 1064 QED_CHAIN_CNT_TYPE_U16, 1065 p_ll2_info->input.rx_num_desc, 1066 sizeof(struct core_rx_bd), 1067 &p_ll2_info->rx_queue.rxq_chain, NULL); 1068 if (rc) { 1069 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1070 goto out; 1071 } 1072 1073 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1074 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1075 GFP_KERNEL); 1076 if (!p_descq) { 1077 rc = -ENOMEM; 1078 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1079 goto out; 1080 } 1081 p_ll2_info->rx_queue.descq_array = p_descq; 1082 1083 rc = qed_chain_alloc(p_hwfn->cdev, 1084 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1085 QED_CHAIN_MODE_PBL, 1086 QED_CHAIN_CNT_TYPE_U16, 1087 p_ll2_info->input.rx_num_desc, 1088 sizeof(struct core_rx_fast_path_cqe), 1089 &p_ll2_info->rx_queue.rcq_chain, NULL); 1090 if (rc) { 1091 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1092 goto out; 1093 } 1094 1095 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1096 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1097 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1098 1099 out: 1100 return rc; 1101 } 1102 1103 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1104 struct qed_ll2_info *p_ll2_info) 1105 { 1106 struct qed_ll2_tx_packet *p_descq; 1107 u32 capacity; 1108 int rc = 0; 1109 1110 if (!p_ll2_info->input.tx_num_desc) 1111 goto out; 1112 1113 rc = qed_chain_alloc(p_hwfn->cdev, 1114 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1115 QED_CHAIN_MODE_PBL, 1116 QED_CHAIN_CNT_TYPE_U16, 1117 p_ll2_info->input.tx_num_desc, 1118 sizeof(struct core_tx_bd), 1119 &p_ll2_info->tx_queue.txq_chain, NULL); 1120 if (rc) 1121 goto out; 1122 1123 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1124 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_tx_packet), 1125 GFP_KERNEL); 1126 if (!p_descq) { 1127 rc = -ENOMEM; 1128 goto out; 1129 } 1130 p_ll2_info->tx_queue.descq_array = p_descq; 1131 1132 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1133 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1134 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1135 1136 out: 1137 if (rc) 1138 DP_NOTICE(p_hwfn, 1139 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1140 p_ll2_info->input.tx_num_desc); 1141 return rc; 1142 } 1143 1144 static int 1145 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1146 struct qed_ll2_info *p_ll2_info, u16 mtu) 1147 { 1148 struct qed_ooo_buffer *p_buf = NULL; 1149 void *p_virt; 1150 u16 buf_idx; 1151 int rc = 0; 1152 1153 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1154 return rc; 1155 1156 /* Correct number of requested OOO buffers if needed */ 1157 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1158 u16 num_desc = p_ll2_info->input.rx_num_desc; 1159 1160 if (!num_desc) 1161 return -EINVAL; 1162 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1163 } 1164 1165 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1166 buf_idx++) { 1167 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1168 if (!p_buf) { 1169 rc = -ENOMEM; 1170 goto out; 1171 } 1172 1173 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1174 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1175 ETH_CACHE_LINE_SIZE - 1) & 1176 ~(ETH_CACHE_LINE_SIZE - 1); 1177 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1178 p_buf->rx_buffer_size, 1179 &p_buf->rx_buffer_phys_addr, 1180 GFP_KERNEL); 1181 if (!p_virt) { 1182 kfree(p_buf); 1183 rc = -ENOMEM; 1184 goto out; 1185 } 1186 1187 p_buf->rx_buffer_virt_addr = p_virt; 1188 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1189 } 1190 1191 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1192 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1193 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1194 1195 out: 1196 return rc; 1197 } 1198 1199 static int 1200 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1201 { 1202 if (!cbs || (!cbs->rx_comp_cb || 1203 !cbs->rx_release_cb || 1204 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1205 return -EINVAL; 1206 1207 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1208 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1209 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1210 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1211 p_ll2_info->cbs.cookie = cbs->cookie; 1212 1213 return 0; 1214 } 1215 1216 static enum core_error_handle 1217 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1218 { 1219 switch (err) { 1220 case QED_LL2_DROP_PACKET: 1221 return LL2_DROP_PACKET; 1222 case QED_LL2_DO_NOTHING: 1223 return LL2_DO_NOTHING; 1224 case QED_LL2_ASSERT: 1225 return LL2_ASSERT; 1226 default: 1227 return LL2_DO_NOTHING; 1228 } 1229 } 1230 1231 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1232 { 1233 struct qed_hwfn *p_hwfn = cxt; 1234 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1235 struct qed_ll2_info *p_ll2_info = NULL; 1236 u8 i, *p_tx_max; 1237 int rc; 1238 1239 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1240 return -EINVAL; 1241 1242 /* Find a free connection to be used */ 1243 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1244 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1245 if (p_hwfn->p_ll2_info[i].b_active) { 1246 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1247 continue; 1248 } 1249 1250 p_hwfn->p_ll2_info[i].b_active = true; 1251 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1252 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1253 break; 1254 } 1255 if (!p_ll2_info) 1256 return -EBUSY; 1257 1258 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1259 1260 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ? 1261 CORE_TX_DEST_NW : CORE_TX_DEST_LB; 1262 1263 /* Correct maximum number of Tx BDs */ 1264 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1265 if (*p_tx_max == 0) 1266 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1267 else 1268 *p_tx_max = min_t(u8, *p_tx_max, 1269 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1270 1271 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1272 if (rc) { 1273 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1274 goto q_allocate_fail; 1275 } 1276 1277 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1278 if (rc) 1279 goto q_allocate_fail; 1280 1281 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1282 if (rc) 1283 goto q_allocate_fail; 1284 1285 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1286 data->input.mtu); 1287 if (rc) 1288 goto q_allocate_fail; 1289 1290 /* Register callbacks for the Rx/Tx queues */ 1291 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1292 comp_rx_cb = qed_ll2_lb_rxq_completion; 1293 comp_tx_cb = qed_ll2_lb_txq_completion; 1294 } else { 1295 comp_rx_cb = qed_ll2_rxq_completion; 1296 comp_tx_cb = qed_ll2_txq_completion; 1297 } 1298 1299 if (data->input.rx_num_desc) { 1300 qed_int_register_cb(p_hwfn, comp_rx_cb, 1301 &p_hwfn->p_ll2_info[i], 1302 &p_ll2_info->rx_queue.rx_sb_index, 1303 &p_ll2_info->rx_queue.p_fw_cons); 1304 p_ll2_info->rx_queue.b_cb_registred = true; 1305 } 1306 1307 if (data->input.tx_num_desc) { 1308 qed_int_register_cb(p_hwfn, 1309 comp_tx_cb, 1310 &p_hwfn->p_ll2_info[i], 1311 &p_ll2_info->tx_queue.tx_sb_index, 1312 &p_ll2_info->tx_queue.p_fw_cons); 1313 p_ll2_info->tx_queue.b_cb_registred = true; 1314 } 1315 1316 *data->p_connection_handle = i; 1317 return rc; 1318 1319 q_allocate_fail: 1320 qed_ll2_release_connection(p_hwfn, i); 1321 return -ENOMEM; 1322 } 1323 1324 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1325 struct qed_ll2_info *p_ll2_conn) 1326 { 1327 enum qed_ll2_error_handle error_input; 1328 enum core_error_handle error_mode; 1329 u8 action_on_error = 0; 1330 1331 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1332 return 0; 1333 1334 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1335 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1336 error_mode = qed_ll2_get_error_choice(error_input); 1337 SET_FIELD(action_on_error, 1338 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1339 error_input = p_ll2_conn->input.ai_err_no_buf; 1340 error_mode = qed_ll2_get_error_choice(error_input); 1341 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1342 1343 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1344 } 1345 1346 static void 1347 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1348 struct qed_ll2_info *p_ll2_conn) 1349 { 1350 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1351 return; 1352 1353 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1354 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1355 } 1356 1357 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1358 { 1359 struct qed_hwfn *p_hwfn = cxt; 1360 struct qed_ll2_info *p_ll2_conn; 1361 struct qed_ll2_rx_queue *p_rx; 1362 struct qed_ll2_tx_queue *p_tx; 1363 struct qed_ptt *p_ptt; 1364 int rc = -EINVAL; 1365 u32 i, capacity; 1366 u8 qid; 1367 1368 p_ptt = qed_ptt_acquire(p_hwfn); 1369 if (!p_ptt) 1370 return -EAGAIN; 1371 1372 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1373 if (!p_ll2_conn) { 1374 rc = -EINVAL; 1375 goto out; 1376 } 1377 1378 p_rx = &p_ll2_conn->rx_queue; 1379 p_tx = &p_ll2_conn->tx_queue; 1380 1381 qed_chain_reset(&p_rx->rxq_chain); 1382 qed_chain_reset(&p_rx->rcq_chain); 1383 INIT_LIST_HEAD(&p_rx->active_descq); 1384 INIT_LIST_HEAD(&p_rx->free_descq); 1385 INIT_LIST_HEAD(&p_rx->posting_descq); 1386 spin_lock_init(&p_rx->lock); 1387 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1388 for (i = 0; i < capacity; i++) 1389 list_add_tail(&p_rx->descq_array[i].list_entry, 1390 &p_rx->free_descq); 1391 *p_rx->p_fw_cons = 0; 1392 1393 qed_chain_reset(&p_tx->txq_chain); 1394 INIT_LIST_HEAD(&p_tx->active_descq); 1395 INIT_LIST_HEAD(&p_tx->free_descq); 1396 INIT_LIST_HEAD(&p_tx->sending_descq); 1397 spin_lock_init(&p_tx->lock); 1398 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1399 for (i = 0; i < capacity; i++) 1400 list_add_tail(&p_tx->descq_array[i].list_entry, 1401 &p_tx->free_descq); 1402 p_tx->cur_completing_bd_idx = 0; 1403 p_tx->bds_idx = 0; 1404 p_tx->b_completing_packet = false; 1405 p_tx->cur_send_packet = NULL; 1406 p_tx->cur_send_frag_num = 0; 1407 p_tx->cur_completing_frag_num = 0; 1408 *p_tx->p_fw_cons = 0; 1409 1410 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1411 if (rc) 1412 goto out; 1413 1414 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1415 p_ll2_conn->queue_id = qid; 1416 p_ll2_conn->tx_stats_id = qid; 1417 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1418 GTT_BAR0_MAP_REG_TSDM_RAM + 1419 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1420 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1421 qed_db_addr(p_ll2_conn->cid, 1422 DQ_DEMS_LEGACY); 1423 1424 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1425 if (rc) 1426 goto out; 1427 1428 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1429 if (rc) 1430 goto out; 1431 1432 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1433 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1434 1435 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1436 1437 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1438 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1439 0x8906, 0, 1440 QED_LLH_FILTER_ETHERTYPE); 1441 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1442 0x8914, 0, 1443 QED_LLH_FILTER_ETHERTYPE); 1444 } 1445 1446 out: 1447 qed_ptt_release(p_hwfn, p_ptt); 1448 return rc; 1449 } 1450 1451 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1452 struct qed_ll2_rx_queue *p_rx, 1453 struct qed_ll2_rx_packet *p_curp) 1454 { 1455 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1456 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1457 bool b_notify_fw = false; 1458 u16 bd_prod, cq_prod; 1459 1460 /* This handles the flushing of already posted buffers */ 1461 while (!list_empty(&p_rx->posting_descq)) { 1462 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1463 struct qed_ll2_rx_packet, 1464 list_entry); 1465 list_move_tail(&p_posting_packet->list_entry, 1466 &p_rx->active_descq); 1467 b_notify_fw = true; 1468 } 1469 1470 /* This handles the supplied packet [if there is one] */ 1471 if (p_curp) { 1472 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1473 b_notify_fw = true; 1474 } 1475 1476 if (!b_notify_fw) 1477 return; 1478 1479 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1480 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1481 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1482 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1483 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1484 } 1485 1486 int qed_ll2_post_rx_buffer(void *cxt, 1487 u8 connection_handle, 1488 dma_addr_t addr, 1489 u16 buf_len, void *cookie, u8 notify_fw) 1490 { 1491 struct qed_hwfn *p_hwfn = cxt; 1492 struct core_rx_bd_with_buff_len *p_curb = NULL; 1493 struct qed_ll2_rx_packet *p_curp = NULL; 1494 struct qed_ll2_info *p_ll2_conn; 1495 struct qed_ll2_rx_queue *p_rx; 1496 unsigned long flags; 1497 void *p_data; 1498 int rc = 0; 1499 1500 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1501 if (!p_ll2_conn) 1502 return -EINVAL; 1503 p_rx = &p_ll2_conn->rx_queue; 1504 1505 spin_lock_irqsave(&p_rx->lock, flags); 1506 if (!list_empty(&p_rx->free_descq)) 1507 p_curp = list_first_entry(&p_rx->free_descq, 1508 struct qed_ll2_rx_packet, list_entry); 1509 if (p_curp) { 1510 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1511 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1512 p_data = qed_chain_produce(&p_rx->rxq_chain); 1513 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1514 qed_chain_produce(&p_rx->rcq_chain); 1515 } 1516 } 1517 1518 /* If we're lacking entires, let's try to flush buffers to FW */ 1519 if (!p_curp || !p_curb) { 1520 rc = -EBUSY; 1521 p_curp = NULL; 1522 goto out_notify; 1523 } 1524 1525 /* We have an Rx packet we can fill */ 1526 DMA_REGPAIR_LE(p_curb->addr, addr); 1527 p_curb->buff_length = cpu_to_le16(buf_len); 1528 p_curp->rx_buf_addr = addr; 1529 p_curp->cookie = cookie; 1530 p_curp->rxq_bd = p_curb; 1531 p_curp->buf_length = buf_len; 1532 list_del(&p_curp->list_entry); 1533 1534 /* Check if we only want to enqueue this packet without informing FW */ 1535 if (!notify_fw) { 1536 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1537 goto out; 1538 } 1539 1540 out_notify: 1541 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1542 out: 1543 spin_unlock_irqrestore(&p_rx->lock, flags); 1544 return rc; 1545 } 1546 1547 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1548 struct qed_ll2_tx_queue *p_tx, 1549 struct qed_ll2_tx_packet *p_curp, 1550 struct qed_ll2_tx_pkt_info *pkt, 1551 u8 notify_fw) 1552 { 1553 list_del(&p_curp->list_entry); 1554 p_curp->cookie = pkt->cookie; 1555 p_curp->bd_used = pkt->num_of_bds; 1556 p_curp->notify_fw = notify_fw; 1557 p_tx->cur_send_packet = p_curp; 1558 p_tx->cur_send_frag_num = 0; 1559 1560 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1561 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1562 p_tx->cur_send_frag_num++; 1563 } 1564 1565 static void 1566 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1567 struct qed_ll2_info *p_ll2, 1568 struct qed_ll2_tx_packet *p_curp, 1569 struct qed_ll2_tx_pkt_info *pkt) 1570 { 1571 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1572 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1573 struct core_tx_bd *start_bd = NULL; 1574 enum core_roce_flavor_type roce_flavor; 1575 enum core_tx_dest tx_dest; 1576 u16 bd_data = 0, frag_idx; 1577 1578 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1579 : CORE_RROCE; 1580 1581 tx_dest = (pkt->tx_dest == QED_LL2_TX_DEST_NW) ? CORE_TX_DEST_NW 1582 : CORE_TX_DEST_LB; 1583 1584 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1585 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1586 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1587 cpu_to_le16(pkt->l4_hdr_offset_w)); 1588 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1589 bd_data |= pkt->bd_flags; 1590 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1591 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1592 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1593 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1594 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1595 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1596 1597 DP_VERBOSE(p_hwfn, 1598 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1599 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1600 p_ll2->queue_id, 1601 p_ll2->cid, 1602 p_ll2->input.conn_type, 1603 prod_idx, 1604 pkt->first_frag_len, 1605 pkt->num_of_bds, 1606 le32_to_cpu(start_bd->addr.hi), 1607 le32_to_cpu(start_bd->addr.lo)); 1608 1609 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1610 return; 1611 1612 /* Need to provide the packet with additional BDs for frags */ 1613 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1614 frag_idx < pkt->num_of_bds; frag_idx++) { 1615 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1616 1617 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1618 (*p_bd)->bd_data.as_bitfield = 0; 1619 (*p_bd)->bitfield1 = 0; 1620 p_curp->bds_set[frag_idx].tx_frag = 0; 1621 p_curp->bds_set[frag_idx].frag_len = 0; 1622 } 1623 } 1624 1625 /* This should be called while the Txq spinlock is being held */ 1626 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1627 struct qed_ll2_info *p_ll2_conn) 1628 { 1629 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1630 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1631 struct qed_ll2_tx_packet *p_pkt = NULL; 1632 struct core_db_data db_msg = { 0, 0, 0 }; 1633 u16 bd_prod; 1634 1635 /* If there are missing BDs, don't do anything now */ 1636 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1637 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1638 return; 1639 1640 /* Push the current packet to the list and clean after it */ 1641 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1642 &p_ll2_conn->tx_queue.sending_descq); 1643 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1644 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1645 1646 /* Notify FW of packet only if requested to */ 1647 if (!b_notify) 1648 return; 1649 1650 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1651 1652 while (!list_empty(&p_tx->sending_descq)) { 1653 p_pkt = list_first_entry(&p_tx->sending_descq, 1654 struct qed_ll2_tx_packet, list_entry); 1655 if (!p_pkt) 1656 break; 1657 1658 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1659 } 1660 1661 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1662 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1663 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1664 DQ_XCM_CORE_TX_BD_PROD_CMD); 1665 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1666 db_msg.spq_prod = cpu_to_le16(bd_prod); 1667 1668 /* Make sure the BDs data is updated before ringing the doorbell */ 1669 wmb(); 1670 1671 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1672 1673 DP_VERBOSE(p_hwfn, 1674 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1675 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1676 p_ll2_conn->queue_id, 1677 p_ll2_conn->cid, 1678 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1679 } 1680 1681 int qed_ll2_prepare_tx_packet(void *cxt, 1682 u8 connection_handle, 1683 struct qed_ll2_tx_pkt_info *pkt, 1684 bool notify_fw) 1685 { 1686 struct qed_hwfn *p_hwfn = cxt; 1687 struct qed_ll2_tx_packet *p_curp = NULL; 1688 struct qed_ll2_info *p_ll2_conn = NULL; 1689 struct qed_ll2_tx_queue *p_tx; 1690 struct qed_chain *p_tx_chain; 1691 unsigned long flags; 1692 int rc = 0; 1693 1694 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1695 if (!p_ll2_conn) 1696 return -EINVAL; 1697 p_tx = &p_ll2_conn->tx_queue; 1698 p_tx_chain = &p_tx->txq_chain; 1699 1700 if (pkt->num_of_bds > CORE_LL2_TX_MAX_BDS_PER_PACKET) 1701 return -EIO; 1702 1703 spin_lock_irqsave(&p_tx->lock, flags); 1704 if (p_tx->cur_send_packet) { 1705 rc = -EEXIST; 1706 goto out; 1707 } 1708 1709 /* Get entry, but only if we have tx elements for it */ 1710 if (!list_empty(&p_tx->free_descq)) 1711 p_curp = list_first_entry(&p_tx->free_descq, 1712 struct qed_ll2_tx_packet, list_entry); 1713 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1714 p_curp = NULL; 1715 1716 if (!p_curp) { 1717 rc = -EBUSY; 1718 goto out; 1719 } 1720 1721 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1722 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1723 1724 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1725 1726 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1727 1728 out: 1729 spin_unlock_irqrestore(&p_tx->lock, flags); 1730 return rc; 1731 } 1732 1733 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1734 u8 connection_handle, 1735 dma_addr_t addr, u16 nbytes) 1736 { 1737 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1738 struct qed_hwfn *p_hwfn = cxt; 1739 struct qed_ll2_info *p_ll2_conn = NULL; 1740 u16 cur_send_frag_num = 0; 1741 struct core_tx_bd *p_bd; 1742 unsigned long flags; 1743 1744 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1745 if (!p_ll2_conn) 1746 return -EINVAL; 1747 1748 if (!p_ll2_conn->tx_queue.cur_send_packet) 1749 return -EINVAL; 1750 1751 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1752 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1753 1754 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1755 return -EINVAL; 1756 1757 /* Fill the BD information, and possibly notify FW */ 1758 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1759 DMA_REGPAIR_LE(p_bd->addr, addr); 1760 p_bd->nbytes = cpu_to_le16(nbytes); 1761 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1762 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1763 1764 p_ll2_conn->tx_queue.cur_send_frag_num++; 1765 1766 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1767 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1768 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1769 1770 return 0; 1771 } 1772 1773 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1774 { 1775 struct qed_hwfn *p_hwfn = cxt; 1776 struct qed_ll2_info *p_ll2_conn = NULL; 1777 int rc = -EINVAL; 1778 struct qed_ptt *p_ptt; 1779 1780 p_ptt = qed_ptt_acquire(p_hwfn); 1781 if (!p_ptt) 1782 return -EAGAIN; 1783 1784 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1785 if (!p_ll2_conn) { 1786 rc = -EINVAL; 1787 goto out; 1788 } 1789 1790 /* Stop Tx & Rx of connection, if needed */ 1791 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1792 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1793 if (rc) 1794 goto out; 1795 qed_ll2_txq_flush(p_hwfn, connection_handle); 1796 } 1797 1798 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1799 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1800 if (rc) 1801 goto out; 1802 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1803 } 1804 1805 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1806 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1807 1808 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1809 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1810 0x8906, 0, 1811 QED_LLH_FILTER_ETHERTYPE); 1812 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1813 0x8914, 0, 1814 QED_LLH_FILTER_ETHERTYPE); 1815 } 1816 1817 out: 1818 qed_ptt_release(p_hwfn, p_ptt); 1819 return rc; 1820 } 1821 1822 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1823 struct qed_ll2_info *p_ll2_conn) 1824 { 1825 struct qed_ooo_buffer *p_buffer; 1826 1827 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1828 return; 1829 1830 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1831 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1832 p_hwfn->p_ooo_info))) { 1833 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1834 p_buffer->rx_buffer_size, 1835 p_buffer->rx_buffer_virt_addr, 1836 p_buffer->rx_buffer_phys_addr); 1837 kfree(p_buffer); 1838 } 1839 } 1840 1841 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1842 { 1843 struct qed_hwfn *p_hwfn = cxt; 1844 struct qed_ll2_info *p_ll2_conn = NULL; 1845 1846 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1847 if (!p_ll2_conn) 1848 return; 1849 1850 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1851 p_ll2_conn->rx_queue.b_cb_registred = false; 1852 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1853 } 1854 1855 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1856 p_ll2_conn->tx_queue.b_cb_registred = false; 1857 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1858 } 1859 1860 kfree(p_ll2_conn->tx_queue.descq_array); 1861 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 1862 1863 kfree(p_ll2_conn->rx_queue.descq_array); 1864 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 1865 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 1866 1867 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 1868 1869 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 1870 1871 mutex_lock(&p_ll2_conn->mutex); 1872 p_ll2_conn->b_active = false; 1873 mutex_unlock(&p_ll2_conn->mutex); 1874 } 1875 1876 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 1877 { 1878 struct qed_ll2_info *p_ll2_connections; 1879 u8 i; 1880 1881 /* Allocate LL2's set struct */ 1882 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 1883 sizeof(struct qed_ll2_info), GFP_KERNEL); 1884 if (!p_ll2_connections) { 1885 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 1886 return -ENOMEM; 1887 } 1888 1889 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1890 p_ll2_connections[i].my_id = i; 1891 1892 p_hwfn->p_ll2_info = p_ll2_connections; 1893 return 0; 1894 } 1895 1896 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 1897 { 1898 int i; 1899 1900 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1901 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 1902 } 1903 1904 void qed_ll2_free(struct qed_hwfn *p_hwfn) 1905 { 1906 if (!p_hwfn->p_ll2_info) 1907 return; 1908 1909 kfree(p_hwfn->p_ll2_info); 1910 p_hwfn->p_ll2_info = NULL; 1911 } 1912 1913 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 1914 struct qed_ptt *p_ptt, 1915 struct qed_ll2_stats *p_stats) 1916 { 1917 struct core_ll2_port_stats port_stats; 1918 1919 memset(&port_stats, 0, sizeof(port_stats)); 1920 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1921 BAR0_MAP_REG_TSDM_RAM + 1922 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 1923 sizeof(port_stats)); 1924 1925 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 1926 p_stats->gsi_invalid_pkt_length = 1927 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 1928 p_stats->gsi_unsupported_pkt_typ = 1929 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 1930 p_stats->gsi_crcchksm_error = 1931 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 1932 } 1933 1934 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 1935 struct qed_ptt *p_ptt, 1936 struct qed_ll2_info *p_ll2_conn, 1937 struct qed_ll2_stats *p_stats) 1938 { 1939 struct core_ll2_tstorm_per_queue_stat tstats; 1940 u8 qid = p_ll2_conn->queue_id; 1941 u32 tstats_addr; 1942 1943 memset(&tstats, 0, sizeof(tstats)); 1944 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 1945 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 1946 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 1947 1948 p_stats->packet_too_big_discard = 1949 HILO_64_REGPAIR(tstats.packet_too_big_discard); 1950 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 1951 } 1952 1953 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 1954 struct qed_ptt *p_ptt, 1955 struct qed_ll2_info *p_ll2_conn, 1956 struct qed_ll2_stats *p_stats) 1957 { 1958 struct core_ll2_ustorm_per_queue_stat ustats; 1959 u8 qid = p_ll2_conn->queue_id; 1960 u32 ustats_addr; 1961 1962 memset(&ustats, 0, sizeof(ustats)); 1963 ustats_addr = BAR0_MAP_REG_USDM_RAM + 1964 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 1965 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 1966 1967 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 1968 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 1969 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 1970 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 1971 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 1972 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 1973 } 1974 1975 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 1976 struct qed_ptt *p_ptt, 1977 struct qed_ll2_info *p_ll2_conn, 1978 struct qed_ll2_stats *p_stats) 1979 { 1980 struct core_ll2_pstorm_per_queue_stat pstats; 1981 u8 stats_id = p_ll2_conn->tx_stats_id; 1982 u32 pstats_addr; 1983 1984 memset(&pstats, 0, sizeof(pstats)); 1985 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 1986 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 1987 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 1988 1989 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 1990 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 1991 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 1992 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 1993 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 1994 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 1995 } 1996 1997 int qed_ll2_get_stats(void *cxt, 1998 u8 connection_handle, struct qed_ll2_stats *p_stats) 1999 { 2000 struct qed_hwfn *p_hwfn = cxt; 2001 struct qed_ll2_info *p_ll2_conn = NULL; 2002 struct qed_ptt *p_ptt; 2003 2004 memset(p_stats, 0, sizeof(*p_stats)); 2005 2006 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2007 !p_hwfn->p_ll2_info) 2008 return -EINVAL; 2009 2010 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2011 2012 p_ptt = qed_ptt_acquire(p_hwfn); 2013 if (!p_ptt) { 2014 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2015 return -EINVAL; 2016 } 2017 2018 if (p_ll2_conn->input.gsi_enable) 2019 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2020 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2021 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2022 if (p_ll2_conn->tx_stats_en) 2023 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2024 2025 qed_ptt_release(p_hwfn, p_ptt); 2026 return 0; 2027 } 2028 2029 static void qed_ll2b_release_rx_packet(void *cxt, 2030 u8 connection_handle, 2031 void *cookie, 2032 dma_addr_t rx_buf_addr, 2033 bool b_last_packet) 2034 { 2035 struct qed_hwfn *p_hwfn = cxt; 2036 2037 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2038 } 2039 2040 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2041 const struct qed_ll2_cb_ops *ops, 2042 void *cookie) 2043 { 2044 cdev->ll2->cbs = ops; 2045 cdev->ll2->cb_cookie = cookie; 2046 } 2047 2048 struct qed_ll2_cbs ll2_cbs = { 2049 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2050 .rx_release_cb = &qed_ll2b_release_rx_packet, 2051 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2052 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2053 }; 2054 2055 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2056 struct qed_ll2_acquire_data *data, 2057 struct qed_ll2_params *params, 2058 enum qed_ll2_conn_type conn_type, 2059 u8 *handle, bool lb) 2060 { 2061 memset(data, 0, sizeof(*data)); 2062 2063 data->input.conn_type = conn_type; 2064 data->input.mtu = params->mtu; 2065 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2066 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2067 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2068 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2069 data->p_connection_handle = handle; 2070 data->cbs = &ll2_cbs; 2071 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2072 2073 if (lb) { 2074 data->input.tx_tc = PKT_LB_TC; 2075 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2076 } else { 2077 data->input.tx_tc = 0; 2078 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2079 } 2080 } 2081 2082 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2083 struct qed_ll2_params *params) 2084 { 2085 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2086 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2087 struct qed_ll2_acquire_data data; 2088 int rc; 2089 2090 qed_ll2_set_conn_data(cdev, &data, params, 2091 QED_LL2_TYPE_OOO, handle, true); 2092 2093 rc = qed_ll2_acquire_connection(hwfn, &data); 2094 if (rc) { 2095 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2096 goto out; 2097 } 2098 2099 rc = qed_ll2_establish_connection(hwfn, *handle); 2100 if (rc) { 2101 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2102 goto fail; 2103 } 2104 2105 return 0; 2106 2107 fail: 2108 qed_ll2_release_connection(hwfn, *handle); 2109 out: 2110 *handle = QED_LL2_UNUSED_HANDLE; 2111 return rc; 2112 } 2113 2114 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2115 { 2116 struct qed_ll2_buffer *buffer, *tmp_buffer; 2117 enum qed_ll2_conn_type conn_type; 2118 struct qed_ll2_acquire_data data; 2119 struct qed_ptt *p_ptt; 2120 int rc, i; 2121 2122 2123 /* Initialize LL2 locks & lists */ 2124 INIT_LIST_HEAD(&cdev->ll2->list); 2125 spin_lock_init(&cdev->ll2->lock); 2126 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2127 L1_CACHE_BYTES + params->mtu; 2128 2129 /*Allocate memory for LL2 */ 2130 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2131 cdev->ll2->rx_size); 2132 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2133 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2134 if (!buffer) { 2135 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2136 goto fail; 2137 } 2138 2139 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2140 &buffer->phys_addr); 2141 if (rc) { 2142 kfree(buffer); 2143 goto fail; 2144 } 2145 2146 list_add_tail(&buffer->list, &cdev->ll2->list); 2147 } 2148 2149 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2150 case QED_PCI_FCOE: 2151 conn_type = QED_LL2_TYPE_FCOE; 2152 break; 2153 case QED_PCI_ISCSI: 2154 conn_type = QED_LL2_TYPE_ISCSI; 2155 break; 2156 case QED_PCI_ETH_ROCE: 2157 conn_type = QED_LL2_TYPE_ROCE; 2158 break; 2159 default: 2160 conn_type = QED_LL2_TYPE_TEST; 2161 } 2162 2163 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2164 &cdev->ll2->handle, false); 2165 2166 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2167 if (rc) { 2168 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2169 goto fail; 2170 } 2171 2172 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2173 cdev->ll2->handle); 2174 if (rc) { 2175 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2176 goto release_fail; 2177 } 2178 2179 /* Post all Rx buffers to FW */ 2180 spin_lock_bh(&cdev->ll2->lock); 2181 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2182 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2183 cdev->ll2->handle, 2184 buffer->phys_addr, 0, buffer, 1); 2185 if (rc) { 2186 DP_INFO(cdev, 2187 "Failed to post an Rx buffer; Deleting it\n"); 2188 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2189 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2190 kfree(buffer->data); 2191 list_del(&buffer->list); 2192 kfree(buffer); 2193 } else { 2194 cdev->ll2->rx_cnt++; 2195 } 2196 } 2197 spin_unlock_bh(&cdev->ll2->lock); 2198 2199 if (!cdev->ll2->rx_cnt) { 2200 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2201 goto release_terminate; 2202 } 2203 2204 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2205 DP_INFO(cdev, "Invalid Ethernet address\n"); 2206 goto release_terminate; 2207 } 2208 2209 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2210 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) { 2211 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2212 rc = qed_ll2_start_ooo(cdev, params); 2213 if (rc) { 2214 DP_INFO(cdev, 2215 "Failed to initialize the OOO LL2 queue\n"); 2216 goto release_terminate; 2217 } 2218 } 2219 2220 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2221 if (!p_ptt) { 2222 DP_INFO(cdev, "Failed to acquire PTT\n"); 2223 goto release_terminate; 2224 } 2225 2226 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2227 params->ll2_mac_address); 2228 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2229 if (rc) { 2230 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2231 goto release_terminate_all; 2232 } 2233 2234 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2235 return 0; 2236 2237 release_terminate_all: 2238 2239 release_terminate: 2240 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2241 release_fail: 2242 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2243 fail: 2244 qed_ll2_kill_buffers(cdev); 2245 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2246 return -EINVAL; 2247 } 2248 2249 static int qed_ll2_stop(struct qed_dev *cdev) 2250 { 2251 struct qed_ptt *p_ptt; 2252 int rc; 2253 2254 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2255 return 0; 2256 2257 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2258 if (!p_ptt) { 2259 DP_INFO(cdev, "Failed to acquire PTT\n"); 2260 goto fail; 2261 } 2262 2263 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2264 cdev->ll2_mac_address); 2265 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2266 eth_zero_addr(cdev->ll2_mac_address); 2267 2268 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2269 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) 2270 qed_ll2_stop_ooo(cdev); 2271 2272 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2273 cdev->ll2->handle); 2274 if (rc) 2275 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2276 2277 qed_ll2_kill_buffers(cdev); 2278 2279 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2280 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2281 2282 return rc; 2283 fail: 2284 return -EINVAL; 2285 } 2286 2287 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) 2288 { 2289 struct qed_ll2_tx_pkt_info pkt; 2290 const skb_frag_t *frag; 2291 int rc = -EINVAL, i; 2292 dma_addr_t mapping; 2293 u16 vlan = 0; 2294 u8 flags = 0; 2295 2296 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2297 DP_INFO(cdev, "Cannot transmit a checksumed packet\n"); 2298 return -EINVAL; 2299 } 2300 2301 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2302 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2303 1 + skb_shinfo(skb)->nr_frags); 2304 return -EINVAL; 2305 } 2306 2307 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2308 skb->len, DMA_TO_DEVICE); 2309 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2310 DP_NOTICE(cdev, "SKB mapping failed\n"); 2311 return -EINVAL; 2312 } 2313 2314 /* Request HW to calculate IP csum */ 2315 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2316 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2317 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2318 2319 if (skb_vlan_tag_present(skb)) { 2320 vlan = skb_vlan_tag_get(skb); 2321 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2322 } 2323 2324 memset(&pkt, 0, sizeof(pkt)); 2325 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2326 pkt.vlan = vlan; 2327 pkt.bd_flags = flags; 2328 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2329 pkt.first_frag = mapping; 2330 pkt.first_frag_len = skb->len; 2331 pkt.cookie = skb; 2332 2333 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2334 &pkt, 1); 2335 if (rc) 2336 goto err; 2337 2338 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2339 frag = &skb_shinfo(skb)->frags[i]; 2340 2341 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2342 skb_frag_size(frag), DMA_TO_DEVICE); 2343 2344 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2345 DP_NOTICE(cdev, 2346 "Unable to map frag - dropping packet\n"); 2347 goto err; 2348 } 2349 2350 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2351 cdev->ll2->handle, 2352 mapping, 2353 skb_frag_size(frag)); 2354 2355 /* if failed not much to do here, partial packet has been posted 2356 * we can't free memory, will need to wait for completion. 2357 */ 2358 if (rc) 2359 goto err2; 2360 } 2361 2362 return 0; 2363 2364 err: 2365 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2366 2367 err2: 2368 return rc; 2369 } 2370 2371 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2372 { 2373 if (!cdev->ll2) 2374 return -EINVAL; 2375 2376 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2377 cdev->ll2->handle, stats); 2378 } 2379 2380 const struct qed_ll2_ops qed_ll2_ops_pass = { 2381 .start = &qed_ll2_start, 2382 .stop = &qed_ll2_stop, 2383 .start_xmit = &qed_ll2_start_xmit, 2384 .register_cb_ops = &qed_ll2_register_cb_ops, 2385 .get_stats = &qed_ll2_stats, 2386 }; 2387 2388 int qed_ll2_alloc_if(struct qed_dev *cdev) 2389 { 2390 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2391 return cdev->ll2 ? 0 : -ENOMEM; 2392 } 2393 2394 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2395 { 2396 kfree(cdev->ll2); 2397 cdev->ll2 = NULL; 2398 } 2399