11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd. 5fe56b9e6SYuval Mintz */ 6fe56b9e6SYuval Mintz 7fe56b9e6SYuval Mintz #ifndef _QED_HW_H 8fe56b9e6SYuval Mintz #define _QED_HW_H 9fe56b9e6SYuval Mintz 10fe56b9e6SYuval Mintz #include <linux/types.h> 11fe56b9e6SYuval Mintz #include <linux/bitops.h> 12fe56b9e6SYuval Mintz #include <linux/slab.h> 13fe56b9e6SYuval Mintz #include <linux/string.h> 14fe56b9e6SYuval Mintz #include "qed.h" 15fe56b9e6SYuval Mintz #include "qed_dev_api.h" 16fe56b9e6SYuval Mintz 17fe56b9e6SYuval Mintz /* Forward decleration */ 18fe56b9e6SYuval Mintz struct qed_ptt; 19fe56b9e6SYuval Mintz 20fe56b9e6SYuval Mintz enum reserved_ptts { 21fe56b9e6SYuval Mintz RESERVED_PTT_EDIAG, 22fe56b9e6SYuval Mintz RESERVED_PTT_USER_SPACE, 23fe56b9e6SYuval Mintz RESERVED_PTT_MAIN, 24fe56b9e6SYuval Mintz RESERVED_PTT_DPC, 25fe56b9e6SYuval Mintz RESERVED_PTT_MAX 26fe56b9e6SYuval Mintz }; 27fe56b9e6SYuval Mintz 28fe56b9e6SYuval Mintz enum _dmae_cmd_dst_mask { 29fe56b9e6SYuval Mintz DMAE_CMD_DST_MASK_NONE = 0, 30fe56b9e6SYuval Mintz DMAE_CMD_DST_MASK_PCIE = 1, 31fe56b9e6SYuval Mintz DMAE_CMD_DST_MASK_GRC = 2 32fe56b9e6SYuval Mintz }; 33fe56b9e6SYuval Mintz 34fe56b9e6SYuval Mintz enum _dmae_cmd_src_mask { 35fe56b9e6SYuval Mintz DMAE_CMD_SRC_MASK_PCIE = 0, 36fe56b9e6SYuval Mintz DMAE_CMD_SRC_MASK_GRC = 1 37fe56b9e6SYuval Mintz }; 38fe56b9e6SYuval Mintz 39fe56b9e6SYuval Mintz enum _dmae_cmd_crc_mask { 40fe56b9e6SYuval Mintz DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0, 41fe56b9e6SYuval Mintz DMAE_CMD_COMP_CRC_EN_MASK_SET = 1 42fe56b9e6SYuval Mintz }; 43fe56b9e6SYuval Mintz 44fe56b9e6SYuval Mintz /* definitions for DMA constants */ 45fe56b9e6SYuval Mintz #define DMAE_GO_VALUE 0x1 46fe56b9e6SYuval Mintz 47fe56b9e6SYuval Mintz #define DMAE_COMPLETION_VAL 0xD1AE 48fe56b9e6SYuval Mintz #define DMAE_CMD_ENDIANITY 0x2 49fe56b9e6SYuval Mintz 50fe56b9e6SYuval Mintz #define DMAE_CMD_SIZE 14 51fe56b9e6SYuval Mintz #define DMAE_CMD_SIZE_TO_FILL (DMAE_CMD_SIZE - 5) 52fe56b9e6SYuval Mintz #define DMAE_MIN_WAIT_TIME 0x2 53fe56b9e6SYuval Mintz #define DMAE_MAX_CLIENTS 32 54fe56b9e6SYuval Mintz 55fe56b9e6SYuval Mintz /** 56*19198e4eSPrabhakar Kushwaha * qed_gtt_init(): Initialize GTT windows. 57fe56b9e6SYuval Mintz * 58*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 59*19198e4eSPrabhakar Kushwaha * 60*19198e4eSPrabhakar Kushwaha * Return: Void. 61fe56b9e6SYuval Mintz */ 62fe56b9e6SYuval Mintz void qed_gtt_init(struct qed_hwfn *p_hwfn); 63fe56b9e6SYuval Mintz 64fe56b9e6SYuval Mintz /** 65*19198e4eSPrabhakar Kushwaha * qed_ptt_invalidate(): Forces all ptt entries to be re-configured 66fe56b9e6SYuval Mintz * 67*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 68*19198e4eSPrabhakar Kushwaha * 69*19198e4eSPrabhakar Kushwaha * Return: Void. 70fe56b9e6SYuval Mintz */ 71fe56b9e6SYuval Mintz void qed_ptt_invalidate(struct qed_hwfn *p_hwfn); 72fe56b9e6SYuval Mintz 73fe56b9e6SYuval Mintz /** 74*19198e4eSPrabhakar Kushwaha * qed_ptt_pool_alloc(): Allocate and initialize PTT pool. 75fe56b9e6SYuval Mintz * 76*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 77fe56b9e6SYuval Mintz * 78*19198e4eSPrabhakar Kushwaha * Return: struct _qed_status - success (0), negative - error. 79fe56b9e6SYuval Mintz */ 80fe56b9e6SYuval Mintz int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn); 81fe56b9e6SYuval Mintz 82fe56b9e6SYuval Mintz /** 83*19198e4eSPrabhakar Kushwaha * qed_ptt_pool_free(): Free PTT pool. 84fe56b9e6SYuval Mintz * 85*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 86*19198e4eSPrabhakar Kushwaha * 87*19198e4eSPrabhakar Kushwaha * Return: Void. 88fe56b9e6SYuval Mintz */ 89fe56b9e6SYuval Mintz void qed_ptt_pool_free(struct qed_hwfn *p_hwfn); 90fe56b9e6SYuval Mintz 91fe56b9e6SYuval Mintz /** 92*19198e4eSPrabhakar Kushwaha * qed_ptt_get_hw_addr(): Get PTT's GRC/HW address. 93fe56b9e6SYuval Mintz * 94*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 95*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt 96fe56b9e6SYuval Mintz * 97*19198e4eSPrabhakar Kushwaha * Return: u32. 98fe56b9e6SYuval Mintz */ 99fe56b9e6SYuval Mintz u32 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn, 100fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 101fe56b9e6SYuval Mintz 102fe56b9e6SYuval Mintz /** 103*19198e4eSPrabhakar Kushwaha * qed_ptt_get_bar_addr(): Get PPT's external BAR address. 104fe56b9e6SYuval Mintz * 105*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt 106fe56b9e6SYuval Mintz * 107*19198e4eSPrabhakar Kushwaha * Return: u32. 108fe56b9e6SYuval Mintz */ 109fe56b9e6SYuval Mintz u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt); 110fe56b9e6SYuval Mintz 111fe56b9e6SYuval Mintz /** 112*19198e4eSPrabhakar Kushwaha * qed_ptt_set_win(): Set PTT Window's GRC BAR address 113fe56b9e6SYuval Mintz * 114*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 115*19198e4eSPrabhakar Kushwaha * @new_hw_addr: New HW address. 116*19198e4eSPrabhakar Kushwaha * @p_ptt: P_Ptt 117*19198e4eSPrabhakar Kushwaha * 118*19198e4eSPrabhakar Kushwaha * Return: Void. 119fe56b9e6SYuval Mintz */ 120fe56b9e6SYuval Mintz void qed_ptt_set_win(struct qed_hwfn *p_hwfn, 121fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 122fe56b9e6SYuval Mintz u32 new_hw_addr); 123fe56b9e6SYuval Mintz 124fe56b9e6SYuval Mintz /** 125*19198e4eSPrabhakar Kushwaha * qed_get_reserved_ptt(): Get a specific reserved PTT. 126fe56b9e6SYuval Mintz * 127*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 128*19198e4eSPrabhakar Kushwaha * @ptt_idx: Ptt Index. 129fe56b9e6SYuval Mintz * 130*19198e4eSPrabhakar Kushwaha * Return: struct qed_ptt *. 131fe56b9e6SYuval Mintz */ 132fe56b9e6SYuval Mintz struct qed_ptt *qed_get_reserved_ptt(struct qed_hwfn *p_hwfn, 133fe56b9e6SYuval Mintz enum reserved_ptts ptt_idx); 134fe56b9e6SYuval Mintz 135fe56b9e6SYuval Mintz /** 136*19198e4eSPrabhakar Kushwaha * qed_wr(): Write value to BAR using the given ptt. 137fe56b9e6SYuval Mintz * 138*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 139*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 140*19198e4eSPrabhakar Kushwaha * @val: Val. 141*19198e4eSPrabhakar Kushwaha * @hw_addr: HW address 142*19198e4eSPrabhakar Kushwaha * 143*19198e4eSPrabhakar Kushwaha * Return: Void. 144fe56b9e6SYuval Mintz */ 145fe56b9e6SYuval Mintz void qed_wr(struct qed_hwfn *p_hwfn, 146fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 147fe56b9e6SYuval Mintz u32 hw_addr, 148fe56b9e6SYuval Mintz u32 val); 149fe56b9e6SYuval Mintz 150fe56b9e6SYuval Mintz /** 151*19198e4eSPrabhakar Kushwaha * qed_rd(): Read value from BAR using the given ptt. 152fe56b9e6SYuval Mintz * 153*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 154*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 155*19198e4eSPrabhakar Kushwaha * @hw_addr: HW address 156*19198e4eSPrabhakar Kushwaha * 157*19198e4eSPrabhakar Kushwaha * Return: Void. 158fe56b9e6SYuval Mintz */ 159fe56b9e6SYuval Mintz u32 qed_rd(struct qed_hwfn *p_hwfn, 160fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 161fe56b9e6SYuval Mintz u32 hw_addr); 162fe56b9e6SYuval Mintz 163fe56b9e6SYuval Mintz /** 164*19198e4eSPrabhakar Kushwaha * qed_memcpy_from(): Copy n bytes from BAR using the given ptt. 165fe56b9e6SYuval Mintz * 166*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 167*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 168*19198e4eSPrabhakar Kushwaha * @dest: Destination. 169*19198e4eSPrabhakar Kushwaha * @hw_addr: HW address. 170*19198e4eSPrabhakar Kushwaha * @n: N 171*19198e4eSPrabhakar Kushwaha * 172*19198e4eSPrabhakar Kushwaha * Return: Void. 173fe56b9e6SYuval Mintz */ 174fe56b9e6SYuval Mintz void qed_memcpy_from(struct qed_hwfn *p_hwfn, 175fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 176fe56b9e6SYuval Mintz void *dest, 177fe56b9e6SYuval Mintz u32 hw_addr, 178fe56b9e6SYuval Mintz size_t n); 179fe56b9e6SYuval Mintz 180fe56b9e6SYuval Mintz /** 181*19198e4eSPrabhakar Kushwaha * qed_memcpy_to(): Copy n bytes to BAR using the given ptt 182fe56b9e6SYuval Mintz * 183*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 184*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 185*19198e4eSPrabhakar Kushwaha * @hw_addr: HW address. 186*19198e4eSPrabhakar Kushwaha * @src: Source. 187*19198e4eSPrabhakar Kushwaha * @n: N 188*19198e4eSPrabhakar Kushwaha * 189*19198e4eSPrabhakar Kushwaha * Return: Void. 190fe56b9e6SYuval Mintz */ 191fe56b9e6SYuval Mintz void qed_memcpy_to(struct qed_hwfn *p_hwfn, 192fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 193fe56b9e6SYuval Mintz u32 hw_addr, 194fe56b9e6SYuval Mintz void *src, 195fe56b9e6SYuval Mintz size_t n); 196fe56b9e6SYuval Mintz /** 197*19198e4eSPrabhakar Kushwaha * qed_fid_pretend(): pretend to another function when 198fe56b9e6SYuval Mintz * accessing the ptt window. There is no way to unpretend 199fe56b9e6SYuval Mintz * a function. The only way to cancel a pretend is to 200fe56b9e6SYuval Mintz * pretend back to the original function. 201fe56b9e6SYuval Mintz * 202*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 203*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 204*19198e4eSPrabhakar Kushwaha * @fid: fid field of pxp_pretend structure. Can contain 205fe56b9e6SYuval Mintz * either pf / vf, port/path fields are don't care. 206*19198e4eSPrabhakar Kushwaha * 207*19198e4eSPrabhakar Kushwaha * Return: Void. 208fe56b9e6SYuval Mintz */ 209fe56b9e6SYuval Mintz void qed_fid_pretend(struct qed_hwfn *p_hwfn, 210fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 211fe56b9e6SYuval Mintz u16 fid); 212fe56b9e6SYuval Mintz 213fe56b9e6SYuval Mintz /** 214*19198e4eSPrabhakar Kushwaha * qed_port_pretend(): Pretend to another port when accessing the ptt window 215fe56b9e6SYuval Mintz * 216*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 217*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 218*19198e4eSPrabhakar Kushwaha * @port_id: The port to pretend to 219*19198e4eSPrabhakar Kushwaha * 220*19198e4eSPrabhakar Kushwaha * Return: Void. 221fe56b9e6SYuval Mintz */ 222fe56b9e6SYuval Mintz void qed_port_pretend(struct qed_hwfn *p_hwfn, 223fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 224fe56b9e6SYuval Mintz u8 port_id); 225fe56b9e6SYuval Mintz 226fe56b9e6SYuval Mintz /** 227*19198e4eSPrabhakar Kushwaha * qed_port_unpretend(): Cancel any previously set port pretend 228fe56b9e6SYuval Mintz * 229*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 230*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 231*19198e4eSPrabhakar Kushwaha * 232*19198e4eSPrabhakar Kushwaha * Return: Void. 233fe56b9e6SYuval Mintz */ 234fe56b9e6SYuval Mintz void qed_port_unpretend(struct qed_hwfn *p_hwfn, 235fe56b9e6SYuval Mintz struct qed_ptt *p_ptt); 236fe56b9e6SYuval Mintz 237fe56b9e6SYuval Mintz /** 238*19198e4eSPrabhakar Kushwaha * qed_port_fid_pretend(): Pretend to another port and another function 239d52c89f1SMichal Kalderon * when accessing the ptt window 240d52c89f1SMichal Kalderon * 241*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 242*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 243*19198e4eSPrabhakar Kushwaha * @port_id: The port to pretend to 244*19198e4eSPrabhakar Kushwaha * @fid: fid field of pxp_pretend structure. Can contain either pf / vf. 245*19198e4eSPrabhakar Kushwaha * 246*19198e4eSPrabhakar Kushwaha * Return: Void. 247d52c89f1SMichal Kalderon */ 248d52c89f1SMichal Kalderon void qed_port_fid_pretend(struct qed_hwfn *p_hwfn, 249d52c89f1SMichal Kalderon struct qed_ptt *p_ptt, u8 port_id, u16 fid); 250d52c89f1SMichal Kalderon 251d52c89f1SMichal Kalderon /** 252*19198e4eSPrabhakar Kushwaha * qed_vfid_to_concrete(): Build a concrete FID for a given VF ID 25332a47e72SYuval Mintz * 254*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 255*19198e4eSPrabhakar Kushwaha * @vfid: VFID. 256*19198e4eSPrabhakar Kushwaha * 257*19198e4eSPrabhakar Kushwaha * Return: Void. 25832a47e72SYuval Mintz */ 25932a47e72SYuval Mintz u32 qed_vfid_to_concrete(struct qed_hwfn *p_hwfn, u8 vfid); 26032a47e72SYuval Mintz 26132a47e72SYuval Mintz /** 262*19198e4eSPrabhakar Kushwaha * qed_dmae_idx_to_go_cmd(): Map the idx to dmae cmd 263fe56b9e6SYuval Mintz * this is declared here since other files will require it. 264*19198e4eSPrabhakar Kushwaha * 265*19198e4eSPrabhakar Kushwaha * @idx: Index 266*19198e4eSPrabhakar Kushwaha * 267*19198e4eSPrabhakar Kushwaha * Return: Void. 268fe56b9e6SYuval Mintz */ 269fe56b9e6SYuval Mintz u32 qed_dmae_idx_to_go_cmd(u8 idx); 270fe56b9e6SYuval Mintz 271fe56b9e6SYuval Mintz /** 272*19198e4eSPrabhakar Kushwaha * qed_dmae_info_alloc(): Init the dmae_info structure 273fe56b9e6SYuval Mintz * which is part of p_hwfn. 274*19198e4eSPrabhakar Kushwaha * 275*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 276*19198e4eSPrabhakar Kushwaha * 277*19198e4eSPrabhakar Kushwaha * Return: Int. 278fe56b9e6SYuval Mintz */ 279fe56b9e6SYuval Mintz int qed_dmae_info_alloc(struct qed_hwfn *p_hwfn); 280fe56b9e6SYuval Mintz 281fe56b9e6SYuval Mintz /** 282*19198e4eSPrabhakar Kushwaha * qed_dmae_info_free(): Free the dmae_info structure 283*19198e4eSPrabhakar Kushwaha * which is part of p_hwfn. 284fe56b9e6SYuval Mintz * 285*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 286*19198e4eSPrabhakar Kushwaha * 287*19198e4eSPrabhakar Kushwaha * Return: Void. 288fe56b9e6SYuval Mintz */ 289fe56b9e6SYuval Mintz void qed_dmae_info_free(struct qed_hwfn *p_hwfn); 290fe56b9e6SYuval Mintz 291fe56b9e6SYuval Mintz union qed_qm_pq_params { 292fe56b9e6SYuval Mintz struct { 293dbb799c3SYuval Mintz u8 q_idx; 294dbb799c3SYuval Mintz } iscsi; 295dbb799c3SYuval Mintz 296dbb799c3SYuval Mintz struct { 297fe56b9e6SYuval Mintz u8 tc; 298fe56b9e6SYuval Mintz } core; 299fe56b9e6SYuval Mintz 300fe56b9e6SYuval Mintz struct { 301fe56b9e6SYuval Mintz u8 is_vf; 302fe56b9e6SYuval Mintz u8 vf_id; 303fe56b9e6SYuval Mintz u8 tc; 304fe56b9e6SYuval Mintz } eth; 305dbb799c3SYuval Mintz 306dbb799c3SYuval Mintz struct { 307dbb799c3SYuval Mintz u8 dcqcn; 308dbb799c3SYuval Mintz u8 qpid; /* roce relative */ 309dbb799c3SYuval Mintz } roce; 310fe56b9e6SYuval Mintz }; 311fe56b9e6SYuval Mintz 312fe56b9e6SYuval Mintz int qed_init_fw_data(struct qed_dev *cdev, 313fe56b9e6SYuval Mintz const u8 *fw_data); 314da090917STomer Tayar 315da090917STomer Tayar int qed_dmae_sanity(struct qed_hwfn *p_hwfn, 316da090917STomer Tayar struct qed_ptt *p_ptt, const char *phase); 317da090917STomer Tayar 318d639836aSIgor Russkikh #define QED_HW_ERR_MAX_STR_SIZE 256 319d639836aSIgor Russkikh 320d639836aSIgor Russkikh /** 321*19198e4eSPrabhakar Kushwaha * qed_hw_err_notify(): Notify upper layer driver and management FW 322d639836aSIgor Russkikh * about a HW error. 323d639836aSIgor Russkikh * 324*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 325*19198e4eSPrabhakar Kushwaha * @p_ptt: P_ptt. 326*19198e4eSPrabhakar Kushwaha * @err_type: Err Type. 327*19198e4eSPrabhakar Kushwaha * @fmt: Debug data buffer to send to the MFW 328*19198e4eSPrabhakar Kushwaha * @...: buffer format args 329*19198e4eSPrabhakar Kushwaha * 330*19198e4eSPrabhakar Kushwaha * Return void. 331d639836aSIgor Russkikh */ 332365cd2ceSAlexander Lobakin void __printf(4, 5) __cold qed_hw_err_notify(struct qed_hwfn *p_hwfn, 333d639836aSIgor Russkikh struct qed_ptt *p_ptt, 334365cd2ceSAlexander Lobakin enum qed_hw_err_type err_type, 335365cd2ceSAlexander Lobakin const char *fmt, ...); 336fe56b9e6SYuval Mintz #endif 337