1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 qed_hw_info_set_offload_tc(p_info, tc); 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 int i; 225 226 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 227 id = qed_dcbx_app_update[i].id; 228 229 if (type != id) 230 continue; 231 232 personality = qed_dcbx_app_update[i].personality; 233 234 qed_dcbx_set_params(p_data, p_info, enable, 235 prio, tc, type, personality); 236 } 237 } 238 239 static bool 240 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 241 u32 app_prio_bitmap, 242 u16 id, enum dcbx_protocol_type *type, bool ieee) 243 { 244 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 245 *type = DCBX_PROTOCOL_FCOE; 246 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_ROCE; 248 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ISCSI; 250 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ETH; 252 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ROCE_V2; 254 } else { 255 *type = DCBX_MAX_PROTOCOL_TYPE; 256 DP_ERR(p_hwfn, "No action required, App TLV entry = 0x%x\n", 257 app_prio_bitmap); 258 return false; 259 } 260 261 return true; 262 } 263 264 /* Parse app TLV's to update TC information in hw_info structure for 265 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 266 */ 267 static int 268 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 269 struct qed_dcbx_results *p_data, 270 struct dcbx_app_priority_entry *p_tbl, 271 u32 pri_tc_tbl, int count, u8 dcbx_version) 272 { 273 enum dcbx_protocol_type type; 274 bool enable, ieee, eth_tlv; 275 u8 tc, priority_map; 276 u16 protocol_id; 277 int priority; 278 int i; 279 280 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 281 282 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 283 eth_tlv = false; 284 /* Parse APP TLV */ 285 for (i = 0; i < count; i++) { 286 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 287 DCBX_APP_PROTOCOL_ID); 288 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 289 DCBX_APP_PRI_MAP); 290 priority = ffs(priority_map) - 1; 291 if (priority < 0) { 292 DP_ERR(p_hwfn, "Invalid priority\n"); 293 return -EINVAL; 294 } 295 296 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 297 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 298 protocol_id, &type, ieee)) { 299 /* ETH always have the enable bit reset, as it gets 300 * vlan information per packet. For other protocols, 301 * should be set according to the dcbx_enabled 302 * indication, but we only got here if there was an 303 * app tlv for the protocol, so dcbx must be enabled. 304 */ 305 if (type == DCBX_PROTOCOL_ETH) { 306 enable = false; 307 eth_tlv = true; 308 } else { 309 enable = true; 310 } 311 312 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 313 priority, tc, type); 314 } 315 } 316 317 /* If Eth TLV is not detected, use UFP TC as default TC */ 318 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 319 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 320 321 /* Update ramrod protocol data and hw_info fields 322 * with default info when corresponding APP TLV's are not detected. 323 * The enabled field has a different logic for ethernet as only for 324 * ethernet dcb should disabled by default, as the information arrives 325 * from the OS (unless an explicit app tlv was present). 326 */ 327 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 328 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 329 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 330 if (p_data->arr[type].update) 331 continue; 332 333 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 334 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 335 priority, tc, type); 336 } 337 338 return 0; 339 } 340 341 /* Parse app TLV's to update TC information in hw_info structure for 342 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 343 */ 344 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 345 { 346 struct dcbx_app_priority_feature *p_app; 347 struct dcbx_app_priority_entry *p_tbl; 348 struct qed_dcbx_results data = { 0 }; 349 struct dcbx_ets_feature *p_ets; 350 struct qed_hw_info *p_info; 351 u32 pri_tc_tbl, flags; 352 u8 dcbx_version; 353 int num_entries; 354 int rc = 0; 355 356 flags = p_hwfn->p_dcbx_info->operational.flags; 357 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 358 359 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 360 p_tbl = p_app->app_pri_tbl; 361 362 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 363 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 364 365 p_info = &p_hwfn->hw_info; 366 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 367 368 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 369 num_entries, dcbx_version); 370 if (rc) 371 return rc; 372 373 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 374 DCBX_ETS_MAX_TCS); 375 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 376 data.pf_id = p_hwfn->rel_pf_id; 377 data.dcbx_enabled = !!dcbx_version; 378 379 qed_dcbx_dp_protocol(p_hwfn, &data); 380 381 memcpy(&p_hwfn->p_dcbx_info->results, &data, 382 sizeof(struct qed_dcbx_results)); 383 384 return 0; 385 } 386 387 static int 388 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 389 struct qed_ptt *p_ptt, 390 struct qed_dcbx_mib_meta_data *p_data, 391 enum qed_mib_read_type type) 392 { 393 u32 prefix_seq_num, suffix_seq_num; 394 int read_count = 0; 395 int rc = 0; 396 397 /* The data is considered to be valid only if both sequence numbers are 398 * the same. 399 */ 400 do { 401 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 402 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 403 p_data->addr, p_data->size); 404 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 405 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 406 } else { 407 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 408 p_data->addr, p_data->size); 409 prefix_seq_num = p_data->mib->prefix_seq_num; 410 suffix_seq_num = p_data->mib->suffix_seq_num; 411 } 412 read_count++; 413 414 DP_VERBOSE(p_hwfn, 415 QED_MSG_DCB, 416 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 417 type, read_count, prefix_seq_num, suffix_seq_num); 418 } while ((prefix_seq_num != suffix_seq_num) && 419 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 420 421 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 422 DP_ERR(p_hwfn, 423 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 424 type, read_count, prefix_seq_num, suffix_seq_num); 425 rc = -EIO; 426 } 427 428 return rc; 429 } 430 431 static void 432 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 433 struct qed_dcbx_app_prio *p_prio, 434 struct qed_dcbx_results *p_results) 435 { 436 u8 val; 437 438 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 439 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 440 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 441 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 442 443 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 444 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 445 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 446 447 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 448 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 449 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 450 p_prio->roce_v2 = val; 451 } 452 453 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 454 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 455 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 456 457 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 458 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 459 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 460 461 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 462 p_results->arr[DCBX_PROTOCOL_ETH].enable) 463 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 464 465 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 466 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 467 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 468 p_prio->eth); 469 } 470 471 static void 472 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 473 struct dcbx_app_priority_feature *p_app, 474 struct dcbx_app_priority_entry *p_tbl, 475 struct qed_dcbx_params *p_params, bool ieee) 476 { 477 struct qed_app_entry *entry; 478 u8 pri_map; 479 int i; 480 481 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 482 DCBX_APP_WILLING); 483 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 484 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 485 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 486 DCBX_APP_NUM_ENTRIES); 487 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 488 entry = &p_params->app_entry[i]; 489 if (ieee) { 490 u8 sf_ieee; 491 u32 val; 492 493 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 494 DCBX_APP_SF_IEEE); 495 switch (sf_ieee) { 496 case DCBX_APP_SF_IEEE_RESERVED: 497 /* Old MFW */ 498 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 499 DCBX_APP_SF); 500 entry->sf_ieee = val ? 501 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 502 QED_DCBX_SF_IEEE_ETHTYPE; 503 break; 504 case DCBX_APP_SF_IEEE_ETHTYPE: 505 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 506 break; 507 case DCBX_APP_SF_IEEE_TCP_PORT: 508 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 509 break; 510 case DCBX_APP_SF_IEEE_UDP_PORT: 511 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 512 break; 513 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 514 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 515 break; 516 } 517 } else { 518 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 519 DCBX_APP_SF)); 520 } 521 522 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 523 entry->prio = ffs(pri_map) - 1; 524 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 525 DCBX_APP_PROTOCOL_ID); 526 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 527 entry->proto_id, 528 &entry->proto_type, ieee); 529 } 530 531 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 532 "APP params: willing %d, valid %d error = %d\n", 533 p_params->app_willing, p_params->app_valid, 534 p_params->app_error); 535 } 536 537 static void 538 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 539 u32 pfc, struct qed_dcbx_params *p_params) 540 { 541 u8 pfc_map; 542 543 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 544 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 545 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 546 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 547 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 548 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 549 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 550 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 551 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 552 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 553 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 554 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 555 556 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 557 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 558 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 559 p_params->pfc.enabled); 560 } 561 562 static void 563 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 564 struct dcbx_ets_feature *p_ets, 565 struct qed_dcbx_params *p_params) 566 { 567 u32 bw_map[2], tsa_map[2], pri_map; 568 int i; 569 570 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 571 DCBX_ETS_WILLING); 572 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 573 DCBX_ETS_ENABLED); 574 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 575 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 576 DCBX_ETS_MAX_TCS); 577 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 578 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 579 p_params->ets_willing, p_params->ets_enabled, 580 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 581 p_params->max_ets_tc); 582 583 if (p_params->ets_enabled && !p_params->max_ets_tc) { 584 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 585 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 586 "ETS params: max_ets_tc is forced to %d\n", 587 p_params->max_ets_tc); 588 } 589 590 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 591 * encoded in a type u32 array of size 2. 592 */ 593 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 594 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 595 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 596 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 597 pri_map = p_ets->pri_tc_tbl[0]; 598 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 599 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 600 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 601 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 602 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 603 "elem %d bw_tbl %x tsa_tbl %x\n", 604 i, p_params->ets_tc_bw_tbl[i], 605 p_params->ets_tc_tsa_tbl[i]); 606 } 607 } 608 609 static void 610 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 611 struct dcbx_app_priority_feature *p_app, 612 struct dcbx_app_priority_entry *p_tbl, 613 struct dcbx_ets_feature *p_ets, 614 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 615 { 616 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 617 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 618 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 619 } 620 621 static void 622 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 623 { 624 struct dcbx_features *p_feat; 625 626 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 627 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 628 p_feat->app.app_pri_tbl, &p_feat->ets, 629 p_feat->pfc, ¶ms->local.params, false); 630 params->local.valid = true; 631 } 632 633 static void 634 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 635 { 636 struct dcbx_features *p_feat; 637 638 p_feat = &p_hwfn->p_dcbx_info->remote.features; 639 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 640 p_feat->app.app_pri_tbl, &p_feat->ets, 641 p_feat->pfc, ¶ms->remote.params, false); 642 params->remote.valid = true; 643 } 644 645 static void 646 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 647 struct qed_dcbx_get *params) 648 { 649 struct qed_dcbx_operational_params *p_operational; 650 struct qed_dcbx_results *p_results; 651 struct dcbx_features *p_feat; 652 bool enabled, err; 653 u32 flags; 654 bool val; 655 656 flags = p_hwfn->p_dcbx_info->operational.flags; 657 658 /* If DCBx version is non zero, then negotiation 659 * was successfuly performed 660 */ 661 p_operational = ¶ms->operational; 662 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 663 DCBX_CONFIG_VERSION_DISABLED); 664 if (!enabled) { 665 p_operational->enabled = enabled; 666 p_operational->valid = false; 667 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 668 return; 669 } 670 671 p_feat = &p_hwfn->p_dcbx_info->operational.features; 672 p_results = &p_hwfn->p_dcbx_info->results; 673 674 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 675 DCBX_CONFIG_VERSION_IEEE); 676 p_operational->ieee = val; 677 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 678 DCBX_CONFIG_VERSION_CEE); 679 p_operational->cee = val; 680 681 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 682 DCBX_CONFIG_VERSION_STATIC); 683 p_operational->local = val; 684 685 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 686 "Version support: ieee %d, cee %d, static %d\n", 687 p_operational->ieee, p_operational->cee, 688 p_operational->local); 689 690 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 691 p_feat->app.app_pri_tbl, &p_feat->ets, 692 p_feat->pfc, ¶ms->operational.params, 693 p_operational->ieee); 694 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 695 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 696 p_operational->err = err; 697 p_operational->enabled = enabled; 698 p_operational->valid = true; 699 } 700 701 static void 702 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 703 struct qed_dcbx_get *params) 704 { 705 struct lldp_config_params_s *p_local; 706 707 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 708 709 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 710 sizeof(p_local->local_chassis_id)); 711 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 712 sizeof(p_local->local_port_id)); 713 } 714 715 static void 716 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 717 struct qed_dcbx_get *params) 718 { 719 struct lldp_status_params_s *p_remote; 720 721 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 722 723 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 724 sizeof(p_remote->peer_chassis_id)); 725 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 726 sizeof(p_remote->peer_port_id)); 727 } 728 729 static int 730 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 731 enum qed_mib_read_type type) 732 { 733 switch (type) { 734 case QED_DCBX_REMOTE_MIB: 735 qed_dcbx_get_remote_params(p_hwfn, p_params); 736 break; 737 case QED_DCBX_LOCAL_MIB: 738 qed_dcbx_get_local_params(p_hwfn, p_params); 739 break; 740 case QED_DCBX_OPERATIONAL_MIB: 741 qed_dcbx_get_operational_params(p_hwfn, p_params); 742 break; 743 case QED_DCBX_REMOTE_LLDP_MIB: 744 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 745 break; 746 case QED_DCBX_LOCAL_LLDP_MIB: 747 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 748 break; 749 default: 750 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 751 return -EINVAL; 752 } 753 754 return 0; 755 } 756 757 static int 758 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 759 { 760 struct qed_dcbx_mib_meta_data data; 761 int rc = 0; 762 763 memset(&data, 0, sizeof(data)); 764 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 765 lldp_config_params); 766 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 767 data.size = sizeof(struct lldp_config_params_s); 768 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 769 770 return rc; 771 } 772 773 static int 774 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 775 struct qed_ptt *p_ptt, 776 enum qed_mib_read_type type) 777 { 778 struct qed_dcbx_mib_meta_data data; 779 int rc = 0; 780 781 memset(&data, 0, sizeof(data)); 782 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 783 lldp_status_params); 784 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 785 data.size = sizeof(struct lldp_status_params_s); 786 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 787 788 return rc; 789 } 790 791 static int 792 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 793 struct qed_ptt *p_ptt, 794 enum qed_mib_read_type type) 795 { 796 struct qed_dcbx_mib_meta_data data; 797 int rc = 0; 798 799 memset(&data, 0, sizeof(data)); 800 data.addr = p_hwfn->mcp_info->port_addr + 801 offsetof(struct public_port, operational_dcbx_mib); 802 data.mib = &p_hwfn->p_dcbx_info->operational; 803 data.size = sizeof(struct dcbx_mib); 804 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 805 806 return rc; 807 } 808 809 static int 810 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 811 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 812 { 813 struct qed_dcbx_mib_meta_data data; 814 int rc = 0; 815 816 memset(&data, 0, sizeof(data)); 817 data.addr = p_hwfn->mcp_info->port_addr + 818 offsetof(struct public_port, remote_dcbx_mib); 819 data.mib = &p_hwfn->p_dcbx_info->remote; 820 data.size = sizeof(struct dcbx_mib); 821 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 822 823 return rc; 824 } 825 826 static int 827 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 828 { 829 struct qed_dcbx_mib_meta_data data; 830 int rc = 0; 831 832 memset(&data, 0, sizeof(data)); 833 data.addr = p_hwfn->mcp_info->port_addr + 834 offsetof(struct public_port, local_admin_dcbx_mib); 835 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 836 data.size = sizeof(struct dcbx_local_params); 837 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 838 839 return rc; 840 } 841 842 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 843 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 844 { 845 int rc = -EINVAL; 846 847 switch (type) { 848 case QED_DCBX_OPERATIONAL_MIB: 849 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 850 break; 851 case QED_DCBX_REMOTE_MIB: 852 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 853 break; 854 case QED_DCBX_LOCAL_MIB: 855 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 856 break; 857 case QED_DCBX_REMOTE_LLDP_MIB: 858 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 859 break; 860 case QED_DCBX_LOCAL_LLDP_MIB: 861 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 862 break; 863 default: 864 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 865 } 866 867 return rc; 868 } 869 870 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 871 { 872 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 873 void *cookie = hwfn->cdev->ops_cookie; 874 875 if (cookie && op->dcbx_aen) 876 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 877 } 878 879 /* Read updated MIB. 880 * Reconfigure QM and invoke PF update ramrod command if operational MIB 881 * change is detected. 882 */ 883 int 884 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 885 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 886 { 887 int rc = 0; 888 889 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 890 if (rc) 891 return rc; 892 893 if (type == QED_DCBX_OPERATIONAL_MIB) { 894 rc = qed_dcbx_process_mib_info(p_hwfn); 895 if (!rc) { 896 /* reconfigure tcs of QM queues according 897 * to negotiation results 898 */ 899 qed_qm_reconf(p_hwfn, p_ptt); 900 901 /* update storm FW with negotiation results */ 902 qed_sp_pf_update(p_hwfn); 903 904 /* for roce PFs, we may want to enable/disable DPM 905 * when DCBx change occurs 906 */ 907 if (p_hwfn->hw_info.personality == 908 QED_PCI_ETH_ROCE) 909 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 910 } 911 } 912 913 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 914 915 if (type == QED_DCBX_OPERATIONAL_MIB) { 916 struct qed_dcbx_results *p_data; 917 u16 val; 918 919 /* Configure in NIG which protocols support EDPM and should 920 * honor PFC. 921 */ 922 p_data = &p_hwfn->p_dcbx_info->results; 923 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 924 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 925 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 926 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 927 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 928 } 929 930 qed_dcbx_aen(p_hwfn, type); 931 932 return rc; 933 } 934 935 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 936 { 937 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 938 if (!p_hwfn->p_dcbx_info) 939 return -ENOMEM; 940 941 return 0; 942 } 943 944 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 945 { 946 kfree(p_hwfn->p_dcbx_info); 947 p_hwfn->p_dcbx_info = NULL; 948 } 949 950 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 951 struct qed_dcbx_results *p_src, 952 enum dcbx_protocol_type type) 953 { 954 p_data->dcb_enable_flag = p_src->arr[type].enable; 955 p_data->dcb_priority = p_src->arr[type].priority; 956 p_data->dcb_tc = p_src->arr[type].tc; 957 } 958 959 /* Set pf update ramrod command params */ 960 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 961 struct pf_update_ramrod_data *p_dest) 962 { 963 struct protocol_dcb_data *p_dcb_data; 964 u8 update_flag; 965 966 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 967 p_dest->update_fcoe_dcb_data_mode = update_flag; 968 969 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 970 p_dest->update_roce_dcb_data_mode = update_flag; 971 972 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 973 p_dest->update_rroce_dcb_data_mode = update_flag; 974 975 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 976 p_dest->update_iscsi_dcb_data_mode = update_flag; 977 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 978 p_dest->update_eth_dcb_data_mode = update_flag; 979 980 p_dcb_data = &p_dest->fcoe_dcb_data; 981 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 982 p_dcb_data = &p_dest->roce_dcb_data; 983 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 984 p_dcb_data = &p_dest->rroce_dcb_data; 985 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 986 p_dcb_data = &p_dest->iscsi_dcb_data; 987 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 988 p_dcb_data = &p_dest->eth_dcb_data; 989 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 990 } 991 992 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri) 993 { 994 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get; 995 996 if (pri >= QED_MAX_PFC_PRIORITIES) { 997 DP_ERR(p_hwfn, "Invalid priority %d\n", pri); 998 return QED_DCBX_DEFAULT_TC; 999 } 1000 1001 if (!dcbx_info->operational.valid) { 1002 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 1003 "Dcbx parameters not available\n"); 1004 return QED_DCBX_DEFAULT_TC; 1005 } 1006 1007 return dcbx_info->operational.params.ets_pri_tc_tbl[pri]; 1008 } 1009 1010 #ifdef CONFIG_DCB 1011 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 1012 struct qed_dcbx_get *p_get, 1013 enum qed_mib_read_type type) 1014 { 1015 struct qed_ptt *p_ptt; 1016 int rc; 1017 1018 if (IS_VF(p_hwfn->cdev)) 1019 return -EINVAL; 1020 1021 p_ptt = qed_ptt_acquire(p_hwfn); 1022 if (!p_ptt) 1023 return -EBUSY; 1024 1025 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1026 if (rc) 1027 goto out; 1028 1029 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1030 1031 out: 1032 qed_ptt_release(p_hwfn, p_ptt); 1033 return rc; 1034 } 1035 1036 static void 1037 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1038 u32 *pfc, struct qed_dcbx_params *p_params) 1039 { 1040 u8 pfc_map = 0; 1041 int i; 1042 1043 *pfc &= ~DCBX_PFC_ERROR_MASK; 1044 1045 if (p_params->pfc.willing) 1046 *pfc |= DCBX_PFC_WILLING_MASK; 1047 else 1048 *pfc &= ~DCBX_PFC_WILLING_MASK; 1049 1050 if (p_params->pfc.enabled) 1051 *pfc |= DCBX_PFC_ENABLED_MASK; 1052 else 1053 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1054 1055 *pfc &= ~DCBX_PFC_CAPS_MASK; 1056 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1057 1058 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1059 if (p_params->pfc.prio[i]) 1060 pfc_map |= BIT(i); 1061 1062 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1063 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1064 1065 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1066 } 1067 1068 static void 1069 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1070 struct dcbx_ets_feature *p_ets, 1071 struct qed_dcbx_params *p_params) 1072 { 1073 u8 *bw_map, *tsa_map; 1074 u32 val; 1075 int i; 1076 1077 if (p_params->ets_willing) 1078 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1079 else 1080 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1081 1082 if (p_params->ets_cbs) 1083 p_ets->flags |= DCBX_ETS_CBS_MASK; 1084 else 1085 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1086 1087 if (p_params->ets_enabled) 1088 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1089 else 1090 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1091 1092 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1093 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1094 1095 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1096 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1097 p_ets->pri_tc_tbl[0] = 0; 1098 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1099 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1100 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1101 /* Copy the priority value to the corresponding 4 bits in the 1102 * traffic class table. 1103 */ 1104 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1105 p_ets->pri_tc_tbl[0] |= val; 1106 } 1107 for (i = 0; i < 2; i++) { 1108 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1109 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1110 } 1111 } 1112 1113 static void 1114 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1115 struct dcbx_app_priority_feature *p_app, 1116 struct qed_dcbx_params *p_params, bool ieee) 1117 { 1118 u32 *entry; 1119 int i; 1120 1121 if (p_params->app_willing) 1122 p_app->flags |= DCBX_APP_WILLING_MASK; 1123 else 1124 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1125 1126 if (p_params->app_valid) 1127 p_app->flags |= DCBX_APP_ENABLED_MASK; 1128 else 1129 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1130 1131 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1132 p_app->flags |= (u32)p_params->num_app_entries << 1133 DCBX_APP_NUM_ENTRIES_SHIFT; 1134 1135 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1136 entry = &p_app->app_pri_tbl[i].entry; 1137 *entry = 0; 1138 if (ieee) { 1139 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1140 switch (p_params->app_entry[i].sf_ieee) { 1141 case QED_DCBX_SF_IEEE_ETHTYPE: 1142 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1143 DCBX_APP_SF_IEEE_SHIFT); 1144 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1145 DCBX_APP_SF_SHIFT); 1146 break; 1147 case QED_DCBX_SF_IEEE_TCP_PORT: 1148 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1149 DCBX_APP_SF_IEEE_SHIFT); 1150 *entry |= ((u32)DCBX_APP_SF_PORT << 1151 DCBX_APP_SF_SHIFT); 1152 break; 1153 case QED_DCBX_SF_IEEE_UDP_PORT: 1154 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1155 DCBX_APP_SF_IEEE_SHIFT); 1156 *entry |= ((u32)DCBX_APP_SF_PORT << 1157 DCBX_APP_SF_SHIFT); 1158 break; 1159 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1160 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1161 DCBX_APP_SF_IEEE_SHIFT); 1162 *entry |= ((u32)DCBX_APP_SF_PORT << 1163 DCBX_APP_SF_SHIFT); 1164 break; 1165 } 1166 } else { 1167 *entry &= ~DCBX_APP_SF_MASK; 1168 if (p_params->app_entry[i].ethtype) 1169 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1170 DCBX_APP_SF_SHIFT); 1171 else 1172 *entry |= ((u32)DCBX_APP_SF_PORT << 1173 DCBX_APP_SF_SHIFT); 1174 } 1175 1176 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1177 *entry |= ((u32)p_params->app_entry[i].proto_id << 1178 DCBX_APP_PROTOCOL_ID_SHIFT); 1179 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1180 *entry |= ((u32)(p_params->app_entry[i].prio) << 1181 DCBX_APP_PRI_MAP_SHIFT); 1182 } 1183 } 1184 1185 static void 1186 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1187 struct dcbx_local_params *local_admin, 1188 struct qed_dcbx_set *params) 1189 { 1190 bool ieee = false; 1191 1192 local_admin->flags = 0; 1193 memcpy(&local_admin->features, 1194 &p_hwfn->p_dcbx_info->operational.features, 1195 sizeof(local_admin->features)); 1196 1197 if (params->enabled) { 1198 local_admin->config = params->ver_num; 1199 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1200 } else { 1201 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1202 } 1203 1204 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1205 local_admin->config); 1206 1207 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1208 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1209 ¶ms->config.params); 1210 1211 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1212 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1213 ¶ms->config.params); 1214 1215 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1216 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1217 ¶ms->config.params, ieee); 1218 } 1219 1220 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1221 struct qed_dcbx_set *params, bool hw_commit) 1222 { 1223 struct dcbx_local_params local_admin; 1224 struct qed_dcbx_mib_meta_data data; 1225 u32 resp = 0, param = 0; 1226 int rc = 0; 1227 1228 if (!hw_commit) { 1229 memcpy(&p_hwfn->p_dcbx_info->set, params, 1230 sizeof(struct qed_dcbx_set)); 1231 return 0; 1232 } 1233 1234 /* clear set-parmas cache */ 1235 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1236 1237 memset(&local_admin, 0, sizeof(local_admin)); 1238 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1239 1240 data.addr = p_hwfn->mcp_info->port_addr + 1241 offsetof(struct public_port, local_admin_dcbx_mib); 1242 data.local_admin = &local_admin; 1243 data.size = sizeof(struct dcbx_local_params); 1244 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1245 1246 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1247 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1248 if (rc) 1249 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1250 1251 return rc; 1252 } 1253 1254 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1255 struct qed_dcbx_set *params) 1256 { 1257 struct qed_dcbx_get *dcbx_info; 1258 int rc; 1259 1260 if (p_hwfn->p_dcbx_info->set.config.valid) { 1261 memcpy(params, &p_hwfn->p_dcbx_info->set, 1262 sizeof(struct qed_dcbx_set)); 1263 return 0; 1264 } 1265 1266 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1267 if (!dcbx_info) 1268 return -ENOMEM; 1269 1270 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1271 if (rc) { 1272 kfree(dcbx_info); 1273 return rc; 1274 } 1275 1276 p_hwfn->p_dcbx_info->set.override_flags = 0; 1277 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1278 if (dcbx_info->operational.cee) 1279 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1280 if (dcbx_info->operational.ieee) 1281 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1282 if (dcbx_info->operational.local) 1283 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1284 1285 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1286 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1287 &dcbx_info->operational.params, 1288 sizeof(struct qed_dcbx_admin_params)); 1289 p_hwfn->p_dcbx_info->set.config.valid = true; 1290 1291 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1292 1293 kfree(dcbx_info); 1294 1295 return 0; 1296 } 1297 1298 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1299 enum qed_mib_read_type type) 1300 { 1301 struct qed_dcbx_get *dcbx_info; 1302 1303 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1304 if (!dcbx_info) 1305 return NULL; 1306 1307 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1308 kfree(dcbx_info); 1309 return NULL; 1310 } 1311 1312 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1313 !dcbx_info->operational.enabled) { 1314 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1315 kfree(dcbx_info); 1316 return NULL; 1317 } 1318 1319 return dcbx_info; 1320 } 1321 1322 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1323 { 1324 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1325 struct qed_dcbx_get *dcbx_info; 1326 bool enabled; 1327 1328 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1329 if (!dcbx_info) 1330 return 0; 1331 1332 enabled = dcbx_info->operational.enabled; 1333 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1334 kfree(dcbx_info); 1335 1336 return enabled; 1337 } 1338 1339 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1340 { 1341 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1342 struct qed_dcbx_set dcbx_set; 1343 struct qed_ptt *ptt; 1344 int rc; 1345 1346 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1347 1348 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1349 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1350 if (rc) 1351 return 1; 1352 1353 dcbx_set.enabled = !!state; 1354 1355 ptt = qed_ptt_acquire(hwfn); 1356 if (!ptt) 1357 return 1; 1358 1359 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1360 1361 qed_ptt_release(hwfn, ptt); 1362 1363 return rc ? 1 : 0; 1364 } 1365 1366 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1367 u8 *pgid, u8 *bw_pct, u8 *up_map) 1368 { 1369 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1370 struct qed_dcbx_get *dcbx_info; 1371 1372 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1373 *prio_type = *pgid = *bw_pct = *up_map = 0; 1374 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1375 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1376 return; 1377 } 1378 1379 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1380 if (!dcbx_info) 1381 return; 1382 1383 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1384 kfree(dcbx_info); 1385 } 1386 1387 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1388 { 1389 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1390 struct qed_dcbx_get *dcbx_info; 1391 1392 *bw_pct = 0; 1393 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1394 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1395 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1396 return; 1397 } 1398 1399 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1400 if (!dcbx_info) 1401 return; 1402 1403 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1404 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1405 kfree(dcbx_info); 1406 } 1407 1408 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1409 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1410 { 1411 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1412 *prio = *bwg_id = *bw_pct = *up_map = 0; 1413 } 1414 1415 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1416 int bwg_id, u8 *bw_pct) 1417 { 1418 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1419 *bw_pct = 0; 1420 } 1421 1422 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1423 int priority, u8 *setting) 1424 { 1425 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1426 struct qed_dcbx_get *dcbx_info; 1427 1428 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1429 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1430 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1431 return; 1432 } 1433 1434 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1435 if (!dcbx_info) 1436 return; 1437 1438 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1439 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1440 kfree(dcbx_info); 1441 } 1442 1443 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1444 { 1445 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1446 struct qed_dcbx_set dcbx_set; 1447 struct qed_ptt *ptt; 1448 int rc; 1449 1450 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1451 priority, setting); 1452 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1453 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1454 return; 1455 } 1456 1457 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1458 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1459 if (rc) 1460 return; 1461 1462 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1463 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1464 1465 ptt = qed_ptt_acquire(hwfn); 1466 if (!ptt) 1467 return; 1468 1469 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1470 1471 qed_ptt_release(hwfn, ptt); 1472 } 1473 1474 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1475 { 1476 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1477 struct qed_dcbx_get *dcbx_info; 1478 int rc = 0; 1479 1480 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1481 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1482 if (!dcbx_info) 1483 return 1; 1484 1485 switch (capid) { 1486 case DCB_CAP_ATTR_PG: 1487 case DCB_CAP_ATTR_PFC: 1488 case DCB_CAP_ATTR_UP2TC: 1489 case DCB_CAP_ATTR_GSP: 1490 *cap = true; 1491 break; 1492 case DCB_CAP_ATTR_PG_TCS: 1493 case DCB_CAP_ATTR_PFC_TCS: 1494 *cap = 0x80; 1495 break; 1496 case DCB_CAP_ATTR_DCBX: 1497 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1498 DCB_CAP_DCBX_STATIC); 1499 break; 1500 default: 1501 *cap = false; 1502 rc = 1; 1503 } 1504 1505 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1506 kfree(dcbx_info); 1507 1508 return rc; 1509 } 1510 1511 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1512 { 1513 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1514 struct qed_dcbx_get *dcbx_info; 1515 int rc = 0; 1516 1517 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1518 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1519 if (!dcbx_info) 1520 return -EINVAL; 1521 1522 switch (tcid) { 1523 case DCB_NUMTCS_ATTR_PG: 1524 *num = dcbx_info->operational.params.max_ets_tc; 1525 break; 1526 case DCB_NUMTCS_ATTR_PFC: 1527 *num = dcbx_info->operational.params.pfc.max_tc; 1528 break; 1529 default: 1530 rc = -EINVAL; 1531 } 1532 1533 kfree(dcbx_info); 1534 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1535 1536 return rc; 1537 } 1538 1539 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1540 { 1541 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1542 struct qed_dcbx_get *dcbx_info; 1543 bool enabled; 1544 1545 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1546 if (!dcbx_info) 1547 return 0; 1548 1549 enabled = dcbx_info->operational.params.pfc.enabled; 1550 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1551 kfree(dcbx_info); 1552 1553 return enabled; 1554 } 1555 1556 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1557 { 1558 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1559 struct qed_dcbx_get *dcbx_info; 1560 u8 mode = 0; 1561 1562 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1563 if (!dcbx_info) 1564 return 0; 1565 1566 if (dcbx_info->operational.ieee) 1567 mode |= DCB_CAP_DCBX_VER_IEEE; 1568 if (dcbx_info->operational.cee) 1569 mode |= DCB_CAP_DCBX_VER_CEE; 1570 if (dcbx_info->operational.local) 1571 mode |= DCB_CAP_DCBX_STATIC; 1572 1573 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1574 kfree(dcbx_info); 1575 1576 return mode; 1577 } 1578 1579 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1580 int tc, 1581 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1582 { 1583 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1584 struct qed_dcbx_set dcbx_set; 1585 struct qed_ptt *ptt; 1586 int rc; 1587 1588 DP_VERBOSE(hwfn, QED_MSG_DCB, 1589 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1590 tc, pri_type, pgid, bw_pct, up_map); 1591 1592 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1593 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1594 return; 1595 } 1596 1597 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1598 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1599 if (rc) 1600 return; 1601 1602 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1603 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1604 1605 ptt = qed_ptt_acquire(hwfn); 1606 if (!ptt) 1607 return; 1608 1609 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1610 1611 qed_ptt_release(hwfn, ptt); 1612 } 1613 1614 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1615 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1616 { 1617 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1618 } 1619 1620 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1621 { 1622 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1623 struct qed_dcbx_set dcbx_set; 1624 struct qed_ptt *ptt; 1625 int rc; 1626 1627 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1628 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1629 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1630 return; 1631 } 1632 1633 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1634 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1635 if (rc) 1636 return; 1637 1638 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1639 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1640 1641 ptt = qed_ptt_acquire(hwfn); 1642 if (!ptt) 1643 return; 1644 1645 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1646 1647 qed_ptt_release(hwfn, ptt); 1648 } 1649 1650 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1651 { 1652 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1653 } 1654 1655 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1656 { 1657 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1658 struct qed_dcbx_set dcbx_set; 1659 struct qed_ptt *ptt; 1660 int rc; 1661 1662 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1663 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1664 if (rc) 1665 return 1; 1666 1667 ptt = qed_ptt_acquire(hwfn); 1668 if (!ptt) 1669 return 1; 1670 1671 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1672 1673 qed_ptt_release(hwfn, ptt); 1674 1675 return rc; 1676 } 1677 1678 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1679 { 1680 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1681 struct qed_dcbx_set dcbx_set; 1682 struct qed_ptt *ptt; 1683 int rc; 1684 1685 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1686 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1687 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1688 if (rc) 1689 return 1; 1690 1691 switch (tcid) { 1692 case DCB_NUMTCS_ATTR_PG: 1693 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1694 dcbx_set.config.params.max_ets_tc = num; 1695 break; 1696 case DCB_NUMTCS_ATTR_PFC: 1697 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1698 dcbx_set.config.params.pfc.max_tc = num; 1699 break; 1700 default: 1701 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1702 return -EINVAL; 1703 } 1704 1705 ptt = qed_ptt_acquire(hwfn); 1706 if (!ptt) 1707 return -EINVAL; 1708 1709 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1710 1711 qed_ptt_release(hwfn, ptt); 1712 1713 return 0; 1714 } 1715 1716 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1717 { 1718 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1719 struct qed_dcbx_set dcbx_set; 1720 struct qed_ptt *ptt; 1721 int rc; 1722 1723 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1724 1725 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1726 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1727 if (rc) 1728 return; 1729 1730 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1731 dcbx_set.config.params.pfc.enabled = !!state; 1732 1733 ptt = qed_ptt_acquire(hwfn); 1734 if (!ptt) 1735 return; 1736 1737 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1738 1739 qed_ptt_release(hwfn, ptt); 1740 } 1741 1742 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1743 { 1744 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1745 struct qed_dcbx_get *dcbx_info; 1746 struct qed_app_entry *entry; 1747 bool ethtype; 1748 u8 prio = 0; 1749 int i; 1750 1751 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1752 if (!dcbx_info) 1753 return -EINVAL; 1754 1755 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1756 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1757 entry = &dcbx_info->operational.params.app_entry[i]; 1758 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1759 prio = entry->prio; 1760 break; 1761 } 1762 } 1763 1764 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1765 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1766 kfree(dcbx_info); 1767 return -EINVAL; 1768 } 1769 1770 kfree(dcbx_info); 1771 1772 return prio; 1773 } 1774 1775 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1776 u8 idtype, u16 idval, u8 pri_map) 1777 { 1778 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1779 struct qed_dcbx_set dcbx_set; 1780 struct qed_app_entry *entry; 1781 struct qed_ptt *ptt; 1782 bool ethtype; 1783 int rc, i; 1784 1785 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1786 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1787 if (rc) 1788 return -EINVAL; 1789 1790 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1791 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1792 entry = &dcbx_set.config.params.app_entry[i]; 1793 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1794 break; 1795 /* First empty slot */ 1796 if (!entry->proto_id) { 1797 dcbx_set.config.params.num_app_entries++; 1798 break; 1799 } 1800 } 1801 1802 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1803 DP_ERR(cdev, "App table is full\n"); 1804 return -EBUSY; 1805 } 1806 1807 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1808 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1809 dcbx_set.config.params.app_entry[i].proto_id = idval; 1810 dcbx_set.config.params.app_entry[i].prio = pri_map; 1811 1812 ptt = qed_ptt_acquire(hwfn); 1813 if (!ptt) 1814 return -EBUSY; 1815 1816 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1817 1818 qed_ptt_release(hwfn, ptt); 1819 1820 return rc; 1821 } 1822 1823 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1824 { 1825 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1826 struct qed_dcbx_set dcbx_set; 1827 struct qed_ptt *ptt; 1828 int rc; 1829 1830 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1831 1832 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1833 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1834 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1835 return 1; 1836 } 1837 1838 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1839 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1840 if (rc) 1841 return 1; 1842 1843 dcbx_set.ver_num = 0; 1844 if (mode & DCB_CAP_DCBX_VER_CEE) { 1845 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1846 dcbx_set.enabled = true; 1847 } 1848 1849 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1850 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1851 dcbx_set.enabled = true; 1852 } 1853 1854 if (mode & DCB_CAP_DCBX_STATIC) { 1855 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1856 dcbx_set.enabled = true; 1857 } 1858 1859 ptt = qed_ptt_acquire(hwfn); 1860 if (!ptt) 1861 return 1; 1862 1863 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1864 1865 qed_ptt_release(hwfn, ptt); 1866 1867 return rc; 1868 } 1869 1870 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1871 { 1872 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1873 struct qed_dcbx_get *dcbx_info; 1874 1875 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1876 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1877 if (!dcbx_info) 1878 return 1; 1879 1880 *flags = 0; 1881 switch (featid) { 1882 case DCB_FEATCFG_ATTR_PG: 1883 if (dcbx_info->operational.params.ets_enabled) 1884 *flags = DCB_FEATCFG_ENABLE; 1885 else 1886 *flags = DCB_FEATCFG_ERROR; 1887 break; 1888 case DCB_FEATCFG_ATTR_PFC: 1889 if (dcbx_info->operational.params.pfc.enabled) 1890 *flags = DCB_FEATCFG_ENABLE; 1891 else 1892 *flags = DCB_FEATCFG_ERROR; 1893 break; 1894 case DCB_FEATCFG_ATTR_APP: 1895 if (dcbx_info->operational.params.app_valid) 1896 *flags = DCB_FEATCFG_ENABLE; 1897 else 1898 *flags = DCB_FEATCFG_ERROR; 1899 break; 1900 default: 1901 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1902 kfree(dcbx_info); 1903 return 1; 1904 } 1905 1906 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1907 kfree(dcbx_info); 1908 1909 return 0; 1910 } 1911 1912 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1913 { 1914 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1915 struct qed_dcbx_set dcbx_set; 1916 bool enabled, willing; 1917 struct qed_ptt *ptt; 1918 int rc; 1919 1920 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1921 featid, flags); 1922 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1923 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1924 if (rc) 1925 return 1; 1926 1927 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1928 willing = !!(flags & DCB_FEATCFG_WILLING); 1929 switch (featid) { 1930 case DCB_FEATCFG_ATTR_PG: 1931 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1932 dcbx_set.config.params.ets_enabled = enabled; 1933 dcbx_set.config.params.ets_willing = willing; 1934 break; 1935 case DCB_FEATCFG_ATTR_PFC: 1936 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1937 dcbx_set.config.params.pfc.enabled = enabled; 1938 dcbx_set.config.params.pfc.willing = willing; 1939 break; 1940 case DCB_FEATCFG_ATTR_APP: 1941 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1942 dcbx_set.config.params.app_willing = willing; 1943 break; 1944 default: 1945 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1946 return 1; 1947 } 1948 1949 ptt = qed_ptt_acquire(hwfn); 1950 if (!ptt) 1951 return 1; 1952 1953 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1954 1955 qed_ptt_release(hwfn, ptt); 1956 1957 return 0; 1958 } 1959 1960 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1961 struct dcb_peer_app_info *info, 1962 u16 *app_count) 1963 { 1964 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1965 struct qed_dcbx_get *dcbx_info; 1966 1967 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1968 if (!dcbx_info) 1969 return -EINVAL; 1970 1971 info->willing = dcbx_info->remote.params.app_willing; 1972 info->error = dcbx_info->remote.params.app_error; 1973 *app_count = dcbx_info->remote.params.num_app_entries; 1974 kfree(dcbx_info); 1975 1976 return 0; 1977 } 1978 1979 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1980 struct dcb_app *table) 1981 { 1982 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1983 struct qed_dcbx_get *dcbx_info; 1984 int i; 1985 1986 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1987 if (!dcbx_info) 1988 return -EINVAL; 1989 1990 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1991 if (dcbx_info->remote.params.app_entry[i].ethtype) 1992 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1993 else 1994 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1995 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1996 table[i].protocol = 1997 dcbx_info->remote.params.app_entry[i].proto_id; 1998 } 1999 2000 kfree(dcbx_info); 2001 2002 return 0; 2003 } 2004 2005 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 2006 { 2007 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2008 struct qed_dcbx_get *dcbx_info; 2009 int i; 2010 2011 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2012 if (!dcbx_info) 2013 return -EINVAL; 2014 2015 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2016 if (dcbx_info->remote.params.pfc.prio[i]) 2017 pfc->pfc_en |= BIT(i); 2018 2019 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2020 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2021 pfc->pfc_en, pfc->tcs_supported); 2022 kfree(dcbx_info); 2023 2024 return 0; 2025 } 2026 2027 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2028 { 2029 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2030 struct qed_dcbx_get *dcbx_info; 2031 int i; 2032 2033 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2034 if (!dcbx_info) 2035 return -EINVAL; 2036 2037 pg->willing = dcbx_info->remote.params.ets_willing; 2038 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2039 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2040 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2041 } 2042 2043 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2044 kfree(dcbx_info); 2045 2046 return 0; 2047 } 2048 2049 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2050 struct ieee_pfc *pfc, bool remote) 2051 { 2052 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2053 struct qed_dcbx_params *params; 2054 struct qed_dcbx_get *dcbx_info; 2055 int rc, i; 2056 2057 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2058 if (!dcbx_info) 2059 return -EINVAL; 2060 2061 if (!dcbx_info->operational.ieee) { 2062 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2063 kfree(dcbx_info); 2064 return -EINVAL; 2065 } 2066 2067 if (remote) { 2068 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2069 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2070 QED_DCBX_REMOTE_MIB); 2071 if (rc) { 2072 kfree(dcbx_info); 2073 return -EINVAL; 2074 } 2075 2076 params = &dcbx_info->remote.params; 2077 } else { 2078 params = &dcbx_info->operational.params; 2079 } 2080 2081 pfc->pfc_cap = params->pfc.max_tc; 2082 pfc->pfc_en = 0; 2083 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2084 if (params->pfc.prio[i]) 2085 pfc->pfc_en |= BIT(i); 2086 2087 kfree(dcbx_info); 2088 2089 return 0; 2090 } 2091 2092 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2093 { 2094 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2095 } 2096 2097 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2098 { 2099 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2100 struct qed_dcbx_get *dcbx_info; 2101 struct qed_dcbx_set dcbx_set; 2102 struct qed_ptt *ptt; 2103 int rc, i; 2104 2105 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2106 if (!dcbx_info) 2107 return -EINVAL; 2108 2109 if (!dcbx_info->operational.ieee) { 2110 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2111 kfree(dcbx_info); 2112 return -EINVAL; 2113 } 2114 2115 kfree(dcbx_info); 2116 2117 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2118 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2119 if (rc) 2120 return -EINVAL; 2121 2122 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2123 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2124 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2125 2126 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2127 2128 ptt = qed_ptt_acquire(hwfn); 2129 if (!ptt) 2130 return -EINVAL; 2131 2132 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2133 2134 qed_ptt_release(hwfn, ptt); 2135 2136 return rc; 2137 } 2138 2139 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2140 struct ieee_ets *ets, bool remote) 2141 { 2142 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2143 struct qed_dcbx_get *dcbx_info; 2144 struct qed_dcbx_params *params; 2145 int rc; 2146 2147 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2148 if (!dcbx_info) 2149 return -EINVAL; 2150 2151 if (!dcbx_info->operational.ieee) { 2152 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2153 kfree(dcbx_info); 2154 return -EINVAL; 2155 } 2156 2157 if (remote) { 2158 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2159 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2160 QED_DCBX_REMOTE_MIB); 2161 if (rc) { 2162 kfree(dcbx_info); 2163 return -EINVAL; 2164 } 2165 2166 params = &dcbx_info->remote.params; 2167 } else { 2168 params = &dcbx_info->operational.params; 2169 } 2170 2171 ets->ets_cap = params->max_ets_tc; 2172 ets->willing = params->ets_willing; 2173 ets->cbs = params->ets_cbs; 2174 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2175 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2176 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2177 kfree(dcbx_info); 2178 2179 return 0; 2180 } 2181 2182 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2183 { 2184 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2185 } 2186 2187 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2188 { 2189 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2190 struct qed_dcbx_get *dcbx_info; 2191 struct qed_dcbx_set dcbx_set; 2192 struct qed_ptt *ptt; 2193 int rc; 2194 2195 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2196 if (!dcbx_info) 2197 return -EINVAL; 2198 2199 if (!dcbx_info->operational.ieee) { 2200 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2201 kfree(dcbx_info); 2202 return -EINVAL; 2203 } 2204 2205 kfree(dcbx_info); 2206 2207 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2208 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2209 if (rc) 2210 return -EINVAL; 2211 2212 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2213 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2214 dcbx_set.config.params.ets_willing = ets->willing; 2215 dcbx_set.config.params.ets_cbs = ets->cbs; 2216 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2217 sizeof(ets->tc_tx_bw)); 2218 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2219 sizeof(ets->tc_tsa)); 2220 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2221 sizeof(ets->prio_tc)); 2222 2223 ptt = qed_ptt_acquire(hwfn); 2224 if (!ptt) 2225 return -EINVAL; 2226 2227 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2228 2229 qed_ptt_release(hwfn, ptt); 2230 2231 return rc; 2232 } 2233 2234 static int 2235 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2236 { 2237 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2238 } 2239 2240 static int 2241 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2242 { 2243 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2244 } 2245 2246 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2247 { 2248 switch (selector) { 2249 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2250 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2251 break; 2252 case IEEE_8021QAZ_APP_SEL_STREAM: 2253 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2254 break; 2255 case IEEE_8021QAZ_APP_SEL_DGRAM: 2256 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2257 break; 2258 case IEEE_8021QAZ_APP_SEL_ANY: 2259 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2260 break; 2261 default: 2262 return -EINVAL; 2263 } 2264 2265 return 0; 2266 } 2267 2268 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2269 { 2270 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2271 struct qed_dcbx_get *dcbx_info; 2272 struct qed_app_entry *entry; 2273 u8 prio = 0; 2274 u8 sf_ieee; 2275 int i; 2276 2277 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2278 app->selector, app->protocol); 2279 2280 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2281 DP_INFO(cdev, "Invalid selector field value %d\n", 2282 app->selector); 2283 return -EINVAL; 2284 } 2285 2286 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2287 if (!dcbx_info) 2288 return -EINVAL; 2289 2290 if (!dcbx_info->operational.ieee) { 2291 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2292 kfree(dcbx_info); 2293 return -EINVAL; 2294 } 2295 2296 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2297 entry = &dcbx_info->operational.params.app_entry[i]; 2298 if ((entry->sf_ieee == sf_ieee) && 2299 (entry->proto_id == app->protocol)) { 2300 prio = entry->prio; 2301 break; 2302 } 2303 } 2304 2305 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2306 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2307 app->protocol); 2308 kfree(dcbx_info); 2309 return -EINVAL; 2310 } 2311 2312 app->priority = ffs(prio) - 1; 2313 2314 kfree(dcbx_info); 2315 2316 return 0; 2317 } 2318 2319 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2320 { 2321 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2322 struct qed_dcbx_get *dcbx_info; 2323 struct qed_dcbx_set dcbx_set; 2324 struct qed_app_entry *entry; 2325 struct qed_ptt *ptt; 2326 u8 sf_ieee; 2327 int rc, i; 2328 2329 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2330 app->selector, app->protocol, app->priority); 2331 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2332 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2333 return -EINVAL; 2334 } 2335 2336 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2337 DP_INFO(cdev, "Invalid selector field value %d\n", 2338 app->selector); 2339 return -EINVAL; 2340 } 2341 2342 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2343 if (!dcbx_info) 2344 return -EINVAL; 2345 2346 if (!dcbx_info->operational.ieee) { 2347 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2348 kfree(dcbx_info); 2349 return -EINVAL; 2350 } 2351 2352 kfree(dcbx_info); 2353 2354 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2355 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2356 if (rc) 2357 return -EINVAL; 2358 2359 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2360 entry = &dcbx_set.config.params.app_entry[i]; 2361 if ((entry->sf_ieee == sf_ieee) && 2362 (entry->proto_id == app->protocol)) 2363 break; 2364 /* First empty slot */ 2365 if (!entry->proto_id) { 2366 dcbx_set.config.params.num_app_entries++; 2367 break; 2368 } 2369 } 2370 2371 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2372 DP_ERR(cdev, "App table is full\n"); 2373 return -EBUSY; 2374 } 2375 2376 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2377 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2378 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2379 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2380 2381 ptt = qed_ptt_acquire(hwfn); 2382 if (!ptt) 2383 return -EBUSY; 2384 2385 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2386 2387 qed_ptt_release(hwfn, ptt); 2388 2389 return rc; 2390 } 2391 2392 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2393 .getstate = qed_dcbnl_getstate, 2394 .setstate = qed_dcbnl_setstate, 2395 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2396 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2397 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2398 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2399 .getpfccfg = qed_dcbnl_getpfccfg, 2400 .setpfccfg = qed_dcbnl_setpfccfg, 2401 .getcap = qed_dcbnl_getcap, 2402 .getnumtcs = qed_dcbnl_getnumtcs, 2403 .getpfcstate = qed_dcbnl_getpfcstate, 2404 .getdcbx = qed_dcbnl_getdcbx, 2405 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2406 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2407 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2408 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2409 .setall = qed_dcbnl_setall, 2410 .setnumtcs = qed_dcbnl_setnumtcs, 2411 .setpfcstate = qed_dcbnl_setpfcstate, 2412 .setapp = qed_dcbnl_setapp, 2413 .setdcbx = qed_dcbnl_setdcbx, 2414 .setfeatcfg = qed_dcbnl_setfeatcfg, 2415 .getfeatcfg = qed_dcbnl_getfeatcfg, 2416 .getapp = qed_dcbnl_getapp, 2417 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2418 .peer_getapptable = qed_dcbnl_peer_getapptable, 2419 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2420 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2421 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2422 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2423 .ieee_getets = qed_dcbnl_ieee_getets, 2424 .ieee_setets = qed_dcbnl_ieee_setets, 2425 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2426 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2427 .ieee_getapp = qed_dcbnl_ieee_getapp, 2428 .ieee_setapp = qed_dcbnl_ieee_setapp, 2429 }; 2430 2431 #endif 2432