1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 194 bool app_tlv, bool enable, u8 prio, u8 tc, 195 enum dcbx_protocol_type type, 196 enum qed_pci_personality personality) 197 { 198 /* PF update ramrod data */ 199 p_data->arr[type].enable = enable; 200 p_data->arr[type].priority = prio; 201 p_data->arr[type].tc = tc; 202 if (enable) 203 p_data->arr[type].update = UPDATE_DCB; 204 else 205 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 206 207 /* Do not add vlan tag 0 when DCB is enabled and port in UFP/OV mode */ 208 if ((test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits) || 209 test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits))) 210 p_data->arr[type].dont_add_vlan0 = true; 211 212 /* QM reconf data */ 213 if (app_tlv && p_hwfn->hw_info.personality == personality) 214 qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc); 215 216 /* Configure dcbx vlan priority in doorbell block for roce EDPM */ 217 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 218 type == DCBX_PROTOCOL_ROCE) { 219 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); 220 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1); 221 } 222 } 223 224 /* Update app protocol data and hw_info fields with the TLV info */ 225 static void 226 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 227 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 228 bool app_tlv, bool enable, u8 prio, u8 tc, 229 enum dcbx_protocol_type type) 230 { 231 enum qed_pci_personality personality; 232 enum dcbx_protocol_type id; 233 int i; 234 235 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 236 id = qed_dcbx_app_update[i].id; 237 238 if (type != id) 239 continue; 240 241 personality = qed_dcbx_app_update[i].personality; 242 243 qed_dcbx_set_params(p_data, p_hwfn, p_ptt, app_tlv, enable, 244 prio, tc, type, personality); 245 } 246 } 247 248 static bool 249 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 250 u32 app_prio_bitmap, 251 u16 id, enum dcbx_protocol_type *type, bool ieee) 252 { 253 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 254 *type = DCBX_PROTOCOL_FCOE; 255 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 256 *type = DCBX_PROTOCOL_ROCE; 257 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 258 *type = DCBX_PROTOCOL_ISCSI; 259 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 260 *type = DCBX_PROTOCOL_ETH; 261 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 262 *type = DCBX_PROTOCOL_ROCE_V2; 263 } else { 264 *type = DCBX_MAX_PROTOCOL_TYPE; 265 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 266 "No action required, App TLV entry = 0x%x\n", 267 app_prio_bitmap); 268 return false; 269 } 270 271 return true; 272 } 273 274 /* Parse app TLV's to update TC information in hw_info structure for 275 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 276 */ 277 static int 278 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 279 struct qed_dcbx_results *p_data, 280 struct dcbx_app_priority_entry *p_tbl, 281 u32 pri_tc_tbl, int count, u8 dcbx_version) 282 { 283 enum dcbx_protocol_type type; 284 bool enable, ieee, eth_tlv; 285 u8 tc, priority_map; 286 u16 protocol_id; 287 int priority; 288 int i; 289 290 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 291 292 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 293 eth_tlv = false; 294 /* Parse APP TLV */ 295 for (i = 0; i < count; i++) { 296 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 297 DCBX_APP_PROTOCOL_ID); 298 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 299 DCBX_APP_PRI_MAP); 300 priority = ffs(priority_map) - 1; 301 if (priority < 0) { 302 DP_ERR(p_hwfn, "Invalid priority\n"); 303 return -EINVAL; 304 } 305 306 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 307 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 308 protocol_id, &type, ieee)) { 309 /* ETH always have the enable bit reset, as it gets 310 * vlan information per packet. For other protocols, 311 * should be set according to the dcbx_enabled 312 * indication, but we only got here if there was an 313 * app tlv for the protocol, so dcbx must be enabled. 314 */ 315 if (type == DCBX_PROTOCOL_ETH) { 316 enable = false; 317 eth_tlv = true; 318 } else { 319 enable = true; 320 } 321 322 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, true, 323 enable, priority, tc, type); 324 } 325 } 326 327 /* If Eth TLV is not detected, use UFP TC as default TC */ 328 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 329 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 330 331 /* Update ramrod protocol data and hw_info fields 332 * with default info when corresponding APP TLV's are not detected. 333 * The enabled field has a different logic for ethernet as only for 334 * ethernet dcb should disabled by default, as the information arrives 335 * from the OS (unless an explicit app tlv was present). 336 */ 337 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 338 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 339 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 340 if (p_data->arr[type].update) 341 continue; 342 343 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 344 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false, enable, 345 priority, tc, type); 346 } 347 348 return 0; 349 } 350 351 /* Parse app TLV's to update TC information in hw_info structure for 352 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 353 */ 354 static int 355 qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 356 { 357 struct dcbx_app_priority_feature *p_app; 358 struct dcbx_app_priority_entry *p_tbl; 359 struct qed_dcbx_results data = { 0 }; 360 struct dcbx_ets_feature *p_ets; 361 struct qed_hw_info *p_info; 362 u32 pri_tc_tbl, flags; 363 u8 dcbx_version; 364 int num_entries; 365 int rc = 0; 366 367 flags = p_hwfn->p_dcbx_info->operational.flags; 368 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 369 370 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 371 p_tbl = p_app->app_pri_tbl; 372 373 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 374 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 375 376 p_info = &p_hwfn->hw_info; 377 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 378 379 rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, 380 num_entries, dcbx_version); 381 if (rc) 382 return rc; 383 384 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 385 DCBX_ETS_MAX_TCS); 386 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 387 data.pf_id = p_hwfn->rel_pf_id; 388 data.dcbx_enabled = !!dcbx_version; 389 390 qed_dcbx_dp_protocol(p_hwfn, &data); 391 392 memcpy(&p_hwfn->p_dcbx_info->results, &data, 393 sizeof(struct qed_dcbx_results)); 394 395 return 0; 396 } 397 398 static int 399 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 400 struct qed_ptt *p_ptt, 401 struct qed_dcbx_mib_meta_data *p_data, 402 enum qed_mib_read_type type) 403 { 404 u32 prefix_seq_num, suffix_seq_num; 405 int read_count = 0; 406 int rc = 0; 407 408 /* The data is considered to be valid only if both sequence numbers are 409 * the same. 410 */ 411 do { 412 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 413 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 414 p_data->addr, p_data->size); 415 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 416 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 417 } else { 418 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 419 p_data->addr, p_data->size); 420 prefix_seq_num = p_data->mib->prefix_seq_num; 421 suffix_seq_num = p_data->mib->suffix_seq_num; 422 } 423 read_count++; 424 425 DP_VERBOSE(p_hwfn, 426 QED_MSG_DCB, 427 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 428 type, read_count, prefix_seq_num, suffix_seq_num); 429 } while ((prefix_seq_num != suffix_seq_num) && 430 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 431 432 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 433 DP_ERR(p_hwfn, 434 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 435 type, read_count, prefix_seq_num, suffix_seq_num); 436 rc = -EIO; 437 } 438 439 return rc; 440 } 441 442 static void 443 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 444 struct qed_dcbx_app_prio *p_prio, 445 struct qed_dcbx_results *p_results) 446 { 447 u8 val; 448 449 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 450 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 451 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 452 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 453 454 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 455 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 456 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 457 458 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 459 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 460 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 461 p_prio->roce_v2 = val; 462 } 463 464 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 465 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 466 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 467 468 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 469 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 470 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 471 472 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 473 p_results->arr[DCBX_PROTOCOL_ETH].enable) 474 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 475 476 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 477 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 478 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 479 p_prio->eth); 480 } 481 482 static void 483 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 484 struct dcbx_app_priority_feature *p_app, 485 struct dcbx_app_priority_entry *p_tbl, 486 struct qed_dcbx_params *p_params, bool ieee) 487 { 488 struct qed_app_entry *entry; 489 u8 pri_map; 490 int i; 491 492 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 493 DCBX_APP_WILLING); 494 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 495 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 496 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 497 DCBX_APP_NUM_ENTRIES); 498 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 499 entry = &p_params->app_entry[i]; 500 if (ieee) { 501 u8 sf_ieee; 502 u32 val; 503 504 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 505 DCBX_APP_SF_IEEE); 506 switch (sf_ieee) { 507 case DCBX_APP_SF_IEEE_RESERVED: 508 /* Old MFW */ 509 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 510 DCBX_APP_SF); 511 entry->sf_ieee = val ? 512 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 513 QED_DCBX_SF_IEEE_ETHTYPE; 514 break; 515 case DCBX_APP_SF_IEEE_ETHTYPE: 516 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 517 break; 518 case DCBX_APP_SF_IEEE_TCP_PORT: 519 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 520 break; 521 case DCBX_APP_SF_IEEE_UDP_PORT: 522 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 523 break; 524 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 525 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 526 break; 527 } 528 } else { 529 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 530 DCBX_APP_SF)); 531 } 532 533 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 534 entry->prio = ffs(pri_map) - 1; 535 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 536 DCBX_APP_PROTOCOL_ID); 537 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 538 entry->proto_id, 539 &entry->proto_type, ieee); 540 } 541 542 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 543 "APP params: willing %d, valid %d error = %d\n", 544 p_params->app_willing, p_params->app_valid, 545 p_params->app_error); 546 } 547 548 static void 549 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 550 u32 pfc, struct qed_dcbx_params *p_params) 551 { 552 u8 pfc_map; 553 554 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 555 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 556 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 557 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 558 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 559 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 560 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 561 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 562 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 563 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 564 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 565 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 566 567 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 568 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 569 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 570 p_params->pfc.enabled); 571 } 572 573 static void 574 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 575 struct dcbx_ets_feature *p_ets, 576 struct qed_dcbx_params *p_params) 577 { 578 u32 bw_map[2], tsa_map[2], pri_map; 579 int i; 580 581 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 582 DCBX_ETS_WILLING); 583 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 584 DCBX_ETS_ENABLED); 585 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 586 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 587 DCBX_ETS_MAX_TCS); 588 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 589 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 590 p_params->ets_willing, p_params->ets_enabled, 591 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 592 p_params->max_ets_tc); 593 594 if (p_params->ets_enabled && !p_params->max_ets_tc) { 595 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 596 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 597 "ETS params: max_ets_tc is forced to %d\n", 598 p_params->max_ets_tc); 599 } 600 601 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 602 * encoded in a type u32 array of size 2. 603 */ 604 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 605 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 606 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 607 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 608 pri_map = p_ets->pri_tc_tbl[0]; 609 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 610 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 611 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 612 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 613 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 614 "elem %d bw_tbl %x tsa_tbl %x\n", 615 i, p_params->ets_tc_bw_tbl[i], 616 p_params->ets_tc_tsa_tbl[i]); 617 } 618 } 619 620 static void 621 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 622 struct dcbx_app_priority_feature *p_app, 623 struct dcbx_app_priority_entry *p_tbl, 624 struct dcbx_ets_feature *p_ets, 625 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 626 { 627 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 628 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 629 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 630 } 631 632 static void 633 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 634 { 635 struct dcbx_features *p_feat; 636 637 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 638 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 639 p_feat->app.app_pri_tbl, &p_feat->ets, 640 p_feat->pfc, ¶ms->local.params, false); 641 params->local.valid = true; 642 } 643 644 static void 645 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 646 { 647 struct dcbx_features *p_feat; 648 649 p_feat = &p_hwfn->p_dcbx_info->remote.features; 650 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 651 p_feat->app.app_pri_tbl, &p_feat->ets, 652 p_feat->pfc, ¶ms->remote.params, false); 653 params->remote.valid = true; 654 } 655 656 static void 657 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 658 struct qed_dcbx_get *params) 659 { 660 struct qed_dcbx_operational_params *p_operational; 661 struct qed_dcbx_results *p_results; 662 struct dcbx_features *p_feat; 663 bool enabled, err; 664 u32 flags; 665 bool val; 666 667 flags = p_hwfn->p_dcbx_info->operational.flags; 668 669 /* If DCBx version is non zero, then negotiation 670 * was successfuly performed 671 */ 672 p_operational = ¶ms->operational; 673 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 674 DCBX_CONFIG_VERSION_DISABLED); 675 if (!enabled) { 676 p_operational->enabled = enabled; 677 p_operational->valid = false; 678 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 679 return; 680 } 681 682 p_feat = &p_hwfn->p_dcbx_info->operational.features; 683 p_results = &p_hwfn->p_dcbx_info->results; 684 685 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 686 DCBX_CONFIG_VERSION_IEEE); 687 p_operational->ieee = val; 688 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 689 DCBX_CONFIG_VERSION_CEE); 690 p_operational->cee = val; 691 692 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 693 DCBX_CONFIG_VERSION_STATIC); 694 p_operational->local = val; 695 696 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 697 "Version support: ieee %d, cee %d, static %d\n", 698 p_operational->ieee, p_operational->cee, 699 p_operational->local); 700 701 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 702 p_feat->app.app_pri_tbl, &p_feat->ets, 703 p_feat->pfc, ¶ms->operational.params, 704 p_operational->ieee); 705 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 706 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 707 p_operational->err = err; 708 p_operational->enabled = enabled; 709 p_operational->valid = true; 710 } 711 712 static void 713 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 714 struct qed_dcbx_get *params) 715 { 716 struct lldp_config_params_s *p_local; 717 718 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 719 720 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 721 sizeof(p_local->local_chassis_id)); 722 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 723 sizeof(p_local->local_port_id)); 724 } 725 726 static void 727 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 728 struct qed_dcbx_get *params) 729 { 730 struct lldp_status_params_s *p_remote; 731 732 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 733 734 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 735 sizeof(p_remote->peer_chassis_id)); 736 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 737 sizeof(p_remote->peer_port_id)); 738 } 739 740 static int 741 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 742 enum qed_mib_read_type type) 743 { 744 switch (type) { 745 case QED_DCBX_REMOTE_MIB: 746 qed_dcbx_get_remote_params(p_hwfn, p_params); 747 break; 748 case QED_DCBX_LOCAL_MIB: 749 qed_dcbx_get_local_params(p_hwfn, p_params); 750 break; 751 case QED_DCBX_OPERATIONAL_MIB: 752 qed_dcbx_get_operational_params(p_hwfn, p_params); 753 break; 754 case QED_DCBX_REMOTE_LLDP_MIB: 755 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 756 break; 757 case QED_DCBX_LOCAL_LLDP_MIB: 758 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 759 break; 760 default: 761 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 762 return -EINVAL; 763 } 764 765 return 0; 766 } 767 768 static int 769 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 770 { 771 struct qed_dcbx_mib_meta_data data; 772 int rc = 0; 773 774 memset(&data, 0, sizeof(data)); 775 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 776 lldp_config_params); 777 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 778 data.size = sizeof(struct lldp_config_params_s); 779 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 780 781 return rc; 782 } 783 784 static int 785 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 786 struct qed_ptt *p_ptt, 787 enum qed_mib_read_type type) 788 { 789 struct qed_dcbx_mib_meta_data data; 790 int rc = 0; 791 792 memset(&data, 0, sizeof(data)); 793 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 794 lldp_status_params); 795 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 796 data.size = sizeof(struct lldp_status_params_s); 797 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 798 799 return rc; 800 } 801 802 static int 803 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 804 struct qed_ptt *p_ptt, 805 enum qed_mib_read_type type) 806 { 807 struct qed_dcbx_mib_meta_data data; 808 int rc = 0; 809 810 memset(&data, 0, sizeof(data)); 811 data.addr = p_hwfn->mcp_info->port_addr + 812 offsetof(struct public_port, operational_dcbx_mib); 813 data.mib = &p_hwfn->p_dcbx_info->operational; 814 data.size = sizeof(struct dcbx_mib); 815 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 816 817 return rc; 818 } 819 820 static int 821 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 822 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 823 { 824 struct qed_dcbx_mib_meta_data data; 825 int rc = 0; 826 827 memset(&data, 0, sizeof(data)); 828 data.addr = p_hwfn->mcp_info->port_addr + 829 offsetof(struct public_port, remote_dcbx_mib); 830 data.mib = &p_hwfn->p_dcbx_info->remote; 831 data.size = sizeof(struct dcbx_mib); 832 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 833 834 return rc; 835 } 836 837 static int 838 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 839 { 840 struct qed_dcbx_mib_meta_data data; 841 int rc = 0; 842 843 memset(&data, 0, sizeof(data)); 844 data.addr = p_hwfn->mcp_info->port_addr + 845 offsetof(struct public_port, local_admin_dcbx_mib); 846 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 847 data.size = sizeof(struct dcbx_local_params); 848 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 849 850 return rc; 851 } 852 853 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 854 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 855 { 856 int rc = -EINVAL; 857 858 switch (type) { 859 case QED_DCBX_OPERATIONAL_MIB: 860 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 861 break; 862 case QED_DCBX_REMOTE_MIB: 863 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 864 break; 865 case QED_DCBX_LOCAL_MIB: 866 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 867 break; 868 case QED_DCBX_REMOTE_LLDP_MIB: 869 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 870 break; 871 case QED_DCBX_LOCAL_LLDP_MIB: 872 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 873 break; 874 default: 875 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 876 } 877 878 return rc; 879 } 880 881 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 882 { 883 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 884 void *cookie = hwfn->cdev->ops_cookie; 885 886 if (cookie && op->dcbx_aen) 887 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 888 } 889 890 /* Read updated MIB. 891 * Reconfigure QM and invoke PF update ramrod command if operational MIB 892 * change is detected. 893 */ 894 int 895 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 896 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 897 { 898 int rc = 0; 899 900 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 901 if (rc) 902 return rc; 903 904 if (type == QED_DCBX_OPERATIONAL_MIB) { 905 rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt); 906 if (!rc) { 907 /* reconfigure tcs of QM queues according 908 * to negotiation results 909 */ 910 qed_qm_reconf(p_hwfn, p_ptt); 911 912 /* update storm FW with negotiation results */ 913 qed_sp_pf_update(p_hwfn); 914 915 /* for roce PFs, we may want to enable/disable DPM 916 * when DCBx change occurs 917 */ 918 if (p_hwfn->hw_info.personality == 919 QED_PCI_ETH_ROCE) 920 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 921 } 922 } 923 924 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 925 926 if (type == QED_DCBX_OPERATIONAL_MIB) { 927 struct qed_dcbx_results *p_data; 928 u16 val; 929 930 /* Configure in NIG which protocols support EDPM and should 931 * honor PFC. 932 */ 933 p_data = &p_hwfn->p_dcbx_info->results; 934 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 935 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 936 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 937 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 938 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 939 } 940 941 qed_dcbx_aen(p_hwfn, type); 942 943 return rc; 944 } 945 946 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 947 { 948 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 949 if (!p_hwfn->p_dcbx_info) 950 return -ENOMEM; 951 952 return 0; 953 } 954 955 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 956 { 957 kfree(p_hwfn->p_dcbx_info); 958 p_hwfn->p_dcbx_info = NULL; 959 } 960 961 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 962 struct qed_dcbx_results *p_src, 963 enum dcbx_protocol_type type) 964 { 965 p_data->dcb_enable_flag = p_src->arr[type].enable; 966 p_data->dcb_priority = p_src->arr[type].priority; 967 p_data->dcb_tc = p_src->arr[type].tc; 968 p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0; 969 } 970 971 /* Set pf update ramrod command params */ 972 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 973 struct pf_update_ramrod_data *p_dest) 974 { 975 struct protocol_dcb_data *p_dcb_data; 976 u8 update_flag; 977 978 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 979 p_dest->update_fcoe_dcb_data_mode = update_flag; 980 981 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 982 p_dest->update_roce_dcb_data_mode = update_flag; 983 984 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 985 p_dest->update_rroce_dcb_data_mode = update_flag; 986 987 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 988 p_dest->update_iscsi_dcb_data_mode = update_flag; 989 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 990 p_dest->update_eth_dcb_data_mode = update_flag; 991 992 p_dcb_data = &p_dest->fcoe_dcb_data; 993 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 994 p_dcb_data = &p_dest->roce_dcb_data; 995 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 996 p_dcb_data = &p_dest->rroce_dcb_data; 997 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 998 p_dcb_data = &p_dest->iscsi_dcb_data; 999 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 1000 p_dcb_data = &p_dest->eth_dcb_data; 1001 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 1002 } 1003 1004 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri) 1005 { 1006 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get; 1007 1008 if (pri >= QED_MAX_PFC_PRIORITIES) { 1009 DP_ERR(p_hwfn, "Invalid priority %d\n", pri); 1010 return QED_DCBX_DEFAULT_TC; 1011 } 1012 1013 if (!dcbx_info->operational.valid) { 1014 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 1015 "Dcbx parameters not available\n"); 1016 return QED_DCBX_DEFAULT_TC; 1017 } 1018 1019 return dcbx_info->operational.params.ets_pri_tc_tbl[pri]; 1020 } 1021 1022 #ifdef CONFIG_DCB 1023 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 1024 struct qed_dcbx_get *p_get, 1025 enum qed_mib_read_type type) 1026 { 1027 struct qed_ptt *p_ptt; 1028 int rc; 1029 1030 if (IS_VF(p_hwfn->cdev)) 1031 return -EINVAL; 1032 1033 p_ptt = qed_ptt_acquire(p_hwfn); 1034 if (!p_ptt) 1035 return -EBUSY; 1036 1037 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1038 if (rc) 1039 goto out; 1040 1041 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1042 1043 out: 1044 qed_ptt_release(p_hwfn, p_ptt); 1045 return rc; 1046 } 1047 1048 static void 1049 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1050 u32 *pfc, struct qed_dcbx_params *p_params) 1051 { 1052 u8 pfc_map = 0; 1053 int i; 1054 1055 *pfc &= ~DCBX_PFC_ERROR_MASK; 1056 1057 if (p_params->pfc.willing) 1058 *pfc |= DCBX_PFC_WILLING_MASK; 1059 else 1060 *pfc &= ~DCBX_PFC_WILLING_MASK; 1061 1062 if (p_params->pfc.enabled) 1063 *pfc |= DCBX_PFC_ENABLED_MASK; 1064 else 1065 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1066 1067 *pfc &= ~DCBX_PFC_CAPS_MASK; 1068 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1069 1070 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1071 if (p_params->pfc.prio[i]) 1072 pfc_map |= BIT(i); 1073 1074 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1075 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1076 1077 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1078 } 1079 1080 static void 1081 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1082 struct dcbx_ets_feature *p_ets, 1083 struct qed_dcbx_params *p_params) 1084 { 1085 u8 *bw_map, *tsa_map; 1086 u32 val; 1087 int i; 1088 1089 if (p_params->ets_willing) 1090 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1091 else 1092 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1093 1094 if (p_params->ets_cbs) 1095 p_ets->flags |= DCBX_ETS_CBS_MASK; 1096 else 1097 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1098 1099 if (p_params->ets_enabled) 1100 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1101 else 1102 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1103 1104 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1105 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1106 1107 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1108 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1109 p_ets->pri_tc_tbl[0] = 0; 1110 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1111 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1112 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1113 /* Copy the priority value to the corresponding 4 bits in the 1114 * traffic class table. 1115 */ 1116 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1117 p_ets->pri_tc_tbl[0] |= val; 1118 } 1119 for (i = 0; i < 2; i++) { 1120 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1121 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1122 } 1123 } 1124 1125 static void 1126 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1127 struct dcbx_app_priority_feature *p_app, 1128 struct qed_dcbx_params *p_params, bool ieee) 1129 { 1130 u32 *entry; 1131 int i; 1132 1133 if (p_params->app_willing) 1134 p_app->flags |= DCBX_APP_WILLING_MASK; 1135 else 1136 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1137 1138 if (p_params->app_valid) 1139 p_app->flags |= DCBX_APP_ENABLED_MASK; 1140 else 1141 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1142 1143 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1144 p_app->flags |= (u32)p_params->num_app_entries << 1145 DCBX_APP_NUM_ENTRIES_SHIFT; 1146 1147 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1148 entry = &p_app->app_pri_tbl[i].entry; 1149 *entry = 0; 1150 if (ieee) { 1151 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1152 switch (p_params->app_entry[i].sf_ieee) { 1153 case QED_DCBX_SF_IEEE_ETHTYPE: 1154 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1155 DCBX_APP_SF_IEEE_SHIFT); 1156 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1157 DCBX_APP_SF_SHIFT); 1158 break; 1159 case QED_DCBX_SF_IEEE_TCP_PORT: 1160 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1161 DCBX_APP_SF_IEEE_SHIFT); 1162 *entry |= ((u32)DCBX_APP_SF_PORT << 1163 DCBX_APP_SF_SHIFT); 1164 break; 1165 case QED_DCBX_SF_IEEE_UDP_PORT: 1166 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1167 DCBX_APP_SF_IEEE_SHIFT); 1168 *entry |= ((u32)DCBX_APP_SF_PORT << 1169 DCBX_APP_SF_SHIFT); 1170 break; 1171 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1172 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1173 DCBX_APP_SF_IEEE_SHIFT); 1174 *entry |= ((u32)DCBX_APP_SF_PORT << 1175 DCBX_APP_SF_SHIFT); 1176 break; 1177 } 1178 } else { 1179 *entry &= ~DCBX_APP_SF_MASK; 1180 if (p_params->app_entry[i].ethtype) 1181 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1182 DCBX_APP_SF_SHIFT); 1183 else 1184 *entry |= ((u32)DCBX_APP_SF_PORT << 1185 DCBX_APP_SF_SHIFT); 1186 } 1187 1188 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1189 *entry |= ((u32)p_params->app_entry[i].proto_id << 1190 DCBX_APP_PROTOCOL_ID_SHIFT); 1191 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1192 *entry |= ((u32)(p_params->app_entry[i].prio) << 1193 DCBX_APP_PRI_MAP_SHIFT); 1194 } 1195 } 1196 1197 static void 1198 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1199 struct dcbx_local_params *local_admin, 1200 struct qed_dcbx_set *params) 1201 { 1202 bool ieee = false; 1203 1204 local_admin->flags = 0; 1205 memcpy(&local_admin->features, 1206 &p_hwfn->p_dcbx_info->operational.features, 1207 sizeof(local_admin->features)); 1208 1209 if (params->enabled) { 1210 local_admin->config = params->ver_num; 1211 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1212 } else { 1213 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1214 } 1215 1216 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1217 local_admin->config); 1218 1219 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1220 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1221 ¶ms->config.params); 1222 1223 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1224 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1225 ¶ms->config.params); 1226 1227 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1228 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1229 ¶ms->config.params, ieee); 1230 } 1231 1232 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1233 struct qed_dcbx_set *params, bool hw_commit) 1234 { 1235 struct dcbx_local_params local_admin; 1236 struct qed_dcbx_mib_meta_data data; 1237 u32 resp = 0, param = 0; 1238 int rc = 0; 1239 1240 if (!hw_commit) { 1241 memcpy(&p_hwfn->p_dcbx_info->set, params, 1242 sizeof(struct qed_dcbx_set)); 1243 return 0; 1244 } 1245 1246 /* clear set-parmas cache */ 1247 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1248 1249 memset(&local_admin, 0, sizeof(local_admin)); 1250 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1251 1252 data.addr = p_hwfn->mcp_info->port_addr + 1253 offsetof(struct public_port, local_admin_dcbx_mib); 1254 data.local_admin = &local_admin; 1255 data.size = sizeof(struct dcbx_local_params); 1256 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1257 1258 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1259 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1260 if (rc) 1261 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1262 1263 return rc; 1264 } 1265 1266 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1267 struct qed_dcbx_set *params) 1268 { 1269 struct qed_dcbx_get *dcbx_info; 1270 int rc; 1271 1272 if (p_hwfn->p_dcbx_info->set.config.valid) { 1273 memcpy(params, &p_hwfn->p_dcbx_info->set, 1274 sizeof(struct qed_dcbx_set)); 1275 return 0; 1276 } 1277 1278 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1279 if (!dcbx_info) 1280 return -ENOMEM; 1281 1282 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1283 if (rc) { 1284 kfree(dcbx_info); 1285 return rc; 1286 } 1287 1288 p_hwfn->p_dcbx_info->set.override_flags = 0; 1289 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1290 if (dcbx_info->operational.cee) 1291 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1292 if (dcbx_info->operational.ieee) 1293 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1294 if (dcbx_info->operational.local) 1295 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1296 1297 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1298 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1299 &dcbx_info->operational.params, 1300 sizeof(struct qed_dcbx_admin_params)); 1301 p_hwfn->p_dcbx_info->set.config.valid = true; 1302 1303 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1304 1305 kfree(dcbx_info); 1306 1307 return 0; 1308 } 1309 1310 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1311 enum qed_mib_read_type type) 1312 { 1313 struct qed_dcbx_get *dcbx_info; 1314 1315 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1316 if (!dcbx_info) 1317 return NULL; 1318 1319 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1320 kfree(dcbx_info); 1321 return NULL; 1322 } 1323 1324 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1325 !dcbx_info->operational.enabled) { 1326 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1327 kfree(dcbx_info); 1328 return NULL; 1329 } 1330 1331 return dcbx_info; 1332 } 1333 1334 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1335 { 1336 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1337 struct qed_dcbx_get *dcbx_info; 1338 bool enabled; 1339 1340 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1341 if (!dcbx_info) 1342 return 0; 1343 1344 enabled = dcbx_info->operational.enabled; 1345 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1346 kfree(dcbx_info); 1347 1348 return enabled; 1349 } 1350 1351 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1352 { 1353 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1354 struct qed_dcbx_set dcbx_set; 1355 struct qed_ptt *ptt; 1356 int rc; 1357 1358 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1359 1360 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1361 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1362 if (rc) 1363 return 1; 1364 1365 dcbx_set.enabled = !!state; 1366 1367 ptt = qed_ptt_acquire(hwfn); 1368 if (!ptt) 1369 return 1; 1370 1371 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1372 1373 qed_ptt_release(hwfn, ptt); 1374 1375 return rc ? 1 : 0; 1376 } 1377 1378 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1379 u8 *pgid, u8 *bw_pct, u8 *up_map) 1380 { 1381 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1382 struct qed_dcbx_get *dcbx_info; 1383 1384 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1385 *prio_type = *pgid = *bw_pct = *up_map = 0; 1386 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1387 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1388 return; 1389 } 1390 1391 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1392 if (!dcbx_info) 1393 return; 1394 1395 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1396 kfree(dcbx_info); 1397 } 1398 1399 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1400 { 1401 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1402 struct qed_dcbx_get *dcbx_info; 1403 1404 *bw_pct = 0; 1405 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1406 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1407 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1408 return; 1409 } 1410 1411 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1412 if (!dcbx_info) 1413 return; 1414 1415 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1416 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1417 kfree(dcbx_info); 1418 } 1419 1420 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1421 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1422 { 1423 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1424 *prio = *bwg_id = *bw_pct = *up_map = 0; 1425 } 1426 1427 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1428 int bwg_id, u8 *bw_pct) 1429 { 1430 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1431 *bw_pct = 0; 1432 } 1433 1434 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1435 int priority, u8 *setting) 1436 { 1437 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1438 struct qed_dcbx_get *dcbx_info; 1439 1440 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1441 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1442 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1443 return; 1444 } 1445 1446 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1447 if (!dcbx_info) 1448 return; 1449 1450 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1451 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1452 kfree(dcbx_info); 1453 } 1454 1455 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1456 { 1457 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1458 struct qed_dcbx_set dcbx_set; 1459 struct qed_ptt *ptt; 1460 int rc; 1461 1462 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1463 priority, setting); 1464 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1465 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1466 return; 1467 } 1468 1469 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1470 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1471 if (rc) 1472 return; 1473 1474 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1475 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1476 1477 ptt = qed_ptt_acquire(hwfn); 1478 if (!ptt) 1479 return; 1480 1481 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1482 1483 qed_ptt_release(hwfn, ptt); 1484 } 1485 1486 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1487 { 1488 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1489 struct qed_dcbx_get *dcbx_info; 1490 int rc = 0; 1491 1492 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1493 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1494 if (!dcbx_info) 1495 return 1; 1496 1497 switch (capid) { 1498 case DCB_CAP_ATTR_PG: 1499 case DCB_CAP_ATTR_PFC: 1500 case DCB_CAP_ATTR_UP2TC: 1501 case DCB_CAP_ATTR_GSP: 1502 *cap = true; 1503 break; 1504 case DCB_CAP_ATTR_PG_TCS: 1505 case DCB_CAP_ATTR_PFC_TCS: 1506 *cap = 0x80; 1507 break; 1508 case DCB_CAP_ATTR_DCBX: 1509 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1510 DCB_CAP_DCBX_STATIC); 1511 break; 1512 default: 1513 *cap = false; 1514 rc = 1; 1515 } 1516 1517 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1518 kfree(dcbx_info); 1519 1520 return rc; 1521 } 1522 1523 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1524 { 1525 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1526 struct qed_dcbx_get *dcbx_info; 1527 int rc = 0; 1528 1529 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1530 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1531 if (!dcbx_info) 1532 return -EINVAL; 1533 1534 switch (tcid) { 1535 case DCB_NUMTCS_ATTR_PG: 1536 *num = dcbx_info->operational.params.max_ets_tc; 1537 break; 1538 case DCB_NUMTCS_ATTR_PFC: 1539 *num = dcbx_info->operational.params.pfc.max_tc; 1540 break; 1541 default: 1542 rc = -EINVAL; 1543 } 1544 1545 kfree(dcbx_info); 1546 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1547 1548 return rc; 1549 } 1550 1551 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1552 { 1553 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1554 struct qed_dcbx_get *dcbx_info; 1555 bool enabled; 1556 1557 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1558 if (!dcbx_info) 1559 return 0; 1560 1561 enabled = dcbx_info->operational.params.pfc.enabled; 1562 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1563 kfree(dcbx_info); 1564 1565 return enabled; 1566 } 1567 1568 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1569 { 1570 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1571 struct qed_dcbx_get *dcbx_info; 1572 u8 mode = 0; 1573 1574 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1575 if (!dcbx_info) 1576 return 0; 1577 1578 if (dcbx_info->operational.ieee) 1579 mode |= DCB_CAP_DCBX_VER_IEEE; 1580 if (dcbx_info->operational.cee) 1581 mode |= DCB_CAP_DCBX_VER_CEE; 1582 if (dcbx_info->operational.local) 1583 mode |= DCB_CAP_DCBX_STATIC; 1584 1585 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1586 kfree(dcbx_info); 1587 1588 return mode; 1589 } 1590 1591 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1592 int tc, 1593 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1594 { 1595 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1596 struct qed_dcbx_set dcbx_set; 1597 struct qed_ptt *ptt; 1598 int rc; 1599 1600 DP_VERBOSE(hwfn, QED_MSG_DCB, 1601 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1602 tc, pri_type, pgid, bw_pct, up_map); 1603 1604 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1605 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1606 return; 1607 } 1608 1609 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1610 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1611 if (rc) 1612 return; 1613 1614 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1615 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1616 1617 ptt = qed_ptt_acquire(hwfn); 1618 if (!ptt) 1619 return; 1620 1621 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1622 1623 qed_ptt_release(hwfn, ptt); 1624 } 1625 1626 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1627 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1628 { 1629 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1630 } 1631 1632 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1633 { 1634 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1635 struct qed_dcbx_set dcbx_set; 1636 struct qed_ptt *ptt; 1637 int rc; 1638 1639 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1640 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1641 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1642 return; 1643 } 1644 1645 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1646 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1647 if (rc) 1648 return; 1649 1650 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1651 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1652 1653 ptt = qed_ptt_acquire(hwfn); 1654 if (!ptt) 1655 return; 1656 1657 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1658 1659 qed_ptt_release(hwfn, ptt); 1660 } 1661 1662 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1663 { 1664 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1665 } 1666 1667 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1668 { 1669 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1670 struct qed_dcbx_set dcbx_set; 1671 struct qed_ptt *ptt; 1672 int rc; 1673 1674 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1675 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1676 if (rc) 1677 return 1; 1678 1679 ptt = qed_ptt_acquire(hwfn); 1680 if (!ptt) 1681 return 1; 1682 1683 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1684 1685 qed_ptt_release(hwfn, ptt); 1686 1687 return rc; 1688 } 1689 1690 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1691 { 1692 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1693 struct qed_dcbx_set dcbx_set; 1694 struct qed_ptt *ptt; 1695 int rc; 1696 1697 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1698 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1699 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1700 if (rc) 1701 return 1; 1702 1703 switch (tcid) { 1704 case DCB_NUMTCS_ATTR_PG: 1705 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1706 dcbx_set.config.params.max_ets_tc = num; 1707 break; 1708 case DCB_NUMTCS_ATTR_PFC: 1709 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1710 dcbx_set.config.params.pfc.max_tc = num; 1711 break; 1712 default: 1713 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1714 return -EINVAL; 1715 } 1716 1717 ptt = qed_ptt_acquire(hwfn); 1718 if (!ptt) 1719 return -EINVAL; 1720 1721 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1722 1723 qed_ptt_release(hwfn, ptt); 1724 1725 return 0; 1726 } 1727 1728 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1729 { 1730 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1731 struct qed_dcbx_set dcbx_set; 1732 struct qed_ptt *ptt; 1733 int rc; 1734 1735 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1736 1737 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1738 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1739 if (rc) 1740 return; 1741 1742 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1743 dcbx_set.config.params.pfc.enabled = !!state; 1744 1745 ptt = qed_ptt_acquire(hwfn); 1746 if (!ptt) 1747 return; 1748 1749 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1750 1751 qed_ptt_release(hwfn, ptt); 1752 } 1753 1754 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1755 { 1756 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1757 struct qed_dcbx_get *dcbx_info; 1758 struct qed_app_entry *entry; 1759 bool ethtype; 1760 u8 prio = 0; 1761 int i; 1762 1763 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1764 if (!dcbx_info) 1765 return -EINVAL; 1766 1767 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1768 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1769 entry = &dcbx_info->operational.params.app_entry[i]; 1770 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1771 prio = entry->prio; 1772 break; 1773 } 1774 } 1775 1776 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1777 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1778 kfree(dcbx_info); 1779 return -EINVAL; 1780 } 1781 1782 kfree(dcbx_info); 1783 1784 return prio; 1785 } 1786 1787 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1788 u8 idtype, u16 idval, u8 pri_map) 1789 { 1790 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1791 struct qed_dcbx_set dcbx_set; 1792 struct qed_app_entry *entry; 1793 struct qed_ptt *ptt; 1794 bool ethtype; 1795 int rc, i; 1796 1797 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1798 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1799 if (rc) 1800 return -EINVAL; 1801 1802 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1803 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1804 entry = &dcbx_set.config.params.app_entry[i]; 1805 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1806 break; 1807 /* First empty slot */ 1808 if (!entry->proto_id) { 1809 dcbx_set.config.params.num_app_entries++; 1810 break; 1811 } 1812 } 1813 1814 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1815 DP_ERR(cdev, "App table is full\n"); 1816 return -EBUSY; 1817 } 1818 1819 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1820 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1821 dcbx_set.config.params.app_entry[i].proto_id = idval; 1822 dcbx_set.config.params.app_entry[i].prio = pri_map; 1823 1824 ptt = qed_ptt_acquire(hwfn); 1825 if (!ptt) 1826 return -EBUSY; 1827 1828 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1829 1830 qed_ptt_release(hwfn, ptt); 1831 1832 return rc; 1833 } 1834 1835 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1836 { 1837 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1838 struct qed_dcbx_set dcbx_set; 1839 struct qed_ptt *ptt; 1840 int rc; 1841 1842 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1843 1844 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1845 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1846 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1847 return 1; 1848 } 1849 1850 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1851 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1852 if (rc) 1853 return 1; 1854 1855 dcbx_set.ver_num = 0; 1856 if (mode & DCB_CAP_DCBX_VER_CEE) { 1857 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1858 dcbx_set.enabled = true; 1859 } 1860 1861 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1862 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1863 dcbx_set.enabled = true; 1864 } 1865 1866 if (mode & DCB_CAP_DCBX_STATIC) { 1867 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1868 dcbx_set.enabled = true; 1869 } 1870 1871 ptt = qed_ptt_acquire(hwfn); 1872 if (!ptt) 1873 return 1; 1874 1875 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1876 1877 qed_ptt_release(hwfn, ptt); 1878 1879 return rc; 1880 } 1881 1882 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1883 { 1884 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1885 struct qed_dcbx_get *dcbx_info; 1886 1887 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1888 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1889 if (!dcbx_info) 1890 return 1; 1891 1892 *flags = 0; 1893 switch (featid) { 1894 case DCB_FEATCFG_ATTR_PG: 1895 if (dcbx_info->operational.params.ets_enabled) 1896 *flags = DCB_FEATCFG_ENABLE; 1897 else 1898 *flags = DCB_FEATCFG_ERROR; 1899 break; 1900 case DCB_FEATCFG_ATTR_PFC: 1901 if (dcbx_info->operational.params.pfc.enabled) 1902 *flags = DCB_FEATCFG_ENABLE; 1903 else 1904 *flags = DCB_FEATCFG_ERROR; 1905 break; 1906 case DCB_FEATCFG_ATTR_APP: 1907 if (dcbx_info->operational.params.app_valid) 1908 *flags = DCB_FEATCFG_ENABLE; 1909 else 1910 *flags = DCB_FEATCFG_ERROR; 1911 break; 1912 default: 1913 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1914 kfree(dcbx_info); 1915 return 1; 1916 } 1917 1918 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1919 kfree(dcbx_info); 1920 1921 return 0; 1922 } 1923 1924 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1925 { 1926 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1927 struct qed_dcbx_set dcbx_set; 1928 bool enabled, willing; 1929 struct qed_ptt *ptt; 1930 int rc; 1931 1932 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1933 featid, flags); 1934 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1935 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1936 if (rc) 1937 return 1; 1938 1939 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1940 willing = !!(flags & DCB_FEATCFG_WILLING); 1941 switch (featid) { 1942 case DCB_FEATCFG_ATTR_PG: 1943 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1944 dcbx_set.config.params.ets_enabled = enabled; 1945 dcbx_set.config.params.ets_willing = willing; 1946 break; 1947 case DCB_FEATCFG_ATTR_PFC: 1948 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1949 dcbx_set.config.params.pfc.enabled = enabled; 1950 dcbx_set.config.params.pfc.willing = willing; 1951 break; 1952 case DCB_FEATCFG_ATTR_APP: 1953 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1954 dcbx_set.config.params.app_willing = willing; 1955 break; 1956 default: 1957 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1958 return 1; 1959 } 1960 1961 ptt = qed_ptt_acquire(hwfn); 1962 if (!ptt) 1963 return 1; 1964 1965 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1966 1967 qed_ptt_release(hwfn, ptt); 1968 1969 return 0; 1970 } 1971 1972 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1973 struct dcb_peer_app_info *info, 1974 u16 *app_count) 1975 { 1976 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1977 struct qed_dcbx_get *dcbx_info; 1978 1979 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1980 if (!dcbx_info) 1981 return -EINVAL; 1982 1983 info->willing = dcbx_info->remote.params.app_willing; 1984 info->error = dcbx_info->remote.params.app_error; 1985 *app_count = dcbx_info->remote.params.num_app_entries; 1986 kfree(dcbx_info); 1987 1988 return 0; 1989 } 1990 1991 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1992 struct dcb_app *table) 1993 { 1994 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1995 struct qed_dcbx_get *dcbx_info; 1996 int i; 1997 1998 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1999 if (!dcbx_info) 2000 return -EINVAL; 2001 2002 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 2003 if (dcbx_info->remote.params.app_entry[i].ethtype) 2004 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 2005 else 2006 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 2007 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 2008 table[i].protocol = 2009 dcbx_info->remote.params.app_entry[i].proto_id; 2010 } 2011 2012 kfree(dcbx_info); 2013 2014 return 0; 2015 } 2016 2017 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 2018 { 2019 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2020 struct qed_dcbx_get *dcbx_info; 2021 int i; 2022 2023 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2024 if (!dcbx_info) 2025 return -EINVAL; 2026 2027 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2028 if (dcbx_info->remote.params.pfc.prio[i]) 2029 pfc->pfc_en |= BIT(i); 2030 2031 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2032 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2033 pfc->pfc_en, pfc->tcs_supported); 2034 kfree(dcbx_info); 2035 2036 return 0; 2037 } 2038 2039 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2040 { 2041 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2042 struct qed_dcbx_get *dcbx_info; 2043 int i; 2044 2045 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2046 if (!dcbx_info) 2047 return -EINVAL; 2048 2049 pg->willing = dcbx_info->remote.params.ets_willing; 2050 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2051 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2052 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2053 } 2054 2055 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2056 kfree(dcbx_info); 2057 2058 return 0; 2059 } 2060 2061 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2062 struct ieee_pfc *pfc, bool remote) 2063 { 2064 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2065 struct qed_dcbx_params *params; 2066 struct qed_dcbx_get *dcbx_info; 2067 int rc, i; 2068 2069 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2070 if (!dcbx_info) 2071 return -EINVAL; 2072 2073 if (!dcbx_info->operational.ieee) { 2074 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2075 kfree(dcbx_info); 2076 return -EINVAL; 2077 } 2078 2079 if (remote) { 2080 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2081 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2082 QED_DCBX_REMOTE_MIB); 2083 if (rc) { 2084 kfree(dcbx_info); 2085 return -EINVAL; 2086 } 2087 2088 params = &dcbx_info->remote.params; 2089 } else { 2090 params = &dcbx_info->operational.params; 2091 } 2092 2093 pfc->pfc_cap = params->pfc.max_tc; 2094 pfc->pfc_en = 0; 2095 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2096 if (params->pfc.prio[i]) 2097 pfc->pfc_en |= BIT(i); 2098 2099 kfree(dcbx_info); 2100 2101 return 0; 2102 } 2103 2104 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2105 { 2106 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2107 } 2108 2109 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2110 { 2111 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2112 struct qed_dcbx_get *dcbx_info; 2113 struct qed_dcbx_set dcbx_set; 2114 struct qed_ptt *ptt; 2115 int rc, i; 2116 2117 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2118 if (!dcbx_info) 2119 return -EINVAL; 2120 2121 if (!dcbx_info->operational.ieee) { 2122 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2123 kfree(dcbx_info); 2124 return -EINVAL; 2125 } 2126 2127 kfree(dcbx_info); 2128 2129 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2130 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2131 if (rc) 2132 return -EINVAL; 2133 2134 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2135 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2136 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2137 2138 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2139 2140 ptt = qed_ptt_acquire(hwfn); 2141 if (!ptt) 2142 return -EINVAL; 2143 2144 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2145 2146 qed_ptt_release(hwfn, ptt); 2147 2148 return rc; 2149 } 2150 2151 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2152 struct ieee_ets *ets, bool remote) 2153 { 2154 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2155 struct qed_dcbx_get *dcbx_info; 2156 struct qed_dcbx_params *params; 2157 int rc; 2158 2159 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2160 if (!dcbx_info) 2161 return -EINVAL; 2162 2163 if (!dcbx_info->operational.ieee) { 2164 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2165 kfree(dcbx_info); 2166 return -EINVAL; 2167 } 2168 2169 if (remote) { 2170 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2171 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2172 QED_DCBX_REMOTE_MIB); 2173 if (rc) { 2174 kfree(dcbx_info); 2175 return -EINVAL; 2176 } 2177 2178 params = &dcbx_info->remote.params; 2179 } else { 2180 params = &dcbx_info->operational.params; 2181 } 2182 2183 ets->ets_cap = params->max_ets_tc; 2184 ets->willing = params->ets_willing; 2185 ets->cbs = params->ets_cbs; 2186 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2187 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2188 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2189 kfree(dcbx_info); 2190 2191 return 0; 2192 } 2193 2194 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2195 { 2196 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2197 } 2198 2199 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2200 { 2201 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2202 struct qed_dcbx_get *dcbx_info; 2203 struct qed_dcbx_set dcbx_set; 2204 struct qed_ptt *ptt; 2205 int rc; 2206 2207 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2208 if (!dcbx_info) 2209 return -EINVAL; 2210 2211 if (!dcbx_info->operational.ieee) { 2212 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2213 kfree(dcbx_info); 2214 return -EINVAL; 2215 } 2216 2217 kfree(dcbx_info); 2218 2219 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2220 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2221 if (rc) 2222 return -EINVAL; 2223 2224 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2225 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2226 dcbx_set.config.params.ets_willing = ets->willing; 2227 dcbx_set.config.params.ets_cbs = ets->cbs; 2228 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2229 sizeof(ets->tc_tx_bw)); 2230 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2231 sizeof(ets->tc_tsa)); 2232 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2233 sizeof(ets->prio_tc)); 2234 2235 ptt = qed_ptt_acquire(hwfn); 2236 if (!ptt) 2237 return -EINVAL; 2238 2239 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2240 2241 qed_ptt_release(hwfn, ptt); 2242 2243 return rc; 2244 } 2245 2246 static int 2247 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2248 { 2249 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2250 } 2251 2252 static int 2253 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2254 { 2255 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2256 } 2257 2258 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2259 { 2260 switch (selector) { 2261 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2262 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2263 break; 2264 case IEEE_8021QAZ_APP_SEL_STREAM: 2265 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2266 break; 2267 case IEEE_8021QAZ_APP_SEL_DGRAM: 2268 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2269 break; 2270 case IEEE_8021QAZ_APP_SEL_ANY: 2271 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2272 break; 2273 default: 2274 return -EINVAL; 2275 } 2276 2277 return 0; 2278 } 2279 2280 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2281 { 2282 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2283 struct qed_dcbx_get *dcbx_info; 2284 struct qed_app_entry *entry; 2285 u8 prio = 0; 2286 u8 sf_ieee; 2287 int i; 2288 2289 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2290 app->selector, app->protocol); 2291 2292 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2293 DP_INFO(cdev, "Invalid selector field value %d\n", 2294 app->selector); 2295 return -EINVAL; 2296 } 2297 2298 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2299 if (!dcbx_info) 2300 return -EINVAL; 2301 2302 if (!dcbx_info->operational.ieee) { 2303 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2304 kfree(dcbx_info); 2305 return -EINVAL; 2306 } 2307 2308 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2309 entry = &dcbx_info->operational.params.app_entry[i]; 2310 if ((entry->sf_ieee == sf_ieee) && 2311 (entry->proto_id == app->protocol)) { 2312 prio = entry->prio; 2313 break; 2314 } 2315 } 2316 2317 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2318 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2319 app->protocol); 2320 kfree(dcbx_info); 2321 return -EINVAL; 2322 } 2323 2324 app->priority = ffs(prio) - 1; 2325 2326 kfree(dcbx_info); 2327 2328 return 0; 2329 } 2330 2331 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2332 { 2333 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2334 struct qed_dcbx_get *dcbx_info; 2335 struct qed_dcbx_set dcbx_set; 2336 struct qed_app_entry *entry; 2337 struct qed_ptt *ptt; 2338 u8 sf_ieee; 2339 int rc, i; 2340 2341 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2342 app->selector, app->protocol, app->priority); 2343 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2344 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2345 return -EINVAL; 2346 } 2347 2348 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2349 DP_INFO(cdev, "Invalid selector field value %d\n", 2350 app->selector); 2351 return -EINVAL; 2352 } 2353 2354 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2355 if (!dcbx_info) 2356 return -EINVAL; 2357 2358 if (!dcbx_info->operational.ieee) { 2359 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2360 kfree(dcbx_info); 2361 return -EINVAL; 2362 } 2363 2364 kfree(dcbx_info); 2365 2366 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2367 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2368 if (rc) 2369 return -EINVAL; 2370 2371 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2372 entry = &dcbx_set.config.params.app_entry[i]; 2373 if ((entry->sf_ieee == sf_ieee) && 2374 (entry->proto_id == app->protocol)) 2375 break; 2376 /* First empty slot */ 2377 if (!entry->proto_id) { 2378 dcbx_set.config.params.num_app_entries++; 2379 break; 2380 } 2381 } 2382 2383 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2384 DP_ERR(cdev, "App table is full\n"); 2385 return -EBUSY; 2386 } 2387 2388 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2389 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2390 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2391 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2392 2393 ptt = qed_ptt_acquire(hwfn); 2394 if (!ptt) 2395 return -EBUSY; 2396 2397 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2398 2399 qed_ptt_release(hwfn, ptt); 2400 2401 return rc; 2402 } 2403 2404 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2405 .getstate = qed_dcbnl_getstate, 2406 .setstate = qed_dcbnl_setstate, 2407 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2408 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2409 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2410 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2411 .getpfccfg = qed_dcbnl_getpfccfg, 2412 .setpfccfg = qed_dcbnl_setpfccfg, 2413 .getcap = qed_dcbnl_getcap, 2414 .getnumtcs = qed_dcbnl_getnumtcs, 2415 .getpfcstate = qed_dcbnl_getpfcstate, 2416 .getdcbx = qed_dcbnl_getdcbx, 2417 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2418 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2419 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2420 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2421 .setall = qed_dcbnl_setall, 2422 .setnumtcs = qed_dcbnl_setnumtcs, 2423 .setpfcstate = qed_dcbnl_setpfcstate, 2424 .setapp = qed_dcbnl_setapp, 2425 .setdcbx = qed_dcbnl_setdcbx, 2426 .setfeatcfg = qed_dcbnl_setfeatcfg, 2427 .getfeatcfg = qed_dcbnl_getfeatcfg, 2428 .getapp = qed_dcbnl_getapp, 2429 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2430 .peer_getapptable = qed_dcbnl_peer_getapptable, 2431 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2432 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2433 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2434 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2435 .ieee_getets = qed_dcbnl_ieee_getets, 2436 .ieee_setets = qed_dcbnl_ieee_setets, 2437 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2438 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2439 .ieee_getapp = qed_dcbnl_ieee_getapp, 2440 .ieee_setapp = qed_dcbnl_ieee_setapp, 2441 }; 2442 2443 #endif 2444