xref: /linux/drivers/net/ethernet/qlogic/qed/qed_cxt.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
3e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
4663eacd8SAlexander Lobakin  * Copyright (c) 2019-2020 Marvell International Ltd.
5fe56b9e6SYuval Mintz  */
6fe56b9e6SYuval Mintz 
7fe56b9e6SYuval Mintz #ifndef _QED_CXT_H
8fe56b9e6SYuval Mintz #define _QED_CXT_H
9fe56b9e6SYuval Mintz 
10fe56b9e6SYuval Mintz #include <linux/types.h>
11fe56b9e6SYuval Mintz #include <linux/slab.h>
12fe56b9e6SYuval Mintz #include <linux/qed/qed_if.h>
13fe56b9e6SYuval Mintz #include "qed_hsi.h"
14fe56b9e6SYuval Mintz #include "qed.h"
15fe56b9e6SYuval Mintz 
16fe56b9e6SYuval Mintz struct qed_cxt_info {
17fe56b9e6SYuval Mintz 	void			*p_cxt;
18fe56b9e6SYuval Mintz 	u32			iid;
19fe56b9e6SYuval Mintz 	enum protocol_type	type;
20fe56b9e6SYuval Mintz };
21fe56b9e6SYuval Mintz 
22dbb799c3SYuval Mintz #define MAX_TID_BLOCKS                  512
23dbb799c3SYuval Mintz struct qed_tid_mem {
24dbb799c3SYuval Mintz 	u32 tid_size;
25dbb799c3SYuval Mintz 	u32 num_tids_per_block;
26dbb799c3SYuval Mintz 	u32 waste;
27dbb799c3SYuval Mintz 	u8 *blocks[MAX_TID_BLOCKS];	/* 4K */
28dbb799c3SYuval Mintz };
29dbb799c3SYuval Mintz 
30fe56b9e6SYuval Mintz /**
3119198e4eSPrabhakar Kushwaha  * qed_cxt_get_cid_info(): Returns the context info for a specific cidi.
32fe56b9e6SYuval Mintz  *
3319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
3419198e4eSPrabhakar Kushwaha  * @p_info: In/out.
35fe56b9e6SYuval Mintz  *
3619198e4eSPrabhakar Kushwaha  * Return: Int.
37fe56b9e6SYuval Mintz  */
38fe56b9e6SYuval Mintz int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn,
39fe56b9e6SYuval Mintz 			 struct qed_cxt_info *p_info);
40fe56b9e6SYuval Mintz 
41dbb799c3SYuval Mintz /**
4219198e4eSPrabhakar Kushwaha  * qed_cxt_get_tid_mem_info(): Returns the tid mem info.
43dbb799c3SYuval Mintz  *
4419198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
4519198e4eSPrabhakar Kushwaha  * @p_info: in/out.
46dbb799c3SYuval Mintz  *
4719198e4eSPrabhakar Kushwaha  * Return: int.
48dbb799c3SYuval Mintz  */
49dbb799c3SYuval Mintz int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn,
50dbb799c3SYuval Mintz 			     struct qed_tid_mem *p_info);
51dbb799c3SYuval Mintz 
521bd4f571SOmkar Kulkarni #define QED_CXT_TCP_ULP_TID_SEG	PROTOCOLID_TCP_ULP
53dbb799c3SYuval Mintz #define QED_CXT_ROCE_TID_SEG	PROTOCOLID_ROCE
541e128c81SArun Easi #define QED_CXT_FCOE_TID_SEG	PROTOCOLID_FCOE
55fe56b9e6SYuval Mintz enum qed_cxt_elem_type {
56fe56b9e6SYuval Mintz 	QED_ELEM_CXT,
57dbb799c3SYuval Mintz 	QED_ELEM_SRQ,
58b8204ad8SYuval Basson 	QED_ELEM_TASK,
59b8204ad8SYuval Basson 	QED_ELEM_XRC_SRQ,
60fe56b9e6SYuval Mintz };
61fe56b9e6SYuval Mintz 
621408cc1fSYuval Mintz u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
631408cc1fSYuval Mintz 				enum protocol_type type, u32 *vf_cid);
641408cc1fSYuval Mintz 
65fe56b9e6SYuval Mintz /**
6619198e4eSPrabhakar Kushwaha  * qed_cxt_set_pf_params(): Set the PF params for cxt init.
67fe56b9e6SYuval Mintz  *
6819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
6919198e4eSPrabhakar Kushwaha  * @rdma_tasks: Requested maximum.
7019198e4eSPrabhakar Kushwaha  *
7119198e4eSPrabhakar Kushwaha  * Return: int.
72fe56b9e6SYuval Mintz  */
73f9dc4d1fSRam Amrani int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks);
74fe56b9e6SYuval Mintz 
75fe56b9e6SYuval Mintz /**
7619198e4eSPrabhakar Kushwaha  * qed_cxt_cfg_ilt_compute(): Compute ILT init parameters.
77fe56b9e6SYuval Mintz  *
7819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
7919198e4eSPrabhakar Kushwaha  * @last_line: Last_line.
80fe56b9e6SYuval Mintz  *
8119198e4eSPrabhakar Kushwaha  * Return: Int
82fe56b9e6SYuval Mintz  */
83f9dc4d1fSRam Amrani int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *last_line);
84f9dc4d1fSRam Amrani 
85f9dc4d1fSRam Amrani /**
8619198e4eSPrabhakar Kushwaha  * qed_cxt_cfg_ilt_compute_excess(): How many lines can be decreased.
87f9dc4d1fSRam Amrani  *
8819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
8919198e4eSPrabhakar Kushwaha  * @used_lines: Used lines.
9019198e4eSPrabhakar Kushwaha  *
9119198e4eSPrabhakar Kushwaha  * Return: Int.
92f9dc4d1fSRam Amrani  */
93f9dc4d1fSRam Amrani u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines);
94fe56b9e6SYuval Mintz 
95fe56b9e6SYuval Mintz /**
9619198e4eSPrabhakar Kushwaha  * qed_cxt_mngr_alloc(): Allocate and init the context manager struct.
97fe56b9e6SYuval Mintz  *
9819198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
99fe56b9e6SYuval Mintz  *
10019198e4eSPrabhakar Kushwaha  * Return: Int.
101fe56b9e6SYuval Mintz  */
102fe56b9e6SYuval Mintz int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn);
103fe56b9e6SYuval Mintz 
104fe56b9e6SYuval Mintz /**
10519198e4eSPrabhakar Kushwaha  * qed_cxt_mngr_free() - Context manager free.
106fe56b9e6SYuval Mintz  *
10719198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
10819198e4eSPrabhakar Kushwaha  *
10919198e4eSPrabhakar Kushwaha  * Return: Void.
110fe56b9e6SYuval Mintz  */
111fe56b9e6SYuval Mintz void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn);
112fe56b9e6SYuval Mintz 
113fe56b9e6SYuval Mintz /**
11419198e4eSPrabhakar Kushwaha  * qed_cxt_tables_alloc(): Allocate ILT shadow, Searcher T2, acquired map.
115fe56b9e6SYuval Mintz  *
11619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
117fe56b9e6SYuval Mintz  *
11819198e4eSPrabhakar Kushwaha  * Return: Int.
119fe56b9e6SYuval Mintz  */
120fe56b9e6SYuval Mintz int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn);
121fe56b9e6SYuval Mintz 
122fe56b9e6SYuval Mintz /**
12319198e4eSPrabhakar Kushwaha  * qed_cxt_mngr_setup(): Reset the acquired CIDs.
124fe56b9e6SYuval Mintz  *
12519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
126fe56b9e6SYuval Mintz  */
127fe56b9e6SYuval Mintz void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn);
128fe56b9e6SYuval Mintz 
129fe56b9e6SYuval Mintz /**
13019198e4eSPrabhakar Kushwaha  * qed_cxt_hw_init_common(): Initailze ILT and DQ, common phase, per path.
131fe56b9e6SYuval Mintz  *
13219198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
133fe56b9e6SYuval Mintz  *
13419198e4eSPrabhakar Kushwaha  * Return: Void.
135fe56b9e6SYuval Mintz  */
136fe56b9e6SYuval Mintz void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn);
137fe56b9e6SYuval Mintz 
138fe56b9e6SYuval Mintz /**
13919198e4eSPrabhakar Kushwaha  * qed_cxt_hw_init_pf(): Initailze ILT and DQ, PF phase, per path.
140fe56b9e6SYuval Mintz  *
14119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
14219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
14319198e4eSPrabhakar Kushwaha  *
14419198e4eSPrabhakar Kushwaha  * Return: Void.
145fe56b9e6SYuval Mintz  */
14615582962SRahul Verma void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
147fe56b9e6SYuval Mintz 
148fe56b9e6SYuval Mintz /**
14919198e4eSPrabhakar Kushwaha  * qed_qm_init_pf(): Initailze the QM PF phase, per path.
150fe56b9e6SYuval Mintz  *
15119198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
15219198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
15319198e4eSPrabhakar Kushwaha  * @is_pf_loading: Is pf pending.
15419198e4eSPrabhakar Kushwaha  *
15519198e4eSPrabhakar Kushwaha  * Return: Void.
156fe56b9e6SYuval Mintz  */
157da090917STomer Tayar void qed_qm_init_pf(struct qed_hwfn *p_hwfn,
158da090917STomer Tayar 		    struct qed_ptt *p_ptt, bool is_pf_loading);
159fe56b9e6SYuval Mintz 
160fe56b9e6SYuval Mintz /**
16119198e4eSPrabhakar Kushwaha  * qed_qm_reconf(): Reconfigures QM pf on the fly.
16239651abdSSudarsana Reddy Kalluru  *
16319198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
16419198e4eSPrabhakar Kushwaha  * @p_ptt: P_ptt.
16539651abdSSudarsana Reddy Kalluru  *
16619198e4eSPrabhakar Kushwaha  * Return: Int.
16739651abdSSudarsana Reddy Kalluru  */
16839651abdSSudarsana Reddy Kalluru int qed_qm_reconf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
16939651abdSSudarsana Reddy Kalluru 
1706bea61daSMintz, Yuval #define QED_CXT_PF_CID (0xff)
1716bea61daSMintz, Yuval 
17239651abdSSudarsana Reddy Kalluru /**
17319198e4eSPrabhakar Kushwaha  * qed_cxt_release_cid(): Release a cid.
174fe56b9e6SYuval Mintz  *
17519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
17619198e4eSPrabhakar Kushwaha  * @cid: Cid.
17719198e4eSPrabhakar Kushwaha  *
17819198e4eSPrabhakar Kushwaha  * Return: Void.
179fe56b9e6SYuval Mintz  */
1806bea61daSMintz, Yuval void qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid);
1816bea61daSMintz, Yuval 
1826bea61daSMintz, Yuval /**
18319198e4eSPrabhakar Kushwaha  * _qed_cxt_release_cid(): Release a cid belonging to a vf-queue.
1846bea61daSMintz, Yuval  *
18519198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
18619198e4eSPrabhakar Kushwaha  * @cid: Cid.
18719198e4eSPrabhakar Kushwaha  * @vfid: Engine relative index. QED_CXT_PF_CID if belongs to PF.
18819198e4eSPrabhakar Kushwaha  *
18919198e4eSPrabhakar Kushwaha  * Return: Void.
1906bea61daSMintz, Yuval  */
1916bea61daSMintz, Yuval void _qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid, u8 vfid);
1926bea61daSMintz, Yuval 
1936bea61daSMintz, Yuval /**
19419198e4eSPrabhakar Kushwaha  * qed_cxt_acquire_cid(): Acquire a new cid of a specific protocol type.
1956bea61daSMintz, Yuval  *
19619198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
19719198e4eSPrabhakar Kushwaha  * @type: Type.
19819198e4eSPrabhakar Kushwaha  * @p_cid: Pointer cid.
1996bea61daSMintz, Yuval  *
20019198e4eSPrabhakar Kushwaha  * Return: Int.
2016bea61daSMintz, Yuval  */
2026bea61daSMintz, Yuval int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
2036bea61daSMintz, Yuval 			enum protocol_type type, u32 *p_cid);
2046bea61daSMintz, Yuval 
2056bea61daSMintz, Yuval /**
20619198e4eSPrabhakar Kushwaha  * _qed_cxt_acquire_cid(): Acquire a new cid of a specific protocol type
20719198e4eSPrabhakar Kushwaha  *                         for a vf-queue.
2086bea61daSMintz, Yuval  *
20919198e4eSPrabhakar Kushwaha  * @p_hwfn: HW device data.
21019198e4eSPrabhakar Kushwaha  * @type: Type.
21119198e4eSPrabhakar Kushwaha  * @p_cid: Pointer cid.
21219198e4eSPrabhakar Kushwaha  * @vfid: Engine relative index. QED_CXT_PF_CID if belongs to PF.
2136bea61daSMintz, Yuval  *
21419198e4eSPrabhakar Kushwaha  * Return: Int.
2156bea61daSMintz, Yuval  */
2166bea61daSMintz, Yuval int _qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
2176bea61daSMintz, Yuval 			 enum protocol_type type, u32 *p_cid, u8 vfid);
2186bea61daSMintz, Yuval 
21951ff1725SRam Amrani int qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn,
22051ff1725SRam Amrani 			      enum qed_cxt_elem_type elem_type, u32 iid);
22151ff1725SRam Amrani u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn,
22251ff1725SRam Amrani 				enum protocol_type type);
22351ff1725SRam Amrani u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
22451ff1725SRam Amrani 				enum protocol_type type);
225f1093940SRam Amrani int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
226fe56b9e6SYuval Mintz 
227dbb799c3SYuval Mintz #define QED_CTX_WORKING_MEM 0
228dbb799c3SYuval Mintz #define QED_CTX_FL_MEM 1
2291e128c81SArun Easi int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn,
2301e128c81SArun Easi 			 u32 tid, u8 ctx_type, void **task_ctx);
2318a52bbabSMichal Kalderon 
2328a52bbabSMichal Kalderon /* Max number of connection types in HW (DQ/CDU etc.) */
2338a52bbabSMichal Kalderon #define MAX_CONN_TYPES          PROTOCOLID_COMMON
2348a52bbabSMichal Kalderon #define NUM_TASK_TYPES          2
2358a52bbabSMichal Kalderon #define NUM_TASK_PF_SEGMENTS    4
2368a52bbabSMichal Kalderon #define NUM_TASK_VF_SEGMENTS    1
2378a52bbabSMichal Kalderon 
2388a52bbabSMichal Kalderon /* PF per protocl configuration object */
2398a52bbabSMichal Kalderon #define TASK_SEGMENTS   (NUM_TASK_PF_SEGMENTS + NUM_TASK_VF_SEGMENTS)
2408a52bbabSMichal Kalderon #define TASK_SEGMENT_VF (NUM_TASK_PF_SEGMENTS)
2418a52bbabSMichal Kalderon 
2428a52bbabSMichal Kalderon struct qed_tid_seg {
2438a52bbabSMichal Kalderon 	u32 count;
2448a52bbabSMichal Kalderon 	u8 type;
2458a52bbabSMichal Kalderon 	bool has_fl_mem;
2468a52bbabSMichal Kalderon };
2478a52bbabSMichal Kalderon 
2488a52bbabSMichal Kalderon struct qed_conn_type_cfg {
2498a52bbabSMichal Kalderon 	u32 cid_count;
2508a52bbabSMichal Kalderon 	u32 cids_per_vf;
2518a52bbabSMichal Kalderon 	struct qed_tid_seg tid_seg[TASK_SEGMENTS];
2528a52bbabSMichal Kalderon };
2538a52bbabSMichal Kalderon 
2548a52bbabSMichal Kalderon /* ILT Client configuration,
2558a52bbabSMichal Kalderon  * Per connection type (protocol) resources (cids, tis, vf cids etc.)
2568a52bbabSMichal Kalderon  * 1 - for connection context (CDUC) and for each task context we need two
2578a52bbabSMichal Kalderon  * values, for regular task context and for force load memory
2588a52bbabSMichal Kalderon  */
2598a52bbabSMichal Kalderon #define ILT_CLI_PF_BLOCKS       (1 + NUM_TASK_PF_SEGMENTS * 2)
2608a52bbabSMichal Kalderon #define ILT_CLI_VF_BLOCKS       (1 + NUM_TASK_VF_SEGMENTS * 2)
2618a52bbabSMichal Kalderon #define CDUC_BLK                (0)
2628a52bbabSMichal Kalderon #define SRQ_BLK                 (0)
2638a52bbabSMichal Kalderon #define CDUT_SEG_BLK(n)         (1 + (u8)(n))
2648a52bbabSMichal Kalderon #define CDUT_FL_SEG_BLK(n, X)   (1 + (n) + NUM_TASK_ ## X ## _SEGMENTS)
2658a52bbabSMichal Kalderon 
2668a52bbabSMichal Kalderon struct ilt_cfg_pair {
2678a52bbabSMichal Kalderon 	u32 reg;
2688a52bbabSMichal Kalderon 	u32 val;
2698a52bbabSMichal Kalderon };
2708a52bbabSMichal Kalderon 
2718a52bbabSMichal Kalderon struct qed_ilt_cli_blk {
2728a52bbabSMichal Kalderon 	u32 total_size;		/* 0 means not active */
2738a52bbabSMichal Kalderon 	u32 real_size_in_page;
2748a52bbabSMichal Kalderon 	u32 start_line;
2758a52bbabSMichal Kalderon 	u32 dynamic_line_offset;
2768a52bbabSMichal Kalderon 	u32 dynamic_line_cnt;
2778a52bbabSMichal Kalderon };
2788a52bbabSMichal Kalderon 
2798a52bbabSMichal Kalderon struct qed_ilt_client_cfg {
2808a52bbabSMichal Kalderon 	bool active;
2818a52bbabSMichal Kalderon 
2828a52bbabSMichal Kalderon 	/* ILT boundaries */
2838a52bbabSMichal Kalderon 	struct ilt_cfg_pair first;
2848a52bbabSMichal Kalderon 	struct ilt_cfg_pair last;
2858a52bbabSMichal Kalderon 	struct ilt_cfg_pair p_size;
2868a52bbabSMichal Kalderon 
2878a52bbabSMichal Kalderon 	/* ILT client blocks for PF */
2888a52bbabSMichal Kalderon 	struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS];
2898a52bbabSMichal Kalderon 	u32 pf_total_lines;
2908a52bbabSMichal Kalderon 
2918a52bbabSMichal Kalderon 	/* ILT client blocks for VFs */
2928a52bbabSMichal Kalderon 	struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS];
2938a52bbabSMichal Kalderon 	u32 vf_total_lines;
2948a52bbabSMichal Kalderon };
2958a52bbabSMichal Kalderon 
2968a52bbabSMichal Kalderon struct qed_cid_acquired_map {
2978a52bbabSMichal Kalderon 	u32		start_cid;
2988a52bbabSMichal Kalderon 	u32		max_count;
2998a52bbabSMichal Kalderon 	unsigned long	*cid_map;
3008a52bbabSMichal Kalderon };
3018a52bbabSMichal Kalderon 
3028a52bbabSMichal Kalderon struct qed_src_t2 {
3038a52bbabSMichal Kalderon 	struct phys_mem_desc *dma_mem;
3048a52bbabSMichal Kalderon 	u32 num_pages;
3058a52bbabSMichal Kalderon 	u64 first_free;
3068a52bbabSMichal Kalderon 	u64 last_free;
3078a52bbabSMichal Kalderon };
3088a52bbabSMichal Kalderon 
3098a52bbabSMichal Kalderon struct qed_cxt_mngr {
3108a52bbabSMichal Kalderon 	/* Per protocl configuration */
3118a52bbabSMichal Kalderon 	struct qed_conn_type_cfg	conn_cfg[MAX_CONN_TYPES];
3128a52bbabSMichal Kalderon 
3138a52bbabSMichal Kalderon 	/* computed ILT structure */
3148a52bbabSMichal Kalderon 	struct qed_ilt_client_cfg	clients[MAX_ILT_CLIENTS];
3158a52bbabSMichal Kalderon 
3168a52bbabSMichal Kalderon 	/* Task type sizes */
3178a52bbabSMichal Kalderon 	u32 task_type_size[NUM_TASK_TYPES];
3188a52bbabSMichal Kalderon 
3198a52bbabSMichal Kalderon 	/* total number of VFs for this hwfn -
3208a52bbabSMichal Kalderon 	 * ALL VFs are symmetric in terms of HW resources
3218a52bbabSMichal Kalderon 	 */
3228a52bbabSMichal Kalderon 	u32 vf_count;
3238a52bbabSMichal Kalderon 	u32 first_vf_in_pf;
3248a52bbabSMichal Kalderon 
3258a52bbabSMichal Kalderon 	/* Acquired CIDs */
3268a52bbabSMichal Kalderon 	struct qed_cid_acquired_map	acquired[MAX_CONN_TYPES];
3278a52bbabSMichal Kalderon 
3288a52bbabSMichal Kalderon 	struct qed_cid_acquired_map
3298a52bbabSMichal Kalderon 	acquired_vf[MAX_CONN_TYPES][MAX_NUM_VFS];
3308a52bbabSMichal Kalderon 
3318a52bbabSMichal Kalderon 	/* ILT  shadow table */
3328a52bbabSMichal Kalderon 	struct phys_mem_desc *ilt_shadow;
3338a52bbabSMichal Kalderon 	u32 ilt_shadow_size;
3348a52bbabSMichal Kalderon 	u32 pf_start_line;
3358a52bbabSMichal Kalderon 
3368a52bbabSMichal Kalderon 	/* Mutex for a dynamic ILT allocation */
3378a52bbabSMichal Kalderon 	struct mutex mutex;
3388a52bbabSMichal Kalderon 
3398a52bbabSMichal Kalderon 	/* SRC T2 */
3408a52bbabSMichal Kalderon 	struct qed_src_t2 src_t2;
3418a52bbabSMichal Kalderon 
3428a52bbabSMichal Kalderon 	/* total number of SRQ's for this hwfn */
3438a52bbabSMichal Kalderon 	u32 srq_count;
344b8204ad8SYuval Basson 	u32 xrc_srq_count;
3458a52bbabSMichal Kalderon 
3468a52bbabSMichal Kalderon 	/* Maximal number of L2 steering filters */
3478a52bbabSMichal Kalderon 	u32 arfs_count;
3488a52bbabSMichal Kalderon 
349*6c95dd8fSPrabhakar Kushwaha 	u16 iscsi_task_pages;
350*6c95dd8fSPrabhakar Kushwaha 	u16 fcoe_task_pages;
351*6c95dd8fSPrabhakar Kushwaha 	u16 roce_task_pages;
352*6c95dd8fSPrabhakar Kushwaha 	u16 eth_task_pages;
3538a52bbabSMichal Kalderon 	u16 task_ctx_size;
3548a52bbabSMichal Kalderon 	u16 conn_ctx_size;
3558a52bbabSMichal Kalderon };
3568a52bbabSMichal Kalderon 
3578a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_init_pages(struct qed_hwfn *p_hwfn);
3588a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_init_pages(struct qed_hwfn *p_hwfn);
3598a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn);
3608a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn);
3618a52bbabSMichal Kalderon 
362b8204ad8SYuval Basson u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
363b8204ad8SYuval Basson 			      enum ilt_clients ilt_client);
364b8204ad8SYuval Basson 
365b8204ad8SYuval Basson u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn);
366b8204ad8SYuval Basson 
367fe56b9e6SYuval Mintz #endif
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