11f4d4ed6SAlexander Lobakin // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation
4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd.
5fe56b9e6SYuval Mintz */
6fe56b9e6SYuval Mintz
7fe56b9e6SYuval Mintz #include <linux/types.h>
8fe56b9e6SYuval Mintz #include <linux/bitops.h>
9fe56b9e6SYuval Mintz #include <linux/dma-mapping.h>
10fe56b9e6SYuval Mintz #include <linux/errno.h>
11fe56b9e6SYuval Mintz #include <linux/kernel.h>
12fe56b9e6SYuval Mintz #include <linux/list.h>
13fe56b9e6SYuval Mintz #include <linux/log2.h>
14fe56b9e6SYuval Mintz #include <linux/pci.h>
15fe56b9e6SYuval Mintz #include <linux/slab.h>
16fe56b9e6SYuval Mintz #include <linux/string.h>
17fe56b9e6SYuval Mintz #include "qed.h"
18fe56b9e6SYuval Mintz #include "qed_cxt.h"
19fe56b9e6SYuval Mintz #include "qed_dev_api.h"
20fe56b9e6SYuval Mintz #include "qed_hsi.h"
21fe56b9e6SYuval Mintz #include "qed_hw.h"
22fe56b9e6SYuval Mintz #include "qed_init_ops.h"
2339dbc646SYuval Bason #include "qed_rdma.h"
24fe56b9e6SYuval Mintz #include "qed_reg_addr.h"
251408cc1fSYuval Mintz #include "qed_sriov.h"
26fe56b9e6SYuval Mintz
27fe56b9e6SYuval Mintz /* QM constants */
28fe56b9e6SYuval Mintz #define QM_PQ_ELEMENT_SIZE 4 /* in bytes */
29fe56b9e6SYuval Mintz
30fe56b9e6SYuval Mintz /* Doorbell-Queue constants */
31fe56b9e6SYuval Mintz #define DQ_RANGE_SHIFT 4
32fe56b9e6SYuval Mintz #define DQ_RANGE_ALIGN BIT(DQ_RANGE_SHIFT)
33fe56b9e6SYuval Mintz
34dbb799c3SYuval Mintz /* Searcher constants */
35dbb799c3SYuval Mintz #define SRC_MIN_NUM_ELEMS 256
36dbb799c3SYuval Mintz
37dbb799c3SYuval Mintz /* Timers constants */
38dbb799c3SYuval Mintz #define TM_SHIFT 7
39dbb799c3SYuval Mintz #define TM_ALIGN BIT(TM_SHIFT)
40dbb799c3SYuval Mintz #define TM_ELEM_SIZE 4
41dbb799c3SYuval Mintz
42be086e7cSMintz, Yuval #define ILT_DEFAULT_HW_P_SIZE 4
4351ff1725SRam Amrani
44fe56b9e6SYuval Mintz #define ILT_PAGE_IN_BYTES(hw_p_size) (1U << ((hw_p_size) + 12))
45fe56b9e6SYuval Mintz #define ILT_CFG_REG(cli, reg) PSWRQ2_REG_ ## cli ## _ ## reg ## _RT_OFFSET
46fe56b9e6SYuval Mintz
47fe56b9e6SYuval Mintz /* ILT entry structure */
48fdd13dd3SShahed Shaikh #define ILT_ENTRY_PHY_ADDR_MASK (~0ULL >> 12)
49fe56b9e6SYuval Mintz #define ILT_ENTRY_PHY_ADDR_SHIFT 0
50fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_MASK 0x1ULL
51fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_SHIFT 52
52fe56b9e6SYuval Mintz #define ILT_ENTRY_IN_REGS 2
53fe56b9e6SYuval Mintz #define ILT_REG_SIZE_IN_BYTES 4
54fe56b9e6SYuval Mintz
55fe56b9e6SYuval Mintz /* connection context union */
56fe56b9e6SYuval Mintz union conn_context {
57fb09a1edSShai Malin struct core_conn_context core_ctx;
58fb09a1edSShai Malin struct eth_conn_context eth_ctx;
59fb09a1edSShai Malin struct iscsi_conn_context iscsi_ctx;
60fb09a1edSShai Malin struct fcoe_conn_context fcoe_ctx;
61fb09a1edSShai Malin struct roce_conn_context roce_ctx;
62fe56b9e6SYuval Mintz };
63fe56b9e6SYuval Mintz
641e128c81SArun Easi /* TYPE-0 task context - iSCSI, FCOE */
65dbb799c3SYuval Mintz union type0_task_context {
66fb09a1edSShai Malin struct iscsi_task_context iscsi_ctx;
67fb09a1edSShai Malin struct fcoe_task_context fcoe_ctx;
68dbb799c3SYuval Mintz };
69dbb799c3SYuval Mintz
70dbb799c3SYuval Mintz /* TYPE-1 task context - ROCE */
71dbb799c3SYuval Mintz union type1_task_context {
72fb09a1edSShai Malin struct rdma_task_context roce_ctx;
73dbb799c3SYuval Mintz };
74dbb799c3SYuval Mintz
75dbb799c3SYuval Mintz struct src_ent {
765ab90341SAlexander Lobakin __u8 opaque[56];
775ab90341SAlexander Lobakin __be64 next;
78dbb799c3SYuval Mintz };
79dbb799c3SYuval Mintz
80dbb799c3SYuval Mintz #define CDUT_SEG_ALIGNMET 3 /* in 4k chunks */
81a2e7699eSTomer Tayar #define CDUT_SEG_ALIGNMET_IN_BYTES BIT(CDUT_SEG_ALIGNMET + 12)
82dbb799c3SYuval Mintz
83fe56b9e6SYuval Mintz #define CONN_CXT_SIZE(p_hwfn) \
84fe56b9e6SYuval Mintz ALIGNED_TYPE_SIZE(union conn_context, p_hwfn)
85fe56b9e6SYuval Mintz
86dbb799c3SYuval Mintz #define SRQ_CXT_SIZE (sizeof(struct rdma_srq_context))
87b8204ad8SYuval Basson #define XRC_SRQ_CXT_SIZE (sizeof(struct rdma_xrc_srq_context))
88dbb799c3SYuval Mintz
89dbb799c3SYuval Mintz #define TYPE0_TASK_CXT_SIZE(p_hwfn) \
90dbb799c3SYuval Mintz ALIGNED_TYPE_SIZE(union type0_task_context, p_hwfn)
91dbb799c3SYuval Mintz
92dbb799c3SYuval Mintz /* Alignment is inherent to the type1_task_context structure */
93dbb799c3SYuval Mintz #define TYPE1_TASK_CXT_SIZE(p_hwfn) sizeof(union type1_task_context)
94dbb799c3SYuval Mintz
src_proto(enum protocol_type type)95dbb799c3SYuval Mintz static bool src_proto(enum protocol_type type)
96dbb799c3SYuval Mintz {
971bd4f571SOmkar Kulkarni return type == PROTOCOLID_TCP_ULP ||
985d7dc962SKalderon, Michal type == PROTOCOLID_FCOE ||
995d7dc962SKalderon, Michal type == PROTOCOLID_IWARP;
100dbb799c3SYuval Mintz }
101dbb799c3SYuval Mintz
tm_cid_proto(enum protocol_type type)102dbb799c3SYuval Mintz static bool tm_cid_proto(enum protocol_type type)
103dbb799c3SYuval Mintz {
1041bd4f571SOmkar Kulkarni return type == PROTOCOLID_TCP_ULP ||
1051e128c81SArun Easi type == PROTOCOLID_FCOE ||
1065d7dc962SKalderon, Michal type == PROTOCOLID_ROCE ||
1075d7dc962SKalderon, Michal type == PROTOCOLID_IWARP;
108dbb799c3SYuval Mintz }
109fe56b9e6SYuval Mintz
tm_tid_proto(enum protocol_type type)1101e128c81SArun Easi static bool tm_tid_proto(enum protocol_type type)
1111e128c81SArun Easi {
1121e128c81SArun Easi return type == PROTOCOLID_FCOE;
1131e128c81SArun Easi }
1141e128c81SArun Easi
1151408cc1fSYuval Mintz /* counts the iids for the CDU/CDUC ILT client configuration */
1161408cc1fSYuval Mintz struct qed_cdu_iids {
1171408cc1fSYuval Mintz u32 pf_cids;
1181408cc1fSYuval Mintz u32 per_vf_cids;
1191408cc1fSYuval Mintz };
1201408cc1fSYuval Mintz
qed_cxt_cdu_iids(struct qed_cxt_mngr * p_mngr,struct qed_cdu_iids * iids)1211408cc1fSYuval Mintz static void qed_cxt_cdu_iids(struct qed_cxt_mngr *p_mngr,
1221408cc1fSYuval Mintz struct qed_cdu_iids *iids)
123fe56b9e6SYuval Mintz {
1241408cc1fSYuval Mintz u32 type;
125fe56b9e6SYuval Mintz
1261408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) {
1271408cc1fSYuval Mintz iids->pf_cids += p_mngr->conn_cfg[type].cid_count;
1281408cc1fSYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[type].cids_per_vf;
1291408cc1fSYuval Mintz }
130fe56b9e6SYuval Mintz }
131fe56b9e6SYuval Mintz
132dbb799c3SYuval Mintz /* counts the iids for the Searcher block configuration */
133dbb799c3SYuval Mintz struct qed_src_iids {
134dbb799c3SYuval Mintz u32 pf_cids;
135dbb799c3SYuval Mintz u32 per_vf_cids;
136dbb799c3SYuval Mintz };
137dbb799c3SYuval Mintz
qed_cxt_src_iids(struct qed_cxt_mngr * p_mngr,struct qed_src_iids * iids)138dbb799c3SYuval Mintz static void qed_cxt_src_iids(struct qed_cxt_mngr *p_mngr,
139dbb799c3SYuval Mintz struct qed_src_iids *iids)
140dbb799c3SYuval Mintz {
141dbb799c3SYuval Mintz u32 i;
142dbb799c3SYuval Mintz
143dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++) {
144dbb799c3SYuval Mintz if (!src_proto(i))
145dbb799c3SYuval Mintz continue;
146dbb799c3SYuval Mintz
147dbb799c3SYuval Mintz iids->pf_cids += p_mngr->conn_cfg[i].cid_count;
148dbb799c3SYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[i].cids_per_vf;
149dbb799c3SYuval Mintz }
150d51e4af5SChopra, Manish
151d51e4af5SChopra, Manish /* Add L2 filtering filters in addition */
152d51e4af5SChopra, Manish iids->pf_cids += p_mngr->arfs_count;
153dbb799c3SYuval Mintz }
154dbb799c3SYuval Mintz
155dbb799c3SYuval Mintz /* counts the iids for the Timers block configuration */
156dbb799c3SYuval Mintz struct qed_tm_iids {
157dbb799c3SYuval Mintz u32 pf_cids;
158dbb799c3SYuval Mintz u32 pf_tids[NUM_TASK_PF_SEGMENTS]; /* per segment */
159dbb799c3SYuval Mintz u32 pf_tids_total;
160dbb799c3SYuval Mintz u32 per_vf_cids;
161dbb799c3SYuval Mintz u32 per_vf_tids;
162dbb799c3SYuval Mintz };
163dbb799c3SYuval Mintz
qed_cxt_tm_iids(struct qed_hwfn * p_hwfn,struct qed_cxt_mngr * p_mngr,struct qed_tm_iids * iids)16444531ba4SMichal Kalderon static void qed_cxt_tm_iids(struct qed_hwfn *p_hwfn,
16544531ba4SMichal Kalderon struct qed_cxt_mngr *p_mngr,
166dbb799c3SYuval Mintz struct qed_tm_iids *iids)
167dbb799c3SYuval Mintz {
16844531ba4SMichal Kalderon bool tm_vf_required = false;
16944531ba4SMichal Kalderon bool tm_required = false;
17044531ba4SMichal Kalderon int i, j;
171dbb799c3SYuval Mintz
17244531ba4SMichal Kalderon /* Timers is a special case -> we don't count how many cids require
17344531ba4SMichal Kalderon * timers but what's the max cid that will be used by the timer block.
17444531ba4SMichal Kalderon * therefore we traverse in reverse order, and once we hit a protocol
17544531ba4SMichal Kalderon * that requires the timers memory, we'll sum all the protocols up
17644531ba4SMichal Kalderon * to that one.
17744531ba4SMichal Kalderon */
17844531ba4SMichal Kalderon for (i = MAX_CONN_TYPES - 1; i >= 0; i--) {
179dbb799c3SYuval Mintz struct qed_conn_type_cfg *p_cfg = &p_mngr->conn_cfg[i];
180dbb799c3SYuval Mintz
18144531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_required) {
18244531ba4SMichal Kalderon if (p_cfg->cid_count)
18344531ba4SMichal Kalderon tm_required = true;
18444531ba4SMichal Kalderon
185dbb799c3SYuval Mintz iids->pf_cids += p_cfg->cid_count;
18644531ba4SMichal Kalderon }
18744531ba4SMichal Kalderon
18844531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_vf_required) {
18944531ba4SMichal Kalderon if (p_cfg->cids_per_vf)
19044531ba4SMichal Kalderon tm_vf_required = true;
19144531ba4SMichal Kalderon
192dbb799c3SYuval Mintz iids->per_vf_cids += p_cfg->cids_per_vf;
193dbb799c3SYuval Mintz }
1941e128c81SArun Easi
1951e128c81SArun Easi if (tm_tid_proto(i)) {
1961e128c81SArun Easi struct qed_tid_seg *segs = p_cfg->tid_seg;
1971e128c81SArun Easi
1981e128c81SArun Easi /* for each segment there is at most one
1991e128c81SArun Easi * protocol for which count is not 0.
2001e128c81SArun Easi */
2011e128c81SArun Easi for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++)
2021e128c81SArun Easi iids->pf_tids[j] += segs[j].count;
2031e128c81SArun Easi
2041e128c81SArun Easi /* The last array elelment is for the VFs. As for PF
2051e128c81SArun Easi * segments there can be only one protocol for
2061e128c81SArun Easi * which this value is not 0.
2071e128c81SArun Easi */
2081e128c81SArun Easi iids->per_vf_tids += segs[NUM_TASK_PF_SEGMENTS].count;
2091e128c81SArun Easi }
210dbb799c3SYuval Mintz }
211dbb799c3SYuval Mintz
212dbb799c3SYuval Mintz iids->pf_cids = roundup(iids->pf_cids, TM_ALIGN);
213dbb799c3SYuval Mintz iids->per_vf_cids = roundup(iids->per_vf_cids, TM_ALIGN);
214dbb799c3SYuval Mintz iids->per_vf_tids = roundup(iids->per_vf_tids, TM_ALIGN);
215dbb799c3SYuval Mintz
216dbb799c3SYuval Mintz for (iids->pf_tids_total = 0, j = 0; j < NUM_TASK_PF_SEGMENTS; j++) {
217dbb799c3SYuval Mintz iids->pf_tids[j] = roundup(iids->pf_tids[j], TM_ALIGN);
218dbb799c3SYuval Mintz iids->pf_tids_total += iids->pf_tids[j];
219dbb799c3SYuval Mintz }
220dbb799c3SYuval Mintz }
221dbb799c3SYuval Mintz
qed_cxt_qm_iids(struct qed_hwfn * p_hwfn,struct qed_qm_iids * iids)222fe56b9e6SYuval Mintz static void qed_cxt_qm_iids(struct qed_hwfn *p_hwfn,
223fe56b9e6SYuval Mintz struct qed_qm_iids *iids)
224fe56b9e6SYuval Mintz {
225fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
226dbb799c3SYuval Mintz struct qed_tid_seg *segs;
227dbb799c3SYuval Mintz u32 vf_cids = 0, type, j;
228dbb799c3SYuval Mintz u32 vf_tids = 0;
229fe56b9e6SYuval Mintz
2301408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) {
231fe56b9e6SYuval Mintz iids->cids += p_mngr->conn_cfg[type].cid_count;
2321408cc1fSYuval Mintz vf_cids += p_mngr->conn_cfg[type].cids_per_vf;
233dbb799c3SYuval Mintz
234dbb799c3SYuval Mintz segs = p_mngr->conn_cfg[type].tid_seg;
235dbb799c3SYuval Mintz /* for each segment there is at most one
236dbb799c3SYuval Mintz * protocol for which count is not 0.
237dbb799c3SYuval Mintz */
238dbb799c3SYuval Mintz for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++)
239dbb799c3SYuval Mintz iids->tids += segs[j].count;
240dbb799c3SYuval Mintz
241dbb799c3SYuval Mintz /* The last array elelment is for the VFs. As for PF
242dbb799c3SYuval Mintz * segments there can be only one protocol for
243dbb799c3SYuval Mintz * which this value is not 0.
244dbb799c3SYuval Mintz */
245dbb799c3SYuval Mintz vf_tids += segs[NUM_TASK_PF_SEGMENTS].count;
2461408cc1fSYuval Mintz }
247fe56b9e6SYuval Mintz
248d434d02fSAlexander Lobakin iids->vf_cids = vf_cids;
249dbb799c3SYuval Mintz iids->tids += vf_tids * p_mngr->vf_count;
250dbb799c3SYuval Mintz
2511408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
252dbb799c3SYuval Mintz "iids: CIDS %08x vf_cids %08x tids %08x vf_tids %08x\n",
253dbb799c3SYuval Mintz iids->cids, iids->vf_cids, iids->tids, vf_tids);
254dbb799c3SYuval Mintz }
255dbb799c3SYuval Mintz
qed_cxt_tid_seg_info(struct qed_hwfn * p_hwfn,u32 seg)256dbb799c3SYuval Mintz static struct qed_tid_seg *qed_cxt_tid_seg_info(struct qed_hwfn *p_hwfn,
257dbb799c3SYuval Mintz u32 seg)
258dbb799c3SYuval Mintz {
259dbb799c3SYuval Mintz struct qed_cxt_mngr *p_cfg = p_hwfn->p_cxt_mngr;
260dbb799c3SYuval Mintz u32 i;
261dbb799c3SYuval Mintz
262dbb799c3SYuval Mintz /* Find the protocol with tid count > 0 for this segment.
263dbb799c3SYuval Mintz * Note: there can only be one and this is already validated.
264dbb799c3SYuval Mintz */
265dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++)
266dbb799c3SYuval Mintz if (p_cfg->conn_cfg[i].tid_seg[seg].count)
267dbb799c3SYuval Mintz return &p_cfg->conn_cfg[i].tid_seg[seg];
268dbb799c3SYuval Mintz return NULL;
269dbb799c3SYuval Mintz }
270dbb799c3SYuval Mintz
qed_cxt_set_srq_count(struct qed_hwfn * p_hwfn,u32 num_srqs,u32 num_xrc_srqs)271b8204ad8SYuval Basson static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn,
272b8204ad8SYuval Basson u32 num_srqs, u32 num_xrc_srqs)
273dbb799c3SYuval Mintz {
274dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
275dbb799c3SYuval Mintz
276dbb799c3SYuval Mintz p_mgr->srq_count = num_srqs;
277b8204ad8SYuval Basson p_mgr->xrc_srq_count = num_xrc_srqs;
278dbb799c3SYuval Mintz }
279dbb799c3SYuval Mintz
qed_cxt_get_ilt_page_size(struct qed_hwfn * p_hwfn,enum ilt_clients ilt_client)280b8204ad8SYuval Basson u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
281b8204ad8SYuval Basson enum ilt_clients ilt_client)
282b8204ad8SYuval Basson {
283b8204ad8SYuval Basson struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
284b8204ad8SYuval Basson struct qed_ilt_client_cfg *p_cli = &p_mngr->clients[ilt_client];
285b8204ad8SYuval Basson
286b8204ad8SYuval Basson return ILT_PAGE_IN_BYTES(p_cli->p_size.val);
287b8204ad8SYuval Basson }
288b8204ad8SYuval Basson
qed_cxt_xrc_srqs_per_page(struct qed_hwfn * p_hwfn)289b8204ad8SYuval Basson static u32 qed_cxt_xrc_srqs_per_page(struct qed_hwfn *p_hwfn)
290b8204ad8SYuval Basson {
291b8204ad8SYuval Basson u32 page_size;
292b8204ad8SYuval Basson
293b8204ad8SYuval Basson page_size = qed_cxt_get_ilt_page_size(p_hwfn, ILT_CLI_TSDM);
294b8204ad8SYuval Basson return page_size / XRC_SRQ_CXT_SIZE;
295b8204ad8SYuval Basson }
296b8204ad8SYuval Basson
qed_cxt_get_total_srq_count(struct qed_hwfn * p_hwfn)297b8204ad8SYuval Basson u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn)
298dbb799c3SYuval Mintz {
299dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
300b8204ad8SYuval Basson u32 total_srqs;
301dbb799c3SYuval Mintz
302b8204ad8SYuval Basson total_srqs = p_mgr->srq_count + p_mgr->xrc_srq_count;
303b8204ad8SYuval Basson
304b8204ad8SYuval Basson return total_srqs;
305fe56b9e6SYuval Mintz }
306fe56b9e6SYuval Mintz
307fe56b9e6SYuval Mintz /* set the iids count per protocol */
qed_cxt_set_proto_cid_count(struct qed_hwfn * p_hwfn,enum protocol_type type,u32 cid_count,u32 vf_cid_cnt)308fe56b9e6SYuval Mintz static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn,
309fe56b9e6SYuval Mintz enum protocol_type type,
3101408cc1fSYuval Mintz u32 cid_count, u32 vf_cid_cnt)
311fe56b9e6SYuval Mintz {
312fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
313fe56b9e6SYuval Mintz struct qed_conn_type_cfg *p_conn = &p_mgr->conn_cfg[type];
314fe56b9e6SYuval Mintz
315fe56b9e6SYuval Mintz p_conn->cid_count = roundup(cid_count, DQ_RANGE_ALIGN);
3161408cc1fSYuval Mintz p_conn->cids_per_vf = roundup(vf_cid_cnt, DQ_RANGE_ALIGN);
317dbb799c3SYuval Mintz
318dbb799c3SYuval Mintz if (type == PROTOCOLID_ROCE) {
319dbb799c3SYuval Mintz u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val;
320dbb799c3SYuval Mintz u32 cxt_size = CONN_CXT_SIZE(p_hwfn);
321dbb799c3SYuval Mintz u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
322f3e48119SRam Amrani u32 align = elems_per_page * DQ_RANGE_ALIGN;
323dbb799c3SYuval Mintz
324f3e48119SRam Amrani p_conn->cid_count = roundup(p_conn->cid_count, align);
325dbb799c3SYuval Mintz }
3261408cc1fSYuval Mintz }
3271408cc1fSYuval Mintz
qed_cxt_get_proto_cid_count(struct qed_hwfn * p_hwfn,enum protocol_type type,u32 * vf_cid)3281408cc1fSYuval Mintz u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
3291a635e48SYuval Mintz enum protocol_type type, u32 *vf_cid)
3301408cc1fSYuval Mintz {
3311408cc1fSYuval Mintz if (vf_cid)
3321408cc1fSYuval Mintz *vf_cid = p_hwfn->p_cxt_mngr->conn_cfg[type].cids_per_vf;
3331408cc1fSYuval Mintz
3341408cc1fSYuval Mintz return p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count;
335fe56b9e6SYuval Mintz }
336fe56b9e6SYuval Mintz
qed_cxt_get_proto_cid_start(struct qed_hwfn * p_hwfn,enum protocol_type type)337dbb799c3SYuval Mintz u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
338dbb799c3SYuval Mintz enum protocol_type type)
339dbb799c3SYuval Mintz {
340dbb799c3SYuval Mintz return p_hwfn->p_cxt_mngr->acquired[type].start_cid;
341dbb799c3SYuval Mintz }
342dbb799c3SYuval Mintz
qed_cxt_get_proto_tid_count(struct qed_hwfn * p_hwfn,enum protocol_type type)343dbb799c3SYuval Mintz u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn,
344dbb799c3SYuval Mintz enum protocol_type type)
345dbb799c3SYuval Mintz {
346dbb799c3SYuval Mintz u32 cnt = 0;
347dbb799c3SYuval Mintz int i;
348dbb799c3SYuval Mintz
349dbb799c3SYuval Mintz for (i = 0; i < TASK_SEGMENTS; i++)
350dbb799c3SYuval Mintz cnt += p_hwfn->p_cxt_mngr->conn_cfg[type].tid_seg[i].count;
351dbb799c3SYuval Mintz
352dbb799c3SYuval Mintz return cnt;
353dbb799c3SYuval Mintz }
354dbb799c3SYuval Mintz
qed_cxt_set_proto_tid_count(struct qed_hwfn * p_hwfn,enum protocol_type proto,u8 seg,u8 seg_type,u32 count,bool has_fl)3551a635e48SYuval Mintz static void qed_cxt_set_proto_tid_count(struct qed_hwfn *p_hwfn,
356dbb799c3SYuval Mintz enum protocol_type proto,
3571a635e48SYuval Mintz u8 seg,
3581a635e48SYuval Mintz u8 seg_type, u32 count, bool has_fl)
359dbb799c3SYuval Mintz {
360dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
361dbb799c3SYuval Mintz struct qed_tid_seg *p_seg = &p_mngr->conn_cfg[proto].tid_seg[seg];
362dbb799c3SYuval Mintz
363dbb799c3SYuval Mintz p_seg->count = count;
364dbb799c3SYuval Mintz p_seg->has_fl_mem = has_fl;
365dbb799c3SYuval Mintz p_seg->type = seg_type;
366dbb799c3SYuval Mintz }
367dbb799c3SYuval Mintz
qed_ilt_cli_blk_fill(struct qed_ilt_client_cfg * p_cli,struct qed_ilt_cli_blk * p_blk,u32 start_line,u32 total_size,u32 elem_size)368fe56b9e6SYuval Mintz static void qed_ilt_cli_blk_fill(struct qed_ilt_client_cfg *p_cli,
369fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk,
3701a635e48SYuval Mintz u32 start_line, u32 total_size, u32 elem_size)
371fe56b9e6SYuval Mintz {
372fe56b9e6SYuval Mintz u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);
373fe56b9e6SYuval Mintz
374fe56b9e6SYuval Mintz /* verify thatits called only once for each block */
375fe56b9e6SYuval Mintz if (p_blk->total_size)
376fe56b9e6SYuval Mintz return;
377fe56b9e6SYuval Mintz
378fe56b9e6SYuval Mintz p_blk->total_size = total_size;
379fe56b9e6SYuval Mintz p_blk->real_size_in_page = 0;
380fe56b9e6SYuval Mintz if (elem_size)
381fe56b9e6SYuval Mintz p_blk->real_size_in_page = (ilt_size / elem_size) * elem_size;
382fe56b9e6SYuval Mintz p_blk->start_line = start_line;
383fe56b9e6SYuval Mintz }
384fe56b9e6SYuval Mintz
qed_ilt_cli_adv_line(struct qed_hwfn * p_hwfn,struct qed_ilt_client_cfg * p_cli,struct qed_ilt_cli_blk * p_blk,u32 * p_line,enum ilt_clients client_id)385fe56b9e6SYuval Mintz static void qed_ilt_cli_adv_line(struct qed_hwfn *p_hwfn,
386fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli,
387fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk,
388fe56b9e6SYuval Mintz u32 *p_line, enum ilt_clients client_id)
389fe56b9e6SYuval Mintz {
390fe56b9e6SYuval Mintz if (!p_blk->total_size)
391fe56b9e6SYuval Mintz return;
392fe56b9e6SYuval Mintz
393fe56b9e6SYuval Mintz if (!p_cli->active)
394fe56b9e6SYuval Mintz p_cli->first.val = *p_line;
395fe56b9e6SYuval Mintz
396fe56b9e6SYuval Mintz p_cli->active = true;
3971a635e48SYuval Mintz *p_line += DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page);
398fe56b9e6SYuval Mintz p_cli->last.val = *p_line - 1;
399fe56b9e6SYuval Mintz
400fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
401fe56b9e6SYuval Mintz "ILT[Client %d] - Lines: [%08x - %08x]. Block - Size %08x [Real %08x] Start line %d\n",
402fe56b9e6SYuval Mintz client_id, p_cli->first.val,
403fe56b9e6SYuval Mintz p_cli->last.val, p_blk->total_size,
404fe56b9e6SYuval Mintz p_blk->real_size_in_page, p_blk->start_line);
405fe56b9e6SYuval Mintz }
406fe56b9e6SYuval Mintz
qed_ilt_get_dynamic_line_cnt(struct qed_hwfn * p_hwfn,enum ilt_clients ilt_client)407dbb799c3SYuval Mintz static u32 qed_ilt_get_dynamic_line_cnt(struct qed_hwfn *p_hwfn,
408dbb799c3SYuval Mintz enum ilt_clients ilt_client)
409dbb799c3SYuval Mintz {
410dbb799c3SYuval Mintz u32 cid_count = p_hwfn->p_cxt_mngr->conn_cfg[PROTOCOLID_ROCE].cid_count;
411dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
412dbb799c3SYuval Mintz u32 lines_to_skip = 0;
413dbb799c3SYuval Mintz u32 cxts_per_p;
414dbb799c3SYuval Mintz
415dbb799c3SYuval Mintz if (ilt_client == ILT_CLI_CDUC) {
416dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC];
417dbb799c3SYuval Mintz
418dbb799c3SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(p_cli->p_size.val) /
419dbb799c3SYuval Mintz (u32) CONN_CXT_SIZE(p_hwfn);
420dbb799c3SYuval Mintz
421dbb799c3SYuval Mintz lines_to_skip = cid_count / cxts_per_p;
422dbb799c3SYuval Mintz }
423dbb799c3SYuval Mintz
424dbb799c3SYuval Mintz return lines_to_skip;
425dbb799c3SYuval Mintz }
426dbb799c3SYuval Mintz
qed_cxt_set_cli(struct qed_ilt_client_cfg * p_cli)427f9dc4d1fSRam Amrani static struct qed_ilt_client_cfg *qed_cxt_set_cli(struct qed_ilt_client_cfg
428f9dc4d1fSRam Amrani *p_cli)
429f9dc4d1fSRam Amrani {
430f9dc4d1fSRam Amrani p_cli->active = false;
431f9dc4d1fSRam Amrani p_cli->first.val = 0;
432f9dc4d1fSRam Amrani p_cli->last.val = 0;
433f9dc4d1fSRam Amrani return p_cli;
434f9dc4d1fSRam Amrani }
435f9dc4d1fSRam Amrani
qed_cxt_set_blk(struct qed_ilt_cli_blk * p_blk)436f9dc4d1fSRam Amrani static struct qed_ilt_cli_blk *qed_cxt_set_blk(struct qed_ilt_cli_blk *p_blk)
437f9dc4d1fSRam Amrani {
438f9dc4d1fSRam Amrani p_blk->total_size = 0;
439f9dc4d1fSRam Amrani return p_blk;
440f9dc4d1fSRam Amrani }
441f9dc4d1fSRam Amrani
qed_cxt_ilt_blk_reset(struct qed_hwfn * p_hwfn)442c221dd18SAlexander Lobakin static void qed_cxt_ilt_blk_reset(struct qed_hwfn *p_hwfn)
443c221dd18SAlexander Lobakin {
444c221dd18SAlexander Lobakin struct qed_ilt_client_cfg *clients = p_hwfn->p_cxt_mngr->clients;
445c221dd18SAlexander Lobakin u32 cli_idx, blk_idx;
446c221dd18SAlexander Lobakin
447c221dd18SAlexander Lobakin for (cli_idx = 0; cli_idx < MAX_ILT_CLIENTS; cli_idx++) {
448c221dd18SAlexander Lobakin for (blk_idx = 0; blk_idx < ILT_CLI_PF_BLOCKS; blk_idx++)
449c221dd18SAlexander Lobakin clients[cli_idx].pf_blks[blk_idx].total_size = 0;
450c221dd18SAlexander Lobakin
451c221dd18SAlexander Lobakin for (blk_idx = 0; blk_idx < ILT_CLI_VF_BLOCKS; blk_idx++)
452c221dd18SAlexander Lobakin clients[cli_idx].vf_blks[blk_idx].total_size = 0;
453c221dd18SAlexander Lobakin }
454c221dd18SAlexander Lobakin }
455c221dd18SAlexander Lobakin
qed_cxt_cfg_ilt_compute(struct qed_hwfn * p_hwfn,u32 * line_count)456f9dc4d1fSRam Amrani int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *line_count)
457fe56b9e6SYuval Mintz {
458fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
459dbb799c3SYuval Mintz u32 curr_line, total, i, task_size, line;
460fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli;
461fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk;
4621408cc1fSYuval Mintz struct qed_cdu_iids cdu_iids;
463dbb799c3SYuval Mintz struct qed_src_iids src_iids;
464fe56b9e6SYuval Mintz struct qed_qm_iids qm_iids;
465dbb799c3SYuval Mintz struct qed_tm_iids tm_iids;
466dbb799c3SYuval Mintz struct qed_tid_seg *p_seg;
467fe56b9e6SYuval Mintz
468fe56b9e6SYuval Mintz memset(&qm_iids, 0, sizeof(qm_iids));
4691408cc1fSYuval Mintz memset(&cdu_iids, 0, sizeof(cdu_iids));
470dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids));
471dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids));
472fe56b9e6SYuval Mintz
473fe56b9e6SYuval Mintz p_mngr->pf_start_line = RESC_START(p_hwfn, QED_ILT);
474fe56b9e6SYuval Mintz
475c221dd18SAlexander Lobakin /* Reset all ILT blocks at the beginning of ILT computing in order
476c221dd18SAlexander Lobakin * to prevent memory allocation for irrelevant blocks afterwards.
477c221dd18SAlexander Lobakin */
478c221dd18SAlexander Lobakin qed_cxt_ilt_blk_reset(p_hwfn);
479c221dd18SAlexander Lobakin
480fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
481fe56b9e6SYuval Mintz "hwfn [%d] - Set context manager starting line to be 0x%08x\n",
482fe56b9e6SYuval Mintz p_hwfn->my_id, p_hwfn->p_cxt_mngr->pf_start_line);
483fe56b9e6SYuval Mintz
484fe56b9e6SYuval Mintz /* CDUC */
485f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUC]);
486f9dc4d1fSRam Amrani
487fe56b9e6SYuval Mintz curr_line = p_mngr->pf_start_line;
4881408cc1fSYuval Mintz
4891408cc1fSYuval Mintz /* CDUC PF */
490fe56b9e6SYuval Mintz p_cli->pf_total_lines = 0;
491fe56b9e6SYuval Mintz
492fe56b9e6SYuval Mintz /* get the counters for the CDUC and QM clients */
4931408cc1fSYuval Mintz qed_cxt_cdu_iids(p_mngr, &cdu_iids);
494fe56b9e6SYuval Mintz
495f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUC_BLK]);
496fe56b9e6SYuval Mintz
4971408cc1fSYuval Mintz total = cdu_iids.pf_cids * CONN_CXT_SIZE(p_hwfn);
498fe56b9e6SYuval Mintz
499fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
500fe56b9e6SYuval Mintz total, CONN_CXT_SIZE(p_hwfn));
501fe56b9e6SYuval Mintz
502fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC);
503fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line;
504fe56b9e6SYuval Mintz
505dbb799c3SYuval Mintz p_blk->dynamic_line_cnt = qed_ilt_get_dynamic_line_cnt(p_hwfn,
506dbb799c3SYuval Mintz ILT_CLI_CDUC);
507dbb799c3SYuval Mintz
5081408cc1fSYuval Mintz /* CDUC VF */
509f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUC_BLK]);
5101408cc1fSYuval Mintz total = cdu_iids.per_vf_cids * CONN_CXT_SIZE(p_hwfn);
5111408cc1fSYuval Mintz
5121408cc1fSYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
5131408cc1fSYuval Mintz total, CONN_CXT_SIZE(p_hwfn));
5141408cc1fSYuval Mintz
5151408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC);
5161408cc1fSYuval Mintz p_cli->vf_total_lines = curr_line - p_blk->start_line;
5171408cc1fSYuval Mintz
5181408cc1fSYuval Mintz for (i = 1; i < p_mngr->vf_count; i++)
5191408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
5201408cc1fSYuval Mintz ILT_CLI_CDUC);
5211408cc1fSYuval Mintz
522dbb799c3SYuval Mintz /* CDUT PF */
523f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUT]);
524dbb799c3SYuval Mintz p_cli->first.val = curr_line;
525dbb799c3SYuval Mintz
526dbb799c3SYuval Mintz /* first the 'working' task memory */
527dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
528dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i);
529dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0)
530dbb799c3SYuval Mintz continue;
531dbb799c3SYuval Mintz
532f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUT_SEG_BLK(i)]);
533dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type];
534dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, total,
535dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]);
536dbb799c3SYuval Mintz
537dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
538dbb799c3SYuval Mintz ILT_CLI_CDUT);
539dbb799c3SYuval Mintz }
540dbb799c3SYuval Mintz
541dbb799c3SYuval Mintz /* next the 'init' task memory (forced load memory) */
542dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
543dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i);
544dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0)
545dbb799c3SYuval Mintz continue;
546dbb799c3SYuval Mintz
547f9dc4d1fSRam Amrani p_blk =
548f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)]);
549dbb799c3SYuval Mintz
550dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) {
551dbb799c3SYuval Mintz /* The segment is active (total size pf 'working'
552dbb799c3SYuval Mintz * memory is > 0) but has no FL (forced-load, Init)
553dbb799c3SYuval Mintz * memory. Thus:
554dbb799c3SYuval Mintz *
555dbb799c3SYuval Mintz * 1. The total-size in the corrsponding FL block of
556dbb799c3SYuval Mintz * the ILT client is set to 0 - No ILT line are
557dbb799c3SYuval Mintz * provisioned and no ILT memory allocated.
558dbb799c3SYuval Mintz *
559dbb799c3SYuval Mintz * 2. The start-line of said block is set to the
560dbb799c3SYuval Mintz * start line of the matching working memory
561dbb799c3SYuval Mintz * block in the ILT client. This is later used to
562dbb799c3SYuval Mintz * configure the CDU segment offset registers and
563dbb799c3SYuval Mintz * results in an FL command for TIDs of this
564dbb799c3SYuval Mintz * segement behaves as regular load commands
565dbb799c3SYuval Mintz * (loading TIDs from the working memory).
566dbb799c3SYuval Mintz */
567dbb799c3SYuval Mintz line = p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line;
568dbb799c3SYuval Mintz
569dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0);
570dbb799c3SYuval Mintz continue;
571dbb799c3SYuval Mintz }
572dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type];
573dbb799c3SYuval Mintz
574dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk,
575dbb799c3SYuval Mintz curr_line, total,
576dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]);
577dbb799c3SYuval Mintz
578dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
579dbb799c3SYuval Mintz ILT_CLI_CDUT);
580dbb799c3SYuval Mintz }
581dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_cli->pf_blks[0].start_line;
582dbb799c3SYuval Mintz
583dbb799c3SYuval Mintz /* CDUT VF */
584dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, TASK_SEGMENT_VF);
585dbb799c3SYuval Mintz if (p_seg && p_seg->count) {
586dbb799c3SYuval Mintz /* Stricly speaking we need to iterate over all VF
587dbb799c3SYuval Mintz * task segment types, but a VF has only 1 segment
588dbb799c3SYuval Mintz */
589dbb799c3SYuval Mintz
590dbb799c3SYuval Mintz /* 'working' memory */
591dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type];
592dbb799c3SYuval Mintz
593f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUT_SEG_BLK(0)]);
594dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk,
595dbb799c3SYuval Mintz curr_line, total,
596dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]);
597dbb799c3SYuval Mintz
598dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
599dbb799c3SYuval Mintz ILT_CLI_CDUT);
600dbb799c3SYuval Mintz
601dbb799c3SYuval Mintz /* 'init' memory */
602f9dc4d1fSRam Amrani p_blk =
603f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)]);
604dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) {
605dbb799c3SYuval Mintz /* see comment above */
606dbb799c3SYuval Mintz line = p_cli->vf_blks[CDUT_SEG_BLK(0)].start_line;
607dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0);
608dbb799c3SYuval Mintz } else {
609dbb799c3SYuval Mintz task_size = p_mngr->task_type_size[p_seg->type];
610dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk,
611dbb799c3SYuval Mintz curr_line, total, task_size);
612dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
613dbb799c3SYuval Mintz ILT_CLI_CDUT);
614dbb799c3SYuval Mintz }
615dbb799c3SYuval Mintz p_cli->vf_total_lines = curr_line -
616dbb799c3SYuval Mintz p_cli->vf_blks[0].start_line;
617dbb799c3SYuval Mintz
618dbb799c3SYuval Mintz /* Now for the rest of the VFs */
619dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) {
620dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_SEG_BLK(0)];
621dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
622dbb799c3SYuval Mintz ILT_CLI_CDUT);
623dbb799c3SYuval Mintz
624dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)];
625dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
626dbb799c3SYuval Mintz ILT_CLI_CDUT);
627dbb799c3SYuval Mintz }
628dbb799c3SYuval Mintz }
629dbb799c3SYuval Mintz
630fe56b9e6SYuval Mintz /* QM */
631f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_QM]);
632f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]);
633fe56b9e6SYuval Mintz
634fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &qm_iids);
635da090917STomer Tayar total = qed_qm_pf_mem_size(qm_iids.cids,
636dbb799c3SYuval Mintz qm_iids.vf_cids, qm_iids.tids,
6371408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs,
6381408cc1fSYuval Mintz p_hwfn->qm_info.num_vf_pqs);
639fe56b9e6SYuval Mintz
6401408cc1fSYuval Mintz DP_VERBOSE(p_hwfn,
6411408cc1fSYuval Mintz QED_MSG_ILT,
642dbb799c3SYuval Mintz "QM ILT Info, (cids=%d, vf_cids=%d, tids=%d, num_pqs=%d, num_vf_pqs=%d, memory_size=%d)\n",
6431408cc1fSYuval Mintz qm_iids.cids,
6441408cc1fSYuval Mintz qm_iids.vf_cids,
645dbb799c3SYuval Mintz qm_iids.tids,
6461408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs, p_hwfn->qm_info.num_vf_pqs, total);
647fe56b9e6SYuval Mintz
648fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk,
649fe56b9e6SYuval Mintz curr_line, total * 0x1000,
650fe56b9e6SYuval Mintz QM_PQ_ELEMENT_SIZE);
651fe56b9e6SYuval Mintz
652fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_QM);
653fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line;
654fe56b9e6SYuval Mintz
655dbb799c3SYuval Mintz /* SRC */
656f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_SRC]);
657dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids);
658dbb799c3SYuval Mintz
659dbb799c3SYuval Mintz /* Both the PF and VFs searcher connections are stored in the per PF
660dbb799c3SYuval Mintz * database. Thus sum the PF searcher cids and all the VFs searcher
661dbb799c3SYuval Mintz * cids.
662dbb799c3SYuval Mintz */
663dbb799c3SYuval Mintz total = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count;
664dbb799c3SYuval Mintz if (total) {
665dbb799c3SYuval Mintz u32 local_max = max_t(u32, total,
666dbb799c3SYuval Mintz SRC_MIN_NUM_ELEMS);
667dbb799c3SYuval Mintz
668dbb799c3SYuval Mintz total = roundup_pow_of_two(local_max);
669dbb799c3SYuval Mintz
670f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]);
671dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
672dbb799c3SYuval Mintz total * sizeof(struct src_ent),
673dbb799c3SYuval Mintz sizeof(struct src_ent));
674dbb799c3SYuval Mintz
675dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
676dbb799c3SYuval Mintz ILT_CLI_SRC);
677dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line;
678dbb799c3SYuval Mintz }
679dbb799c3SYuval Mintz
680dbb799c3SYuval Mintz /* TM PF */
681f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TM]);
68244531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids);
683dbb799c3SYuval Mintz total = tm_iids.pf_cids + tm_iids.pf_tids_total;
684dbb799c3SYuval Mintz if (total) {
685f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]);
686dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
687dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE);
688dbb799c3SYuval Mintz
689dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
690dbb799c3SYuval Mintz ILT_CLI_TM);
691dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line;
692dbb799c3SYuval Mintz }
693dbb799c3SYuval Mintz
694dbb799c3SYuval Mintz /* TM VF */
695dbb799c3SYuval Mintz total = tm_iids.per_vf_cids + tm_iids.per_vf_tids;
696dbb799c3SYuval Mintz if (total) {
697f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[0]);
698dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
699dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE);
700dbb799c3SYuval Mintz
701dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
702dbb799c3SYuval Mintz ILT_CLI_TM);
703dbb799c3SYuval Mintz
70470566b42SMintz, Yuval p_cli->vf_total_lines = curr_line - p_blk->start_line;
705dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++)
706dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
707dbb799c3SYuval Mintz ILT_CLI_TM);
708dbb799c3SYuval Mintz }
709dbb799c3SYuval Mintz
710dbb799c3SYuval Mintz /* TSDM (SRQ CONTEXT) */
711b8204ad8SYuval Basson total = qed_cxt_get_total_srq_count(p_hwfn);
712dbb799c3SYuval Mintz
713dbb799c3SYuval Mintz if (total) {
714f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TSDM]);
715f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[SRQ_BLK]);
716dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
717dbb799c3SYuval Mintz total * SRQ_CXT_SIZE, SRQ_CXT_SIZE);
718dbb799c3SYuval Mintz
719dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
720dbb799c3SYuval Mintz ILT_CLI_TSDM);
721dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line;
722dbb799c3SYuval Mintz }
723dbb799c3SYuval Mintz
724f9dc4d1fSRam Amrani *line_count = curr_line - p_hwfn->p_cxt_mngr->pf_start_line;
725f9dc4d1fSRam Amrani
726fe56b9e6SYuval Mintz if (curr_line - p_hwfn->p_cxt_mngr->pf_start_line >
727f9dc4d1fSRam Amrani RESC_NUM(p_hwfn, QED_ILT))
728fe56b9e6SYuval Mintz return -EINVAL;
729f9dc4d1fSRam Amrani
730f9dc4d1fSRam Amrani return 0;
731fe56b9e6SYuval Mintz }
732fe56b9e6SYuval Mintz
qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn * p_hwfn,u32 used_lines)733f9dc4d1fSRam Amrani u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines)
734f9dc4d1fSRam Amrani {
735f9dc4d1fSRam Amrani struct qed_ilt_client_cfg *p_cli;
736f9dc4d1fSRam Amrani u32 excess_lines, available_lines;
737f9dc4d1fSRam Amrani struct qed_cxt_mngr *p_mngr;
738f9dc4d1fSRam Amrani u32 ilt_page_size, elem_size;
739f9dc4d1fSRam Amrani struct qed_tid_seg *p_seg;
740f9dc4d1fSRam Amrani int i;
741f9dc4d1fSRam Amrani
742f9dc4d1fSRam Amrani available_lines = RESC_NUM(p_hwfn, QED_ILT);
743f9dc4d1fSRam Amrani excess_lines = used_lines - available_lines;
744f9dc4d1fSRam Amrani
745f9dc4d1fSRam Amrani if (!excess_lines)
746f9dc4d1fSRam Amrani return 0;
747f9dc4d1fSRam Amrani
748c851a9dcSKalderon, Michal if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
749f9dc4d1fSRam Amrani return 0;
750f9dc4d1fSRam Amrani
751f9dc4d1fSRam Amrani p_mngr = p_hwfn->p_cxt_mngr;
752f9dc4d1fSRam Amrani p_cli = &p_mngr->clients[ILT_CLI_CDUT];
753f9dc4d1fSRam Amrani ilt_page_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);
754f9dc4d1fSRam Amrani
755f9dc4d1fSRam Amrani for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
756f9dc4d1fSRam Amrani p_seg = qed_cxt_tid_seg_info(p_hwfn, i);
757f9dc4d1fSRam Amrani if (!p_seg || p_seg->count == 0)
758f9dc4d1fSRam Amrani continue;
759f9dc4d1fSRam Amrani
760f9dc4d1fSRam Amrani elem_size = p_mngr->task_type_size[p_seg->type];
761f9dc4d1fSRam Amrani if (!elem_size)
762f9dc4d1fSRam Amrani continue;
763f9dc4d1fSRam Amrani
764f9dc4d1fSRam Amrani return (ilt_page_size / elem_size) * excess_lines;
765f9dc4d1fSRam Amrani }
766f9dc4d1fSRam Amrani
767f9dc4d1fSRam Amrani DP_NOTICE(p_hwfn, "failed computing excess ILT lines\n");
768fe56b9e6SYuval Mintz return 0;
769fe56b9e6SYuval Mintz }
770fe56b9e6SYuval Mintz
qed_cxt_src_t2_free(struct qed_hwfn * p_hwfn)771dbb799c3SYuval Mintz static void qed_cxt_src_t2_free(struct qed_hwfn *p_hwfn)
772dbb799c3SYuval Mintz {
7738a52bbabSMichal Kalderon struct qed_src_t2 *p_t2 = &p_hwfn->p_cxt_mngr->src_t2;
774dbb799c3SYuval Mintz u32 i;
775dbb799c3SYuval Mintz
7768a52bbabSMichal Kalderon if (!p_t2 || !p_t2->dma_mem)
777dbb799c3SYuval Mintz return;
778dbb799c3SYuval Mintz
7798a52bbabSMichal Kalderon for (i = 0; i < p_t2->num_pages; i++)
7808a52bbabSMichal Kalderon if (p_t2->dma_mem[i].virt_addr)
781dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev,
7828a52bbabSMichal Kalderon p_t2->dma_mem[i].size,
7838a52bbabSMichal Kalderon p_t2->dma_mem[i].virt_addr,
7848a52bbabSMichal Kalderon p_t2->dma_mem[i].phys_addr);
785dbb799c3SYuval Mintz
7868a52bbabSMichal Kalderon kfree(p_t2->dma_mem);
7878a52bbabSMichal Kalderon p_t2->dma_mem = NULL;
7888a52bbabSMichal Kalderon }
7898a52bbabSMichal Kalderon
7908a52bbabSMichal Kalderon static int
qed_cxt_t2_alloc_pages(struct qed_hwfn * p_hwfn,struct qed_src_t2 * p_t2,u32 total_size,u32 page_size)7918a52bbabSMichal Kalderon qed_cxt_t2_alloc_pages(struct qed_hwfn *p_hwfn,
7928a52bbabSMichal Kalderon struct qed_src_t2 *p_t2, u32 total_size, u32 page_size)
7938a52bbabSMichal Kalderon {
7948a52bbabSMichal Kalderon void **p_virt;
7958a52bbabSMichal Kalderon u32 size, i;
7968a52bbabSMichal Kalderon
7978a52bbabSMichal Kalderon if (!p_t2 || !p_t2->dma_mem)
7988a52bbabSMichal Kalderon return -EINVAL;
7998a52bbabSMichal Kalderon
8008a52bbabSMichal Kalderon for (i = 0; i < p_t2->num_pages; i++) {
8018a52bbabSMichal Kalderon size = min_t(u32, total_size, page_size);
8028a52bbabSMichal Kalderon p_virt = &p_t2->dma_mem[i].virt_addr;
8038a52bbabSMichal Kalderon
8048a52bbabSMichal Kalderon *p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
8058a52bbabSMichal Kalderon size,
8068a52bbabSMichal Kalderon &p_t2->dma_mem[i].phys_addr,
8078a52bbabSMichal Kalderon GFP_KERNEL);
8088a52bbabSMichal Kalderon if (!p_t2->dma_mem[i].virt_addr)
8098a52bbabSMichal Kalderon return -ENOMEM;
8108a52bbabSMichal Kalderon
8118a52bbabSMichal Kalderon memset(*p_virt, 0, size);
8128a52bbabSMichal Kalderon p_t2->dma_mem[i].size = size;
8138a52bbabSMichal Kalderon total_size -= size;
8148a52bbabSMichal Kalderon }
8158a52bbabSMichal Kalderon
8168a52bbabSMichal Kalderon return 0;
817dbb799c3SYuval Mintz }
818dbb799c3SYuval Mintz
qed_cxt_src_t2_alloc(struct qed_hwfn * p_hwfn)819dbb799c3SYuval Mintz static int qed_cxt_src_t2_alloc(struct qed_hwfn *p_hwfn)
820dbb799c3SYuval Mintz {
821dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
822dbb799c3SYuval Mintz u32 conn_num, total_size, ent_per_page, psz, i;
8238a52bbabSMichal Kalderon struct phys_mem_desc *p_t2_last_page;
824dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_src;
825dbb799c3SYuval Mintz struct qed_src_iids src_iids;
8268a52bbabSMichal Kalderon struct qed_src_t2 *p_t2;
827dbb799c3SYuval Mintz int rc;
828dbb799c3SYuval Mintz
829dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids));
830dbb799c3SYuval Mintz
831dbb799c3SYuval Mintz /* if the SRC ILT client is inactive - there are no connection
832dbb799c3SYuval Mintz * requiring the searcer, leave.
833dbb799c3SYuval Mintz */
834dbb799c3SYuval Mintz p_src = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_SRC];
835dbb799c3SYuval Mintz if (!p_src->active)
836dbb799c3SYuval Mintz return 0;
837dbb799c3SYuval Mintz
838dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids);
839dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count;
840dbb799c3SYuval Mintz total_size = conn_num * sizeof(struct src_ent);
841dbb799c3SYuval Mintz
842dbb799c3SYuval Mintz /* use the same page size as the SRC ILT client */
843dbb799c3SYuval Mintz psz = ILT_PAGE_IN_BYTES(p_src->p_size.val);
8448a52bbabSMichal Kalderon p_t2 = &p_mngr->src_t2;
8458a52bbabSMichal Kalderon p_t2->num_pages = DIV_ROUND_UP(total_size, psz);
846dbb799c3SYuval Mintz
847dbb799c3SYuval Mintz /* allocate t2 */
8488a52bbabSMichal Kalderon p_t2->dma_mem = kcalloc(p_t2->num_pages, sizeof(struct phys_mem_desc),
849dbb799c3SYuval Mintz GFP_KERNEL);
8508a52bbabSMichal Kalderon if (!p_t2->dma_mem) {
8518a52bbabSMichal Kalderon DP_NOTICE(p_hwfn, "Failed to allocate t2 table\n");
852dbb799c3SYuval Mintz rc = -ENOMEM;
853dbb799c3SYuval Mintz goto t2_fail;
854dbb799c3SYuval Mintz }
855dbb799c3SYuval Mintz
8568a52bbabSMichal Kalderon rc = qed_cxt_t2_alloc_pages(p_hwfn, p_t2, total_size, psz);
8578a52bbabSMichal Kalderon if (rc)
858dbb799c3SYuval Mintz goto t2_fail;
859dbb799c3SYuval Mintz
860dbb799c3SYuval Mintz /* Set the t2 pointers */
861dbb799c3SYuval Mintz
862dbb799c3SYuval Mintz /* entries per page - must be a power of two */
863dbb799c3SYuval Mintz ent_per_page = psz / sizeof(struct src_ent);
864dbb799c3SYuval Mintz
8658a52bbabSMichal Kalderon p_t2->first_free = (u64)p_t2->dma_mem[0].phys_addr;
866dbb799c3SYuval Mintz
8678a52bbabSMichal Kalderon p_t2_last_page = &p_t2->dma_mem[(conn_num - 1) / ent_per_page];
8688a52bbabSMichal Kalderon p_t2->last_free = (u64)p_t2_last_page->phys_addr +
869dbb799c3SYuval Mintz ((conn_num - 1) & (ent_per_page - 1)) * sizeof(struct src_ent);
870dbb799c3SYuval Mintz
8718a52bbabSMichal Kalderon for (i = 0; i < p_t2->num_pages; i++) {
872dbb799c3SYuval Mintz u32 ent_num = min_t(u32,
873dbb799c3SYuval Mintz ent_per_page,
874dbb799c3SYuval Mintz conn_num);
8758a52bbabSMichal Kalderon struct src_ent *entries = p_t2->dma_mem[i].virt_addr;
8768a52bbabSMichal Kalderon u64 p_ent_phys = (u64)p_t2->dma_mem[i].phys_addr, val;
877dbb799c3SYuval Mintz u32 j;
878dbb799c3SYuval Mintz
879dbb799c3SYuval Mintz for (j = 0; j < ent_num - 1; j++) {
880dbb799c3SYuval Mintz val = p_ent_phys + (j + 1) * sizeof(struct src_ent);
881dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val);
882dbb799c3SYuval Mintz }
883dbb799c3SYuval Mintz
8848a52bbabSMichal Kalderon if (i < p_t2->num_pages - 1)
8858a52bbabSMichal Kalderon val = (u64)p_t2->dma_mem[i + 1].phys_addr;
886dbb799c3SYuval Mintz else
887dbb799c3SYuval Mintz val = 0;
888dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val);
889dbb799c3SYuval Mintz
89001e517f1SDan Carpenter conn_num -= ent_num;
891dbb799c3SYuval Mintz }
892dbb799c3SYuval Mintz
893dbb799c3SYuval Mintz return 0;
894dbb799c3SYuval Mintz
895dbb799c3SYuval Mintz t2_fail:
896dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn);
897dbb799c3SYuval Mintz return rc;
898dbb799c3SYuval Mintz }
899dbb799c3SYuval Mintz
900fe56b9e6SYuval Mintz #define for_each_ilt_valid_client(pos, clients) \
9018a52bbabSMichal Kalderon for (pos = 0; pos < MAX_ILT_CLIENTS; pos++) \
902dbb799c3SYuval Mintz if (!clients[pos].active) { \
903dbb799c3SYuval Mintz continue; \
904dbb799c3SYuval Mintz } else \
905fe56b9e6SYuval Mintz
906fe56b9e6SYuval Mintz /* Total number of ILT lines used by this PF */
qed_cxt_ilt_shadow_size(struct qed_ilt_client_cfg * ilt_clients)907fe56b9e6SYuval Mintz static u32 qed_cxt_ilt_shadow_size(struct qed_ilt_client_cfg *ilt_clients)
908fe56b9e6SYuval Mintz {
909fe56b9e6SYuval Mintz u32 size = 0;
910fe56b9e6SYuval Mintz u32 i;
911fe56b9e6SYuval Mintz
912dbb799c3SYuval Mintz for_each_ilt_valid_client(i, ilt_clients)
913dbb799c3SYuval Mintz size += (ilt_clients[i].last.val - ilt_clients[i].first.val + 1);
914fe56b9e6SYuval Mintz
915fe56b9e6SYuval Mintz return size;
916fe56b9e6SYuval Mintz }
917fe56b9e6SYuval Mintz
qed_ilt_shadow_free(struct qed_hwfn * p_hwfn)918fe56b9e6SYuval Mintz static void qed_ilt_shadow_free(struct qed_hwfn *p_hwfn)
919fe56b9e6SYuval Mintz {
920fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli = p_hwfn->p_cxt_mngr->clients;
921fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
922fe56b9e6SYuval Mintz u32 ilt_size, i;
923fe56b9e6SYuval Mintz
924fe56b9e6SYuval Mintz ilt_size = qed_cxt_ilt_shadow_size(p_cli);
925fe56b9e6SYuval Mintz
926fe56b9e6SYuval Mintz for (i = 0; p_mngr->ilt_shadow && i < ilt_size; i++) {
9278a52bbabSMichal Kalderon struct phys_mem_desc *p_dma = &p_mngr->ilt_shadow[i];
928fe56b9e6SYuval Mintz
9298a52bbabSMichal Kalderon if (p_dma->virt_addr)
930fe56b9e6SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev,
9318a52bbabSMichal Kalderon p_dma->size, p_dma->virt_addr,
9328a52bbabSMichal Kalderon p_dma->phys_addr);
9338a52bbabSMichal Kalderon p_dma->virt_addr = NULL;
934fe56b9e6SYuval Mintz }
935fe56b9e6SYuval Mintz kfree(p_mngr->ilt_shadow);
936*b65d52acSDinghao Liu p_mngr->ilt_shadow = NULL;
937fe56b9e6SYuval Mintz }
938fe56b9e6SYuval Mintz
qed_ilt_blk_alloc(struct qed_hwfn * p_hwfn,struct qed_ilt_cli_blk * p_blk,enum ilt_clients ilt_client,u32 start_line_offset)939fe56b9e6SYuval Mintz static int qed_ilt_blk_alloc(struct qed_hwfn *p_hwfn,
940fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk,
941fe56b9e6SYuval Mintz enum ilt_clients ilt_client,
942fe56b9e6SYuval Mintz u32 start_line_offset)
943fe56b9e6SYuval Mintz {
9448a52bbabSMichal Kalderon struct phys_mem_desc *ilt_shadow = p_hwfn->p_cxt_mngr->ilt_shadow;
945dbb799c3SYuval Mintz u32 lines, line, sz_left, lines_to_skip = 0;
946dbb799c3SYuval Mintz
947dbb799c3SYuval Mintz /* Special handling for RoCE that supports dynamic allocation */
948c851a9dcSKalderon, Michal if (QED_IS_RDMA_PERSONALITY(p_hwfn) &&
949dbb799c3SYuval Mintz ((ilt_client == ILT_CLI_CDUT) || ilt_client == ILT_CLI_TSDM))
950dbb799c3SYuval Mintz return 0;
951dbb799c3SYuval Mintz
952dbb799c3SYuval Mintz lines_to_skip = p_blk->dynamic_line_cnt;
953fe56b9e6SYuval Mintz
954fe56b9e6SYuval Mintz if (!p_blk->total_size)
955fe56b9e6SYuval Mintz return 0;
956fe56b9e6SYuval Mintz
957fe56b9e6SYuval Mintz sz_left = p_blk->total_size;
958dbb799c3SYuval Mintz lines = DIV_ROUND_UP(sz_left, p_blk->real_size_in_page) - lines_to_skip;
959fe56b9e6SYuval Mintz line = p_blk->start_line + start_line_offset -
960dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line + lines_to_skip;
961fe56b9e6SYuval Mintz
962fe56b9e6SYuval Mintz for (; lines; lines--) {
963fe56b9e6SYuval Mintz dma_addr_t p_phys;
964fe56b9e6SYuval Mintz void *p_virt;
965fe56b9e6SYuval Mintz u32 size;
966fe56b9e6SYuval Mintz
9671a635e48SYuval Mintz size = min_t(u32, sz_left, p_blk->real_size_in_page);
968750afb08SLuis Chamberlain p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, size,
9695f58dff9SHimanshu Jha &p_phys, GFP_KERNEL);
970fe56b9e6SYuval Mintz if (!p_virt)
971fe56b9e6SYuval Mintz return -ENOMEM;
972fe56b9e6SYuval Mintz
9738a52bbabSMichal Kalderon ilt_shadow[line].phys_addr = p_phys;
9748a52bbabSMichal Kalderon ilt_shadow[line].virt_addr = p_virt;
975fe56b9e6SYuval Mintz ilt_shadow[line].size = size;
976fe56b9e6SYuval Mintz
977fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
978fe56b9e6SYuval Mintz "ILT shadow: Line [%d] Physical 0x%llx Virtual %p Size %d\n",
979fe56b9e6SYuval Mintz line, (u64)p_phys, p_virt, size);
980fe56b9e6SYuval Mintz
981fe56b9e6SYuval Mintz sz_left -= size;
982fe56b9e6SYuval Mintz line++;
983fe56b9e6SYuval Mintz }
984fe56b9e6SYuval Mintz
985fe56b9e6SYuval Mintz return 0;
986fe56b9e6SYuval Mintz }
987fe56b9e6SYuval Mintz
qed_ilt_shadow_alloc(struct qed_hwfn * p_hwfn)988fe56b9e6SYuval Mintz static int qed_ilt_shadow_alloc(struct qed_hwfn *p_hwfn)
989fe56b9e6SYuval Mintz {
990fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
991fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients = p_mngr->clients;
992fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk;
9931408cc1fSYuval Mintz u32 size, i, j, k;
994fe56b9e6SYuval Mintz int rc;
995fe56b9e6SYuval Mintz
996fe56b9e6SYuval Mintz size = qed_cxt_ilt_shadow_size(clients);
9978a52bbabSMichal Kalderon p_mngr->ilt_shadow = kcalloc(size, sizeof(struct phys_mem_desc),
998fe56b9e6SYuval Mintz GFP_KERNEL);
999fe56b9e6SYuval Mintz if (!p_mngr->ilt_shadow) {
1000fe56b9e6SYuval Mintz rc = -ENOMEM;
1001fe56b9e6SYuval Mintz goto ilt_shadow_fail;
1002fe56b9e6SYuval Mintz }
1003fe56b9e6SYuval Mintz
1004fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
1005fe56b9e6SYuval Mintz "Allocated 0x%x bytes for ilt shadow\n",
10068a52bbabSMichal Kalderon (u32)(size * sizeof(struct phys_mem_desc)));
1007fe56b9e6SYuval Mintz
1008fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) {
1009fe56b9e6SYuval Mintz for (j = 0; j < ILT_CLI_PF_BLOCKS; j++) {
1010fe56b9e6SYuval Mintz p_blk = &clients[i].pf_blks[j];
1011fe56b9e6SYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, 0);
10121a635e48SYuval Mintz if (rc)
1013fe56b9e6SYuval Mintz goto ilt_shadow_fail;
1014fe56b9e6SYuval Mintz }
10151408cc1fSYuval Mintz for (k = 0; k < p_mngr->vf_count; k++) {
10161408cc1fSYuval Mintz for (j = 0; j < ILT_CLI_VF_BLOCKS; j++) {
10171408cc1fSYuval Mintz u32 lines = clients[i].vf_total_lines * k;
10181408cc1fSYuval Mintz
10191408cc1fSYuval Mintz p_blk = &clients[i].vf_blks[j];
10201408cc1fSYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, lines);
10211a635e48SYuval Mintz if (rc)
10221408cc1fSYuval Mintz goto ilt_shadow_fail;
10231408cc1fSYuval Mintz }
10241408cc1fSYuval Mintz }
1025fe56b9e6SYuval Mintz }
1026fe56b9e6SYuval Mintz
1027fe56b9e6SYuval Mintz return 0;
1028fe56b9e6SYuval Mintz
1029fe56b9e6SYuval Mintz ilt_shadow_fail:
1030fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn);
1031fe56b9e6SYuval Mintz return rc;
1032fe56b9e6SYuval Mintz }
1033fe56b9e6SYuval Mintz
qed_cid_map_free(struct qed_hwfn * p_hwfn)1034fe56b9e6SYuval Mintz static void qed_cid_map_free(struct qed_hwfn *p_hwfn)
1035fe56b9e6SYuval Mintz {
1036fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
10376bea61daSMintz, Yuval u32 type, vf;
1038fe56b9e6SYuval Mintz
1039fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) {
10405e6c7ccdSChristophe JAILLET bitmap_free(p_mngr->acquired[type].cid_map);
1041fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count = 0;
1042fe56b9e6SYuval Mintz p_mngr->acquired[type].start_cid = 0;
10436bea61daSMintz, Yuval
10446bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) {
10455e6c7ccdSChristophe JAILLET bitmap_free(p_mngr->acquired_vf[type][vf].cid_map);
10466bea61daSMintz, Yuval p_mngr->acquired_vf[type][vf].max_count = 0;
10476bea61daSMintz, Yuval p_mngr->acquired_vf[type][vf].start_cid = 0;
1048fe56b9e6SYuval Mintz }
1049fe56b9e6SYuval Mintz }
10506bea61daSMintz, Yuval }
10516bea61daSMintz, Yuval
10526bea61daSMintz, Yuval static int
qed_cid_map_alloc_single(struct qed_hwfn * p_hwfn,u32 type,u32 cid_start,u32 cid_count,struct qed_cid_acquired_map * p_map)10536bea61daSMintz, Yuval qed_cid_map_alloc_single(struct qed_hwfn *p_hwfn,
10546bea61daSMintz, Yuval u32 type,
10556bea61daSMintz, Yuval u32 cid_start,
10566bea61daSMintz, Yuval u32 cid_count, struct qed_cid_acquired_map *p_map)
10576bea61daSMintz, Yuval {
10586bea61daSMintz, Yuval if (!cid_count)
10596bea61daSMintz, Yuval return 0;
10606bea61daSMintz, Yuval
10615e6c7ccdSChristophe JAILLET p_map->cid_map = bitmap_zalloc(cid_count, GFP_KERNEL);
10626bea61daSMintz, Yuval if (!p_map->cid_map)
10636bea61daSMintz, Yuval return -ENOMEM;
10646bea61daSMintz, Yuval
10656bea61daSMintz, Yuval p_map->max_count = cid_count;
10666bea61daSMintz, Yuval p_map->start_cid = cid_start;
10676bea61daSMintz, Yuval
10686bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT,
10696bea61daSMintz, Yuval "Type %08x start: %08x count %08x\n",
10706bea61daSMintz, Yuval type, p_map->start_cid, p_map->max_count);
10716bea61daSMintz, Yuval
10726bea61daSMintz, Yuval return 0;
10736bea61daSMintz, Yuval }
1074fe56b9e6SYuval Mintz
qed_cid_map_alloc(struct qed_hwfn * p_hwfn)1075fe56b9e6SYuval Mintz static int qed_cid_map_alloc(struct qed_hwfn *p_hwfn)
1076fe56b9e6SYuval Mintz {
1077fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
10786bea61daSMintz, Yuval u32 start_cid = 0, vf_start_cid = 0;
10796bea61daSMintz, Yuval u32 type, vf;
1080fe56b9e6SYuval Mintz
1081fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) {
10826bea61daSMintz, Yuval struct qed_conn_type_cfg *p_cfg = &p_mngr->conn_cfg[type];
10836bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map;
1084fe56b9e6SYuval Mintz
10856bea61daSMintz, Yuval /* Handle PF maps */
10866bea61daSMintz, Yuval p_map = &p_mngr->acquired[type];
10876bea61daSMintz, Yuval if (qed_cid_map_alloc_single(p_hwfn, type, start_cid,
10886bea61daSMintz, Yuval p_cfg->cid_count, p_map))
1089fe56b9e6SYuval Mintz goto cid_map_fail;
1090fe56b9e6SYuval Mintz
10916bea61daSMintz, Yuval /* Handle VF maps */
10926bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) {
10936bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vf];
10946bea61daSMintz, Yuval if (qed_cid_map_alloc_single(p_hwfn, type,
10956bea61daSMintz, Yuval vf_start_cid,
10966bea61daSMintz, Yuval p_cfg->cids_per_vf, p_map))
10976bea61daSMintz, Yuval goto cid_map_fail;
10986bea61daSMintz, Yuval }
1099fe56b9e6SYuval Mintz
11006bea61daSMintz, Yuval start_cid += p_cfg->cid_count;
11016bea61daSMintz, Yuval vf_start_cid += p_cfg->cids_per_vf;
1102fe56b9e6SYuval Mintz }
1103fe56b9e6SYuval Mintz
1104fe56b9e6SYuval Mintz return 0;
1105fe56b9e6SYuval Mintz
1106fe56b9e6SYuval Mintz cid_map_fail:
1107fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn);
1108fe56b9e6SYuval Mintz return -ENOMEM;
1109fe56b9e6SYuval Mintz }
1110fe56b9e6SYuval Mintz
qed_cxt_mngr_alloc(struct qed_hwfn * p_hwfn)1111fe56b9e6SYuval Mintz int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn)
1112fe56b9e6SYuval Mintz {
1113dbb799c3SYuval Mintz struct qed_ilt_client_cfg *clients;
1114fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr;
1115fe56b9e6SYuval Mintz u32 i;
1116fe56b9e6SYuval Mintz
111760fffb3bSYuval Mintz p_mngr = kzalloc(sizeof(*p_mngr), GFP_KERNEL);
11182591c280SJoe Perches if (!p_mngr)
1119fe56b9e6SYuval Mintz return -ENOMEM;
1120fe56b9e6SYuval Mintz
1121fe56b9e6SYuval Mintz /* Initialize ILT client registers */
1122dbb799c3SYuval Mintz clients = p_mngr->clients;
1123dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].first.reg = ILT_CFG_REG(CDUC, FIRST_ILT);
1124dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].last.reg = ILT_CFG_REG(CDUC, LAST_ILT);
1125dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].p_size.reg = ILT_CFG_REG(CDUC, P_SIZE);
1126fe56b9e6SYuval Mintz
1127dbb799c3SYuval Mintz clients[ILT_CLI_QM].first.reg = ILT_CFG_REG(QM, FIRST_ILT);
1128dbb799c3SYuval Mintz clients[ILT_CLI_QM].last.reg = ILT_CFG_REG(QM, LAST_ILT);
1129dbb799c3SYuval Mintz clients[ILT_CLI_QM].p_size.reg = ILT_CFG_REG(QM, P_SIZE);
1130fe56b9e6SYuval Mintz
1131dbb799c3SYuval Mintz clients[ILT_CLI_TM].first.reg = ILT_CFG_REG(TM, FIRST_ILT);
1132dbb799c3SYuval Mintz clients[ILT_CLI_TM].last.reg = ILT_CFG_REG(TM, LAST_ILT);
1133dbb799c3SYuval Mintz clients[ILT_CLI_TM].p_size.reg = ILT_CFG_REG(TM, P_SIZE);
1134dbb799c3SYuval Mintz
1135dbb799c3SYuval Mintz clients[ILT_CLI_SRC].first.reg = ILT_CFG_REG(SRC, FIRST_ILT);
1136dbb799c3SYuval Mintz clients[ILT_CLI_SRC].last.reg = ILT_CFG_REG(SRC, LAST_ILT);
1137dbb799c3SYuval Mintz clients[ILT_CLI_SRC].p_size.reg = ILT_CFG_REG(SRC, P_SIZE);
1138dbb799c3SYuval Mintz
1139dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].first.reg = ILT_CFG_REG(CDUT, FIRST_ILT);
1140dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].last.reg = ILT_CFG_REG(CDUT, LAST_ILT);
1141dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].p_size.reg = ILT_CFG_REG(CDUT, P_SIZE);
1142dbb799c3SYuval Mintz
1143dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].first.reg = ILT_CFG_REG(TSDM, FIRST_ILT);
1144dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].last.reg = ILT_CFG_REG(TSDM, LAST_ILT);
1145dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].p_size.reg = ILT_CFG_REG(TSDM, P_SIZE);
1146be086e7cSMintz, Yuval /* default ILT page size for all clients is 64K */
11478a52bbabSMichal Kalderon for (i = 0; i < MAX_ILT_CLIENTS; i++)
1148fe56b9e6SYuval Mintz p_mngr->clients[i].p_size.val = ILT_DEFAULT_HW_P_SIZE;
1149fe56b9e6SYuval Mintz
11508a52bbabSMichal Kalderon p_mngr->conn_ctx_size = CONN_CXT_SIZE(p_hwfn);
11518a52bbabSMichal Kalderon
1152dbb799c3SYuval Mintz /* Initialize task sizes */
1153dbb799c3SYuval Mintz p_mngr->task_type_size[0] = TYPE0_TASK_CXT_SIZE(p_hwfn);
1154dbb799c3SYuval Mintz p_mngr->task_type_size[1] = TYPE1_TASK_CXT_SIZE(p_hwfn);
1155dbb799c3SYuval Mintz
11568a52bbabSMichal Kalderon if (p_hwfn->cdev->p_iov_info) {
11571408cc1fSYuval Mintz p_mngr->vf_count = p_hwfn->cdev->p_iov_info->total_vfs;
11588a52bbabSMichal Kalderon p_mngr->first_vf_in_pf =
11598a52bbabSMichal Kalderon p_hwfn->cdev->p_iov_info->first_vf_in_pf;
11608a52bbabSMichal Kalderon }
1161dbb799c3SYuval Mintz /* Initialize the dynamic ILT allocation mutex */
1162dbb799c3SYuval Mintz mutex_init(&p_mngr->mutex);
11631408cc1fSYuval Mintz
1164fe56b9e6SYuval Mintz /* Set the cxt mangr pointer priori to further allocations */
1165fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = p_mngr;
1166fe56b9e6SYuval Mintz
1167fe56b9e6SYuval Mintz return 0;
1168fe56b9e6SYuval Mintz }
1169fe56b9e6SYuval Mintz
qed_cxt_tables_alloc(struct qed_hwfn * p_hwfn)1170fe56b9e6SYuval Mintz int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn)
1171fe56b9e6SYuval Mintz {
1172fe56b9e6SYuval Mintz int rc;
1173fe56b9e6SYuval Mintz
1174fe56b9e6SYuval Mintz /* Allocate the ILT shadow table */
1175fe56b9e6SYuval Mintz rc = qed_ilt_shadow_alloc(p_hwfn);
11762591c280SJoe Perches if (rc)
1177fe56b9e6SYuval Mintz goto tables_alloc_fail;
1178fe56b9e6SYuval Mintz
1179dbb799c3SYuval Mintz /* Allocate the T2 table */
1180dbb799c3SYuval Mintz rc = qed_cxt_src_t2_alloc(p_hwfn);
11812591c280SJoe Perches if (rc)
1182dbb799c3SYuval Mintz goto tables_alloc_fail;
1183dbb799c3SYuval Mintz
1184fe56b9e6SYuval Mintz /* Allocate and initialize the acquired cids bitmaps */
1185fe56b9e6SYuval Mintz rc = qed_cid_map_alloc(p_hwfn);
11862591c280SJoe Perches if (rc)
1187fe56b9e6SYuval Mintz goto tables_alloc_fail;
1188fe56b9e6SYuval Mintz
1189fe56b9e6SYuval Mintz return 0;
1190fe56b9e6SYuval Mintz
1191fe56b9e6SYuval Mintz tables_alloc_fail:
1192fe56b9e6SYuval Mintz qed_cxt_mngr_free(p_hwfn);
1193fe56b9e6SYuval Mintz return rc;
1194fe56b9e6SYuval Mintz }
1195fe56b9e6SYuval Mintz
qed_cxt_mngr_free(struct qed_hwfn * p_hwfn)1196fe56b9e6SYuval Mintz void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn)
1197fe56b9e6SYuval Mintz {
1198fe56b9e6SYuval Mintz if (!p_hwfn->p_cxt_mngr)
1199fe56b9e6SYuval Mintz return;
1200fe56b9e6SYuval Mintz
1201fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn);
1202dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn);
1203fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn);
1204fe56b9e6SYuval Mintz kfree(p_hwfn->p_cxt_mngr);
1205fe56b9e6SYuval Mintz
1206fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = NULL;
1207fe56b9e6SYuval Mintz }
1208fe56b9e6SYuval Mintz
qed_cxt_mngr_setup(struct qed_hwfn * p_hwfn)1209fe56b9e6SYuval Mintz void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn)
1210fe56b9e6SYuval Mintz {
1211fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
12126bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map;
12136bea61daSMintz, Yuval struct qed_conn_type_cfg *p_cfg;
1214fe56b9e6SYuval Mintz int type;
1215fe56b9e6SYuval Mintz
1216fe56b9e6SYuval Mintz /* Reset acquired cids */
1217fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) {
12186bea61daSMintz, Yuval u32 vf;
1219fe56b9e6SYuval Mintz
12206bea61daSMintz, Yuval p_cfg = &p_mngr->conn_cfg[type];
12216bea61daSMintz, Yuval if (p_cfg->cid_count) {
12226bea61daSMintz, Yuval p_map = &p_mngr->acquired[type];
12235e6c7ccdSChristophe JAILLET bitmap_zero(p_map->cid_map, p_map->max_count);
12246bea61daSMintz, Yuval }
12256bea61daSMintz, Yuval
12266bea61daSMintz, Yuval if (!p_cfg->cids_per_vf)
1227fe56b9e6SYuval Mintz continue;
1228fe56b9e6SYuval Mintz
12296bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) {
12306bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vf];
12315e6c7ccdSChristophe JAILLET bitmap_zero(p_map->cid_map, p_map->max_count);
12326bea61daSMintz, Yuval }
1233fe56b9e6SYuval Mintz }
1234fe56b9e6SYuval Mintz }
1235fe56b9e6SYuval Mintz
1236fe56b9e6SYuval Mintz /* CDU Common */
1237fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_SHIFT \
1238fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE_SHIFT
1239fe56b9e6SYuval Mintz
1240fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_MASK \
1241fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE >> CDUC_CXT_SIZE_SHIFT)
1242fe56b9e6SYuval Mintz
1243fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_SHIFT \
1244fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE_SHIFT
1245fe56b9e6SYuval Mintz
1246fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_MASK \
1247fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE >> CDUC_BLOCK_WASTE_SHIFT)
1248fe56b9e6SYuval Mintz
1249fe56b9e6SYuval Mintz #define CDUC_NCIB_SHIFT \
1250fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_NCIB_SHIFT
1251fe56b9e6SYuval Mintz
1252fe56b9e6SYuval Mintz #define CDUC_NCIB_MASK \
1253fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_NCIB >> CDUC_NCIB_SHIFT)
1254fe56b9e6SYuval Mintz
1255dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_SHIFT \
1256dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE_SHIFT
1257dbb799c3SYuval Mintz
1258dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_MASK \
1259dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE >> \
1260dbb799c3SYuval Mintz CDUT_TYPE0_CXT_SIZE_SHIFT)
1261dbb799c3SYuval Mintz
1262dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_SHIFT \
1263dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE_SHIFT
1264dbb799c3SYuval Mintz
1265dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_MASK \
1266dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE >> \
1267dbb799c3SYuval Mintz CDUT_TYPE0_BLOCK_WASTE_SHIFT)
1268dbb799c3SYuval Mintz
1269dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_SHIFT \
1270dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK_SHIFT
1271dbb799c3SYuval Mintz
1272dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_MASK \
1273dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK >> \
1274dbb799c3SYuval Mintz CDUT_TYPE0_NCIB_SHIFT)
1275dbb799c3SYuval Mintz
1276dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_SHIFT \
1277dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE_SHIFT
1278dbb799c3SYuval Mintz
1279dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_MASK \
1280dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE >> \
1281dbb799c3SYuval Mintz CDUT_TYPE1_CXT_SIZE_SHIFT)
1282dbb799c3SYuval Mintz
1283dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_SHIFT \
1284dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE_SHIFT
1285dbb799c3SYuval Mintz
1286dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_MASK \
1287dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE >> \
1288dbb799c3SYuval Mintz CDUT_TYPE1_BLOCK_WASTE_SHIFT)
1289dbb799c3SYuval Mintz
1290dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_SHIFT \
1291dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK_SHIFT
1292dbb799c3SYuval Mintz
1293dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_MASK \
1294dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK >> \
1295dbb799c3SYuval Mintz CDUT_TYPE1_NCIB_SHIFT)
1296dbb799c3SYuval Mintz
qed_cdu_init_common(struct qed_hwfn * p_hwfn)1297fe56b9e6SYuval Mintz static void qed_cdu_init_common(struct qed_hwfn *p_hwfn)
1298fe56b9e6SYuval Mintz {
1299fe56b9e6SYuval Mintz u32 page_sz, elems_per_page, block_waste, cxt_size, cdu_params = 0;
1300fe56b9e6SYuval Mintz
1301fe56b9e6SYuval Mintz /* CDUC - connection configuration */
1302fe56b9e6SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val;
1303fe56b9e6SYuval Mintz cxt_size = CONN_CXT_SIZE(p_hwfn);
1304fe56b9e6SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
1305fe56b9e6SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size;
1306fe56b9e6SYuval Mintz
1307fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_CXT_SIZE, cxt_size);
1308fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_BLOCK_WASTE, block_waste);
1309fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page);
1310fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_CID_ADDR_PARAMS_RT_OFFSET, cdu_params);
1311dbb799c3SYuval Mintz
1312dbb799c3SYuval Mintz /* CDUT - type-0 tasks configuration */
1313dbb799c3SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT].p_size.val;
1314dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[0];
1315dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
1316dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size;
1317dbb799c3SYuval Mintz
1318dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */
1319dbb799c3SYuval Mintz cdu_params = 0;
1320dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_CXT_SIZE, (cxt_size >> 3));
1321dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_BLOCK_WASTE, (block_waste >> 3));
1322dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_NCIB, elems_per_page);
1323dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT0_PARAMS_RT_OFFSET, cdu_params);
1324dbb799c3SYuval Mintz
1325dbb799c3SYuval Mintz /* CDUT - type-1 tasks configuration */
1326dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[1];
1327dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
1328dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size;
1329dbb799c3SYuval Mintz
1330dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */
1331dbb799c3SYuval Mintz cdu_params = 0;
1332dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_CXT_SIZE, (cxt_size >> 3));
1333dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_BLOCK_WASTE, (block_waste >> 3));
1334dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_NCIB, elems_per_page);
1335dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT1_PARAMS_RT_OFFSET, cdu_params);
1336dbb799c3SYuval Mintz }
1337dbb799c3SYuval Mintz
1338dbb799c3SYuval Mintz /* CDU PF */
1339dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_SHIFT CDU_SEG_TYPE_OFFSET_REG_TYPE_SHIFT
1340dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_MASK 0x1
1341dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_SHIFT 0
1342dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_MASK CDU_SEG_TYPE_OFFSET_REG_OFFSET_MASK
1343dbb799c3SYuval Mintz
qed_cdu_init_pf(struct qed_hwfn * p_hwfn)1344dbb799c3SYuval Mintz static void qed_cdu_init_pf(struct qed_hwfn *p_hwfn)
1345dbb799c3SYuval Mintz {
1346dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
1347dbb799c3SYuval Mintz struct qed_tid_seg *p_seg;
1348dbb799c3SYuval Mintz u32 cdu_seg_params, offset;
1349dbb799c3SYuval Mintz int i;
1350dbb799c3SYuval Mintz
1351dbb799c3SYuval Mintz static const u32 rt_type_offset_arr[] = {
1352dbb799c3SYuval Mintz CDU_REG_PF_SEG0_TYPE_OFFSET_RT_OFFSET,
1353dbb799c3SYuval Mintz CDU_REG_PF_SEG1_TYPE_OFFSET_RT_OFFSET,
1354dbb799c3SYuval Mintz CDU_REG_PF_SEG2_TYPE_OFFSET_RT_OFFSET,
1355dbb799c3SYuval Mintz CDU_REG_PF_SEG3_TYPE_OFFSET_RT_OFFSET
1356dbb799c3SYuval Mintz };
1357dbb799c3SYuval Mintz
1358dbb799c3SYuval Mintz static const u32 rt_type_offset_fl_arr[] = {
1359dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG0_TYPE_OFFSET_RT_OFFSET,
1360dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG1_TYPE_OFFSET_RT_OFFSET,
1361dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG2_TYPE_OFFSET_RT_OFFSET,
1362dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG3_TYPE_OFFSET_RT_OFFSET
1363dbb799c3SYuval Mintz };
1364dbb799c3SYuval Mintz
1365dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
1366dbb799c3SYuval Mintz
1367dbb799c3SYuval Mintz /* There are initializations only for CDUT during pf Phase */
1368dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
1369dbb799c3SYuval Mintz /* Segment 0 */
1370dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i);
1371dbb799c3SYuval Mintz if (!p_seg)
1372dbb799c3SYuval Mintz continue;
1373dbb799c3SYuval Mintz
1374dbb799c3SYuval Mintz /* Note: start_line is already adjusted for the CDU
1375dbb799c3SYuval Mintz * segment register granularity, so we just need to
1376dbb799c3SYuval Mintz * divide. Adjustment is implicit as we assume ILT
1377dbb799c3SYuval Mintz * Page size is larger than 32K!
1378dbb799c3SYuval Mintz */
1379dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) *
1380dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line -
1381dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES;
1382dbb799c3SYuval Mintz
1383dbb799c3SYuval Mintz cdu_seg_params = 0;
1384dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type);
1385dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset);
1386dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_arr[i], cdu_seg_params);
1387dbb799c3SYuval Mintz
1388dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) *
1389dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)].start_line -
1390dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES;
1391dbb799c3SYuval Mintz
1392dbb799c3SYuval Mintz cdu_seg_params = 0;
1393dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type);
1394dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset);
1395dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_fl_arr[i], cdu_seg_params);
1396dbb799c3SYuval Mintz }
1397fe56b9e6SYuval Mintz }
1398fe56b9e6SYuval Mintz
qed_qm_init_pf(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,bool is_pf_loading)1399da090917STomer Tayar void qed_qm_init_pf(struct qed_hwfn *p_hwfn,
1400da090917STomer Tayar struct qed_ptt *p_ptt, bool is_pf_loading)
1401fe56b9e6SYuval Mintz {
1402fe56b9e6SYuval Mintz struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1403da090917STomer Tayar struct qed_qm_pf_rt_init_params params;
1404fe56b9e6SYuval Mintz struct qed_qm_iids iids;
1405fe56b9e6SYuval Mintz
1406fe56b9e6SYuval Mintz memset(&iids, 0, sizeof(iids));
1407fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &iids);
1408fe56b9e6SYuval Mintz
1409fe56b9e6SYuval Mintz memset(¶ms, 0, sizeof(params));
1410fe56b9e6SYuval Mintz params.port_id = p_hwfn->port_id;
1411fe56b9e6SYuval Mintz params.pf_id = p_hwfn->rel_pf_id;
1412fe56b9e6SYuval Mintz params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port;
1413da090917STomer Tayar params.is_pf_loading = is_pf_loading;
1414fe56b9e6SYuval Mintz params.num_pf_cids = iids.cids;
14151408cc1fSYuval Mintz params.num_vf_cids = iids.vf_cids;
1416c9f0523bSMintz, Yuval params.num_tids = iids.tids;
1417fe56b9e6SYuval Mintz params.start_pq = qm_info->start_pq;
14181408cc1fSYuval Mintz params.num_pf_pqs = qm_info->num_pqs - qm_info->num_vf_pqs;
14191408cc1fSYuval Mintz params.num_vf_pqs = qm_info->num_vf_pqs;
1420fc48b7a6SYuval Mintz params.start_vport = qm_info->start_vport;
1421fc48b7a6SYuval Mintz params.num_vports = qm_info->num_vports;
1422fe56b9e6SYuval Mintz params.pf_wfq = qm_info->pf_wfq;
1423fe56b9e6SYuval Mintz params.pf_rl = qm_info->pf_rl;
1424fe56b9e6SYuval Mintz params.pq_params = qm_info->qm_pq_params;
1425fe56b9e6SYuval Mintz params.vport_params = qm_info->qm_vport_params;
1426fe56b9e6SYuval Mintz
142715582962SRahul Verma qed_qm_pf_rt_init(p_hwfn, p_ptt, ¶ms);
1428fe56b9e6SYuval Mintz }
1429fe56b9e6SYuval Mintz
1430fe56b9e6SYuval Mintz /* CM PF */
qed_cm_init_pf(struct qed_hwfn * p_hwfn)1431bf774d14SYueHaibing static void qed_cm_init_pf(struct qed_hwfn *p_hwfn)
1432fe56b9e6SYuval Mintz {
1433fe56b9e6SYuval Mintz /* XCM pure-LB queue */
1434b5a9ee7cSAriel Elior STORE_RT_REG(p_hwfn, XCM_REG_CON_PHY_Q3_RT_OFFSET,
1435b5a9ee7cSAriel Elior qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB));
1436fe56b9e6SYuval Mintz }
1437fe56b9e6SYuval Mintz
1438fe56b9e6SYuval Mintz /* DQ PF */
qed_dq_init_pf(struct qed_hwfn * p_hwfn)1439fe56b9e6SYuval Mintz static void qed_dq_init_pf(struct qed_hwfn *p_hwfn)
1440fe56b9e6SYuval Mintz {
1441fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
14421408cc1fSYuval Mintz u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0;
1443fe56b9e6SYuval Mintz
1444fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[0].cid_count >> DQ_RANGE_SHIFT);
1445fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_0_RT_OFFSET, dq_pf_max_cid);
1446fe56b9e6SYuval Mintz
14471408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[0].cids_per_vf >> DQ_RANGE_SHIFT);
14481408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_0_RT_OFFSET, dq_vf_max_cid);
14491408cc1fSYuval Mintz
1450fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[1].cid_count >> DQ_RANGE_SHIFT);
1451fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_1_RT_OFFSET, dq_pf_max_cid);
1452fe56b9e6SYuval Mintz
14531408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[1].cids_per_vf >> DQ_RANGE_SHIFT);
14541408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_1_RT_OFFSET, dq_vf_max_cid);
14551408cc1fSYuval Mintz
1456fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[2].cid_count >> DQ_RANGE_SHIFT);
1457fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_2_RT_OFFSET, dq_pf_max_cid);
1458fe56b9e6SYuval Mintz
14591408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[2].cids_per_vf >> DQ_RANGE_SHIFT);
14601408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_2_RT_OFFSET, dq_vf_max_cid);
14611408cc1fSYuval Mintz
1462fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[3].cid_count >> DQ_RANGE_SHIFT);
1463fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_3_RT_OFFSET, dq_pf_max_cid);
1464fe56b9e6SYuval Mintz
14651408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[3].cids_per_vf >> DQ_RANGE_SHIFT);
14661408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_3_RT_OFFSET, dq_vf_max_cid);
14671408cc1fSYuval Mintz
1468fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[4].cid_count >> DQ_RANGE_SHIFT);
1469fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_4_RT_OFFSET, dq_pf_max_cid);
1470fe56b9e6SYuval Mintz
14711408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[4].cids_per_vf >> DQ_RANGE_SHIFT);
14721408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_4_RT_OFFSET, dq_vf_max_cid);
14731408cc1fSYuval Mintz
1474fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[5].cid_count >> DQ_RANGE_SHIFT);
1475fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_5_RT_OFFSET, dq_pf_max_cid);
14761408cc1fSYuval Mintz
14771408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[5].cids_per_vf >> DQ_RANGE_SHIFT);
14781408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_5_RT_OFFSET, dq_vf_max_cid);
14791408cc1fSYuval Mintz
14801408cc1fSYuval Mintz /* Connection types 6 & 7 are not in use, yet they must be configured
14811408cc1fSYuval Mintz * as the highest possible connection. Not configuring them means the
14821408cc1fSYuval Mintz * defaults will be used, and with a large number of cids a bug may
14831408cc1fSYuval Mintz * occur, if the defaults will be smaller than dq_pf_max_cid /
14841408cc1fSYuval Mintz * dq_vf_max_cid.
14851408cc1fSYuval Mintz */
14861408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_6_RT_OFFSET, dq_pf_max_cid);
14871408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_6_RT_OFFSET, dq_vf_max_cid);
14881408cc1fSYuval Mintz
14891408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_7_RT_OFFSET, dq_pf_max_cid);
14901408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_7_RT_OFFSET, dq_vf_max_cid);
1491fe56b9e6SYuval Mintz }
1492fe56b9e6SYuval Mintz
qed_ilt_bounds_init(struct qed_hwfn * p_hwfn)1493fe56b9e6SYuval Mintz static void qed_ilt_bounds_init(struct qed_hwfn *p_hwfn)
1494fe56b9e6SYuval Mintz {
1495fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *ilt_clients;
1496fe56b9e6SYuval Mintz int i;
1497fe56b9e6SYuval Mintz
1498fe56b9e6SYuval Mintz ilt_clients = p_hwfn->p_cxt_mngr->clients;
1499fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, ilt_clients) {
1500fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn,
1501fe56b9e6SYuval Mintz ilt_clients[i].first.reg,
1502fe56b9e6SYuval Mintz ilt_clients[i].first.val);
1503fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn,
1504dbb799c3SYuval Mintz ilt_clients[i].last.reg, ilt_clients[i].last.val);
1505fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn,
1506fe56b9e6SYuval Mintz ilt_clients[i].p_size.reg,
1507fe56b9e6SYuval Mintz ilt_clients[i].p_size.val);
1508fe56b9e6SYuval Mintz }
1509fe56b9e6SYuval Mintz }
1510fe56b9e6SYuval Mintz
qed_ilt_vf_bounds_init(struct qed_hwfn * p_hwfn)15111408cc1fSYuval Mintz static void qed_ilt_vf_bounds_init(struct qed_hwfn *p_hwfn)
15121408cc1fSYuval Mintz {
15131408cc1fSYuval Mintz struct qed_ilt_client_cfg *p_cli;
15141408cc1fSYuval Mintz u32 blk_factor;
15151408cc1fSYuval Mintz
15161408cc1fSYuval Mintz /* For simplicty we set the 'block' to be an ILT page */
15171408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) {
15181408cc1fSYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
15191408cc1fSYuval Mintz
15201408cc1fSYuval Mintz STORE_RT_REG(p_hwfn,
15211408cc1fSYuval Mintz PSWRQ2_REG_VF_BASE_RT_OFFSET,
15221408cc1fSYuval Mintz p_iov->first_vf_in_pf);
15231408cc1fSYuval Mintz STORE_RT_REG(p_hwfn,
15241408cc1fSYuval Mintz PSWRQ2_REG_VF_LAST_ILT_RT_OFFSET,
15251408cc1fSYuval Mintz p_iov->first_vf_in_pf + p_iov->total_vfs);
15261408cc1fSYuval Mintz }
15271408cc1fSYuval Mintz
15281408cc1fSYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC];
15291408cc1fSYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
15301408cc1fSYuval Mintz if (p_cli->active) {
15311408cc1fSYuval Mintz STORE_RT_REG(p_hwfn,
15321408cc1fSYuval Mintz PSWRQ2_REG_CDUC_BLOCKS_FACTOR_RT_OFFSET,
15331408cc1fSYuval Mintz blk_factor);
15341408cc1fSYuval Mintz STORE_RT_REG(p_hwfn,
15351408cc1fSYuval Mintz PSWRQ2_REG_CDUC_NUMBER_OF_PF_BLOCKS_RT_OFFSET,
15361408cc1fSYuval Mintz p_cli->pf_total_lines);
15371408cc1fSYuval Mintz STORE_RT_REG(p_hwfn,
15381408cc1fSYuval Mintz PSWRQ2_REG_CDUC_VF_BLOCKS_RT_OFFSET,
15391408cc1fSYuval Mintz p_cli->vf_total_lines);
15401408cc1fSYuval Mintz }
1541dbb799c3SYuval Mintz
1542dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
1543dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
1544dbb799c3SYuval Mintz if (p_cli->active) {
1545dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1546dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_BLOCKS_FACTOR_RT_OFFSET,
1547dbb799c3SYuval Mintz blk_factor);
1548dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1549dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_NUMBER_OF_PF_BLOCKS_RT_OFFSET,
1550dbb799c3SYuval Mintz p_cli->pf_total_lines);
1551dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1552dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_VF_BLOCKS_RT_OFFSET,
1553dbb799c3SYuval Mintz p_cli->vf_total_lines);
1554dbb799c3SYuval Mintz }
1555dbb799c3SYuval Mintz
1556dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TM];
1557dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
1558dbb799c3SYuval Mintz if (p_cli->active) {
1559dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1560dbb799c3SYuval Mintz PSWRQ2_REG_TM_BLOCKS_FACTOR_RT_OFFSET, blk_factor);
1561dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1562dbb799c3SYuval Mintz PSWRQ2_REG_TM_NUMBER_OF_PF_BLOCKS_RT_OFFSET,
1563dbb799c3SYuval Mintz p_cli->pf_total_lines);
1564dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn,
1565dbb799c3SYuval Mintz PSWRQ2_REG_TM_VF_BLOCKS_RT_OFFSET,
1566dbb799c3SYuval Mintz p_cli->vf_total_lines);
1567dbb799c3SYuval Mintz }
15681408cc1fSYuval Mintz }
15691408cc1fSYuval Mintz
1570fe56b9e6SYuval Mintz /* ILT (PSWRQ2) PF */
qed_ilt_init_pf(struct qed_hwfn * p_hwfn)1571fe56b9e6SYuval Mintz static void qed_ilt_init_pf(struct qed_hwfn *p_hwfn)
1572fe56b9e6SYuval Mintz {
1573fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients;
1574fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr;
15758a52bbabSMichal Kalderon struct phys_mem_desc *p_shdw;
1576fe56b9e6SYuval Mintz u32 line, rt_offst, i;
1577fe56b9e6SYuval Mintz
1578fe56b9e6SYuval Mintz qed_ilt_bounds_init(p_hwfn);
15791408cc1fSYuval Mintz qed_ilt_vf_bounds_init(p_hwfn);
1580fe56b9e6SYuval Mintz
1581fe56b9e6SYuval Mintz p_mngr = p_hwfn->p_cxt_mngr;
1582fe56b9e6SYuval Mintz p_shdw = p_mngr->ilt_shadow;
1583fe56b9e6SYuval Mintz clients = p_hwfn->p_cxt_mngr->clients;
1584fe56b9e6SYuval Mintz
1585fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) {
1586fe56b9e6SYuval Mintz /** Client's 1st val and RT array are absolute, ILT shadows'
1587fe56b9e6SYuval Mintz * lines are relative.
1588fe56b9e6SYuval Mintz */
1589fe56b9e6SYuval Mintz line = clients[i].first.val - p_mngr->pf_start_line;
1590fe56b9e6SYuval Mintz rt_offst = PSWRQ2_REG_ILT_MEMORY_RT_OFFSET +
1591fe56b9e6SYuval Mintz clients[i].first.val * ILT_ENTRY_IN_REGS;
1592fe56b9e6SYuval Mintz
1593fe56b9e6SYuval Mintz for (; line <= clients[i].last.val - p_mngr->pf_start_line;
1594fe56b9e6SYuval Mintz line++, rt_offst += ILT_ENTRY_IN_REGS) {
1595fe56b9e6SYuval Mintz u64 ilt_hw_entry = 0;
1596fe56b9e6SYuval Mintz
1597fe56b9e6SYuval Mintz /** p_virt could be NULL incase of dynamic
1598fe56b9e6SYuval Mintz * allocation
1599fe56b9e6SYuval Mintz */
16008a52bbabSMichal Kalderon if (p_shdw[line].virt_addr) {
1601fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL);
1602fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_PHY_ADDR,
16038a52bbabSMichal Kalderon (p_shdw[line].phys_addr >> 12));
1604fe56b9e6SYuval Mintz
1605fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT,
1606fe56b9e6SYuval Mintz "Setting RT[0x%08x] from ILT[0x%08x] [Client is %d] to Physical addr: 0x%llx\n",
1607fe56b9e6SYuval Mintz rt_offst, line, i,
16088a52bbabSMichal Kalderon (u64)(p_shdw[line].phys_addr >> 12));
1609fe56b9e6SYuval Mintz }
1610fe56b9e6SYuval Mintz
1611fe56b9e6SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_offst, ilt_hw_entry);
1612fe56b9e6SYuval Mintz }
1613fe56b9e6SYuval Mintz }
1614fe56b9e6SYuval Mintz }
1615fe56b9e6SYuval Mintz
1616dbb799c3SYuval Mintz /* SRC (Searcher) PF */
qed_src_init_pf(struct qed_hwfn * p_hwfn)1617dbb799c3SYuval Mintz static void qed_src_init_pf(struct qed_hwfn *p_hwfn)
1618dbb799c3SYuval Mintz {
1619dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
1620dbb799c3SYuval Mintz u32 rounded_conn_num, conn_num, conn_max;
1621dbb799c3SYuval Mintz struct qed_src_iids src_iids;
1622dbb799c3SYuval Mintz
1623dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids));
1624dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids);
1625dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count;
1626dbb799c3SYuval Mintz if (!conn_num)
1627dbb799c3SYuval Mintz return;
1628dbb799c3SYuval Mintz
1629dbb799c3SYuval Mintz conn_max = max_t(u32, conn_num, SRC_MIN_NUM_ELEMS);
1630dbb799c3SYuval Mintz rounded_conn_num = roundup_pow_of_two(conn_max);
1631dbb799c3SYuval Mintz
1632dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_COUNTFREE_RT_OFFSET, conn_num);
1633dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_NUMBER_HASH_BITS_RT_OFFSET,
1634dbb799c3SYuval Mintz ilog2(rounded_conn_num));
1635dbb799c3SYuval Mintz
1636dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_FIRSTFREE_RT_OFFSET,
163793be5261SDmitry Bogdanov p_hwfn->p_cxt_mngr->src_t2.first_free);
1638dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_LASTFREE_RT_OFFSET,
163993be5261SDmitry Bogdanov p_hwfn->p_cxt_mngr->src_t2.last_free);
1640dbb799c3SYuval Mintz }
1641dbb799c3SYuval Mintz
1642dbb799c3SYuval Mintz /* Timers PF */
1643dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_SHIFT 0
1644dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_MASK 0xFFFFULL
1645dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_SHIFT 16
1646dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_MASK 0x1FFULL
1647dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_SHIFT 25
1648dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_MASK 0x7ULL
1649dbb799c3SYuval Mintz
1650dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_SHIFT 30
1651dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_MASK 0x1FFULL
1652dbb799c3SYuval Mintz
1653dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_SHIFT 30
1654dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_MASK 0x7FFFFULL
1655dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_SHIFT 49
1656dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_MASK 0x1FFULL
1657dbb799c3SYuval Mintz
qed_tm_init_pf(struct qed_hwfn * p_hwfn)1658dbb799c3SYuval Mintz static void qed_tm_init_pf(struct qed_hwfn *p_hwfn)
1659dbb799c3SYuval Mintz {
1660dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
1661dbb799c3SYuval Mintz u32 active_seg_mask = 0, tm_offset, rt_reg;
1662dbb799c3SYuval Mintz struct qed_tm_iids tm_iids;
1663dbb799c3SYuval Mintz u64 cfg_word;
1664dbb799c3SYuval Mintz u8 i;
1665dbb799c3SYuval Mintz
1666dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids));
166744531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids);
1668dbb799c3SYuval Mintz
1669dbb799c3SYuval Mintz /* @@@TBD No pre-scan for now */
1670dbb799c3SYuval Mintz
1671dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */
1672dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) {
1673dbb799c3SYuval Mintz cfg_word = 0;
1674dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_cids);
1675dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0);
1676dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id);
1677dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0);
1678dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET +
1679dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) *
1680dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i);
1681dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word);
1682dbb799c3SYuval Mintz }
1683dbb799c3SYuval Mintz
1684dbb799c3SYuval Mintz cfg_word = 0;
1685dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_cids);
1686dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0);
1687dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); /* n/a for PF */
1688dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0); /* scan all */
1689dbb799c3SYuval Mintz
1690dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET +
1691dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) *
1692dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) + p_hwfn->rel_pf_id);
1693dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word);
1694dbb799c3SYuval Mintz
1695dbb799c3SYuval Mintz /* enale scan */
1696dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_CONN_RT_OFFSET,
1697dbb799c3SYuval Mintz tm_iids.pf_cids ? 0x1 : 0x0);
1698dbb799c3SYuval Mintz
1699dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */
1700dbb799c3SYuval Mintz
1701dbb799c3SYuval Mintz tm_offset = tm_iids.per_vf_cids;
1702dbb799c3SYuval Mintz
1703dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */
1704dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) {
1705dbb799c3SYuval Mintz cfg_word = 0;
1706dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_tids);
1707dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0);
1708dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id);
1709dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset);
1710dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0);
1711dbb799c3SYuval Mintz
1712dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET +
1713dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) *
1714dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i);
1715dbb799c3SYuval Mintz
1716dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word);
1717dbb799c3SYuval Mintz }
1718dbb799c3SYuval Mintz
1719dbb799c3SYuval Mintz tm_offset = tm_iids.pf_cids;
1720dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
1721dbb799c3SYuval Mintz cfg_word = 0;
1722dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_tids[i]);
1723dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0);
1724dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0);
1725dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset);
1726dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0);
1727dbb799c3SYuval Mintz
1728dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET +
1729dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) *
1730dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) +
1731dbb799c3SYuval Mintz p_hwfn->rel_pf_id * NUM_TASK_PF_SEGMENTS + i);
1732dbb799c3SYuval Mintz
1733dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word);
17341a635e48SYuval Mintz active_seg_mask |= (tm_iids.pf_tids[i] ? BIT(i) : 0);
1735dbb799c3SYuval Mintz
1736dbb799c3SYuval Mintz tm_offset += tm_iids.pf_tids[i];
1737dbb799c3SYuval Mintz }
1738dbb799c3SYuval Mintz
1739c851a9dcSKalderon, Michal if (QED_IS_RDMA_PERSONALITY(p_hwfn))
1740dbb799c3SYuval Mintz active_seg_mask = 0;
1741dbb799c3SYuval Mintz
1742dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_TASK_RT_OFFSET, active_seg_mask);
1743dbb799c3SYuval Mintz
1744dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */
1745dbb799c3SYuval Mintz }
1746dbb799c3SYuval Mintz
qed_prs_init_common(struct qed_hwfn * p_hwfn)17471e128c81SArun Easi static void qed_prs_init_common(struct qed_hwfn *p_hwfn)
17481e128c81SArun Easi {
17491e128c81SArun Easi if ((p_hwfn->hw_info.personality == QED_PCI_FCOE) &&
17501e128c81SArun Easi p_hwfn->pf_params.fcoe_pf_params.is_target)
17511e128c81SArun Easi STORE_RT_REG(p_hwfn,
17521e128c81SArun Easi PRS_REG_SEARCH_RESP_INITIATOR_TYPE_RT_OFFSET, 0);
17531e128c81SArun Easi }
17541e128c81SArun Easi
qed_prs_init_pf(struct qed_hwfn * p_hwfn)17551e128c81SArun Easi static void qed_prs_init_pf(struct qed_hwfn *p_hwfn)
17561e128c81SArun Easi {
17571e128c81SArun Easi struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
17581e128c81SArun Easi struct qed_conn_type_cfg *p_fcoe;
17591e128c81SArun Easi struct qed_tid_seg *p_tid;
17601e128c81SArun Easi
17611e128c81SArun Easi p_fcoe = &p_mngr->conn_cfg[PROTOCOLID_FCOE];
17621e128c81SArun Easi
17631e128c81SArun Easi /* If FCoE is active set the MAX OX_ID (tid) in the Parser */
17641e128c81SArun Easi if (!p_fcoe->cid_count)
17651e128c81SArun Easi return;
17661e128c81SArun Easi
17671e128c81SArun Easi p_tid = &p_fcoe->tid_seg[QED_CXT_FCOE_TID_SEG];
17681e128c81SArun Easi if (p_hwfn->pf_params.fcoe_pf_params.is_target) {
17691e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn,
17701e128c81SArun Easi PRS_REG_TASK_ID_MAX_TARGET_PF_RT_OFFSET,
17711e128c81SArun Easi p_tid->count);
17721e128c81SArun Easi } else {
17731e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn,
17741e128c81SArun Easi PRS_REG_TASK_ID_MAX_INITIATOR_PF_RT_OFFSET,
17751e128c81SArun Easi p_tid->count);
17761e128c81SArun Easi }
17771e128c81SArun Easi }
17781e128c81SArun Easi
qed_cxt_hw_init_common(struct qed_hwfn * p_hwfn)1779fe56b9e6SYuval Mintz void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn)
1780fe56b9e6SYuval Mintz {
1781fe56b9e6SYuval Mintz qed_cdu_init_common(p_hwfn);
17821e128c81SArun Easi qed_prs_init_common(p_hwfn);
1783fe56b9e6SYuval Mintz }
1784fe56b9e6SYuval Mintz
qed_cxt_hw_init_pf(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt)178515582962SRahul Verma void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1786fe56b9e6SYuval Mintz {
1787da090917STomer Tayar qed_qm_init_pf(p_hwfn, p_ptt, true);
1788fe56b9e6SYuval Mintz qed_cm_init_pf(p_hwfn);
1789fe56b9e6SYuval Mintz qed_dq_init_pf(p_hwfn);
1790dbb799c3SYuval Mintz qed_cdu_init_pf(p_hwfn);
1791fe56b9e6SYuval Mintz qed_ilt_init_pf(p_hwfn);
1792dbb799c3SYuval Mintz qed_src_init_pf(p_hwfn);
1793dbb799c3SYuval Mintz qed_tm_init_pf(p_hwfn);
17941e128c81SArun Easi qed_prs_init_pf(p_hwfn);
1795fe56b9e6SYuval Mintz }
1796fe56b9e6SYuval Mintz
_qed_cxt_acquire_cid(struct qed_hwfn * p_hwfn,enum protocol_type type,u32 * p_cid,u8 vfid)17976bea61daSMintz, Yuval int _qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
17986bea61daSMintz, Yuval enum protocol_type type, u32 *p_cid, u8 vfid)
1799fe56b9e6SYuval Mintz {
1800fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
18016bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map;
1802fe56b9e6SYuval Mintz u32 rel_cid;
1803fe56b9e6SYuval Mintz
18046bea61daSMintz, Yuval if (type >= MAX_CONN_TYPES) {
1805fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Invalid protocol type %d", type);
1806fe56b9e6SYuval Mintz return -EINVAL;
1807fe56b9e6SYuval Mintz }
1808fe56b9e6SYuval Mintz
18096bea61daSMintz, Yuval if (vfid >= MAX_NUM_VFS && vfid != QED_CXT_PF_CID) {
18106bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "VF [%02x] is out of range\n", vfid);
18116bea61daSMintz, Yuval return -EINVAL;
18126bea61daSMintz, Yuval }
1813fe56b9e6SYuval Mintz
18146bea61daSMintz, Yuval /* Determine the right map to take this CID from */
18156bea61daSMintz, Yuval if (vfid == QED_CXT_PF_CID)
18166bea61daSMintz, Yuval p_map = &p_mngr->acquired[type];
18176bea61daSMintz, Yuval else
18186bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vfid];
18196bea61daSMintz, Yuval
18206bea61daSMintz, Yuval if (!p_map->cid_map) {
18216bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "Invalid protocol type %d", type);
18226bea61daSMintz, Yuval return -EINVAL;
18236bea61daSMintz, Yuval }
18246bea61daSMintz, Yuval
18256bea61daSMintz, Yuval rel_cid = find_first_zero_bit(p_map->cid_map, p_map->max_count);
18266bea61daSMintz, Yuval
18276bea61daSMintz, Yuval if (rel_cid >= p_map->max_count) {
18281a635e48SYuval Mintz DP_NOTICE(p_hwfn, "no CID available for protocol %d\n", type);
1829fe56b9e6SYuval Mintz return -EINVAL;
1830fe56b9e6SYuval Mintz }
1831fe56b9e6SYuval Mintz
18326bea61daSMintz, Yuval __set_bit(rel_cid, p_map->cid_map);
1833fe56b9e6SYuval Mintz
18346bea61daSMintz, Yuval *p_cid = rel_cid + p_map->start_cid;
18356bea61daSMintz, Yuval
18366bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT,
18376bea61daSMintz, Yuval "Acquired cid 0x%08x [rel. %08x] vfid %02x type %d\n",
18386bea61daSMintz, Yuval *p_cid, rel_cid, vfid, type);
1839fe56b9e6SYuval Mintz
1840fe56b9e6SYuval Mintz return 0;
1841fe56b9e6SYuval Mintz }
1842fe56b9e6SYuval Mintz
qed_cxt_acquire_cid(struct qed_hwfn * p_hwfn,enum protocol_type type,u32 * p_cid)18436bea61daSMintz, Yuval int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
18446bea61daSMintz, Yuval enum protocol_type type, u32 *p_cid)
18456bea61daSMintz, Yuval {
18466bea61daSMintz, Yuval return _qed_cxt_acquire_cid(p_hwfn, type, p_cid, QED_CXT_PF_CID);
18476bea61daSMintz, Yuval }
18486bea61daSMintz, Yuval
qed_cxt_test_cid_acquired(struct qed_hwfn * p_hwfn,u32 cid,u8 vfid,enum protocol_type * p_type,struct qed_cid_acquired_map ** pp_map)1849fe56b9e6SYuval Mintz static bool qed_cxt_test_cid_acquired(struct qed_hwfn *p_hwfn,
18506bea61daSMintz, Yuval u32 cid,
18516bea61daSMintz, Yuval u8 vfid,
18526bea61daSMintz, Yuval enum protocol_type *p_type,
18536bea61daSMintz, Yuval struct qed_cid_acquired_map **pp_map)
1854fe56b9e6SYuval Mintz {
1855fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
1856fe56b9e6SYuval Mintz u32 rel_cid;
1857fe56b9e6SYuval Mintz
1858fe56b9e6SYuval Mintz /* Iterate over protocols and find matching cid range */
18596bea61daSMintz, Yuval for (*p_type = 0; *p_type < MAX_CONN_TYPES; (*p_type)++) {
18606bea61daSMintz, Yuval if (vfid == QED_CXT_PF_CID)
18616bea61daSMintz, Yuval *pp_map = &p_mngr->acquired[*p_type];
18626bea61daSMintz, Yuval else
18636bea61daSMintz, Yuval *pp_map = &p_mngr->acquired_vf[*p_type][vfid];
1864fe56b9e6SYuval Mintz
18656bea61daSMintz, Yuval if (!((*pp_map)->cid_map))
1866fe56b9e6SYuval Mintz continue;
18676bea61daSMintz, Yuval if (cid >= (*pp_map)->start_cid &&
18686bea61daSMintz, Yuval cid < (*pp_map)->start_cid + (*pp_map)->max_count)
1869fe56b9e6SYuval Mintz break;
1870fe56b9e6SYuval Mintz }
1871fe56b9e6SYuval Mintz
18726bea61daSMintz, Yuval if (*p_type == MAX_CONN_TYPES) {
18736bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "Invalid CID %d vfid %02x", cid, vfid);
18746bea61daSMintz, Yuval goto fail;
1875fe56b9e6SYuval Mintz }
1876fe56b9e6SYuval Mintz
18776bea61daSMintz, Yuval rel_cid = cid - (*pp_map)->start_cid;
18786bea61daSMintz, Yuval if (!test_bit(rel_cid, (*pp_map)->cid_map)) {
18796bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "CID %d [vifd %02x] not acquired",
18806bea61daSMintz, Yuval cid, vfid);
18816bea61daSMintz, Yuval goto fail;
1882fe56b9e6SYuval Mintz }
18836bea61daSMintz, Yuval
1884fe56b9e6SYuval Mintz return true;
18856bea61daSMintz, Yuval fail:
18866bea61daSMintz, Yuval *p_type = MAX_CONN_TYPES;
18876bea61daSMintz, Yuval *pp_map = NULL;
18886bea61daSMintz, Yuval return false;
1889fe56b9e6SYuval Mintz }
1890fe56b9e6SYuval Mintz
_qed_cxt_release_cid(struct qed_hwfn * p_hwfn,u32 cid,u8 vfid)18916bea61daSMintz, Yuval void _qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid, u8 vfid)
1892fe56b9e6SYuval Mintz {
18936bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map = NULL;
1894fe56b9e6SYuval Mintz enum protocol_type type;
1895fe56b9e6SYuval Mintz bool b_acquired;
1896fe56b9e6SYuval Mintz u32 rel_cid;
1897fe56b9e6SYuval Mintz
18986bea61daSMintz, Yuval if (vfid != QED_CXT_PF_CID && vfid > MAX_NUM_VFS) {
18996bea61daSMintz, Yuval DP_NOTICE(p_hwfn,
19006bea61daSMintz, Yuval "Trying to return incorrect CID belonging to VF %02x\n",
19016bea61daSMintz, Yuval vfid);
19026bea61daSMintz, Yuval return;
19036bea61daSMintz, Yuval }
19046bea61daSMintz, Yuval
1905fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */
19066bea61daSMintz, Yuval b_acquired = qed_cxt_test_cid_acquired(p_hwfn, cid, vfid,
19076bea61daSMintz, Yuval &type, &p_map);
1908fe56b9e6SYuval Mintz
1909fe56b9e6SYuval Mintz if (!b_acquired)
1910fe56b9e6SYuval Mintz return;
1911fe56b9e6SYuval Mintz
19126bea61daSMintz, Yuval rel_cid = cid - p_map->start_cid;
19136bea61daSMintz, Yuval clear_bit(rel_cid, p_map->cid_map);
19146bea61daSMintz, Yuval
19156bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT,
19166bea61daSMintz, Yuval "Released CID 0x%08x [rel. %08x] vfid %02x type %d\n",
19176bea61daSMintz, Yuval cid, rel_cid, vfid, type);
19186bea61daSMintz, Yuval }
19196bea61daSMintz, Yuval
qed_cxt_release_cid(struct qed_hwfn * p_hwfn,u32 cid)19206bea61daSMintz, Yuval void qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid)
19216bea61daSMintz, Yuval {
19226bea61daSMintz, Yuval _qed_cxt_release_cid(p_hwfn, cid, QED_CXT_PF_CID);
1923fe56b9e6SYuval Mintz }
1924fe56b9e6SYuval Mintz
qed_cxt_get_cid_info(struct qed_hwfn * p_hwfn,struct qed_cxt_info * p_info)19251a635e48SYuval Mintz int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn, struct qed_cxt_info *p_info)
1926fe56b9e6SYuval Mintz {
1927fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
19286bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map = NULL;
1929fe56b9e6SYuval Mintz u32 conn_cxt_size, hw_p_size, cxts_per_p, line;
1930fe56b9e6SYuval Mintz enum protocol_type type;
1931fe56b9e6SYuval Mintz bool b_acquired;
1932fe56b9e6SYuval Mintz
1933fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */
19346bea61daSMintz, Yuval b_acquired = qed_cxt_test_cid_acquired(p_hwfn, p_info->iid,
19356bea61daSMintz, Yuval QED_CXT_PF_CID, &type, &p_map);
1936fe56b9e6SYuval Mintz
1937fe56b9e6SYuval Mintz if (!b_acquired)
1938fe56b9e6SYuval Mintz return -EINVAL;
1939fe56b9e6SYuval Mintz
1940fe56b9e6SYuval Mintz /* set the protocl type */
1941fe56b9e6SYuval Mintz p_info->type = type;
1942fe56b9e6SYuval Mintz
1943fe56b9e6SYuval Mintz /* compute context virtual pointer */
1944fe56b9e6SYuval Mintz hw_p_size = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val;
1945fe56b9e6SYuval Mintz
1946fe56b9e6SYuval Mintz conn_cxt_size = CONN_CXT_SIZE(p_hwfn);
1947fe56b9e6SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / conn_cxt_size;
1948fe56b9e6SYuval Mintz line = p_info->iid / cxts_per_p;
1949fe56b9e6SYuval Mintz
1950fe56b9e6SYuval Mintz /* Make sure context is allocated (dynamic allocation) */
19518a52bbabSMichal Kalderon if (!p_mngr->ilt_shadow[line].virt_addr)
1952fe56b9e6SYuval Mintz return -EINVAL;
1953fe56b9e6SYuval Mintz
19548a52bbabSMichal Kalderon p_info->p_cxt = p_mngr->ilt_shadow[line].virt_addr +
1955fe56b9e6SYuval Mintz p_info->iid % cxts_per_p * conn_cxt_size;
1956fe56b9e6SYuval Mintz
1957fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_ILT | QED_MSG_CXT),
1958fe56b9e6SYuval Mintz "Accessing ILT shadow[%d]: CXT pointer is at %p (for iid %d)\n",
1959fe56b9e6SYuval Mintz p_info->iid / cxts_per_p, p_info->p_cxt, p_info->iid);
1960fe56b9e6SYuval Mintz
1961fe56b9e6SYuval Mintz return 0;
1962fe56b9e6SYuval Mintz }
1963fe56b9e6SYuval Mintz
qed_rdma_set_pf_params(struct qed_hwfn * p_hwfn,struct qed_rdma_pf_params * p_params,u32 num_tasks)19648c93beafSYuval Mintz static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn,
1965f9dc4d1fSRam Amrani struct qed_rdma_pf_params *p_params,
1966f9dc4d1fSRam Amrani u32 num_tasks)
1967dbb799c3SYuval Mintz {
1968b8204ad8SYuval Basson u32 num_cons, num_qps;
1969dbb799c3SYuval Mintz enum protocol_type proto;
1970dbb799c3SYuval Mintz
1971e0a8f9deSMichal Kalderon if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {
19721ea99903SAlexander Lobakin DP_VERBOSE(p_hwfn, QED_MSG_SP,
1973e0a8f9deSMichal Kalderon "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
1974e0a8f9deSMichal Kalderon p_hwfn->hw_info.personality = QED_PCI_ETH_ROCE;
1975e0a8f9deSMichal Kalderon }
1976e0a8f9deSMichal Kalderon
1977dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) {
19785d7dc962SKalderon, Michal case QED_PCI_ETH_IWARP:
19795d7dc962SKalderon, Michal /* Each QP requires one connection */
19805d7dc962SKalderon, Michal num_cons = min_t(u32, IWARP_MAX_QPS, p_params->num_qps);
19815d7dc962SKalderon, Michal proto = PROTOCOLID_IWARP;
19825d7dc962SKalderon, Michal break;
1983dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE:
1984dbb799c3SYuval Mintz num_qps = min_t(u32, ROCE_MAX_QPS, p_params->num_qps);
1985dbb799c3SYuval Mintz num_cons = num_qps * 2; /* each QP requires two connections */
1986dbb799c3SYuval Mintz proto = PROTOCOLID_ROCE;
1987dbb799c3SYuval Mintz break;
1988dbb799c3SYuval Mintz default:
1989dbb799c3SYuval Mintz return;
1990dbb799c3SYuval Mintz }
1991dbb799c3SYuval Mintz
1992dbb799c3SYuval Mintz if (num_cons && num_tasks) {
1993b8204ad8SYuval Basson u32 num_srqs, num_xrc_srqs;
1994b8204ad8SYuval Basson
1995dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, proto, num_cons, 0);
1996dbb799c3SYuval Mintz
1997dbb799c3SYuval Mintz /* Deliberatly passing ROCE for tasks id. This is because
1998dbb799c3SYuval Mintz * iWARP / RoCE share the task id.
1999dbb799c3SYuval Mintz */
2000dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_ROCE,
2001dbb799c3SYuval Mintz QED_CXT_ROCE_TID_SEG, 1,
2002dbb799c3SYuval Mintz num_tasks, false);
2003b8204ad8SYuval Basson
2004b8204ad8SYuval Basson num_srqs = min_t(u32, QED_RDMA_MAX_SRQS, p_params->num_srqs);
2005b8204ad8SYuval Basson
2006b8204ad8SYuval Basson /* XRC SRQs populate a single ILT page */
2007b8204ad8SYuval Basson num_xrc_srqs = qed_cxt_xrc_srqs_per_page(p_hwfn);
2008b8204ad8SYuval Basson
2009b8204ad8SYuval Basson qed_cxt_set_srq_count(p_hwfn, num_srqs, num_xrc_srqs);
2010dbb799c3SYuval Mintz } else {
2011dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev,
2012dbb799c3SYuval Mintz "RDMA personality used without setting params!\n");
2013dbb799c3SYuval Mintz }
2014dbb799c3SYuval Mintz }
2015dbb799c3SYuval Mintz
qed_cxt_set_pf_params(struct qed_hwfn * p_hwfn,u32 rdma_tasks)2016f9dc4d1fSRam Amrani int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks)
2017fe56b9e6SYuval Mintz {
2018fe56b9e6SYuval Mintz /* Set the number of required CORE connections */
2019fe56b9e6SYuval Mintz u32 core_cids = 1; /* SPQ */
2020fe56b9e6SYuval Mintz
20210a7fb11cSYuval Mintz if (p_hwfn->using_ll2)
20220a7fb11cSYuval Mintz core_cids += 4;
20231408cc1fSYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_CORE, core_cids, 0);
2024fe56b9e6SYuval Mintz
2025dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) {
20265d7dc962SKalderon, Michal case QED_PCI_ETH_RDMA:
20275d7dc962SKalderon, Michal case QED_PCI_ETH_IWARP:
2028dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE:
2029dbb799c3SYuval Mintz {
2030dbb799c3SYuval Mintz qed_rdma_set_pf_params(p_hwfn,
2031dbb799c3SYuval Mintz &p_hwfn->
2032f9dc4d1fSRam Amrani pf_params.rdma_pf_params,
2033f9dc4d1fSRam Amrani rdma_tasks);
2034dbb799c3SYuval Mintz /* no need for break since RoCE coexist with Ethernet */
2035dbb799c3SYuval Mintz }
2036df561f66SGustavo A. R. Silva fallthrough;
2037dbb799c3SYuval Mintz case QED_PCI_ETH:
2038dbb799c3SYuval Mintz {
2039dbb799c3SYuval Mintz struct qed_eth_pf_params *p_params =
2040dbb799c3SYuval Mintz &p_hwfn->pf_params.eth_pf_params;
2041dbb799c3SYuval Mintz
204208bc8f15SMintz, Yuval if (!p_params->num_vf_cons)
204308bc8f15SMintz, Yuval p_params->num_vf_cons =
204408bc8f15SMintz, Yuval ETH_PF_PARAMS_VF_CONS_DEFAULT;
2045fe56b9e6SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_ETH,
204608bc8f15SMintz, Yuval p_params->num_cons,
204708bc8f15SMintz, Yuval p_params->num_vf_cons);
2048d51e4af5SChopra, Manish p_hwfn->p_cxt_mngr->arfs_count = p_params->num_arfs_filters;
2049dbb799c3SYuval Mintz break;
2050dbb799c3SYuval Mintz }
20511e128c81SArun Easi case QED_PCI_FCOE:
20521e128c81SArun Easi {
20531e128c81SArun Easi struct qed_fcoe_pf_params *p_params;
20541e128c81SArun Easi
20551e128c81SArun Easi p_params = &p_hwfn->pf_params.fcoe_pf_params;
20561e128c81SArun Easi
20571e128c81SArun Easi if (p_params->num_cons && p_params->num_tasks) {
20581e128c81SArun Easi qed_cxt_set_proto_cid_count(p_hwfn,
20591e128c81SArun Easi PROTOCOLID_FCOE,
20601e128c81SArun Easi p_params->num_cons,
20611e128c81SArun Easi 0);
20621e128c81SArun Easi qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_FCOE,
20631e128c81SArun Easi QED_CXT_FCOE_TID_SEG, 0,
20641e128c81SArun Easi p_params->num_tasks, true);
20651e128c81SArun Easi } else {
20661e128c81SArun Easi DP_INFO(p_hwfn->cdev,
20671e128c81SArun Easi "Fcoe personality used without setting params!\n");
20681e128c81SArun Easi }
20691e128c81SArun Easi break;
20701e128c81SArun Easi }
2071dbb799c3SYuval Mintz case QED_PCI_ISCSI:
2072dbb799c3SYuval Mintz {
2073dbb799c3SYuval Mintz struct qed_iscsi_pf_params *p_params;
2074dbb799c3SYuval Mintz
2075dbb799c3SYuval Mintz p_params = &p_hwfn->pf_params.iscsi_pf_params;
2076dbb799c3SYuval Mintz
2077dbb799c3SYuval Mintz if (p_params->num_cons && p_params->num_tasks) {
2078dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn,
20791bd4f571SOmkar Kulkarni PROTOCOLID_TCP_ULP,
2080dbb799c3SYuval Mintz p_params->num_cons,
2081dbb799c3SYuval Mintz 0);
2082dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn,
20831bd4f571SOmkar Kulkarni PROTOCOLID_TCP_ULP,
20841bd4f571SOmkar Kulkarni QED_CXT_TCP_ULP_TID_SEG,
2085dbb799c3SYuval Mintz 0,
2086dbb799c3SYuval Mintz p_params->num_tasks,
2087dbb799c3SYuval Mintz true);
2088dbb799c3SYuval Mintz } else {
2089dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev,
2090dbb799c3SYuval Mintz "Iscsi personality used without setting params!\n");
2091dbb799c3SYuval Mintz }
2092dbb799c3SYuval Mintz break;
2093dbb799c3SYuval Mintz }
2094897e87a1SShai Malin case QED_PCI_NVMETCP:
2095897e87a1SShai Malin {
2096897e87a1SShai Malin struct qed_nvmetcp_pf_params *p_params;
2097897e87a1SShai Malin
2098897e87a1SShai Malin p_params = &p_hwfn->pf_params.nvmetcp_pf_params;
2099897e87a1SShai Malin
2100897e87a1SShai Malin if (p_params->num_cons && p_params->num_tasks) {
2101897e87a1SShai Malin qed_cxt_set_proto_cid_count(p_hwfn,
2102897e87a1SShai Malin PROTOCOLID_TCP_ULP,
2103897e87a1SShai Malin p_params->num_cons,
2104897e87a1SShai Malin 0);
2105897e87a1SShai Malin qed_cxt_set_proto_tid_count(p_hwfn,
2106897e87a1SShai Malin PROTOCOLID_TCP_ULP,
2107897e87a1SShai Malin QED_CXT_TCP_ULP_TID_SEG,
2108897e87a1SShai Malin 0,
2109897e87a1SShai Malin p_params->num_tasks,
2110897e87a1SShai Malin true);
2111897e87a1SShai Malin } else {
2112897e87a1SShai Malin DP_INFO(p_hwfn->cdev,
2113897e87a1SShai Malin "NvmeTCP personality used without setting params!\n");
2114897e87a1SShai Malin }
2115897e87a1SShai Malin break;
2116897e87a1SShai Malin }
2117dbb799c3SYuval Mintz default:
2118dbb799c3SYuval Mintz return -EINVAL;
2119dbb799c3SYuval Mintz }
2120dbb799c3SYuval Mintz
2121dbb799c3SYuval Mintz return 0;
2122dbb799c3SYuval Mintz }
2123dbb799c3SYuval Mintz
qed_cxt_get_tid_mem_info(struct qed_hwfn * p_hwfn,struct qed_tid_mem * p_info)2124dbb799c3SYuval Mintz int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn,
2125dbb799c3SYuval Mintz struct qed_tid_mem *p_info)
2126dbb799c3SYuval Mintz {
2127dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
2128dbb799c3SYuval Mintz u32 proto, seg, total_lines, i, shadow_line;
2129dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
2130dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_fl_seg;
2131dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info;
2132dbb799c3SYuval Mintz
2133dbb799c3SYuval Mintz /* Verify the personality */
2134dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) {
21351e128c81SArun Easi case QED_PCI_FCOE:
21361e128c81SArun Easi proto = PROTOCOLID_FCOE;
21371e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG;
21381e128c81SArun Easi break;
2139dbb799c3SYuval Mintz case QED_PCI_ISCSI:
2140897e87a1SShai Malin case QED_PCI_NVMETCP:
21411bd4f571SOmkar Kulkarni proto = PROTOCOLID_TCP_ULP;
21421bd4f571SOmkar Kulkarni seg = QED_CXT_TCP_ULP_TID_SEG;
2143dbb799c3SYuval Mintz break;
2144dbb799c3SYuval Mintz default:
2145dbb799c3SYuval Mintz return -EINVAL;
2146dbb799c3SYuval Mintz }
2147dbb799c3SYuval Mintz
2148dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT];
2149dbb799c3SYuval Mintz if (!p_cli->active)
2150dbb799c3SYuval Mintz return -EINVAL;
2151dbb799c3SYuval Mintz
2152dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg];
2153dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem)
2154dbb799c3SYuval Mintz return -EINVAL;
2155dbb799c3SYuval Mintz
2156dbb799c3SYuval Mintz p_fl_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)];
2157dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_fl_seg->total_size,
2158dbb799c3SYuval Mintz p_fl_seg->real_size_in_page);
2159dbb799c3SYuval Mintz
2160dbb799c3SYuval Mintz for (i = 0; i < total_lines; i++) {
2161dbb799c3SYuval Mintz shadow_line = i + p_fl_seg->start_line -
2162dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line;
21638a52bbabSMichal Kalderon p_info->blocks[i] = p_mngr->ilt_shadow[shadow_line].virt_addr;
2164dbb799c3SYuval Mintz }
2165dbb799c3SYuval Mintz p_info->waste = ILT_PAGE_IN_BYTES(p_cli->p_size.val) -
2166dbb799c3SYuval Mintz p_fl_seg->real_size_in_page;
2167dbb799c3SYuval Mintz p_info->tid_size = p_mngr->task_type_size[p_seg_info->type];
2168dbb799c3SYuval Mintz p_info->num_tids_per_block = p_fl_seg->real_size_in_page /
2169dbb799c3SYuval Mintz p_info->tid_size;
2170dbb799c3SYuval Mintz
2171dbb799c3SYuval Mintz return 0;
2172dbb799c3SYuval Mintz }
2173dbb799c3SYuval Mintz
2174dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future
2175dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic
2176dbb799c3SYuval Mintz */
2177dbb799c3SYuval Mintz int
qed_cxt_dynamic_ilt_alloc(struct qed_hwfn * p_hwfn,enum qed_cxt_elem_type elem_type,u32 iid)2178dbb799c3SYuval Mintz qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn,
2179dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type, u32 iid)
2180dbb799c3SYuval Mintz {
2181dbb799c3SYuval Mintz u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line;
2182a0f3266fSAlexander Lobakin struct tdif_task_context *tdif_context;
2183dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
2184dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk;
2185dbb799c3SYuval Mintz struct qed_ptt *p_ptt;
2186dbb799c3SYuval Mintz dma_addr_t p_phys;
2187dbb799c3SYuval Mintz u64 ilt_hw_entry;
2188dbb799c3SYuval Mintz void *p_virt;
21895ab90341SAlexander Lobakin u32 flags1;
2190dbb799c3SYuval Mintz int rc = 0;
2191dbb799c3SYuval Mintz
2192dbb799c3SYuval Mintz switch (elem_type) {
2193dbb799c3SYuval Mintz case QED_ELEM_CXT:
2194dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC];
2195dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn);
2196dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK];
2197dbb799c3SYuval Mintz break;
2198dbb799c3SYuval Mintz case QED_ELEM_SRQ:
2199b8204ad8SYuval Basson /* The first ILT page is not used for regular SRQs. Skip it. */
2200b8204ad8SYuval Basson iid += p_hwfn->p_cxt_mngr->xrc_srq_count;
2201dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
2202dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE;
2203dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK];
2204dbb799c3SYuval Mintz break;
2205b8204ad8SYuval Basson case QED_ELEM_XRC_SRQ:
2206b8204ad8SYuval Basson p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
2207b8204ad8SYuval Basson elem_size = XRC_SRQ_CXT_SIZE;
2208b8204ad8SYuval Basson p_blk = &p_cli->pf_blks[SRQ_BLK];
2209b8204ad8SYuval Basson break;
2210dbb799c3SYuval Mintz case QED_ELEM_TASK:
2211dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
2212dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn);
2213dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)];
2214dbb799c3SYuval Mintz break;
2215dbb799c3SYuval Mintz default:
221609047300SPrabhakar Kushwaha DP_NOTICE(p_hwfn, "-EOPNOTSUPP elem type = %d", elem_type);
221709047300SPrabhakar Kushwaha return -EOPNOTSUPP;
2218dbb799c3SYuval Mintz }
2219dbb799c3SYuval Mintz
2220dbb799c3SYuval Mintz /* Calculate line in ilt */
2221dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val;
2222dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size;
2223dbb799c3SYuval Mintz line = p_blk->start_line + (iid / elems_per_p);
2224dbb799c3SYuval Mintz shadow_line = line - p_hwfn->p_cxt_mngr->pf_start_line;
2225dbb799c3SYuval Mintz
2226dbb799c3SYuval Mintz /* If line is already allocated, do nothing, otherwise allocate it and
2227dbb799c3SYuval Mintz * write it to the PSWRQ2 registers.
2228dbb799c3SYuval Mintz * This section can be run in parallel from different contexts and thus
2229dbb799c3SYuval Mintz * a mutex protection is needed.
2230dbb799c3SYuval Mintz */
2231dbb799c3SYuval Mintz
2232dbb799c3SYuval Mintz mutex_lock(&p_hwfn->p_cxt_mngr->mutex);
2233dbb799c3SYuval Mintz
22348a52bbabSMichal Kalderon if (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].virt_addr)
2235dbb799c3SYuval Mintz goto out0;
2236dbb799c3SYuval Mintz
2237dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn);
2238dbb799c3SYuval Mintz if (!p_ptt) {
2239dbb799c3SYuval Mintz DP_NOTICE(p_hwfn,
2240dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation");
2241dbb799c3SYuval Mintz rc = -EBUSY;
2242dbb799c3SYuval Mintz goto out0;
2243dbb799c3SYuval Mintz }
2244dbb799c3SYuval Mintz
2245750afb08SLuis Chamberlain p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
22465f58dff9SHimanshu Jha p_blk->real_size_in_page, &p_phys,
22475f58dff9SHimanshu Jha GFP_KERNEL);
2248dbb799c3SYuval Mintz if (!p_virt) {
2249dbb799c3SYuval Mintz rc = -ENOMEM;
2250dbb799c3SYuval Mintz goto out1;
2251dbb799c3SYuval Mintz }
2252dbb799c3SYuval Mintz
2253dbb799c3SYuval Mintz /* configuration of refTagMask to 0xF is required for RoCE DIF MR only,
2254dbb799c3SYuval Mintz * to compensate for a HW bug, but it is configured even if DIF is not
2255dbb799c3SYuval Mintz * enabled. This is harmless and allows us to avoid a dedicated API. We
2256dbb799c3SYuval Mintz * configure the field for all of the contexts on the newly allocated
2257dbb799c3SYuval Mintz * page.
2258dbb799c3SYuval Mintz */
2259dbb799c3SYuval Mintz if (elem_type == QED_ELEM_TASK) {
2260dbb799c3SYuval Mintz u32 elem_i;
2261dbb799c3SYuval Mintz u8 *elem_start = (u8 *)p_virt;
2262dbb799c3SYuval Mintz union type1_task_context *elem;
2263dbb799c3SYuval Mintz
2264dbb799c3SYuval Mintz for (elem_i = 0; elem_i < elems_per_p; elem_i++) {
2265dbb799c3SYuval Mintz elem = (union type1_task_context *)elem_start;
2266a0f3266fSAlexander Lobakin tdif_context = &elem->roce_ctx.tdif_context;
2267a0f3266fSAlexander Lobakin
22685ab90341SAlexander Lobakin flags1 = le32_to_cpu(tdif_context->flags1);
22695ab90341SAlexander Lobakin SET_FIELD(flags1, TDIF_TASK_CONTEXT_REF_TAG_MASK, 0xf);
22705ab90341SAlexander Lobakin tdif_context->flags1 = cpu_to_le32(flags1);
22715ab90341SAlexander Lobakin
2272dbb799c3SYuval Mintz elem_start += TYPE1_TASK_CXT_SIZE(p_hwfn);
2273dbb799c3SYuval Mintz }
2274dbb799c3SYuval Mintz }
2275dbb799c3SYuval Mintz
22768a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].virt_addr = p_virt;
22778a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].phys_addr = p_phys;
2278dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].size =
2279dbb799c3SYuval Mintz p_blk->real_size_in_page;
2280dbb799c3SYuval Mintz
2281dbb799c3SYuval Mintz /* compute absolute offset */
2282dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY +
2283dbb799c3SYuval Mintz (line * ILT_REG_SIZE_IN_BYTES * ILT_ENTRY_IN_REGS);
2284dbb799c3SYuval Mintz
2285dbb799c3SYuval Mintz ilt_hw_entry = 0;
2286dbb799c3SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL);
22878a52bbabSMichal Kalderon SET_FIELD(ilt_hw_entry, ILT_ENTRY_PHY_ADDR,
22888a52bbabSMichal Kalderon (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].phys_addr
22898a52bbabSMichal Kalderon >> 12));
2290dbb799c3SYuval Mintz
2291dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a wide-bus */
2292dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, (u64) (uintptr_t)&ilt_hw_entry,
229383bf76e3SMichal Kalderon reg_offset, sizeof(ilt_hw_entry) / sizeof(u32),
229483bf76e3SMichal Kalderon NULL);
2295dbb799c3SYuval Mintz
2296dbb799c3SYuval Mintz if (elem_type == QED_ELEM_CXT) {
2297dbb799c3SYuval Mintz u32 last_cid_allocated = (1 + (iid / elems_per_p)) *
2298dbb799c3SYuval Mintz elems_per_p;
2299dbb799c3SYuval Mintz
2300dbb799c3SYuval Mintz /* Update the relevant register in the parser */
2301dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF,
2302dbb799c3SYuval Mintz last_cid_allocated - 1);
2303dbb799c3SYuval Mintz
2304dbb799c3SYuval Mintz if (!p_hwfn->b_rdma_enabled_in_prs) {
2305c851a9dcSKalderon, Michal /* Enable RDMA search */
2306dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1);
2307dbb799c3SYuval Mintz p_hwfn->b_rdma_enabled_in_prs = true;
2308dbb799c3SYuval Mintz }
2309dbb799c3SYuval Mintz }
2310dbb799c3SYuval Mintz
2311dbb799c3SYuval Mintz out1:
2312dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt);
2313dbb799c3SYuval Mintz out0:
2314dbb799c3SYuval Mintz mutex_unlock(&p_hwfn->p_cxt_mngr->mutex);
2315dbb799c3SYuval Mintz
2316dbb799c3SYuval Mintz return rc;
2317dbb799c3SYuval Mintz }
2318dbb799c3SYuval Mintz
2319dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future
2320dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic
2321dbb799c3SYuval Mintz */
2322dbb799c3SYuval Mintz static int
qed_cxt_free_ilt_range(struct qed_hwfn * p_hwfn,enum qed_cxt_elem_type elem_type,u32 start_iid,u32 count)2323dbb799c3SYuval Mintz qed_cxt_free_ilt_range(struct qed_hwfn *p_hwfn,
2324dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type,
2325dbb799c3SYuval Mintz u32 start_iid, u32 count)
2326dbb799c3SYuval Mintz {
2327dbb799c3SYuval Mintz u32 start_line, end_line, shadow_start_line, shadow_end_line;
2328dbb799c3SYuval Mintz u32 reg_offset, elem_size, hw_p_size, elems_per_p;
2329dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
2330dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk;
2331dbb799c3SYuval Mintz u32 end_iid = start_iid + count;
2332dbb799c3SYuval Mintz struct qed_ptt *p_ptt;
2333dbb799c3SYuval Mintz u64 ilt_hw_entry = 0;
2334dbb799c3SYuval Mintz u32 i;
2335dbb799c3SYuval Mintz
2336dbb799c3SYuval Mintz switch (elem_type) {
2337dbb799c3SYuval Mintz case QED_ELEM_CXT:
2338dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC];
2339dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn);
2340dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK];
2341dbb799c3SYuval Mintz break;
2342dbb799c3SYuval Mintz case QED_ELEM_SRQ:
2343dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
2344dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE;
2345dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK];
2346dbb799c3SYuval Mintz break;
2347d4eae993SYuval Basson case QED_ELEM_XRC_SRQ:
2348d4eae993SYuval Basson p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
2349d4eae993SYuval Basson elem_size = XRC_SRQ_CXT_SIZE;
2350d4eae993SYuval Basson p_blk = &p_cli->pf_blks[SRQ_BLK];
2351d4eae993SYuval Basson break;
2352dbb799c3SYuval Mintz case QED_ELEM_TASK:
2353dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
2354dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn);
2355dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)];
2356dbb799c3SYuval Mintz break;
2357dbb799c3SYuval Mintz default:
2358dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, "-EINVALID elem type = %d", elem_type);
2359dbb799c3SYuval Mintz return -EINVAL;
2360dbb799c3SYuval Mintz }
2361dbb799c3SYuval Mintz
2362dbb799c3SYuval Mintz /* Calculate line in ilt */
2363dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val;
2364dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size;
2365dbb799c3SYuval Mintz start_line = p_blk->start_line + (start_iid / elems_per_p);
2366dbb799c3SYuval Mintz end_line = p_blk->start_line + (end_iid / elems_per_p);
2367dbb799c3SYuval Mintz if (((end_iid + 1) / elems_per_p) != (end_iid / elems_per_p))
2368dbb799c3SYuval Mintz end_line--;
2369dbb799c3SYuval Mintz
2370dbb799c3SYuval Mintz shadow_start_line = start_line - p_hwfn->p_cxt_mngr->pf_start_line;
2371dbb799c3SYuval Mintz shadow_end_line = end_line - p_hwfn->p_cxt_mngr->pf_start_line;
2372dbb799c3SYuval Mintz
2373dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn);
2374dbb799c3SYuval Mintz if (!p_ptt) {
2375dbb799c3SYuval Mintz DP_NOTICE(p_hwfn,
2376dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation");
2377dbb799c3SYuval Mintz return -EBUSY;
2378dbb799c3SYuval Mintz }
2379dbb799c3SYuval Mintz
2380dbb799c3SYuval Mintz for (i = shadow_start_line; i < shadow_end_line; i++) {
23818a52bbabSMichal Kalderon if (!p_hwfn->p_cxt_mngr->ilt_shadow[i].virt_addr)
2382dbb799c3SYuval Mintz continue;
2383dbb799c3SYuval Mintz
2384dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2385dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size,
23868a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[i].virt_addr,
23878a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[i].phys_addr);
2388dbb799c3SYuval Mintz
23898a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[i].virt_addr = NULL;
23908a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow[i].phys_addr = 0;
2391dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size = 0;
2392dbb799c3SYuval Mintz
2393dbb799c3SYuval Mintz /* compute absolute offset */
2394dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY +
2395dbb799c3SYuval Mintz ((start_line++) * ILT_REG_SIZE_IN_BYTES *
2396dbb799c3SYuval Mintz ILT_ENTRY_IN_REGS);
2397dbb799c3SYuval Mintz
2398dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a
2399dbb799c3SYuval Mintz * wide-bus.
2400dbb799c3SYuval Mintz */
2401dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt,
2402dbb799c3SYuval Mintz (u64) (uintptr_t) &ilt_hw_entry,
2403dbb799c3SYuval Mintz reg_offset,
2404dbb799c3SYuval Mintz sizeof(ilt_hw_entry) / sizeof(u32),
240583bf76e3SMichal Kalderon NULL);
2406dbb799c3SYuval Mintz }
2407dbb799c3SYuval Mintz
2408dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt);
2409dbb799c3SYuval Mintz
2410dbb799c3SYuval Mintz return 0;
2411dbb799c3SYuval Mintz }
2412dbb799c3SYuval Mintz
qed_cxt_free_proto_ilt(struct qed_hwfn * p_hwfn,enum protocol_type proto)2413dbb799c3SYuval Mintz int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto)
2414dbb799c3SYuval Mintz {
2415dbb799c3SYuval Mintz int rc;
2416dbb799c3SYuval Mintz u32 cid;
2417dbb799c3SYuval Mintz
2418dbb799c3SYuval Mintz /* Free Connection CXT */
2419dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_CXT,
2420dbb799c3SYuval Mintz qed_cxt_get_proto_cid_start(p_hwfn,
2421dbb799c3SYuval Mintz proto),
2422dbb799c3SYuval Mintz qed_cxt_get_proto_cid_count(p_hwfn,
2423dbb799c3SYuval Mintz proto, &cid));
2424dbb799c3SYuval Mintz
2425dbb799c3SYuval Mintz if (rc)
2426dbb799c3SYuval Mintz return rc;
2427dbb799c3SYuval Mintz
24289de506a5SMichal Kalderon /* Free Task CXT ( Intentionally RoCE as task-id is shared between
24299de506a5SMichal Kalderon * RoCE and iWARP )
24309de506a5SMichal Kalderon */
24319de506a5SMichal Kalderon proto = PROTOCOLID_ROCE;
2432dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_TASK, 0,
2433dbb799c3SYuval Mintz qed_cxt_get_proto_tid_count(p_hwfn, proto));
2434dbb799c3SYuval Mintz if (rc)
2435dbb799c3SYuval Mintz return rc;
2436dbb799c3SYuval Mintz
2437dbb799c3SYuval Mintz /* Free TSDM CXT */
2438b8204ad8SYuval Basson rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_XRC_SRQ, 0,
2439b8204ad8SYuval Basson p_hwfn->p_cxt_mngr->xrc_srq_count);
2440b8204ad8SYuval Basson
2441b8204ad8SYuval Basson rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_SRQ,
2442b8204ad8SYuval Basson p_hwfn->p_cxt_mngr->xrc_srq_count,
2443b8204ad8SYuval Basson p_hwfn->p_cxt_mngr->srq_count);
2444dbb799c3SYuval Mintz
2445dbb799c3SYuval Mintz return rc;
2446dbb799c3SYuval Mintz }
2447dbb799c3SYuval Mintz
qed_cxt_get_task_ctx(struct qed_hwfn * p_hwfn,u32 tid,u8 ctx_type,void ** pp_task_ctx)2448dbb799c3SYuval Mintz int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn,
2449dbb799c3SYuval Mintz u32 tid, u8 ctx_type, void **pp_task_ctx)
2450dbb799c3SYuval Mintz {
2451dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
2452dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli;
2453dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info;
24541e128c81SArun Easi struct qed_ilt_cli_blk *p_seg;
2455dbb799c3SYuval Mintz u32 num_tids_per_block;
24561e128c81SArun Easi u32 tid_size, ilt_idx;
24571e128c81SArun Easi u32 total_lines;
24581e128c81SArun Easi u32 proto, seg;
2459dbb799c3SYuval Mintz
2460dbb799c3SYuval Mintz /* Verify the personality */
2461dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) {
24621e128c81SArun Easi case QED_PCI_FCOE:
24631e128c81SArun Easi proto = PROTOCOLID_FCOE;
24641e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG;
24651e128c81SArun Easi break;
2466dbb799c3SYuval Mintz case QED_PCI_ISCSI:
2467897e87a1SShai Malin case QED_PCI_NVMETCP:
24681bd4f571SOmkar Kulkarni proto = PROTOCOLID_TCP_ULP;
24691bd4f571SOmkar Kulkarni seg = QED_CXT_TCP_ULP_TID_SEG;
2470dbb799c3SYuval Mintz break;
2471dbb799c3SYuval Mintz default:
2472dbb799c3SYuval Mintz return -EINVAL;
2473dbb799c3SYuval Mintz }
2474dbb799c3SYuval Mintz
2475dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT];
2476dbb799c3SYuval Mintz if (!p_cli->active)
2477dbb799c3SYuval Mintz return -EINVAL;
2478dbb799c3SYuval Mintz
2479dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg];
2480dbb799c3SYuval Mintz
2481dbb799c3SYuval Mintz if (ctx_type == QED_CTX_WORKING_MEM) {
2482dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_SEG_BLK(seg)];
2483dbb799c3SYuval Mintz } else if (ctx_type == QED_CTX_FL_MEM) {
2484dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem)
2485dbb799c3SYuval Mintz return -EINVAL;
2486dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)];
2487dbb799c3SYuval Mintz } else {
2488dbb799c3SYuval Mintz return -EINVAL;
2489dbb799c3SYuval Mintz }
2490dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_seg->total_size, p_seg->real_size_in_page);
2491dbb799c3SYuval Mintz tid_size = p_mngr->task_type_size[p_seg_info->type];
2492dbb799c3SYuval Mintz num_tids_per_block = p_seg->real_size_in_page / tid_size;
2493dbb799c3SYuval Mintz
2494dbb799c3SYuval Mintz if (total_lines < tid / num_tids_per_block)
2495dbb799c3SYuval Mintz return -EINVAL;
2496dbb799c3SYuval Mintz
2497dbb799c3SYuval Mintz ilt_idx = tid / num_tids_per_block + p_seg->start_line -
2498dbb799c3SYuval Mintz p_mngr->pf_start_line;
24998a52bbabSMichal Kalderon *pp_task_ctx = (u8 *)p_mngr->ilt_shadow[ilt_idx].virt_addr +
2500dbb799c3SYuval Mintz (tid % num_tids_per_block) * tid_size;
2501fe56b9e6SYuval Mintz
2502fe56b9e6SYuval Mintz return 0;
2503fe56b9e6SYuval Mintz }
25048a52bbabSMichal Kalderon
qed_blk_calculate_pages(struct qed_ilt_cli_blk * p_blk)25058a52bbabSMichal Kalderon static u16 qed_blk_calculate_pages(struct qed_ilt_cli_blk *p_blk)
25068a52bbabSMichal Kalderon {
25078a52bbabSMichal Kalderon if (p_blk->real_size_in_page == 0)
25088a52bbabSMichal Kalderon return 0;
25098a52bbabSMichal Kalderon
25108a52bbabSMichal Kalderon return DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page);
25118a52bbabSMichal Kalderon }
25128a52bbabSMichal Kalderon
qed_get_cdut_num_pf_init_pages(struct qed_hwfn * p_hwfn)25138a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_init_pages(struct qed_hwfn *p_hwfn)
25148a52bbabSMichal Kalderon {
25158a52bbabSMichal Kalderon struct qed_ilt_client_cfg *p_cli;
25168a52bbabSMichal Kalderon struct qed_ilt_cli_blk *p_blk;
25178a52bbabSMichal Kalderon u16 i, pages = 0;
25188a52bbabSMichal Kalderon
25198a52bbabSMichal Kalderon p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
25208a52bbabSMichal Kalderon for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
25218a52bbabSMichal Kalderon p_blk = &p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)];
25228a52bbabSMichal Kalderon pages += qed_blk_calculate_pages(p_blk);
25238a52bbabSMichal Kalderon }
25248a52bbabSMichal Kalderon
25258a52bbabSMichal Kalderon return pages;
25268a52bbabSMichal Kalderon }
25278a52bbabSMichal Kalderon
qed_get_cdut_num_vf_init_pages(struct qed_hwfn * p_hwfn)25288a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_init_pages(struct qed_hwfn *p_hwfn)
25298a52bbabSMichal Kalderon {
25308a52bbabSMichal Kalderon struct qed_ilt_client_cfg *p_cli;
25318a52bbabSMichal Kalderon struct qed_ilt_cli_blk *p_blk;
25328a52bbabSMichal Kalderon u16 i, pages = 0;
25338a52bbabSMichal Kalderon
25348a52bbabSMichal Kalderon p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
25358a52bbabSMichal Kalderon for (i = 0; i < NUM_TASK_VF_SEGMENTS; i++) {
25368a52bbabSMichal Kalderon p_blk = &p_cli->vf_blks[CDUT_FL_SEG_BLK(i, VF)];
25378a52bbabSMichal Kalderon pages += qed_blk_calculate_pages(p_blk);
25388a52bbabSMichal Kalderon }
25398a52bbabSMichal Kalderon
25408a52bbabSMichal Kalderon return pages;
25418a52bbabSMichal Kalderon }
25428a52bbabSMichal Kalderon
qed_get_cdut_num_pf_work_pages(struct qed_hwfn * p_hwfn)25438a52bbabSMichal Kalderon u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn)
25448a52bbabSMichal Kalderon {
25458a52bbabSMichal Kalderon struct qed_ilt_client_cfg *p_cli;
25468a52bbabSMichal Kalderon struct qed_ilt_cli_blk *p_blk;
25478a52bbabSMichal Kalderon u16 i, pages = 0;
25488a52bbabSMichal Kalderon
25498a52bbabSMichal Kalderon p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
25508a52bbabSMichal Kalderon for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) {
25518a52bbabSMichal Kalderon p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(i)];
25528a52bbabSMichal Kalderon pages += qed_blk_calculate_pages(p_blk);
25538a52bbabSMichal Kalderon }
25548a52bbabSMichal Kalderon
25558a52bbabSMichal Kalderon return pages;
25568a52bbabSMichal Kalderon }
25578a52bbabSMichal Kalderon
qed_get_cdut_num_vf_work_pages(struct qed_hwfn * p_hwfn)25588a52bbabSMichal Kalderon u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn)
25598a52bbabSMichal Kalderon {
25608a52bbabSMichal Kalderon struct qed_ilt_client_cfg *p_cli;
25618a52bbabSMichal Kalderon struct qed_ilt_cli_blk *p_blk;
25628a52bbabSMichal Kalderon u16 pages = 0, i;
25638a52bbabSMichal Kalderon
25648a52bbabSMichal Kalderon p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
25658a52bbabSMichal Kalderon for (i = 0; i < NUM_TASK_VF_SEGMENTS; i++) {
25668a52bbabSMichal Kalderon p_blk = &p_cli->vf_blks[CDUT_SEG_BLK(i)];
25678a52bbabSMichal Kalderon pages += qed_blk_calculate_pages(p_blk);
25688a52bbabSMichal Kalderon }
25698a52bbabSMichal Kalderon
25708a52bbabSMichal Kalderon return pages;
25718a52bbabSMichal Kalderon }
2572