1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2003 - 2009 NetXen, Inc. 4 * Copyright (C) 2009 - QLogic Corporation. 5 * All rights reserved. 6 */ 7 8 #include <linux/netdevice.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/if_vlan.h> 12 #include <net/checksum.h> 13 #include "netxen_nic.h" 14 #include "netxen_nic_hw.h" 15 16 struct crb_addr_pair { 17 u32 addr; 18 u32 data; 19 }; 20 21 #define NETXEN_MAX_CRB_XFORM 60 22 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 23 #define NETXEN_ADDR_ERROR (0xffffffff) 24 25 #define crb_addr_transform(name) \ 26 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 27 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 28 29 #define NETXEN_NIC_XDMA_RESET 0x8000ff 30 31 static void 32 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 33 struct nx_host_rds_ring *rds_ring); 34 static int netxen_p3_has_mn(struct netxen_adapter *adapter); 35 36 static void crb_addr_transform_setup(void) 37 { 38 crb_addr_transform(XDMA); 39 crb_addr_transform(TIMR); 40 crb_addr_transform(SRE); 41 crb_addr_transform(SQN3); 42 crb_addr_transform(SQN2); 43 crb_addr_transform(SQN1); 44 crb_addr_transform(SQN0); 45 crb_addr_transform(SQS3); 46 crb_addr_transform(SQS2); 47 crb_addr_transform(SQS1); 48 crb_addr_transform(SQS0); 49 crb_addr_transform(RPMX7); 50 crb_addr_transform(RPMX6); 51 crb_addr_transform(RPMX5); 52 crb_addr_transform(RPMX4); 53 crb_addr_transform(RPMX3); 54 crb_addr_transform(RPMX2); 55 crb_addr_transform(RPMX1); 56 crb_addr_transform(RPMX0); 57 crb_addr_transform(ROMUSB); 58 crb_addr_transform(SN); 59 crb_addr_transform(QMN); 60 crb_addr_transform(QMS); 61 crb_addr_transform(PGNI); 62 crb_addr_transform(PGND); 63 crb_addr_transform(PGN3); 64 crb_addr_transform(PGN2); 65 crb_addr_transform(PGN1); 66 crb_addr_transform(PGN0); 67 crb_addr_transform(PGSI); 68 crb_addr_transform(PGSD); 69 crb_addr_transform(PGS3); 70 crb_addr_transform(PGS2); 71 crb_addr_transform(PGS1); 72 crb_addr_transform(PGS0); 73 crb_addr_transform(PS); 74 crb_addr_transform(PH); 75 crb_addr_transform(NIU); 76 crb_addr_transform(I2Q); 77 crb_addr_transform(EG); 78 crb_addr_transform(MN); 79 crb_addr_transform(MS); 80 crb_addr_transform(CAS2); 81 crb_addr_transform(CAS1); 82 crb_addr_transform(CAS0); 83 crb_addr_transform(CAM); 84 crb_addr_transform(C2C1); 85 crb_addr_transform(C2C0); 86 crb_addr_transform(SMB); 87 crb_addr_transform(OCM0); 88 crb_addr_transform(I2C0); 89 } 90 91 void netxen_release_rx_buffers(struct netxen_adapter *adapter) 92 { 93 struct netxen_recv_context *recv_ctx; 94 struct nx_host_rds_ring *rds_ring; 95 struct netxen_rx_buffer *rx_buf; 96 int i, ring; 97 98 recv_ctx = &adapter->recv_ctx; 99 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 100 rds_ring = &recv_ctx->rds_rings[ring]; 101 for (i = 0; i < rds_ring->num_desc; ++i) { 102 rx_buf = &(rds_ring->rx_buf_arr[i]); 103 if (rx_buf->state == NETXEN_BUFFER_FREE) 104 continue; 105 dma_unmap_single(&adapter->pdev->dev, rx_buf->dma, 106 rds_ring->dma_size, DMA_FROM_DEVICE); 107 if (rx_buf->skb != NULL) 108 dev_kfree_skb_any(rx_buf->skb); 109 } 110 } 111 } 112 113 void netxen_release_tx_buffers(struct netxen_adapter *adapter) 114 { 115 struct netxen_cmd_buffer *cmd_buf; 116 struct netxen_skb_frag *buffrag; 117 int i, j; 118 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 119 120 spin_lock_bh(&adapter->tx_clean_lock); 121 cmd_buf = tx_ring->cmd_buf_arr; 122 for (i = 0; i < tx_ring->num_desc; i++) { 123 buffrag = cmd_buf->frag_array; 124 if (buffrag->dma) { 125 dma_unmap_single(&adapter->pdev->dev, buffrag->dma, 126 buffrag->length, DMA_TO_DEVICE); 127 buffrag->dma = 0ULL; 128 } 129 for (j = 1; j < cmd_buf->frag_count; j++) { 130 buffrag++; 131 if (buffrag->dma) { 132 dma_unmap_page(&adapter->pdev->dev, 133 buffrag->dma, buffrag->length, 134 DMA_TO_DEVICE); 135 buffrag->dma = 0ULL; 136 } 137 } 138 if (cmd_buf->skb) { 139 dev_kfree_skb_any(cmd_buf->skb); 140 cmd_buf->skb = NULL; 141 } 142 cmd_buf++; 143 } 144 spin_unlock_bh(&adapter->tx_clean_lock); 145 } 146 147 void netxen_free_sw_resources(struct netxen_adapter *adapter) 148 { 149 struct netxen_recv_context *recv_ctx; 150 struct nx_host_rds_ring *rds_ring; 151 struct nx_host_tx_ring *tx_ring; 152 int ring; 153 154 recv_ctx = &adapter->recv_ctx; 155 156 if (recv_ctx->rds_rings == NULL) 157 goto skip_rds; 158 159 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 160 rds_ring = &recv_ctx->rds_rings[ring]; 161 vfree(rds_ring->rx_buf_arr); 162 rds_ring->rx_buf_arr = NULL; 163 } 164 kfree(recv_ctx->rds_rings); 165 166 skip_rds: 167 if (adapter->tx_ring == NULL) 168 return; 169 170 tx_ring = adapter->tx_ring; 171 vfree(tx_ring->cmd_buf_arr); 172 kfree(tx_ring); 173 adapter->tx_ring = NULL; 174 } 175 176 int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 177 { 178 struct netxen_recv_context *recv_ctx; 179 struct nx_host_rds_ring *rds_ring; 180 struct nx_host_sds_ring *sds_ring; 181 struct nx_host_tx_ring *tx_ring; 182 struct netxen_rx_buffer *rx_buf; 183 int ring, i; 184 185 struct netxen_cmd_buffer *cmd_buf_arr; 186 struct net_device *netdev = adapter->netdev; 187 188 tx_ring = kzalloc(sizeof(struct nx_host_tx_ring), GFP_KERNEL); 189 if (tx_ring == NULL) 190 return -ENOMEM; 191 192 adapter->tx_ring = tx_ring; 193 194 tx_ring->num_desc = adapter->num_txd; 195 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 196 197 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring)); 198 if (cmd_buf_arr == NULL) 199 goto err_out; 200 201 tx_ring->cmd_buf_arr = cmd_buf_arr; 202 203 recv_ctx = &adapter->recv_ctx; 204 205 rds_ring = kcalloc(adapter->max_rds_rings, 206 sizeof(struct nx_host_rds_ring), GFP_KERNEL); 207 if (rds_ring == NULL) 208 goto err_out; 209 210 recv_ctx->rds_rings = rds_ring; 211 212 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 213 rds_ring = &recv_ctx->rds_rings[ring]; 214 switch (ring) { 215 case RCV_RING_NORMAL: 216 rds_ring->num_desc = adapter->num_rxd; 217 if (adapter->ahw.cut_through) { 218 rds_ring->dma_size = 219 NX_CT_DEFAULT_RX_BUF_LEN; 220 rds_ring->skb_size = 221 NX_CT_DEFAULT_RX_BUF_LEN; 222 } else { 223 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 224 rds_ring->dma_size = 225 NX_P3_RX_BUF_MAX_LEN; 226 else 227 rds_ring->dma_size = 228 NX_P2_RX_BUF_MAX_LEN; 229 rds_ring->skb_size = 230 rds_ring->dma_size + NET_IP_ALIGN; 231 } 232 break; 233 234 case RCV_RING_JUMBO: 235 rds_ring->num_desc = adapter->num_jumbo_rxd; 236 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 237 rds_ring->dma_size = 238 NX_P3_RX_JUMBO_BUF_MAX_LEN; 239 else 240 rds_ring->dma_size = 241 NX_P2_RX_JUMBO_BUF_MAX_LEN; 242 243 if (adapter->capabilities & NX_CAP0_HW_LRO) 244 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 245 246 rds_ring->skb_size = 247 rds_ring->dma_size + NET_IP_ALIGN; 248 break; 249 250 case RCV_RING_LRO: 251 rds_ring->num_desc = adapter->num_lro_rxd; 252 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 253 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 254 break; 255 256 } 257 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 258 if (rds_ring->rx_buf_arr == NULL) 259 /* free whatever was already allocated */ 260 goto err_out; 261 262 INIT_LIST_HEAD(&rds_ring->free_list); 263 /* 264 * Now go through all of them, set reference handles 265 * and put them in the queues. 266 */ 267 rx_buf = rds_ring->rx_buf_arr; 268 for (i = 0; i < rds_ring->num_desc; i++) { 269 list_add_tail(&rx_buf->list, 270 &rds_ring->free_list); 271 rx_buf->ref_handle = i; 272 rx_buf->state = NETXEN_BUFFER_FREE; 273 rx_buf++; 274 } 275 spin_lock_init(&rds_ring->lock); 276 } 277 278 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 279 sds_ring = &recv_ctx->sds_rings[ring]; 280 sds_ring->irq = adapter->msix_entries[ring].vector; 281 sds_ring->adapter = adapter; 282 sds_ring->num_desc = adapter->num_rxd; 283 284 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 285 INIT_LIST_HEAD(&sds_ring->free_list[i]); 286 } 287 288 return 0; 289 290 err_out: 291 netxen_free_sw_resources(adapter); 292 return -ENOMEM; 293 } 294 295 /* 296 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 297 * address to external PCI CRB address. 298 */ 299 static u32 netxen_decode_crb_addr(u32 addr) 300 { 301 int i; 302 u32 base_addr, offset, pci_base; 303 304 crb_addr_transform_setup(); 305 306 pci_base = NETXEN_ADDR_ERROR; 307 base_addr = addr & 0xfff00000; 308 offset = addr & 0x000fffff; 309 310 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 311 if (crb_addr_xform[i] == base_addr) { 312 pci_base = i << 20; 313 break; 314 } 315 } 316 if (pci_base == NETXEN_ADDR_ERROR) 317 return pci_base; 318 else 319 return pci_base + offset; 320 } 321 322 #define NETXEN_MAX_ROM_WAIT_USEC 100 323 324 static int netxen_wait_rom_done(struct netxen_adapter *adapter) 325 { 326 long timeout = 0; 327 long done = 0; 328 329 cond_resched(); 330 331 while (done == 0) { 332 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 333 done &= 2; 334 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 335 dev_err(&adapter->pdev->dev, 336 "Timeout reached waiting for rom done"); 337 return -EIO; 338 } 339 udelay(1); 340 } 341 return 0; 342 } 343 344 static int do_rom_fast_read(struct netxen_adapter *adapter, 345 int addr, int *valp) 346 { 347 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 348 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 349 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 350 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 351 if (netxen_wait_rom_done(adapter)) { 352 printk("Error waiting for rom done\n"); 353 return -EIO; 354 } 355 /* reset abyte_cnt and dummy_byte_cnt */ 356 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 357 udelay(10); 358 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 359 360 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 361 return 0; 362 } 363 364 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 365 u8 *bytes, size_t size) 366 { 367 int addridx; 368 int ret = 0; 369 370 for (addridx = addr; addridx < (addr + size); addridx += 4) { 371 int v; 372 ret = do_rom_fast_read(adapter, addridx, &v); 373 if (ret != 0) 374 break; 375 *(__le32 *)bytes = cpu_to_le32(v); 376 bytes += 4; 377 } 378 379 return ret; 380 } 381 382 int 383 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 384 u8 *bytes, size_t size) 385 { 386 int ret; 387 388 ret = netxen_rom_lock(adapter); 389 if (ret < 0) 390 return ret; 391 392 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 393 394 netxen_rom_unlock(adapter); 395 return ret; 396 } 397 398 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 399 { 400 int ret; 401 402 if (netxen_rom_lock(adapter) != 0) 403 return -EIO; 404 405 ret = do_rom_fast_read(adapter, addr, valp); 406 netxen_rom_unlock(adapter); 407 return ret; 408 } 409 410 #define NETXEN_BOARDTYPE 0x4008 411 #define NETXEN_BOARDNUM 0x400c 412 #define NETXEN_CHIPNUM 0x4010 413 414 int netxen_pinit_from_rom(struct netxen_adapter *adapter) 415 { 416 int addr, val; 417 int i, n, init_delay = 0; 418 struct crb_addr_pair *buf; 419 unsigned offset; 420 u32 off; 421 422 /* resetall */ 423 netxen_rom_lock(adapter); 424 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff); 425 netxen_rom_unlock(adapter); 426 427 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 428 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 429 (n != 0xcafecafe) || 430 netxen_rom_fast_read(adapter, 4, &n) != 0) { 431 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 432 "n: %08x\n", netxen_nic_driver_name, n); 433 return -EIO; 434 } 435 offset = n & 0xffffU; 436 n = (n >> 16) & 0xffffU; 437 } else { 438 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 439 !(n & 0x80000000)) { 440 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 441 "n: %08x\n", netxen_nic_driver_name, n); 442 return -EIO; 443 } 444 offset = 1; 445 n &= ~0x80000000; 446 } 447 448 if (n >= 1024) { 449 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 450 " initialized.\n", __func__, n); 451 return -EIO; 452 } 453 454 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 455 if (buf == NULL) 456 return -ENOMEM; 457 458 for (i = 0; i < n; i++) { 459 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 460 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 461 kfree(buf); 462 return -EIO; 463 } 464 465 buf[i].addr = addr; 466 buf[i].data = val; 467 468 } 469 470 for (i = 0; i < n; i++) { 471 472 off = netxen_decode_crb_addr(buf[i].addr); 473 if (off == NETXEN_ADDR_ERROR) { 474 printk(KERN_ERR"CRB init value out of range %x\n", 475 buf[i].addr); 476 continue; 477 } 478 off += NETXEN_PCI_CRBSPACE; 479 480 if (off & 1) 481 continue; 482 483 /* skipping cold reboot MAGIC */ 484 if (off == NETXEN_CAM_RAM(0x1fc)) 485 continue; 486 487 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 488 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 489 continue; 490 /* do not reset PCI */ 491 if (off == (ROMUSB_GLB + 0xbc)) 492 continue; 493 if (off == (ROMUSB_GLB + 0xa8)) 494 continue; 495 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 496 continue; 497 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 498 continue; 499 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 500 continue; 501 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 502 continue; 503 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 504 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 505 buf[i].data = 0x1020; 506 /* skip the function enable register */ 507 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 508 continue; 509 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 510 continue; 511 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 512 continue; 513 } 514 515 init_delay = 1; 516 /* After writing this register, HW needs time for CRB */ 517 /* to quiet down (else crb_window returns 0xffffffff) */ 518 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 519 init_delay = 1000; 520 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 521 /* hold xdma in reset also */ 522 buf[i].data = NETXEN_NIC_XDMA_RESET; 523 buf[i].data = 0x8000ff; 524 } 525 } 526 527 NXWR32(adapter, off, buf[i].data); 528 529 msleep(init_delay); 530 } 531 kfree(buf); 532 533 /* disable_peg_cache_all */ 534 535 /* unreset_net_cache */ 536 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 537 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 538 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 539 } 540 541 /* p2dn replyCount */ 542 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 543 /* disable_peg_cache 0 */ 544 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 545 /* disable_peg_cache 1 */ 546 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 547 548 /* peg_clr_all */ 549 550 /* peg_clr 0 */ 551 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 552 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 553 /* peg_clr 1 */ 554 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 555 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 556 /* peg_clr 2 */ 557 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 558 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 559 /* peg_clr 3 */ 560 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 561 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 562 return 0; 563 } 564 565 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 566 { 567 uint32_t i; 568 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 569 __le32 entries = cpu_to_le32(directory->num_entries); 570 571 for (i = 0; i < entries; i++) { 572 573 __le32 offs = cpu_to_le32(directory->findex) + 574 (i * cpu_to_le32(directory->entry_size)); 575 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 576 577 if (tab_type == section) 578 return (struct uni_table_desc *) &unirom[offs]; 579 } 580 581 return NULL; 582 } 583 584 #define QLCNIC_FILEHEADER_SIZE (14 * 4) 585 586 static int 587 netxen_nic_validate_header(struct netxen_adapter *adapter) 588 { 589 const u8 *unirom = adapter->fw->data; 590 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 591 u32 fw_file_size = adapter->fw->size; 592 u32 tab_size; 593 __le32 entries; 594 __le32 entry_size; 595 596 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 597 return -EINVAL; 598 599 entries = cpu_to_le32(directory->num_entries); 600 entry_size = cpu_to_le32(directory->entry_size); 601 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 602 603 if (fw_file_size < tab_size) 604 return -EINVAL; 605 606 return 0; 607 } 608 609 static int 610 netxen_nic_validate_bootld(struct netxen_adapter *adapter) 611 { 612 struct uni_table_desc *tab_desc; 613 struct uni_data_desc *descr; 614 const u8 *unirom = adapter->fw->data; 615 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 616 NX_UNI_BOOTLD_IDX_OFF)); 617 u32 offs; 618 u32 tab_size; 619 u32 data_size; 620 621 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 622 623 if (!tab_desc) 624 return -EINVAL; 625 626 tab_size = cpu_to_le32(tab_desc->findex) + 627 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 628 629 if (adapter->fw->size < tab_size) 630 return -EINVAL; 631 632 offs = cpu_to_le32(tab_desc->findex) + 633 (cpu_to_le32(tab_desc->entry_size) * (idx)); 634 descr = (struct uni_data_desc *)&unirom[offs]; 635 636 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 637 638 if (adapter->fw->size < data_size) 639 return -EINVAL; 640 641 return 0; 642 } 643 644 static int 645 netxen_nic_validate_fw(struct netxen_adapter *adapter) 646 { 647 struct uni_table_desc *tab_desc; 648 struct uni_data_desc *descr; 649 const u8 *unirom = adapter->fw->data; 650 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 651 NX_UNI_FIRMWARE_IDX_OFF)); 652 u32 offs; 653 u32 tab_size; 654 u32 data_size; 655 656 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 657 658 if (!tab_desc) 659 return -EINVAL; 660 661 tab_size = cpu_to_le32(tab_desc->findex) + 662 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 663 664 if (adapter->fw->size < tab_size) 665 return -EINVAL; 666 667 offs = cpu_to_le32(tab_desc->findex) + 668 (cpu_to_le32(tab_desc->entry_size) * (idx)); 669 descr = (struct uni_data_desc *)&unirom[offs]; 670 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 671 672 if (adapter->fw->size < data_size) 673 return -EINVAL; 674 675 return 0; 676 } 677 678 679 static int 680 netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 681 { 682 struct uni_table_desc *ptab_descr; 683 const u8 *unirom = adapter->fw->data; 684 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 685 1 : netxen_p3_has_mn(adapter); 686 __le32 entries; 687 __le32 entry_size; 688 u32 tab_size; 689 u32 i; 690 691 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 692 if (ptab_descr == NULL) 693 return -EINVAL; 694 695 entries = cpu_to_le32(ptab_descr->num_entries); 696 entry_size = cpu_to_le32(ptab_descr->entry_size); 697 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 698 699 if (adapter->fw->size < tab_size) 700 return -EINVAL; 701 702 nomn: 703 for (i = 0; i < entries; i++) { 704 705 __le32 flags, file_chiprev, offs; 706 u8 chiprev = adapter->ahw.revision_id; 707 uint32_t flagbit; 708 709 offs = cpu_to_le32(ptab_descr->findex) + 710 (i * cpu_to_le32(ptab_descr->entry_size)); 711 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 712 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 713 NX_UNI_CHIP_REV_OFF)); 714 715 flagbit = mn_present ? 1 : 2; 716 717 if ((chiprev == file_chiprev) && 718 ((1ULL << flagbit) & flags)) { 719 adapter->file_prd_off = offs; 720 return 0; 721 } 722 } 723 724 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 725 mn_present = 0; 726 goto nomn; 727 } 728 729 return -EINVAL; 730 } 731 732 static int 733 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 734 { 735 if (netxen_nic_validate_header(adapter)) { 736 dev_err(&adapter->pdev->dev, 737 "unified image: header validation failed\n"); 738 return -EINVAL; 739 } 740 741 if (netxen_nic_validate_product_offs(adapter)) { 742 dev_err(&adapter->pdev->dev, 743 "unified image: product validation failed\n"); 744 return -EINVAL; 745 } 746 747 if (netxen_nic_validate_bootld(adapter)) { 748 dev_err(&adapter->pdev->dev, 749 "unified image: bootld validation failed\n"); 750 return -EINVAL; 751 } 752 753 if (netxen_nic_validate_fw(adapter)) { 754 dev_err(&adapter->pdev->dev, 755 "unified image: firmware validation failed\n"); 756 return -EINVAL; 757 } 758 759 return 0; 760 } 761 762 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 763 u32 section, u32 idx_offset) 764 { 765 const u8 *unirom = adapter->fw->data; 766 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 767 idx_offset)); 768 struct uni_table_desc *tab_desc; 769 __le32 offs; 770 771 tab_desc = nx_get_table_desc(unirom, section); 772 773 if (tab_desc == NULL) 774 return NULL; 775 776 offs = cpu_to_le32(tab_desc->findex) + 777 (cpu_to_le32(tab_desc->entry_size) * idx); 778 779 return (struct uni_data_desc *)&unirom[offs]; 780 } 781 782 static u8 * 783 nx_get_bootld_offs(struct netxen_adapter *adapter) 784 { 785 u32 offs = NETXEN_BOOTLD_START; 786 787 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 788 offs = cpu_to_le32((nx_get_data_desc(adapter, 789 NX_UNI_DIR_SECT_BOOTLD, 790 NX_UNI_BOOTLD_IDX_OFF))->findex); 791 792 return (u8 *)&adapter->fw->data[offs]; 793 } 794 795 static u8 * 796 nx_get_fw_offs(struct netxen_adapter *adapter) 797 { 798 u32 offs = NETXEN_IMAGE_START; 799 800 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 801 offs = cpu_to_le32((nx_get_data_desc(adapter, 802 NX_UNI_DIR_SECT_FW, 803 NX_UNI_FIRMWARE_IDX_OFF))->findex); 804 805 return (u8 *)&adapter->fw->data[offs]; 806 } 807 808 static __le32 809 nx_get_fw_size(struct netxen_adapter *adapter) 810 { 811 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 812 return cpu_to_le32((nx_get_data_desc(adapter, 813 NX_UNI_DIR_SECT_FW, 814 NX_UNI_FIRMWARE_IDX_OFF))->size); 815 else 816 return cpu_to_le32( 817 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 818 } 819 820 static __le32 821 nx_get_fw_version(struct netxen_adapter *adapter) 822 { 823 struct uni_data_desc *fw_data_desc; 824 const struct firmware *fw = adapter->fw; 825 __le32 major, minor, sub; 826 const u8 *ver_str; 827 int i, ret = 0; 828 829 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 830 831 fw_data_desc = nx_get_data_desc(adapter, 832 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 833 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 834 cpu_to_le32(fw_data_desc->size) - 17; 835 836 for (i = 0; i < 12; i++) { 837 if (!strncmp(&ver_str[i], "REV=", 4)) { 838 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 839 &major, &minor, &sub); 840 break; 841 } 842 } 843 844 if (ret != 3) 845 return 0; 846 847 return major + (minor << 8) + (sub << 16); 848 849 } else 850 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 851 } 852 853 static __le32 854 nx_get_bios_version(struct netxen_adapter *adapter) 855 { 856 const struct firmware *fw = adapter->fw; 857 __le32 bios_ver, prd_off = adapter->file_prd_off; 858 859 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 860 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 861 + NX_UNI_BIOS_VERSION_OFF)); 862 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 863 (bios_ver >> 24); 864 } else 865 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 866 867 } 868 869 int 870 netxen_need_fw_reset(struct netxen_adapter *adapter) 871 { 872 u32 count, old_count; 873 u32 val, version, major, minor, build; 874 int i, timeout; 875 u8 fw_type; 876 877 /* NX2031 firmware doesn't support heartbit */ 878 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 879 return 1; 880 881 if (adapter->need_fw_reset) 882 return 1; 883 884 /* last attempt had failed */ 885 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 886 return 1; 887 888 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 889 890 for (i = 0; i < 10; i++) { 891 892 timeout = msleep_interruptible(200); 893 if (timeout) { 894 NXWR32(adapter, CRB_CMDPEG_STATE, 895 PHAN_INITIALIZE_FAILED); 896 return -EINTR; 897 } 898 899 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 900 if (count != old_count) 901 break; 902 } 903 904 /* firmware is dead */ 905 if (count == old_count) 906 return 1; 907 908 /* check if we have got newer or different file firmware */ 909 if (adapter->fw) { 910 911 val = nx_get_fw_version(adapter); 912 913 version = NETXEN_DECODE_VERSION(val); 914 915 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 916 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 917 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 918 919 if (version > NETXEN_VERSION_CODE(major, minor, build)) 920 return 1; 921 922 if (version == NETXEN_VERSION_CODE(major, minor, build) && 923 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 924 925 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 926 fw_type = (val & 0x4) ? 927 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 928 929 if (adapter->fw_type != fw_type) 930 return 1; 931 } 932 } 933 934 return 0; 935 } 936 937 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505) 938 939 int 940 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter) 941 { 942 u32 flash_fw_ver, min_fw_ver; 943 944 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 945 return 0; 946 947 if (netxen_rom_fast_read(adapter, 948 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 949 dev_err(&adapter->pdev->dev, "Unable to read flash fw" 950 "version\n"); 951 return -EIO; 952 } 953 954 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 955 min_fw_ver = NETXEN_MIN_P3_FW_SUPP; 956 if (flash_fw_ver >= min_fw_ver) 957 return 0; 958 959 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported" 960 "[4.0.505]. Please update firmware on flash\n", 961 _major(flash_fw_ver), _minor(flash_fw_ver), 962 _build(flash_fw_ver)); 963 return -EINVAL; 964 } 965 966 static char *fw_name[] = { 967 NX_P2_MN_ROMIMAGE_NAME, 968 NX_P3_CT_ROMIMAGE_NAME, 969 NX_P3_MN_ROMIMAGE_NAME, 970 NX_UNIFIED_ROMIMAGE_NAME, 971 NX_FLASH_ROMIMAGE_NAME, 972 }; 973 974 int 975 netxen_load_firmware(struct netxen_adapter *adapter) 976 { 977 u64 *ptr64; 978 u32 i, flashaddr, size; 979 const struct firmware *fw = adapter->fw; 980 struct pci_dev *pdev = adapter->pdev; 981 982 dev_info(&pdev->dev, "loading firmware from %s\n", 983 fw_name[adapter->fw_type]); 984 985 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 986 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 987 988 if (fw) { 989 __le64 data; 990 991 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 992 993 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 994 flashaddr = NETXEN_BOOTLD_START; 995 996 for (i = 0; i < size; i++) { 997 data = cpu_to_le64(ptr64[i]); 998 999 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1000 return -EIO; 1001 1002 flashaddr += 8; 1003 } 1004 1005 size = (__force u32)nx_get_fw_size(adapter) / 8; 1006 1007 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1008 flashaddr = NETXEN_IMAGE_START; 1009 1010 for (i = 0; i < size; i++) { 1011 data = cpu_to_le64(ptr64[i]); 1012 1013 if (adapter->pci_mem_write(adapter, 1014 flashaddr, data)) 1015 return -EIO; 1016 1017 flashaddr += 8; 1018 } 1019 1020 size = (__force u32)nx_get_fw_size(adapter) % 8; 1021 if (size) { 1022 data = cpu_to_le64(ptr64[i]); 1023 1024 if (adapter->pci_mem_write(adapter, 1025 flashaddr, data)) 1026 return -EIO; 1027 } 1028 1029 } else { 1030 u64 data; 1031 u32 hi, lo; 1032 1033 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1034 flashaddr = NETXEN_BOOTLD_START; 1035 1036 for (i = 0; i < size; i++) { 1037 if (netxen_rom_fast_read(adapter, 1038 flashaddr, (int *)&lo) != 0) 1039 return -EIO; 1040 if (netxen_rom_fast_read(adapter, 1041 flashaddr + 4, (int *)&hi) != 0) 1042 return -EIO; 1043 1044 /* hi, lo are already in host endian byteorder */ 1045 data = (((u64)hi << 32) | lo); 1046 1047 if (adapter->pci_mem_write(adapter, 1048 flashaddr, data)) 1049 return -EIO; 1050 1051 flashaddr += 8; 1052 } 1053 } 1054 msleep(1); 1055 1056 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1057 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1058 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1059 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1060 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1061 else { 1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1063 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1064 } 1065 1066 return 0; 1067 } 1068 1069 static int 1070 netxen_validate_firmware(struct netxen_adapter *adapter) 1071 { 1072 __le32 val; 1073 __le32 flash_fw_ver; 1074 u32 file_fw_ver, min_ver, bios; 1075 struct pci_dev *pdev = adapter->pdev; 1076 const struct firmware *fw = adapter->fw; 1077 u8 fw_type = adapter->fw_type; 1078 u32 crbinit_fix_fw; 1079 1080 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1081 if (netxen_nic_validate_unified_romimage(adapter)) 1082 return -EINVAL; 1083 } else { 1084 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1085 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1086 return -EINVAL; 1087 1088 if (fw->size < NX_FW_MIN_SIZE) 1089 return -EINVAL; 1090 } 1091 1092 val = nx_get_fw_version(adapter); 1093 1094 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1095 min_ver = NETXEN_MIN_P3_FW_SUPP; 1096 else 1097 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1098 1099 file_fw_ver = NETXEN_DECODE_VERSION(val); 1100 1101 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) || 1102 (file_fw_ver < min_ver)) { 1103 dev_err(&pdev->dev, 1104 "%s: firmware version %d.%d.%d unsupported\n", 1105 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver), 1106 _build(file_fw_ver)); 1107 return -EINVAL; 1108 } 1109 val = nx_get_bios_version(adapter); 1110 if (netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios)) 1111 return -EIO; 1112 if ((__force u32)val != bios) { 1113 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1114 fw_name[fw_type]); 1115 return -EINVAL; 1116 } 1117 1118 if (netxen_rom_fast_read(adapter, 1119 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 1120 dev_err(&pdev->dev, "Unable to read flash fw version\n"); 1121 return -EIO; 1122 } 1123 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 1124 1125 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */ 1126 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554); 1127 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw && 1128 NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 1129 dev_err(&pdev->dev, "Incompatibility detected between driver " 1130 "and firmware version on flash. This configuration " 1131 "is not recommended. Please update the firmware on " 1132 "flash immediately\n"); 1133 return -EINVAL; 1134 } 1135 1136 /* check if flashed firmware is newer only for no-mn and P2 case*/ 1137 if (!netxen_p3_has_mn(adapter) || 1138 NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1139 if (flash_fw_ver > file_fw_ver) { 1140 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1141 fw_name[fw_type]); 1142 return -EINVAL; 1143 } 1144 } 1145 1146 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1147 return 0; 1148 } 1149 1150 static void 1151 nx_get_next_fwtype(struct netxen_adapter *adapter) 1152 { 1153 u8 fw_type; 1154 1155 switch (adapter->fw_type) { 1156 case NX_UNKNOWN_ROMIMAGE: 1157 fw_type = NX_UNIFIED_ROMIMAGE; 1158 break; 1159 1160 case NX_UNIFIED_ROMIMAGE: 1161 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1162 fw_type = NX_FLASH_ROMIMAGE; 1163 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1164 fw_type = NX_P2_MN_ROMIMAGE; 1165 else if (netxen_p3_has_mn(adapter)) 1166 fw_type = NX_P3_MN_ROMIMAGE; 1167 else 1168 fw_type = NX_P3_CT_ROMIMAGE; 1169 break; 1170 1171 case NX_P3_MN_ROMIMAGE: 1172 fw_type = NX_P3_CT_ROMIMAGE; 1173 break; 1174 1175 case NX_P2_MN_ROMIMAGE: 1176 case NX_P3_CT_ROMIMAGE: 1177 default: 1178 fw_type = NX_FLASH_ROMIMAGE; 1179 break; 1180 } 1181 1182 adapter->fw_type = fw_type; 1183 } 1184 1185 static int 1186 netxen_p3_has_mn(struct netxen_adapter *adapter) 1187 { 1188 u32 capability, flashed_ver; 1189 capability = 0; 1190 1191 /* NX2031 always had MN */ 1192 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1193 return 1; 1194 1195 netxen_rom_fast_read(adapter, 1196 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1197 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1198 1199 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1200 1201 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1202 if (capability & NX_PEG_TUNE_MN_PRESENT) 1203 return 1; 1204 } 1205 return 0; 1206 } 1207 1208 void netxen_request_firmware(struct netxen_adapter *adapter) 1209 { 1210 struct pci_dev *pdev = adapter->pdev; 1211 int rc = 0; 1212 1213 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1214 1215 next: 1216 nx_get_next_fwtype(adapter); 1217 1218 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1219 adapter->fw = NULL; 1220 } else { 1221 rc = request_firmware(&adapter->fw, 1222 fw_name[adapter->fw_type], &pdev->dev); 1223 if (rc != 0) 1224 goto next; 1225 1226 rc = netxen_validate_firmware(adapter); 1227 if (rc != 0) { 1228 release_firmware(adapter->fw); 1229 msleep(1); 1230 goto next; 1231 } 1232 } 1233 } 1234 1235 1236 void 1237 netxen_release_firmware(struct netxen_adapter *adapter) 1238 { 1239 release_firmware(adapter->fw); 1240 adapter->fw = NULL; 1241 } 1242 1243 int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1244 { 1245 u64 addr; 1246 u32 hi, lo; 1247 1248 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1249 return 0; 1250 1251 adapter->dummy_dma.addr = dma_alloc_coherent(&adapter->pdev->dev, 1252 NETXEN_HOST_DUMMY_DMA_SIZE, 1253 &adapter->dummy_dma.phys_addr, 1254 GFP_KERNEL); 1255 if (adapter->dummy_dma.addr == NULL) { 1256 dev_err(&adapter->pdev->dev, 1257 "ERROR: Could not allocate dummy DMA memory\n"); 1258 return -ENOMEM; 1259 } 1260 1261 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1262 hi = (addr >> 32) & 0xffffffff; 1263 lo = addr & 0xffffffff; 1264 1265 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1266 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1267 1268 return 0; 1269 } 1270 1271 /* 1272 * NetXen DMA watchdog control: 1273 * 1274 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1275 * Bit 1 : disable_request => 1 req disable dma watchdog 1276 * Bit 2 : enable_request => 1 req enable dma watchdog 1277 * Bit 3-31 : unused 1278 */ 1279 void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1280 { 1281 int i = 100; 1282 u32 ctrl; 1283 1284 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1285 return; 1286 1287 if (!adapter->dummy_dma.addr) 1288 return; 1289 1290 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1291 if ((ctrl & 0x1) != 0) { 1292 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1293 1294 while ((ctrl & 0x1) != 0) { 1295 1296 msleep(50); 1297 1298 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1299 1300 if (--i == 0) 1301 break; 1302 } 1303 } 1304 1305 if (i) { 1306 dma_free_coherent(&adapter->pdev->dev, 1307 NETXEN_HOST_DUMMY_DMA_SIZE, 1308 adapter->dummy_dma.addr, 1309 adapter->dummy_dma.phys_addr); 1310 adapter->dummy_dma.addr = NULL; 1311 } else 1312 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1313 } 1314 1315 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1316 { 1317 u32 val = 0; 1318 int retries = 60; 1319 1320 if (pegtune_val) 1321 return 0; 1322 1323 do { 1324 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1325 switch (val) { 1326 case PHAN_INITIALIZE_COMPLETE: 1327 case PHAN_INITIALIZE_ACK: 1328 return 0; 1329 case PHAN_INITIALIZE_FAILED: 1330 goto out_err; 1331 default: 1332 break; 1333 } 1334 1335 msleep(500); 1336 1337 } while (--retries); 1338 1339 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1340 1341 out_err: 1342 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1343 return -EIO; 1344 } 1345 1346 static int 1347 netxen_receive_peg_ready(struct netxen_adapter *adapter) 1348 { 1349 u32 val = 0; 1350 int retries = 2000; 1351 1352 do { 1353 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1354 1355 if (val == PHAN_PEG_RCV_INITIALIZED) 1356 return 0; 1357 1358 msleep(10); 1359 1360 } while (--retries); 1361 1362 pr_err("Receive Peg initialization not complete, state: 0x%x.\n", val); 1363 return -EIO; 1364 } 1365 1366 int netxen_init_firmware(struct netxen_adapter *adapter) 1367 { 1368 int err; 1369 1370 err = netxen_receive_peg_ready(adapter); 1371 if (err) 1372 return err; 1373 1374 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1375 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1376 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1377 1378 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1379 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1380 1381 return err; 1382 } 1383 1384 static void 1385 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1386 { 1387 u32 cable_OUI; 1388 u16 cable_len; 1389 u16 link_speed; 1390 u8 link_status, module, duplex, autoneg; 1391 struct net_device *netdev = adapter->netdev; 1392 1393 adapter->has_link_events = 1; 1394 1395 cable_OUI = msg->body[1] & 0xffffffff; 1396 cable_len = (msg->body[1] >> 32) & 0xffff; 1397 link_speed = (msg->body[1] >> 48) & 0xffff; 1398 1399 link_status = msg->body[2] & 0xff; 1400 duplex = (msg->body[2] >> 16) & 0xff; 1401 autoneg = (msg->body[2] >> 24) & 0xff; 1402 1403 module = (msg->body[2] >> 8) & 0xff; 1404 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1405 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1406 netdev->name, cable_OUI, cable_len); 1407 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1408 printk(KERN_INFO "%s: unsupported cable length %d\n", 1409 netdev->name, cable_len); 1410 } 1411 1412 /* update link parameters */ 1413 if (duplex == LINKEVENT_FULL_DUPLEX) 1414 adapter->link_duplex = DUPLEX_FULL; 1415 else 1416 adapter->link_duplex = DUPLEX_HALF; 1417 adapter->module_type = module; 1418 adapter->link_autoneg = autoneg; 1419 adapter->link_speed = link_speed; 1420 1421 netxen_advert_link_change(adapter, link_status); 1422 } 1423 1424 static void 1425 netxen_handle_fw_message(int desc_cnt, int index, 1426 struct nx_host_sds_ring *sds_ring) 1427 { 1428 nx_fw_msg_t msg; 1429 struct status_desc *desc; 1430 int i = 0, opcode; 1431 1432 while (desc_cnt > 0 && i < 8) { 1433 desc = &sds_ring->desc_head[index]; 1434 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1435 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1436 1437 index = get_next_index(index, sds_ring->num_desc); 1438 desc_cnt--; 1439 } 1440 1441 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1442 switch (opcode) { 1443 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1444 netxen_handle_linkevent(sds_ring->adapter, &msg); 1445 break; 1446 default: 1447 break; 1448 } 1449 } 1450 1451 static int 1452 netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1453 struct nx_host_rds_ring *rds_ring, 1454 struct netxen_rx_buffer *buffer) 1455 { 1456 struct sk_buff *skb; 1457 dma_addr_t dma; 1458 struct pci_dev *pdev = adapter->pdev; 1459 1460 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size); 1461 if (!buffer->skb) 1462 return 1; 1463 1464 skb = buffer->skb; 1465 1466 if (!adapter->ahw.cut_through) 1467 skb_reserve(skb, 2); 1468 1469 dma = dma_map_single(&pdev->dev, skb->data, rds_ring->dma_size, 1470 DMA_FROM_DEVICE); 1471 1472 if (dma_mapping_error(&pdev->dev, dma)) { 1473 dev_kfree_skb_any(skb); 1474 buffer->skb = NULL; 1475 return 1; 1476 } 1477 1478 buffer->skb = skb; 1479 buffer->dma = dma; 1480 buffer->state = NETXEN_BUFFER_BUSY; 1481 1482 return 0; 1483 } 1484 1485 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1486 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1487 { 1488 struct netxen_rx_buffer *buffer; 1489 struct sk_buff *skb; 1490 1491 buffer = &rds_ring->rx_buf_arr[index]; 1492 1493 dma_unmap_single(&adapter->pdev->dev, buffer->dma, rds_ring->dma_size, 1494 DMA_FROM_DEVICE); 1495 1496 skb = buffer->skb; 1497 if (!skb) 1498 goto no_skb; 1499 1500 if (likely((adapter->netdev->features & NETIF_F_RXCSUM) 1501 && cksum == STATUS_CKSUM_OK)) { 1502 adapter->stats.csummed++; 1503 skb->ip_summed = CHECKSUM_UNNECESSARY; 1504 } else 1505 skb->ip_summed = CHECKSUM_NONE; 1506 1507 buffer->skb = NULL; 1508 no_skb: 1509 buffer->state = NETXEN_BUFFER_FREE; 1510 return skb; 1511 } 1512 1513 static struct netxen_rx_buffer * 1514 netxen_process_rcv(struct netxen_adapter *adapter, 1515 struct nx_host_sds_ring *sds_ring, 1516 int ring, u64 sts_data0) 1517 { 1518 struct net_device *netdev = adapter->netdev; 1519 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1520 struct netxen_rx_buffer *buffer; 1521 struct sk_buff *skb; 1522 struct nx_host_rds_ring *rds_ring; 1523 int index, length, cksum, pkt_offset; 1524 1525 if (unlikely(ring >= adapter->max_rds_rings)) 1526 return NULL; 1527 1528 rds_ring = &recv_ctx->rds_rings[ring]; 1529 1530 index = netxen_get_sts_refhandle(sts_data0); 1531 if (unlikely(index >= rds_ring->num_desc)) 1532 return NULL; 1533 1534 buffer = &rds_ring->rx_buf_arr[index]; 1535 1536 length = netxen_get_sts_totallength(sts_data0); 1537 cksum = netxen_get_sts_status(sts_data0); 1538 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1539 1540 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1541 if (!skb) 1542 return buffer; 1543 1544 if (length > rds_ring->skb_size) 1545 skb_put(skb, rds_ring->skb_size); 1546 else 1547 skb_put(skb, length); 1548 1549 1550 if (pkt_offset) 1551 skb_pull(skb, pkt_offset); 1552 1553 skb->protocol = eth_type_trans(skb, netdev); 1554 1555 napi_gro_receive(&sds_ring->napi, skb); 1556 1557 adapter->stats.rx_pkts++; 1558 adapter->stats.rxbytes += length; 1559 1560 return buffer; 1561 } 1562 1563 #define TCP_HDR_SIZE 20 1564 #define TCP_TS_OPTION_SIZE 12 1565 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1566 1567 static struct netxen_rx_buffer * 1568 netxen_process_lro(struct netxen_adapter *adapter, 1569 struct nx_host_sds_ring *sds_ring, 1570 int ring, u64 sts_data0, u64 sts_data1) 1571 { 1572 struct net_device *netdev = adapter->netdev; 1573 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1574 struct netxen_rx_buffer *buffer; 1575 struct sk_buff *skb; 1576 struct nx_host_rds_ring *rds_ring; 1577 struct iphdr *iph; 1578 struct tcphdr *th; 1579 bool push, timestamp; 1580 int l2_hdr_offset, l4_hdr_offset; 1581 int index; 1582 u16 lro_length, length, data_offset; 1583 u32 seq_number; 1584 u8 vhdr_len = 0; 1585 1586 if (unlikely(ring >= adapter->max_rds_rings)) 1587 return NULL; 1588 1589 rds_ring = &recv_ctx->rds_rings[ring]; 1590 1591 index = netxen_get_lro_sts_refhandle(sts_data0); 1592 if (unlikely(index >= rds_ring->num_desc)) 1593 return NULL; 1594 1595 buffer = &rds_ring->rx_buf_arr[index]; 1596 1597 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1598 lro_length = netxen_get_lro_sts_length(sts_data0); 1599 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1600 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1601 push = netxen_get_lro_sts_push_flag(sts_data0); 1602 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1603 1604 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1605 if (!skb) 1606 return buffer; 1607 1608 if (timestamp) 1609 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1610 else 1611 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1612 1613 skb_put(skb, lro_length + data_offset); 1614 1615 skb_pull(skb, l2_hdr_offset); 1616 skb->protocol = eth_type_trans(skb, netdev); 1617 1618 if (skb->protocol == htons(ETH_P_8021Q)) 1619 vhdr_len = VLAN_HLEN; 1620 iph = (struct iphdr *)(skb->data + vhdr_len); 1621 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2)); 1622 1623 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1624 csum_replace2(&iph->check, iph->tot_len, htons(length)); 1625 iph->tot_len = htons(length); 1626 th->psh = push; 1627 th->seq = htonl(seq_number); 1628 1629 length = skb->len; 1630 1631 if (adapter->flags & NETXEN_FW_MSS_CAP) 1632 skb_shinfo(skb)->gso_size = netxen_get_lro_sts_mss(sts_data1); 1633 1634 netif_receive_skb(skb); 1635 1636 adapter->stats.lro_pkts++; 1637 adapter->stats.rxbytes += length; 1638 1639 return buffer; 1640 } 1641 1642 #define netxen_merge_rx_buffers(list, head) \ 1643 do { list_splice_tail_init(list, head); } while (0); 1644 1645 int 1646 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1647 { 1648 struct netxen_adapter *adapter = sds_ring->adapter; 1649 1650 struct list_head *cur; 1651 1652 struct status_desc *desc; 1653 struct netxen_rx_buffer *rxbuf; 1654 1655 u32 consumer = sds_ring->consumer; 1656 1657 int count = 0; 1658 u64 sts_data0, sts_data1; 1659 int opcode, ring = 0, desc_cnt; 1660 1661 while (count < max) { 1662 desc = &sds_ring->desc_head[consumer]; 1663 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1664 1665 if (!(sts_data0 & STATUS_OWNER_HOST)) 1666 break; 1667 1668 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1669 1670 opcode = netxen_get_sts_opcode(sts_data0); 1671 1672 switch (opcode) { 1673 case NETXEN_NIC_RXPKT_DESC: 1674 case NETXEN_OLD_RXPKT_DESC: 1675 case NETXEN_NIC_SYN_OFFLOAD: 1676 ring = netxen_get_sts_type(sts_data0); 1677 rxbuf = netxen_process_rcv(adapter, sds_ring, 1678 ring, sts_data0); 1679 break; 1680 case NETXEN_NIC_LRO_DESC: 1681 ring = netxen_get_lro_sts_type(sts_data0); 1682 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1683 rxbuf = netxen_process_lro(adapter, sds_ring, 1684 ring, sts_data0, sts_data1); 1685 break; 1686 case NETXEN_NIC_RESPONSE_DESC: 1687 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1688 default: 1689 goto skip; 1690 } 1691 1692 WARN_ON(desc_cnt > 1); 1693 1694 if (rxbuf) 1695 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1696 1697 skip: 1698 for (; desc_cnt > 0; desc_cnt--) { 1699 desc = &sds_ring->desc_head[consumer]; 1700 desc->status_desc_data[0] = 1701 cpu_to_le64(STATUS_OWNER_PHANTOM); 1702 consumer = get_next_index(consumer, sds_ring->num_desc); 1703 } 1704 count++; 1705 } 1706 1707 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1708 struct nx_host_rds_ring *rds_ring = 1709 &adapter->recv_ctx.rds_rings[ring]; 1710 1711 if (!list_empty(&sds_ring->free_list[ring])) { 1712 list_for_each(cur, &sds_ring->free_list[ring]) { 1713 rxbuf = list_entry(cur, 1714 struct netxen_rx_buffer, list); 1715 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1716 } 1717 spin_lock(&rds_ring->lock); 1718 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1719 &rds_ring->free_list); 1720 spin_unlock(&rds_ring->lock); 1721 } 1722 1723 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1724 } 1725 1726 if (count) { 1727 sds_ring->consumer = consumer; 1728 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1729 } 1730 1731 return count; 1732 } 1733 1734 /* Process Command status ring */ 1735 int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1736 { 1737 u32 sw_consumer, hw_consumer; 1738 int count = 0, i; 1739 struct netxen_cmd_buffer *buffer; 1740 struct pci_dev *pdev = adapter->pdev; 1741 struct net_device *netdev = adapter->netdev; 1742 struct netxen_skb_frag *frag; 1743 int done = 0; 1744 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1745 1746 if (!spin_trylock_bh(&adapter->tx_clean_lock)) 1747 return 1; 1748 1749 sw_consumer = tx_ring->sw_consumer; 1750 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1751 1752 while (sw_consumer != hw_consumer) { 1753 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1754 if (buffer->skb) { 1755 frag = &buffer->frag_array[0]; 1756 dma_unmap_single(&pdev->dev, frag->dma, frag->length, 1757 DMA_TO_DEVICE); 1758 frag->dma = 0ULL; 1759 for (i = 1; i < buffer->frag_count; i++) { 1760 frag++; /* Get the next frag */ 1761 dma_unmap_page(&pdev->dev, frag->dma, 1762 frag->length, DMA_TO_DEVICE); 1763 frag->dma = 0ULL; 1764 } 1765 1766 adapter->stats.xmitfinished++; 1767 dev_kfree_skb_any(buffer->skb); 1768 buffer->skb = NULL; 1769 } 1770 1771 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1772 if (++count >= MAX_STATUS_HANDLE) 1773 break; 1774 } 1775 1776 tx_ring->sw_consumer = sw_consumer; 1777 1778 if (count && netif_running(netdev)) { 1779 smp_mb(); 1780 1781 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) 1782 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) 1783 netif_wake_queue(netdev); 1784 adapter->tx_timeo_cnt = 0; 1785 } 1786 /* 1787 * If everything is freed up to consumer then check if the ring is full 1788 * If the ring is full then check if more needs to be freed and 1789 * schedule the call back again. 1790 * 1791 * This happens when there are 2 CPUs. One could be freeing and the 1792 * other filling it. If the ring is full when we get out of here and 1793 * the card has already interrupted the host then the host can miss the 1794 * interrupt. 1795 * 1796 * There is still a possible race condition and the host could miss an 1797 * interrupt. The card has to take care of this. 1798 */ 1799 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1800 done = (sw_consumer == hw_consumer); 1801 spin_unlock_bh(&adapter->tx_clean_lock); 1802 1803 return done; 1804 } 1805 1806 void 1807 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1808 struct nx_host_rds_ring *rds_ring) 1809 { 1810 struct rcv_desc *pdesc; 1811 struct netxen_rx_buffer *buffer; 1812 int producer, count = 0; 1813 netxen_ctx_msg msg = 0; 1814 struct list_head *head; 1815 1816 producer = rds_ring->producer; 1817 1818 head = &rds_ring->free_list; 1819 while (!list_empty(head)) { 1820 1821 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1822 1823 if (!buffer->skb) { 1824 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1825 break; 1826 } 1827 1828 count++; 1829 list_del(&buffer->list); 1830 1831 /* make a rcv descriptor */ 1832 pdesc = &rds_ring->desc_head[producer]; 1833 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1834 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1835 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1836 1837 producer = get_next_index(producer, rds_ring->num_desc); 1838 } 1839 1840 if (count) { 1841 rds_ring->producer = producer; 1842 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1843 (producer-1) & (rds_ring->num_desc-1)); 1844 1845 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1846 /* 1847 * Write a doorbell msg to tell phanmon of change in 1848 * receive ring producer 1849 * Only for firmware version < 4.0.0 1850 */ 1851 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1852 netxen_set_msg_privid(msg); 1853 netxen_set_msg_count(msg, 1854 ((producer - 1) & 1855 (rds_ring->num_desc - 1))); 1856 netxen_set_msg_ctxid(msg, adapter->portnum); 1857 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1858 NXWRIO(adapter, DB_NORMALIZE(adapter, 1859 NETXEN_RCV_PRODUCER_OFFSET), msg); 1860 } 1861 } 1862 } 1863 1864 static void 1865 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1866 struct nx_host_rds_ring *rds_ring) 1867 { 1868 struct rcv_desc *pdesc; 1869 struct netxen_rx_buffer *buffer; 1870 int producer, count = 0; 1871 struct list_head *head; 1872 1873 if (!spin_trylock(&rds_ring->lock)) 1874 return; 1875 1876 producer = rds_ring->producer; 1877 1878 head = &rds_ring->free_list; 1879 while (!list_empty(head)) { 1880 1881 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1882 1883 if (!buffer->skb) { 1884 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1885 break; 1886 } 1887 1888 count++; 1889 list_del(&buffer->list); 1890 1891 /* make a rcv descriptor */ 1892 pdesc = &rds_ring->desc_head[producer]; 1893 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1894 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1895 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1896 1897 producer = get_next_index(producer, rds_ring->num_desc); 1898 } 1899 1900 if (count) { 1901 rds_ring->producer = producer; 1902 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1903 (producer - 1) & (rds_ring->num_desc - 1)); 1904 } 1905 spin_unlock(&rds_ring->lock); 1906 } 1907 1908 void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1909 { 1910 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1911 } 1912 1913