1 /* 2 * Copyright (C) 2003 - 2009 NetXen, Inc. 3 * Copyright (C) 2009 - QLogic Corporation. 4 * All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, 19 * MA 02111-1307, USA. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called "COPYING". 23 * 24 */ 25 26 #include <linux/netdevice.h> 27 #include <linux/delay.h> 28 #include <linux/slab.h> 29 #include <linux/if_vlan.h> 30 #include "netxen_nic.h" 31 #include "netxen_nic_hw.h" 32 33 struct crb_addr_pair { 34 u32 addr; 35 u32 data; 36 }; 37 38 #define NETXEN_MAX_CRB_XFORM 60 39 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 40 #define NETXEN_ADDR_ERROR (0xffffffff) 41 42 #define crb_addr_transform(name) \ 43 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 44 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 45 46 #define NETXEN_NIC_XDMA_RESET 0x8000ff 47 48 static void 49 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 50 struct nx_host_rds_ring *rds_ring); 51 static int netxen_p3_has_mn(struct netxen_adapter *adapter); 52 53 static void crb_addr_transform_setup(void) 54 { 55 crb_addr_transform(XDMA); 56 crb_addr_transform(TIMR); 57 crb_addr_transform(SRE); 58 crb_addr_transform(SQN3); 59 crb_addr_transform(SQN2); 60 crb_addr_transform(SQN1); 61 crb_addr_transform(SQN0); 62 crb_addr_transform(SQS3); 63 crb_addr_transform(SQS2); 64 crb_addr_transform(SQS1); 65 crb_addr_transform(SQS0); 66 crb_addr_transform(RPMX7); 67 crb_addr_transform(RPMX6); 68 crb_addr_transform(RPMX5); 69 crb_addr_transform(RPMX4); 70 crb_addr_transform(RPMX3); 71 crb_addr_transform(RPMX2); 72 crb_addr_transform(RPMX1); 73 crb_addr_transform(RPMX0); 74 crb_addr_transform(ROMUSB); 75 crb_addr_transform(SN); 76 crb_addr_transform(QMN); 77 crb_addr_transform(QMS); 78 crb_addr_transform(PGNI); 79 crb_addr_transform(PGND); 80 crb_addr_transform(PGN3); 81 crb_addr_transform(PGN2); 82 crb_addr_transform(PGN1); 83 crb_addr_transform(PGN0); 84 crb_addr_transform(PGSI); 85 crb_addr_transform(PGSD); 86 crb_addr_transform(PGS3); 87 crb_addr_transform(PGS2); 88 crb_addr_transform(PGS1); 89 crb_addr_transform(PGS0); 90 crb_addr_transform(PS); 91 crb_addr_transform(PH); 92 crb_addr_transform(NIU); 93 crb_addr_transform(I2Q); 94 crb_addr_transform(EG); 95 crb_addr_transform(MN); 96 crb_addr_transform(MS); 97 crb_addr_transform(CAS2); 98 crb_addr_transform(CAS1); 99 crb_addr_transform(CAS0); 100 crb_addr_transform(CAM); 101 crb_addr_transform(C2C1); 102 crb_addr_transform(C2C0); 103 crb_addr_transform(SMB); 104 crb_addr_transform(OCM0); 105 crb_addr_transform(I2C0); 106 } 107 108 void netxen_release_rx_buffers(struct netxen_adapter *adapter) 109 { 110 struct netxen_recv_context *recv_ctx; 111 struct nx_host_rds_ring *rds_ring; 112 struct netxen_rx_buffer *rx_buf; 113 int i, ring; 114 115 recv_ctx = &adapter->recv_ctx; 116 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 117 rds_ring = &recv_ctx->rds_rings[ring]; 118 for (i = 0; i < rds_ring->num_desc; ++i) { 119 rx_buf = &(rds_ring->rx_buf_arr[i]); 120 if (rx_buf->state == NETXEN_BUFFER_FREE) 121 continue; 122 pci_unmap_single(adapter->pdev, 123 rx_buf->dma, 124 rds_ring->dma_size, 125 PCI_DMA_FROMDEVICE); 126 if (rx_buf->skb != NULL) 127 dev_kfree_skb_any(rx_buf->skb); 128 } 129 } 130 } 131 132 void netxen_release_tx_buffers(struct netxen_adapter *adapter) 133 { 134 struct netxen_cmd_buffer *cmd_buf; 135 struct netxen_skb_frag *buffrag; 136 int i, j; 137 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 138 139 cmd_buf = tx_ring->cmd_buf_arr; 140 for (i = 0; i < tx_ring->num_desc; i++) { 141 buffrag = cmd_buf->frag_array; 142 if (buffrag->dma) { 143 pci_unmap_single(adapter->pdev, buffrag->dma, 144 buffrag->length, PCI_DMA_TODEVICE); 145 buffrag->dma = 0ULL; 146 } 147 for (j = 0; j < cmd_buf->frag_count; j++) { 148 buffrag++; 149 if (buffrag->dma) { 150 pci_unmap_page(adapter->pdev, buffrag->dma, 151 buffrag->length, 152 PCI_DMA_TODEVICE); 153 buffrag->dma = 0ULL; 154 } 155 } 156 if (cmd_buf->skb) { 157 dev_kfree_skb_any(cmd_buf->skb); 158 cmd_buf->skb = NULL; 159 } 160 cmd_buf++; 161 } 162 } 163 164 void netxen_free_sw_resources(struct netxen_adapter *adapter) 165 { 166 struct netxen_recv_context *recv_ctx; 167 struct nx_host_rds_ring *rds_ring; 168 struct nx_host_tx_ring *tx_ring; 169 int ring; 170 171 recv_ctx = &adapter->recv_ctx; 172 173 if (recv_ctx->rds_rings == NULL) 174 goto skip_rds; 175 176 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 177 rds_ring = &recv_ctx->rds_rings[ring]; 178 vfree(rds_ring->rx_buf_arr); 179 rds_ring->rx_buf_arr = NULL; 180 } 181 kfree(recv_ctx->rds_rings); 182 183 skip_rds: 184 if (adapter->tx_ring == NULL) 185 return; 186 187 tx_ring = adapter->tx_ring; 188 vfree(tx_ring->cmd_buf_arr); 189 kfree(tx_ring); 190 adapter->tx_ring = NULL; 191 } 192 193 int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 194 { 195 struct netxen_recv_context *recv_ctx; 196 struct nx_host_rds_ring *rds_ring; 197 struct nx_host_sds_ring *sds_ring; 198 struct nx_host_tx_ring *tx_ring; 199 struct netxen_rx_buffer *rx_buf; 200 int ring, i, size; 201 202 struct netxen_cmd_buffer *cmd_buf_arr; 203 struct net_device *netdev = adapter->netdev; 204 struct pci_dev *pdev = adapter->pdev; 205 206 size = sizeof(struct nx_host_tx_ring); 207 tx_ring = kzalloc(size, GFP_KERNEL); 208 if (tx_ring == NULL) { 209 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n", 210 netdev->name); 211 return -ENOMEM; 212 } 213 adapter->tx_ring = tx_ring; 214 215 tx_ring->num_desc = adapter->num_txd; 216 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 217 218 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring)); 219 if (cmd_buf_arr == NULL) { 220 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n", 221 netdev->name); 222 goto err_out; 223 } 224 tx_ring->cmd_buf_arr = cmd_buf_arr; 225 226 recv_ctx = &adapter->recv_ctx; 227 228 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring); 229 rds_ring = kzalloc(size, GFP_KERNEL); 230 if (rds_ring == NULL) { 231 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n", 232 netdev->name); 233 goto err_out; 234 } 235 recv_ctx->rds_rings = rds_ring; 236 237 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 238 rds_ring = &recv_ctx->rds_rings[ring]; 239 switch (ring) { 240 case RCV_RING_NORMAL: 241 rds_ring->num_desc = adapter->num_rxd; 242 if (adapter->ahw.cut_through) { 243 rds_ring->dma_size = 244 NX_CT_DEFAULT_RX_BUF_LEN; 245 rds_ring->skb_size = 246 NX_CT_DEFAULT_RX_BUF_LEN; 247 } else { 248 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 249 rds_ring->dma_size = 250 NX_P3_RX_BUF_MAX_LEN; 251 else 252 rds_ring->dma_size = 253 NX_P2_RX_BUF_MAX_LEN; 254 rds_ring->skb_size = 255 rds_ring->dma_size + NET_IP_ALIGN; 256 } 257 break; 258 259 case RCV_RING_JUMBO: 260 rds_ring->num_desc = adapter->num_jumbo_rxd; 261 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 262 rds_ring->dma_size = 263 NX_P3_RX_JUMBO_BUF_MAX_LEN; 264 else 265 rds_ring->dma_size = 266 NX_P2_RX_JUMBO_BUF_MAX_LEN; 267 268 if (adapter->capabilities & NX_CAP0_HW_LRO) 269 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 270 271 rds_ring->skb_size = 272 rds_ring->dma_size + NET_IP_ALIGN; 273 break; 274 275 case RCV_RING_LRO: 276 rds_ring->num_desc = adapter->num_lro_rxd; 277 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 278 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 279 break; 280 281 } 282 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 283 if (rds_ring->rx_buf_arr == NULL) { 284 printk(KERN_ERR "%s: Failed to allocate " 285 "rx buffer ring %d\n", 286 netdev->name, ring); 287 /* free whatever was already allocated */ 288 goto err_out; 289 } 290 INIT_LIST_HEAD(&rds_ring->free_list); 291 /* 292 * Now go through all of them, set reference handles 293 * and put them in the queues. 294 */ 295 rx_buf = rds_ring->rx_buf_arr; 296 for (i = 0; i < rds_ring->num_desc; i++) { 297 list_add_tail(&rx_buf->list, 298 &rds_ring->free_list); 299 rx_buf->ref_handle = i; 300 rx_buf->state = NETXEN_BUFFER_FREE; 301 rx_buf++; 302 } 303 spin_lock_init(&rds_ring->lock); 304 } 305 306 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 307 sds_ring = &recv_ctx->sds_rings[ring]; 308 sds_ring->irq = adapter->msix_entries[ring].vector; 309 sds_ring->adapter = adapter; 310 sds_ring->num_desc = adapter->num_rxd; 311 312 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 313 INIT_LIST_HEAD(&sds_ring->free_list[i]); 314 } 315 316 return 0; 317 318 err_out: 319 netxen_free_sw_resources(adapter); 320 return -ENOMEM; 321 } 322 323 /* 324 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 325 * address to external PCI CRB address. 326 */ 327 static u32 netxen_decode_crb_addr(u32 addr) 328 { 329 int i; 330 u32 base_addr, offset, pci_base; 331 332 crb_addr_transform_setup(); 333 334 pci_base = NETXEN_ADDR_ERROR; 335 base_addr = addr & 0xfff00000; 336 offset = addr & 0x000fffff; 337 338 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 339 if (crb_addr_xform[i] == base_addr) { 340 pci_base = i << 20; 341 break; 342 } 343 } 344 if (pci_base == NETXEN_ADDR_ERROR) 345 return pci_base; 346 else 347 return pci_base + offset; 348 } 349 350 #define NETXEN_MAX_ROM_WAIT_USEC 100 351 352 static int netxen_wait_rom_done(struct netxen_adapter *adapter) 353 { 354 long timeout = 0; 355 long done = 0; 356 357 cond_resched(); 358 359 while (done == 0) { 360 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 361 done &= 2; 362 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 363 dev_err(&adapter->pdev->dev, 364 "Timeout reached waiting for rom done"); 365 return -EIO; 366 } 367 udelay(1); 368 } 369 return 0; 370 } 371 372 static int do_rom_fast_read(struct netxen_adapter *adapter, 373 int addr, int *valp) 374 { 375 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 376 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 377 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 378 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 379 if (netxen_wait_rom_done(adapter)) { 380 printk("Error waiting for rom done\n"); 381 return -EIO; 382 } 383 /* reset abyte_cnt and dummy_byte_cnt */ 384 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 385 udelay(10); 386 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 387 388 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 389 return 0; 390 } 391 392 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 393 u8 *bytes, size_t size) 394 { 395 int addridx; 396 int ret = 0; 397 398 for (addridx = addr; addridx < (addr + size); addridx += 4) { 399 int v; 400 ret = do_rom_fast_read(adapter, addridx, &v); 401 if (ret != 0) 402 break; 403 *(__le32 *)bytes = cpu_to_le32(v); 404 bytes += 4; 405 } 406 407 return ret; 408 } 409 410 int 411 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 412 u8 *bytes, size_t size) 413 { 414 int ret; 415 416 ret = netxen_rom_lock(adapter); 417 if (ret < 0) 418 return ret; 419 420 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 421 422 netxen_rom_unlock(adapter); 423 return ret; 424 } 425 426 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 427 { 428 int ret; 429 430 if (netxen_rom_lock(adapter) != 0) 431 return -EIO; 432 433 ret = do_rom_fast_read(adapter, addr, valp); 434 netxen_rom_unlock(adapter); 435 return ret; 436 } 437 438 #define NETXEN_BOARDTYPE 0x4008 439 #define NETXEN_BOARDNUM 0x400c 440 #define NETXEN_CHIPNUM 0x4010 441 442 int netxen_pinit_from_rom(struct netxen_adapter *adapter) 443 { 444 int addr, val; 445 int i, n, init_delay = 0; 446 struct crb_addr_pair *buf; 447 unsigned offset; 448 u32 off; 449 450 /* resetall */ 451 netxen_rom_lock(adapter); 452 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff); 453 netxen_rom_unlock(adapter); 454 455 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 456 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 457 (n != 0xcafecafe) || 458 netxen_rom_fast_read(adapter, 4, &n) != 0) { 459 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 460 "n: %08x\n", netxen_nic_driver_name, n); 461 return -EIO; 462 } 463 offset = n & 0xffffU; 464 n = (n >> 16) & 0xffffU; 465 } else { 466 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 467 !(n & 0x80000000)) { 468 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 469 "n: %08x\n", netxen_nic_driver_name, n); 470 return -EIO; 471 } 472 offset = 1; 473 n &= ~0x80000000; 474 } 475 476 if (n >= 1024) { 477 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 478 " initialized.\n", __func__, n); 479 return -EIO; 480 } 481 482 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 483 if (buf == NULL) { 484 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n", 485 netxen_nic_driver_name); 486 return -ENOMEM; 487 } 488 489 for (i = 0; i < n; i++) { 490 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 491 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 492 kfree(buf); 493 return -EIO; 494 } 495 496 buf[i].addr = addr; 497 buf[i].data = val; 498 499 } 500 501 for (i = 0; i < n; i++) { 502 503 off = netxen_decode_crb_addr(buf[i].addr); 504 if (off == NETXEN_ADDR_ERROR) { 505 printk(KERN_ERR"CRB init value out of range %x\n", 506 buf[i].addr); 507 continue; 508 } 509 off += NETXEN_PCI_CRBSPACE; 510 511 if (off & 1) 512 continue; 513 514 /* skipping cold reboot MAGIC */ 515 if (off == NETXEN_CAM_RAM(0x1fc)) 516 continue; 517 518 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 519 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 520 continue; 521 /* do not reset PCI */ 522 if (off == (ROMUSB_GLB + 0xbc)) 523 continue; 524 if (off == (ROMUSB_GLB + 0xa8)) 525 continue; 526 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 527 continue; 528 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 529 continue; 530 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 531 continue; 532 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 533 continue; 534 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 535 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 536 buf[i].data = 0x1020; 537 /* skip the function enable register */ 538 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 539 continue; 540 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 541 continue; 542 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 543 continue; 544 } 545 546 init_delay = 1; 547 /* After writing this register, HW needs time for CRB */ 548 /* to quiet down (else crb_window returns 0xffffffff) */ 549 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 550 init_delay = 1000; 551 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 552 /* hold xdma in reset also */ 553 buf[i].data = NETXEN_NIC_XDMA_RESET; 554 buf[i].data = 0x8000ff; 555 } 556 } 557 558 NXWR32(adapter, off, buf[i].data); 559 560 msleep(init_delay); 561 } 562 kfree(buf); 563 564 /* disable_peg_cache_all */ 565 566 /* unreset_net_cache */ 567 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 568 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 569 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 570 } 571 572 /* p2dn replyCount */ 573 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 574 /* disable_peg_cache 0 */ 575 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 576 /* disable_peg_cache 1 */ 577 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 578 579 /* peg_clr_all */ 580 581 /* peg_clr 0 */ 582 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 583 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 584 /* peg_clr 1 */ 585 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 586 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 587 /* peg_clr 2 */ 588 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 589 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 590 /* peg_clr 3 */ 591 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 592 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 593 return 0; 594 } 595 596 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 597 { 598 uint32_t i; 599 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 600 __le32 entries = cpu_to_le32(directory->num_entries); 601 602 for (i = 0; i < entries; i++) { 603 604 __le32 offs = cpu_to_le32(directory->findex) + 605 (i * cpu_to_le32(directory->entry_size)); 606 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 607 608 if (tab_type == section) 609 return (struct uni_table_desc *) &unirom[offs]; 610 } 611 612 return NULL; 613 } 614 615 #define QLCNIC_FILEHEADER_SIZE (14 * 4) 616 617 static int 618 netxen_nic_validate_header(struct netxen_adapter *adapter) 619 { 620 const u8 *unirom = adapter->fw->data; 621 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 622 u32 fw_file_size = adapter->fw->size; 623 u32 tab_size; 624 __le32 entries; 625 __le32 entry_size; 626 627 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 628 return -EINVAL; 629 630 entries = cpu_to_le32(directory->num_entries); 631 entry_size = cpu_to_le32(directory->entry_size); 632 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 633 634 if (fw_file_size < tab_size) 635 return -EINVAL; 636 637 return 0; 638 } 639 640 static int 641 netxen_nic_validate_bootld(struct netxen_adapter *adapter) 642 { 643 struct uni_table_desc *tab_desc; 644 struct uni_data_desc *descr; 645 const u8 *unirom = adapter->fw->data; 646 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 647 NX_UNI_BOOTLD_IDX_OFF)); 648 u32 offs; 649 u32 tab_size; 650 u32 data_size; 651 652 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 653 654 if (!tab_desc) 655 return -EINVAL; 656 657 tab_size = cpu_to_le32(tab_desc->findex) + 658 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 659 660 if (adapter->fw->size < tab_size) 661 return -EINVAL; 662 663 offs = cpu_to_le32(tab_desc->findex) + 664 (cpu_to_le32(tab_desc->entry_size) * (idx)); 665 descr = (struct uni_data_desc *)&unirom[offs]; 666 667 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 668 669 if (adapter->fw->size < data_size) 670 return -EINVAL; 671 672 return 0; 673 } 674 675 static int 676 netxen_nic_validate_fw(struct netxen_adapter *adapter) 677 { 678 struct uni_table_desc *tab_desc; 679 struct uni_data_desc *descr; 680 const u8 *unirom = adapter->fw->data; 681 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 682 NX_UNI_FIRMWARE_IDX_OFF)); 683 u32 offs; 684 u32 tab_size; 685 u32 data_size; 686 687 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 688 689 if (!tab_desc) 690 return -EINVAL; 691 692 tab_size = cpu_to_le32(tab_desc->findex) + 693 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 694 695 if (adapter->fw->size < tab_size) 696 return -EINVAL; 697 698 offs = cpu_to_le32(tab_desc->findex) + 699 (cpu_to_le32(tab_desc->entry_size) * (idx)); 700 descr = (struct uni_data_desc *)&unirom[offs]; 701 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 702 703 if (adapter->fw->size < data_size) 704 return -EINVAL; 705 706 return 0; 707 } 708 709 710 static int 711 netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 712 { 713 struct uni_table_desc *ptab_descr; 714 const u8 *unirom = adapter->fw->data; 715 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 716 1 : netxen_p3_has_mn(adapter); 717 __le32 entries; 718 __le32 entry_size; 719 u32 tab_size; 720 u32 i; 721 722 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 723 if (ptab_descr == NULL) 724 return -EINVAL; 725 726 entries = cpu_to_le32(ptab_descr->num_entries); 727 entry_size = cpu_to_le32(ptab_descr->entry_size); 728 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 729 730 if (adapter->fw->size < tab_size) 731 return -EINVAL; 732 733 nomn: 734 for (i = 0; i < entries; i++) { 735 736 __le32 flags, file_chiprev, offs; 737 u8 chiprev = adapter->ahw.revision_id; 738 uint32_t flagbit; 739 740 offs = cpu_to_le32(ptab_descr->findex) + 741 (i * cpu_to_le32(ptab_descr->entry_size)); 742 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 743 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 744 NX_UNI_CHIP_REV_OFF)); 745 746 flagbit = mn_present ? 1 : 2; 747 748 if ((chiprev == file_chiprev) && 749 ((1ULL << flagbit) & flags)) { 750 adapter->file_prd_off = offs; 751 return 0; 752 } 753 } 754 755 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 756 mn_present = 0; 757 goto nomn; 758 } 759 760 return -EINVAL; 761 } 762 763 static int 764 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 765 { 766 if (netxen_nic_validate_header(adapter)) { 767 dev_err(&adapter->pdev->dev, 768 "unified image: header validation failed\n"); 769 return -EINVAL; 770 } 771 772 if (netxen_nic_validate_product_offs(adapter)) { 773 dev_err(&adapter->pdev->dev, 774 "unified image: product validation failed\n"); 775 return -EINVAL; 776 } 777 778 if (netxen_nic_validate_bootld(adapter)) { 779 dev_err(&adapter->pdev->dev, 780 "unified image: bootld validation failed\n"); 781 return -EINVAL; 782 } 783 784 if (netxen_nic_validate_fw(adapter)) { 785 dev_err(&adapter->pdev->dev, 786 "unified image: firmware validation failed\n"); 787 return -EINVAL; 788 } 789 790 return 0; 791 } 792 793 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 794 u32 section, u32 idx_offset) 795 { 796 const u8 *unirom = adapter->fw->data; 797 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 798 idx_offset)); 799 struct uni_table_desc *tab_desc; 800 __le32 offs; 801 802 tab_desc = nx_get_table_desc(unirom, section); 803 804 if (tab_desc == NULL) 805 return NULL; 806 807 offs = cpu_to_le32(tab_desc->findex) + 808 (cpu_to_le32(tab_desc->entry_size) * idx); 809 810 return (struct uni_data_desc *)&unirom[offs]; 811 } 812 813 static u8 * 814 nx_get_bootld_offs(struct netxen_adapter *adapter) 815 { 816 u32 offs = NETXEN_BOOTLD_START; 817 818 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 819 offs = cpu_to_le32((nx_get_data_desc(adapter, 820 NX_UNI_DIR_SECT_BOOTLD, 821 NX_UNI_BOOTLD_IDX_OFF))->findex); 822 823 return (u8 *)&adapter->fw->data[offs]; 824 } 825 826 static u8 * 827 nx_get_fw_offs(struct netxen_adapter *adapter) 828 { 829 u32 offs = NETXEN_IMAGE_START; 830 831 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 832 offs = cpu_to_le32((nx_get_data_desc(adapter, 833 NX_UNI_DIR_SECT_FW, 834 NX_UNI_FIRMWARE_IDX_OFF))->findex); 835 836 return (u8 *)&adapter->fw->data[offs]; 837 } 838 839 static __le32 840 nx_get_fw_size(struct netxen_adapter *adapter) 841 { 842 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 843 return cpu_to_le32((nx_get_data_desc(adapter, 844 NX_UNI_DIR_SECT_FW, 845 NX_UNI_FIRMWARE_IDX_OFF))->size); 846 else 847 return cpu_to_le32( 848 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 849 } 850 851 static __le32 852 nx_get_fw_version(struct netxen_adapter *adapter) 853 { 854 struct uni_data_desc *fw_data_desc; 855 const struct firmware *fw = adapter->fw; 856 __le32 major, minor, sub; 857 const u8 *ver_str; 858 int i, ret = 0; 859 860 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 861 862 fw_data_desc = nx_get_data_desc(adapter, 863 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 864 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 865 cpu_to_le32(fw_data_desc->size) - 17; 866 867 for (i = 0; i < 12; i++) { 868 if (!strncmp(&ver_str[i], "REV=", 4)) { 869 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 870 &major, &minor, &sub); 871 break; 872 } 873 } 874 875 if (ret != 3) 876 return 0; 877 878 return major + (minor << 8) + (sub << 16); 879 880 } else 881 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 882 } 883 884 static __le32 885 nx_get_bios_version(struct netxen_adapter *adapter) 886 { 887 const struct firmware *fw = adapter->fw; 888 __le32 bios_ver, prd_off = adapter->file_prd_off; 889 890 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 891 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 892 + NX_UNI_BIOS_VERSION_OFF)); 893 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 894 (bios_ver >> 24); 895 } else 896 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 897 898 } 899 900 int 901 netxen_need_fw_reset(struct netxen_adapter *adapter) 902 { 903 u32 count, old_count; 904 u32 val, version, major, minor, build; 905 int i, timeout; 906 u8 fw_type; 907 908 /* NX2031 firmware doesn't support heartbit */ 909 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 910 return 1; 911 912 if (adapter->need_fw_reset) 913 return 1; 914 915 /* last attempt had failed */ 916 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 917 return 1; 918 919 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 920 921 for (i = 0; i < 10; i++) { 922 923 timeout = msleep_interruptible(200); 924 if (timeout) { 925 NXWR32(adapter, CRB_CMDPEG_STATE, 926 PHAN_INITIALIZE_FAILED); 927 return -EINTR; 928 } 929 930 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 931 if (count != old_count) 932 break; 933 } 934 935 /* firmware is dead */ 936 if (count == old_count) 937 return 1; 938 939 /* check if we have got newer or different file firmware */ 940 if (adapter->fw) { 941 942 val = nx_get_fw_version(adapter); 943 944 version = NETXEN_DECODE_VERSION(val); 945 946 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 947 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 948 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 949 950 if (version > NETXEN_VERSION_CODE(major, minor, build)) 951 return 1; 952 953 if (version == NETXEN_VERSION_CODE(major, minor, build) && 954 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 955 956 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 957 fw_type = (val & 0x4) ? 958 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 959 960 if (adapter->fw_type != fw_type) 961 return 1; 962 } 963 } 964 965 return 0; 966 } 967 968 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505) 969 970 int 971 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter) 972 { 973 u32 flash_fw_ver, min_fw_ver; 974 975 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 976 return 0; 977 978 if (netxen_rom_fast_read(adapter, 979 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 980 dev_err(&adapter->pdev->dev, "Unable to read flash fw" 981 "version\n"); 982 return -EIO; 983 } 984 985 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 986 min_fw_ver = NETXEN_MIN_P3_FW_SUPP; 987 if (flash_fw_ver >= min_fw_ver) 988 return 0; 989 990 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported" 991 "[4.0.505]. Please update firmware on flash\n", 992 _major(flash_fw_ver), _minor(flash_fw_ver), 993 _build(flash_fw_ver)); 994 return -EINVAL; 995 } 996 997 static char *fw_name[] = { 998 NX_P2_MN_ROMIMAGE_NAME, 999 NX_P3_CT_ROMIMAGE_NAME, 1000 NX_P3_MN_ROMIMAGE_NAME, 1001 NX_UNIFIED_ROMIMAGE_NAME, 1002 NX_FLASH_ROMIMAGE_NAME, 1003 }; 1004 1005 int 1006 netxen_load_firmware(struct netxen_adapter *adapter) 1007 { 1008 u64 *ptr64; 1009 u32 i, flashaddr, size; 1010 const struct firmware *fw = adapter->fw; 1011 struct pci_dev *pdev = adapter->pdev; 1012 1013 dev_info(&pdev->dev, "loading firmware from %s\n", 1014 fw_name[adapter->fw_type]); 1015 1016 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1017 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 1018 1019 if (fw) { 1020 __le64 data; 1021 1022 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1023 1024 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 1025 flashaddr = NETXEN_BOOTLD_START; 1026 1027 for (i = 0; i < size; i++) { 1028 data = cpu_to_le64(ptr64[i]); 1029 1030 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1031 return -EIO; 1032 1033 flashaddr += 8; 1034 } 1035 1036 size = (__force u32)nx_get_fw_size(adapter) / 8; 1037 1038 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1039 flashaddr = NETXEN_IMAGE_START; 1040 1041 for (i = 0; i < size; i++) { 1042 data = cpu_to_le64(ptr64[i]); 1043 1044 if (adapter->pci_mem_write(adapter, 1045 flashaddr, data)) 1046 return -EIO; 1047 1048 flashaddr += 8; 1049 } 1050 1051 size = (__force u32)nx_get_fw_size(adapter) % 8; 1052 if (size) { 1053 data = cpu_to_le64(ptr64[i]); 1054 1055 if (adapter->pci_mem_write(adapter, 1056 flashaddr, data)) 1057 return -EIO; 1058 } 1059 1060 } else { 1061 u64 data; 1062 u32 hi, lo; 1063 1064 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1065 flashaddr = NETXEN_BOOTLD_START; 1066 1067 for (i = 0; i < size; i++) { 1068 if (netxen_rom_fast_read(adapter, 1069 flashaddr, (int *)&lo) != 0) 1070 return -EIO; 1071 if (netxen_rom_fast_read(adapter, 1072 flashaddr + 4, (int *)&hi) != 0) 1073 return -EIO; 1074 1075 /* hi, lo are already in host endian byteorder */ 1076 data = (((u64)hi << 32) | lo); 1077 1078 if (adapter->pci_mem_write(adapter, 1079 flashaddr, data)) 1080 return -EIO; 1081 1082 flashaddr += 8; 1083 } 1084 } 1085 msleep(1); 1086 1087 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1088 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1089 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1090 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1091 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1092 else { 1093 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1094 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1095 } 1096 1097 return 0; 1098 } 1099 1100 static int 1101 netxen_validate_firmware(struct netxen_adapter *adapter) 1102 { 1103 __le32 val; 1104 __le32 flash_fw_ver; 1105 u32 file_fw_ver, min_ver, bios; 1106 struct pci_dev *pdev = adapter->pdev; 1107 const struct firmware *fw = adapter->fw; 1108 u8 fw_type = adapter->fw_type; 1109 u32 crbinit_fix_fw; 1110 1111 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1112 if (netxen_nic_validate_unified_romimage(adapter)) 1113 return -EINVAL; 1114 } else { 1115 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1116 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1117 return -EINVAL; 1118 1119 if (fw->size < NX_FW_MIN_SIZE) 1120 return -EINVAL; 1121 } 1122 1123 val = nx_get_fw_version(adapter); 1124 1125 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1126 min_ver = NETXEN_MIN_P3_FW_SUPP; 1127 else 1128 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1129 1130 file_fw_ver = NETXEN_DECODE_VERSION(val); 1131 1132 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) || 1133 (file_fw_ver < min_ver)) { 1134 dev_err(&pdev->dev, 1135 "%s: firmware version %d.%d.%d unsupported\n", 1136 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver), 1137 _build(file_fw_ver)); 1138 return -EINVAL; 1139 } 1140 1141 val = nx_get_bios_version(adapter); 1142 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios); 1143 if ((__force u32)val != bios) { 1144 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1145 fw_name[fw_type]); 1146 return -EINVAL; 1147 } 1148 1149 if (netxen_rom_fast_read(adapter, 1150 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 1151 dev_err(&pdev->dev, "Unable to read flash fw version\n"); 1152 return -EIO; 1153 } 1154 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 1155 1156 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */ 1157 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554); 1158 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw && 1159 NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 1160 dev_err(&pdev->dev, "Incompatibility detected between driver " 1161 "and firmware version on flash. This configuration " 1162 "is not recommended. Please update the firmware on " 1163 "flash immediately\n"); 1164 return -EINVAL; 1165 } 1166 1167 /* check if flashed firmware is newer only for no-mn and P2 case*/ 1168 if (!netxen_p3_has_mn(adapter) || 1169 NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1170 if (flash_fw_ver > file_fw_ver) { 1171 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1172 fw_name[fw_type]); 1173 return -EINVAL; 1174 } 1175 } 1176 1177 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1178 return 0; 1179 } 1180 1181 static void 1182 nx_get_next_fwtype(struct netxen_adapter *adapter) 1183 { 1184 u8 fw_type; 1185 1186 switch (adapter->fw_type) { 1187 case NX_UNKNOWN_ROMIMAGE: 1188 fw_type = NX_UNIFIED_ROMIMAGE; 1189 break; 1190 1191 case NX_UNIFIED_ROMIMAGE: 1192 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1193 fw_type = NX_FLASH_ROMIMAGE; 1194 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1195 fw_type = NX_P2_MN_ROMIMAGE; 1196 else if (netxen_p3_has_mn(adapter)) 1197 fw_type = NX_P3_MN_ROMIMAGE; 1198 else 1199 fw_type = NX_P3_CT_ROMIMAGE; 1200 break; 1201 1202 case NX_P3_MN_ROMIMAGE: 1203 fw_type = NX_P3_CT_ROMIMAGE; 1204 break; 1205 1206 case NX_P2_MN_ROMIMAGE: 1207 case NX_P3_CT_ROMIMAGE: 1208 default: 1209 fw_type = NX_FLASH_ROMIMAGE; 1210 break; 1211 } 1212 1213 adapter->fw_type = fw_type; 1214 } 1215 1216 static int 1217 netxen_p3_has_mn(struct netxen_adapter *adapter) 1218 { 1219 u32 capability, flashed_ver; 1220 capability = 0; 1221 1222 /* NX2031 always had MN */ 1223 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1224 return 1; 1225 1226 netxen_rom_fast_read(adapter, 1227 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1228 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1229 1230 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1231 1232 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1233 if (capability & NX_PEG_TUNE_MN_PRESENT) 1234 return 1; 1235 } 1236 return 0; 1237 } 1238 1239 void netxen_request_firmware(struct netxen_adapter *adapter) 1240 { 1241 struct pci_dev *pdev = adapter->pdev; 1242 int rc = 0; 1243 1244 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1245 1246 next: 1247 nx_get_next_fwtype(adapter); 1248 1249 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1250 adapter->fw = NULL; 1251 } else { 1252 rc = request_firmware(&adapter->fw, 1253 fw_name[adapter->fw_type], &pdev->dev); 1254 if (rc != 0) 1255 goto next; 1256 1257 rc = netxen_validate_firmware(adapter); 1258 if (rc != 0) { 1259 release_firmware(adapter->fw); 1260 msleep(1); 1261 goto next; 1262 } 1263 } 1264 } 1265 1266 1267 void 1268 netxen_release_firmware(struct netxen_adapter *adapter) 1269 { 1270 if (adapter->fw) 1271 release_firmware(adapter->fw); 1272 adapter->fw = NULL; 1273 } 1274 1275 int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1276 { 1277 u64 addr; 1278 u32 hi, lo; 1279 1280 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1281 return 0; 1282 1283 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev, 1284 NETXEN_HOST_DUMMY_DMA_SIZE, 1285 &adapter->dummy_dma.phys_addr); 1286 if (adapter->dummy_dma.addr == NULL) { 1287 dev_err(&adapter->pdev->dev, 1288 "ERROR: Could not allocate dummy DMA memory\n"); 1289 return -ENOMEM; 1290 } 1291 1292 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1293 hi = (addr >> 32) & 0xffffffff; 1294 lo = addr & 0xffffffff; 1295 1296 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1297 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1298 1299 return 0; 1300 } 1301 1302 /* 1303 * NetXen DMA watchdog control: 1304 * 1305 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1306 * Bit 1 : disable_request => 1 req disable dma watchdog 1307 * Bit 2 : enable_request => 1 req enable dma watchdog 1308 * Bit 3-31 : unused 1309 */ 1310 void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1311 { 1312 int i = 100; 1313 u32 ctrl; 1314 1315 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1316 return; 1317 1318 if (!adapter->dummy_dma.addr) 1319 return; 1320 1321 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1322 if ((ctrl & 0x1) != 0) { 1323 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1324 1325 while ((ctrl & 0x1) != 0) { 1326 1327 msleep(50); 1328 1329 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1330 1331 if (--i == 0) 1332 break; 1333 } 1334 } 1335 1336 if (i) { 1337 pci_free_consistent(adapter->pdev, 1338 NETXEN_HOST_DUMMY_DMA_SIZE, 1339 adapter->dummy_dma.addr, 1340 adapter->dummy_dma.phys_addr); 1341 adapter->dummy_dma.addr = NULL; 1342 } else 1343 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1344 } 1345 1346 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1347 { 1348 u32 val = 0; 1349 int retries = 60; 1350 1351 if (pegtune_val) 1352 return 0; 1353 1354 do { 1355 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1356 1357 switch (val) { 1358 case PHAN_INITIALIZE_COMPLETE: 1359 case PHAN_INITIALIZE_ACK: 1360 return 0; 1361 case PHAN_INITIALIZE_FAILED: 1362 goto out_err; 1363 default: 1364 break; 1365 } 1366 1367 msleep(500); 1368 1369 } while (--retries); 1370 1371 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1372 1373 out_err: 1374 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1375 return -EIO; 1376 } 1377 1378 static int 1379 netxen_receive_peg_ready(struct netxen_adapter *adapter) 1380 { 1381 u32 val = 0; 1382 int retries = 2000; 1383 1384 do { 1385 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1386 1387 if (val == PHAN_PEG_RCV_INITIALIZED) 1388 return 0; 1389 1390 msleep(10); 1391 1392 } while (--retries); 1393 1394 if (!retries) { 1395 printk(KERN_ERR "Receive Peg initialization not " 1396 "complete, state: 0x%x.\n", val); 1397 return -EIO; 1398 } 1399 1400 return 0; 1401 } 1402 1403 int netxen_init_firmware(struct netxen_adapter *adapter) 1404 { 1405 int err; 1406 1407 err = netxen_receive_peg_ready(adapter); 1408 if (err) 1409 return err; 1410 1411 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1412 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1413 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1414 1415 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1416 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1417 1418 return err; 1419 } 1420 1421 static void 1422 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1423 { 1424 u32 cable_OUI; 1425 u16 cable_len; 1426 u16 link_speed; 1427 u8 link_status, module, duplex, autoneg; 1428 struct net_device *netdev = adapter->netdev; 1429 1430 adapter->has_link_events = 1; 1431 1432 cable_OUI = msg->body[1] & 0xffffffff; 1433 cable_len = (msg->body[1] >> 32) & 0xffff; 1434 link_speed = (msg->body[1] >> 48) & 0xffff; 1435 1436 link_status = msg->body[2] & 0xff; 1437 duplex = (msg->body[2] >> 16) & 0xff; 1438 autoneg = (msg->body[2] >> 24) & 0xff; 1439 1440 module = (msg->body[2] >> 8) & 0xff; 1441 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1442 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1443 netdev->name, cable_OUI, cable_len); 1444 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1445 printk(KERN_INFO "%s: unsupported cable length %d\n", 1446 netdev->name, cable_len); 1447 } 1448 1449 netxen_advert_link_change(adapter, link_status); 1450 1451 /* update link parameters */ 1452 if (duplex == LINKEVENT_FULL_DUPLEX) 1453 adapter->link_duplex = DUPLEX_FULL; 1454 else 1455 adapter->link_duplex = DUPLEX_HALF; 1456 adapter->module_type = module; 1457 adapter->link_autoneg = autoneg; 1458 adapter->link_speed = link_speed; 1459 } 1460 1461 static void 1462 netxen_handle_fw_message(int desc_cnt, int index, 1463 struct nx_host_sds_ring *sds_ring) 1464 { 1465 nx_fw_msg_t msg; 1466 struct status_desc *desc; 1467 int i = 0, opcode; 1468 1469 while (desc_cnt > 0 && i < 8) { 1470 desc = &sds_ring->desc_head[index]; 1471 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1472 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1473 1474 index = get_next_index(index, sds_ring->num_desc); 1475 desc_cnt--; 1476 } 1477 1478 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1479 switch (opcode) { 1480 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1481 netxen_handle_linkevent(sds_ring->adapter, &msg); 1482 break; 1483 default: 1484 break; 1485 } 1486 } 1487 1488 static int 1489 netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1490 struct nx_host_rds_ring *rds_ring, 1491 struct netxen_rx_buffer *buffer) 1492 { 1493 struct sk_buff *skb; 1494 dma_addr_t dma; 1495 struct pci_dev *pdev = adapter->pdev; 1496 1497 buffer->skb = dev_alloc_skb(rds_ring->skb_size); 1498 if (!buffer->skb) 1499 return 1; 1500 1501 skb = buffer->skb; 1502 1503 if (!adapter->ahw.cut_through) 1504 skb_reserve(skb, 2); 1505 1506 dma = pci_map_single(pdev, skb->data, 1507 rds_ring->dma_size, PCI_DMA_FROMDEVICE); 1508 1509 if (pci_dma_mapping_error(pdev, dma)) { 1510 dev_kfree_skb_any(skb); 1511 buffer->skb = NULL; 1512 return 1; 1513 } 1514 1515 buffer->skb = skb; 1516 buffer->dma = dma; 1517 buffer->state = NETXEN_BUFFER_BUSY; 1518 1519 return 0; 1520 } 1521 1522 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1523 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1524 { 1525 struct netxen_rx_buffer *buffer; 1526 struct sk_buff *skb; 1527 1528 buffer = &rds_ring->rx_buf_arr[index]; 1529 1530 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, 1531 PCI_DMA_FROMDEVICE); 1532 1533 skb = buffer->skb; 1534 if (!skb) 1535 goto no_skb; 1536 1537 if (likely((adapter->netdev->features & NETIF_F_RXCSUM) 1538 && cksum == STATUS_CKSUM_OK)) { 1539 adapter->stats.csummed++; 1540 skb->ip_summed = CHECKSUM_UNNECESSARY; 1541 } else 1542 skb->ip_summed = CHECKSUM_NONE; 1543 1544 skb->dev = adapter->netdev; 1545 1546 buffer->skb = NULL; 1547 no_skb: 1548 buffer->state = NETXEN_BUFFER_FREE; 1549 return skb; 1550 } 1551 1552 static struct netxen_rx_buffer * 1553 netxen_process_rcv(struct netxen_adapter *adapter, 1554 struct nx_host_sds_ring *sds_ring, 1555 int ring, u64 sts_data0) 1556 { 1557 struct net_device *netdev = adapter->netdev; 1558 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1559 struct netxen_rx_buffer *buffer; 1560 struct sk_buff *skb; 1561 struct nx_host_rds_ring *rds_ring; 1562 int index, length, cksum, pkt_offset; 1563 1564 if (unlikely(ring >= adapter->max_rds_rings)) 1565 return NULL; 1566 1567 rds_ring = &recv_ctx->rds_rings[ring]; 1568 1569 index = netxen_get_sts_refhandle(sts_data0); 1570 if (unlikely(index >= rds_ring->num_desc)) 1571 return NULL; 1572 1573 buffer = &rds_ring->rx_buf_arr[index]; 1574 1575 length = netxen_get_sts_totallength(sts_data0); 1576 cksum = netxen_get_sts_status(sts_data0); 1577 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1578 1579 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1580 if (!skb) 1581 return buffer; 1582 1583 if (length > rds_ring->skb_size) 1584 skb_put(skb, rds_ring->skb_size); 1585 else 1586 skb_put(skb, length); 1587 1588 1589 if (pkt_offset) 1590 skb_pull(skb, pkt_offset); 1591 1592 skb->protocol = eth_type_trans(skb, netdev); 1593 1594 napi_gro_receive(&sds_ring->napi, skb); 1595 1596 adapter->stats.rx_pkts++; 1597 adapter->stats.rxbytes += length; 1598 1599 return buffer; 1600 } 1601 1602 #define TCP_HDR_SIZE 20 1603 #define TCP_TS_OPTION_SIZE 12 1604 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1605 1606 static struct netxen_rx_buffer * 1607 netxen_process_lro(struct netxen_adapter *adapter, 1608 struct nx_host_sds_ring *sds_ring, 1609 int ring, u64 sts_data0, u64 sts_data1) 1610 { 1611 struct net_device *netdev = adapter->netdev; 1612 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1613 struct netxen_rx_buffer *buffer; 1614 struct sk_buff *skb; 1615 struct nx_host_rds_ring *rds_ring; 1616 struct iphdr *iph; 1617 struct tcphdr *th; 1618 bool push, timestamp; 1619 int l2_hdr_offset, l4_hdr_offset; 1620 int index; 1621 u16 lro_length, length, data_offset; 1622 u32 seq_number; 1623 u8 vhdr_len = 0; 1624 1625 if (unlikely(ring > adapter->max_rds_rings)) 1626 return NULL; 1627 1628 rds_ring = &recv_ctx->rds_rings[ring]; 1629 1630 index = netxen_get_lro_sts_refhandle(sts_data0); 1631 if (unlikely(index > rds_ring->num_desc)) 1632 return NULL; 1633 1634 buffer = &rds_ring->rx_buf_arr[index]; 1635 1636 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1637 lro_length = netxen_get_lro_sts_length(sts_data0); 1638 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1639 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1640 push = netxen_get_lro_sts_push_flag(sts_data0); 1641 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1642 1643 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1644 if (!skb) 1645 return buffer; 1646 1647 if (timestamp) 1648 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1649 else 1650 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1651 1652 skb_put(skb, lro_length + data_offset); 1653 1654 skb_pull(skb, l2_hdr_offset); 1655 skb->protocol = eth_type_trans(skb, netdev); 1656 1657 if (skb->protocol == htons(ETH_P_8021Q)) 1658 vhdr_len = VLAN_HLEN; 1659 iph = (struct iphdr *)(skb->data + vhdr_len); 1660 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2)); 1661 1662 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1663 iph->tot_len = htons(length); 1664 iph->check = 0; 1665 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); 1666 th->psh = push; 1667 th->seq = htonl(seq_number); 1668 1669 length = skb->len; 1670 1671 netif_receive_skb(skb); 1672 1673 adapter->stats.lro_pkts++; 1674 adapter->stats.rxbytes += length; 1675 1676 return buffer; 1677 } 1678 1679 #define netxen_merge_rx_buffers(list, head) \ 1680 do { list_splice_tail_init(list, head); } while (0); 1681 1682 int 1683 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1684 { 1685 struct netxen_adapter *adapter = sds_ring->adapter; 1686 1687 struct list_head *cur; 1688 1689 struct status_desc *desc; 1690 struct netxen_rx_buffer *rxbuf; 1691 1692 u32 consumer = sds_ring->consumer; 1693 1694 int count = 0; 1695 u64 sts_data0, sts_data1; 1696 int opcode, ring = 0, desc_cnt; 1697 1698 while (count < max) { 1699 desc = &sds_ring->desc_head[consumer]; 1700 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1701 1702 if (!(sts_data0 & STATUS_OWNER_HOST)) 1703 break; 1704 1705 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1706 1707 opcode = netxen_get_sts_opcode(sts_data0); 1708 1709 switch (opcode) { 1710 case NETXEN_NIC_RXPKT_DESC: 1711 case NETXEN_OLD_RXPKT_DESC: 1712 case NETXEN_NIC_SYN_OFFLOAD: 1713 ring = netxen_get_sts_type(sts_data0); 1714 rxbuf = netxen_process_rcv(adapter, sds_ring, 1715 ring, sts_data0); 1716 break; 1717 case NETXEN_NIC_LRO_DESC: 1718 ring = netxen_get_lro_sts_type(sts_data0); 1719 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1720 rxbuf = netxen_process_lro(adapter, sds_ring, 1721 ring, sts_data0, sts_data1); 1722 break; 1723 case NETXEN_NIC_RESPONSE_DESC: 1724 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1725 default: 1726 goto skip; 1727 } 1728 1729 WARN_ON(desc_cnt > 1); 1730 1731 if (rxbuf) 1732 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1733 1734 skip: 1735 for (; desc_cnt > 0; desc_cnt--) { 1736 desc = &sds_ring->desc_head[consumer]; 1737 desc->status_desc_data[0] = 1738 cpu_to_le64(STATUS_OWNER_PHANTOM); 1739 consumer = get_next_index(consumer, sds_ring->num_desc); 1740 } 1741 count++; 1742 } 1743 1744 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1745 struct nx_host_rds_ring *rds_ring = 1746 &adapter->recv_ctx.rds_rings[ring]; 1747 1748 if (!list_empty(&sds_ring->free_list[ring])) { 1749 list_for_each(cur, &sds_ring->free_list[ring]) { 1750 rxbuf = list_entry(cur, 1751 struct netxen_rx_buffer, list); 1752 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1753 } 1754 spin_lock(&rds_ring->lock); 1755 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1756 &rds_ring->free_list); 1757 spin_unlock(&rds_ring->lock); 1758 } 1759 1760 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1761 } 1762 1763 if (count) { 1764 sds_ring->consumer = consumer; 1765 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1766 } 1767 1768 return count; 1769 } 1770 1771 /* Process Command status ring */ 1772 int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1773 { 1774 u32 sw_consumer, hw_consumer; 1775 int count = 0, i; 1776 struct netxen_cmd_buffer *buffer; 1777 struct pci_dev *pdev = adapter->pdev; 1778 struct net_device *netdev = adapter->netdev; 1779 struct netxen_skb_frag *frag; 1780 int done = 0; 1781 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1782 1783 if (!spin_trylock(&adapter->tx_clean_lock)) 1784 return 1; 1785 1786 sw_consumer = tx_ring->sw_consumer; 1787 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1788 1789 while (sw_consumer != hw_consumer) { 1790 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1791 if (buffer->skb) { 1792 frag = &buffer->frag_array[0]; 1793 pci_unmap_single(pdev, frag->dma, frag->length, 1794 PCI_DMA_TODEVICE); 1795 frag->dma = 0ULL; 1796 for (i = 1; i < buffer->frag_count; i++) { 1797 frag++; /* Get the next frag */ 1798 pci_unmap_page(pdev, frag->dma, frag->length, 1799 PCI_DMA_TODEVICE); 1800 frag->dma = 0ULL; 1801 } 1802 1803 adapter->stats.xmitfinished++; 1804 dev_kfree_skb_any(buffer->skb); 1805 buffer->skb = NULL; 1806 } 1807 1808 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1809 if (++count >= MAX_STATUS_HANDLE) 1810 break; 1811 } 1812 1813 if (count && netif_running(netdev)) { 1814 tx_ring->sw_consumer = sw_consumer; 1815 1816 smp_mb(); 1817 1818 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) 1819 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) 1820 netif_wake_queue(netdev); 1821 adapter->tx_timeo_cnt = 0; 1822 } 1823 /* 1824 * If everything is freed up to consumer then check if the ring is full 1825 * If the ring is full then check if more needs to be freed and 1826 * schedule the call back again. 1827 * 1828 * This happens when there are 2 CPUs. One could be freeing and the 1829 * other filling it. If the ring is full when we get out of here and 1830 * the card has already interrupted the host then the host can miss the 1831 * interrupt. 1832 * 1833 * There is still a possible race condition and the host could miss an 1834 * interrupt. The card has to take care of this. 1835 */ 1836 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1837 done = (sw_consumer == hw_consumer); 1838 spin_unlock(&adapter->tx_clean_lock); 1839 1840 return done; 1841 } 1842 1843 void 1844 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1845 struct nx_host_rds_ring *rds_ring) 1846 { 1847 struct rcv_desc *pdesc; 1848 struct netxen_rx_buffer *buffer; 1849 int producer, count = 0; 1850 netxen_ctx_msg msg = 0; 1851 struct list_head *head; 1852 1853 producer = rds_ring->producer; 1854 1855 head = &rds_ring->free_list; 1856 while (!list_empty(head)) { 1857 1858 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1859 1860 if (!buffer->skb) { 1861 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1862 break; 1863 } 1864 1865 count++; 1866 list_del(&buffer->list); 1867 1868 /* make a rcv descriptor */ 1869 pdesc = &rds_ring->desc_head[producer]; 1870 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1871 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1872 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1873 1874 producer = get_next_index(producer, rds_ring->num_desc); 1875 } 1876 1877 if (count) { 1878 rds_ring->producer = producer; 1879 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1880 (producer-1) & (rds_ring->num_desc-1)); 1881 1882 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1883 /* 1884 * Write a doorbell msg to tell phanmon of change in 1885 * receive ring producer 1886 * Only for firmware version < 4.0.0 1887 */ 1888 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1889 netxen_set_msg_privid(msg); 1890 netxen_set_msg_count(msg, 1891 ((producer - 1) & 1892 (rds_ring->num_desc - 1))); 1893 netxen_set_msg_ctxid(msg, adapter->portnum); 1894 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1895 NXWRIO(adapter, DB_NORMALIZE(adapter, 1896 NETXEN_RCV_PRODUCER_OFFSET), msg); 1897 } 1898 } 1899 } 1900 1901 static void 1902 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1903 struct nx_host_rds_ring *rds_ring) 1904 { 1905 struct rcv_desc *pdesc; 1906 struct netxen_rx_buffer *buffer; 1907 int producer, count = 0; 1908 struct list_head *head; 1909 1910 if (!spin_trylock(&rds_ring->lock)) 1911 return; 1912 1913 producer = rds_ring->producer; 1914 1915 head = &rds_ring->free_list; 1916 while (!list_empty(head)) { 1917 1918 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1919 1920 if (!buffer->skb) { 1921 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1922 break; 1923 } 1924 1925 count++; 1926 list_del(&buffer->list); 1927 1928 /* make a rcv descriptor */ 1929 pdesc = &rds_ring->desc_head[producer]; 1930 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1931 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1932 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1933 1934 producer = get_next_index(producer, rds_ring->num_desc); 1935 } 1936 1937 if (count) { 1938 rds_ring->producer = producer; 1939 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1940 (producer - 1) & (rds_ring->num_desc - 1)); 1941 } 1942 spin_unlock(&rds_ring->lock); 1943 } 1944 1945 void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1946 { 1947 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1948 } 1949 1950