1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_LIF_H_ 5 #define _IONIC_LIF_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/timecounter.h> 9 #include <uapi/linux/net_tstamp.h> 10 #include <linux/dim.h> 11 #include <linux/pci.h> 12 #include "ionic_rx_filter.h" 13 14 #define IONIC_ADMINQ_LENGTH 16 /* must be a power of two */ 15 #define IONIC_NOTIFYQ_LENGTH 64 /* must be a power of two */ 16 17 #define ADD_ADDR true 18 #define DEL_ADDR false 19 #define CAN_SLEEP true 20 #define CAN_NOT_SLEEP false 21 22 #define IONIC_RX_COPYBREAK_DEFAULT 256 23 #define IONIC_TX_BUDGET_DEFAULT 256 24 25 struct ionic_tx_stats { 26 u64 pkts; 27 u64 bytes; 28 u64 csum_none; 29 u64 csum; 30 u64 tso; 31 u64 tso_bytes; 32 u64 frags; 33 u64 vlan_inserted; 34 u64 clean; 35 u64 linearize; 36 u64 crc32_csum; 37 u64 dma_map_err; 38 u64 hwstamp_valid; 39 u64 hwstamp_invalid; 40 u64 xdp_frames; 41 }; 42 43 struct ionic_rx_stats { 44 u64 pkts; 45 u64 bytes; 46 u64 csum_none; 47 u64 csum_complete; 48 u64 dropped; 49 u64 vlan_stripped; 50 u64 csum_error; 51 u64 dma_map_err; 52 u64 alloc_err; 53 u64 hwstamp_valid; 54 u64 hwstamp_invalid; 55 u64 xdp_drop; 56 u64 xdp_aborted; 57 u64 xdp_pass; 58 u64 xdp_tx; 59 u64 xdp_redirect; 60 }; 61 62 #define IONIC_QCQ_F_INITED BIT(0) 63 #define IONIC_QCQ_F_SG BIT(1) 64 #define IONIC_QCQ_F_INTR BIT(2) 65 #define IONIC_QCQ_F_TX_STATS BIT(3) 66 #define IONIC_QCQ_F_RX_STATS BIT(4) 67 #define IONIC_QCQ_F_NOTIFYQ BIT(5) 68 #define IONIC_QCQ_F_CMB_RINGS BIT(6) 69 70 struct ionic_qcq { 71 void *q_base; 72 dma_addr_t q_base_pa; 73 u32 q_size; 74 u32 cq_size; 75 void *cq_base; 76 dma_addr_t cq_base_pa; 77 void *sg_base; 78 dma_addr_t sg_base_pa; 79 u32 sg_size; 80 unsigned int flags; 81 void __iomem *cmb_q_base; 82 phys_addr_t cmb_q_base_pa; 83 u32 cmb_q_size; 84 u32 cmb_pgid; 85 u32 cmb_order; 86 struct dim dim; 87 struct timer_list napi_deadline; 88 struct ionic_queue q; 89 struct ionic_cq cq; 90 struct napi_struct napi; 91 struct ionic_qcq *napi_qcq; 92 struct ionic_intr_info intr; 93 struct dentry *dentry; 94 }; 95 96 #define q_to_qcq(q) container_of(q, struct ionic_qcq, q) 97 #define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index]) 98 #define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index]) 99 #define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi) 100 #define napi_to_cq(napi) (&napi_to_qcq(napi)->cq) 101 102 enum ionic_deferred_work_type { 103 IONIC_DW_TYPE_RX_MODE, 104 IONIC_DW_TYPE_LINK_STATUS, 105 IONIC_DW_TYPE_LIF_RESET, 106 }; 107 108 struct ionic_deferred_work { 109 struct list_head list; 110 enum ionic_deferred_work_type type; 111 union { 112 u8 addr[ETH_ALEN]; 113 u8 fw_status; 114 }; 115 }; 116 117 struct ionic_deferred { 118 spinlock_t lock; /* lock for deferred work list */ 119 struct list_head list; 120 struct work_struct work; 121 }; 122 123 struct ionic_lif_sw_stats { 124 u64 tx_packets; 125 u64 tx_bytes; 126 u64 rx_packets; 127 u64 rx_bytes; 128 u64 tx_tso; 129 u64 tx_tso_bytes; 130 u64 tx_csum_none; 131 u64 tx_csum; 132 u64 rx_csum_none; 133 u64 rx_csum_complete; 134 u64 rx_csum_error; 135 u64 tx_hwstamp_valid; 136 u64 tx_hwstamp_invalid; 137 u64 rx_hwstamp_valid; 138 u64 rx_hwstamp_invalid; 139 u64 hw_tx_dropped; 140 u64 hw_rx_dropped; 141 u64 hw_rx_over_errors; 142 u64 hw_rx_missed_errors; 143 u64 hw_tx_aborted_errors; 144 u64 xdp_drop; 145 u64 xdp_aborted; 146 u64 xdp_pass; 147 u64 xdp_tx; 148 u64 xdp_redirect; 149 u64 xdp_frames; 150 }; 151 152 enum ionic_lif_state_flags { 153 IONIC_LIF_F_INITED, 154 IONIC_LIF_F_UP, 155 IONIC_LIF_F_LINK_CHECK_REQUESTED, 156 IONIC_LIF_F_FILTER_SYNC_NEEDED, 157 IONIC_LIF_F_FW_RESET, 158 IONIC_LIF_F_FW_STOPPING, 159 IONIC_LIF_F_SPLIT_INTR, 160 IONIC_LIF_F_BROKEN, 161 IONIC_LIF_F_TX_DIM_INTR, 162 IONIC_LIF_F_RX_DIM_INTR, 163 IONIC_LIF_F_CMB_TX_RINGS, 164 IONIC_LIF_F_CMB_RX_RINGS, 165 166 /* leave this as last */ 167 IONIC_LIF_F_STATE_SIZE 168 }; 169 170 struct ionic_qtype_info { 171 u8 version; 172 u8 supported; 173 u64 features; 174 u16 desc_sz; 175 u16 comp_sz; 176 u16 sg_desc_sz; 177 u16 max_sg_elems; 178 u16 sg_desc_stride; 179 }; 180 181 struct ionic_phc; 182 183 #define IONIC_LIF_NAME_MAX_SZ 32 184 struct ionic_lif { 185 struct net_device *netdev; 186 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE); 187 struct ionic *ionic; 188 unsigned int index; 189 unsigned int hw_index; 190 struct mutex queue_lock; /* lock for queue structures */ 191 struct mutex config_lock; /* lock for config actions */ 192 spinlock_t adminq_lock; /* lock for AdminQ operations */ 193 struct ionic_qcq *adminqcq; 194 struct ionic_qcq *notifyqcq; 195 struct ionic_qcq **txqcqs; 196 struct ionic_qcq *hwstamp_txq; 197 struct ionic_tx_stats *txqstats; 198 struct ionic_qcq **rxqcqs; 199 struct ionic_qcq *hwstamp_rxq; 200 struct ionic_rx_stats *rxqstats; 201 struct ionic_deferred deferred; 202 struct work_struct tx_timeout_work; 203 u64 last_eid; 204 unsigned int kern_pid; 205 u64 __iomem *kern_dbpage; 206 unsigned int neqs; 207 unsigned int nxqs; 208 unsigned int ntxq_descs; 209 unsigned int nrxq_descs; 210 u32 rx_copybreak; 211 u64 rxq_features; 212 u16 rx_mode; 213 u64 hw_features; 214 bool registered; 215 u16 lif_type; 216 unsigned int link_down_count; 217 unsigned int nmcast; 218 unsigned int nucast; 219 unsigned int nvlans; 220 unsigned int max_vlans; 221 char name[IONIC_LIF_NAME_MAX_SZ]; 222 223 union ionic_lif_identity *identity; 224 struct ionic_lif_info *info; 225 dma_addr_t info_pa; 226 u32 info_sz; 227 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX]; 228 229 u16 rss_types; 230 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE]; 231 u8 *rss_ind_tbl; 232 dma_addr_t rss_ind_tbl_pa; 233 u32 rss_ind_tbl_sz; 234 235 struct ionic_rx_filters rx_filters; 236 u32 rx_coalesce_usecs; /* what the user asked for */ 237 u32 rx_coalesce_hw; /* what the hw is using */ 238 u32 tx_coalesce_usecs; /* what the user asked for */ 239 u32 tx_coalesce_hw; /* what the hw is using */ 240 unsigned int dbid_count; 241 242 struct ionic_phc *phc; 243 244 struct dentry *dentry; 245 struct bpf_prog *xdp_prog; 246 }; 247 248 struct ionic_phc { 249 spinlock_t lock; /* lock for cc and tc */ 250 struct cyclecounter cc; 251 struct timecounter tc; 252 253 struct mutex config_lock; /* lock for ts_config */ 254 struct hwtstamp_config ts_config; 255 u64 ts_config_rx_filt; 256 u32 ts_config_tx_mode; 257 258 u32 init_cc_mult; 259 long aux_work_delay; 260 261 struct ptp_clock_info ptp_info; 262 struct ptp_clock *ptp; 263 struct ionic_lif *lif; 264 }; 265 266 struct ionic_queue_params { 267 unsigned int nxqs; 268 unsigned int ntxq_descs; 269 unsigned int nrxq_descs; 270 u64 rxq_features; 271 bool intr_split; 272 bool cmb_tx; 273 bool cmb_rx; 274 }; 275 276 static inline void ionic_init_queue_params(struct ionic_lif *lif, 277 struct ionic_queue_params *qparam) 278 { 279 qparam->nxqs = lif->nxqs; 280 qparam->ntxq_descs = lif->ntxq_descs; 281 qparam->nrxq_descs = lif->nrxq_descs; 282 qparam->rxq_features = lif->rxq_features; 283 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 284 qparam->cmb_tx = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 285 qparam->cmb_rx = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 286 } 287 288 static inline void ionic_set_queue_params(struct ionic_lif *lif, 289 struct ionic_queue_params *qparam) 290 { 291 lif->nxqs = qparam->nxqs; 292 lif->ntxq_descs = qparam->ntxq_descs; 293 lif->nrxq_descs = qparam->nrxq_descs; 294 lif->rxq_features = qparam->rxq_features; 295 296 if (qparam->intr_split) 297 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 298 else 299 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 300 301 if (qparam->cmb_tx) 302 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 303 else 304 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state); 305 306 if (qparam->cmb_rx) 307 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 308 else 309 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state); 310 } 311 312 static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs) 313 { 314 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult); 315 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); 316 317 /* Div-by-zero should never be an issue, but check anyway */ 318 if (!div || !mult) 319 return 0; 320 321 /* Round up in case usecs is close to the next hw unit */ 322 usecs += (div / mult) >> 1; 323 324 /* Convert from usecs to device units */ 325 return (usecs * mult) / div; 326 } 327 328 static inline bool ionic_txq_hwstamp_enabled(struct ionic_queue *q) 329 { 330 return q->features & IONIC_TXQ_F_HWSTAMP; 331 } 332 333 void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep); 334 void ionic_get_stats64(struct net_device *netdev, 335 struct rtnl_link_stats64 *ns); 336 void ionic_lif_deferred_enqueue(struct ionic_deferred *def, 337 struct ionic_deferred_work *work); 338 int ionic_lif_alloc(struct ionic *ionic); 339 int ionic_lif_init(struct ionic_lif *lif); 340 void ionic_lif_free(struct ionic_lif *lif); 341 void ionic_lif_deinit(struct ionic_lif *lif); 342 343 int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr); 344 int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr); 345 346 void ionic_stop_queues_reconfig(struct ionic_lif *lif); 347 void ionic_txrx_free(struct ionic_lif *lif); 348 void ionic_qcqs_free(struct ionic_lif *lif); 349 int ionic_restart_lif(struct ionic_lif *lif); 350 351 int ionic_lif_register(struct ionic_lif *lif); 352 void ionic_lif_unregister(struct ionic_lif *lif); 353 int ionic_lif_identify(struct ionic *ionic, u8 lif_type, 354 union ionic_lif_identity *lif_ident); 355 int ionic_lif_size(struct ionic *ionic); 356 357 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 358 void ionic_lif_hwstamp_replay(struct ionic_lif *lif); 359 void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif); 360 int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr); 361 int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr); 362 ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter); 363 void ionic_lif_register_phc(struct ionic_lif *lif); 364 void ionic_lif_unregister_phc(struct ionic_lif *lif); 365 void ionic_lif_alloc_phc(struct ionic_lif *lif); 366 void ionic_lif_free_phc(struct ionic_lif *lif); 367 #else 368 static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {} 369 static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {} 370 371 static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr) 372 { 373 return -EOPNOTSUPP; 374 } 375 376 static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr) 377 { 378 return -EOPNOTSUPP; 379 } 380 381 static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter) 382 { 383 return ns_to_ktime(0); 384 } 385 386 static inline void ionic_lif_register_phc(struct ionic_lif *lif) {} 387 static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {} 388 static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {} 389 static inline void ionic_lif_free_phc(struct ionic_lif *lif) {} 390 #endif 391 392 int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif); 393 int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif); 394 int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all); 395 int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode); 396 int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class); 397 398 int ionic_lif_rss_config(struct ionic_lif *lif, u16 types, 399 const u8 *key, const u32 *indir); 400 void ionic_lif_rx_mode(struct ionic_lif *lif); 401 int ionic_reconfigure_queues(struct ionic_lif *lif, 402 struct ionic_queue_params *qparam); 403 #endif /* _IONIC_LIF_H_ */ 404