1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/module.h> 5 #include <linux/netdevice.h> 6 #include <linux/sfp.h> 7 8 #include "ionic.h" 9 #include "ionic_bus.h" 10 #include "ionic_lif.h" 11 #include "ionic_ethtool.h" 12 #include "ionic_stats.h" 13 14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = { 15 #define IONIC_PRIV_F_SW_DBG_STATS BIT(0) 16 "sw-dbg-stats", 17 }; 18 19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings) 20 21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf) 22 { 23 u32 i; 24 25 for (i = 0; i < ionic_num_stats_grps; i++) 26 ionic_stats_groups[i].get_strings(lif, &buf); 27 } 28 29 static void ionic_get_stats(struct net_device *netdev, 30 struct ethtool_stats *stats, u64 *buf) 31 { 32 struct ionic_lif *lif = netdev_priv(netdev); 33 u32 i; 34 35 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 36 return; 37 38 memset(buf, 0, stats->n_stats * sizeof(*buf)); 39 for (i = 0; i < ionic_num_stats_grps; i++) 40 ionic_stats_groups[i].get_values(lif, &buf); 41 } 42 43 static int ionic_get_stats_count(struct ionic_lif *lif) 44 { 45 int i, num_stats = 0; 46 47 for (i = 0; i < ionic_num_stats_grps; i++) 48 num_stats += ionic_stats_groups[i].get_count(lif); 49 50 return num_stats; 51 } 52 53 static int ionic_get_sset_count(struct net_device *netdev, int sset) 54 { 55 struct ionic_lif *lif = netdev_priv(netdev); 56 int count = 0; 57 58 switch (sset) { 59 case ETH_SS_STATS: 60 count = ionic_get_stats_count(lif); 61 break; 62 case ETH_SS_PRIV_FLAGS: 63 count = IONIC_PRIV_FLAGS_COUNT; 64 break; 65 } 66 return count; 67 } 68 69 static void ionic_get_strings(struct net_device *netdev, 70 u32 sset, u8 *buf) 71 { 72 struct ionic_lif *lif = netdev_priv(netdev); 73 74 switch (sset) { 75 case ETH_SS_STATS: 76 ionic_get_stats_strings(lif, buf); 77 break; 78 case ETH_SS_PRIV_FLAGS: 79 memcpy(buf, ionic_priv_flags_strings, 80 IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN); 81 break; 82 } 83 } 84 85 static void ionic_get_drvinfo(struct net_device *netdev, 86 struct ethtool_drvinfo *drvinfo) 87 { 88 struct ionic_lif *lif = netdev_priv(netdev); 89 struct ionic *ionic = lif->ionic; 90 91 strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver)); 92 strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version, 93 sizeof(drvinfo->fw_version)); 94 strlcpy(drvinfo->bus_info, ionic_bus_info(ionic), 95 sizeof(drvinfo->bus_info)); 96 } 97 98 static int ionic_get_regs_len(struct net_device *netdev) 99 { 100 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32); 101 } 102 103 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 104 void *p) 105 { 106 struct ionic_lif *lif = netdev_priv(netdev); 107 unsigned int offset; 108 unsigned int size; 109 110 regs->version = IONIC_DEV_CMD_REG_VERSION; 111 112 offset = 0; 113 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32); 114 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size); 115 116 offset += size; 117 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32); 118 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size); 119 } 120 121 static int ionic_get_link_ksettings(struct net_device *netdev, 122 struct ethtool_link_ksettings *ks) 123 { 124 struct ionic_lif *lif = netdev_priv(netdev); 125 struct ionic_dev *idev = &lif->ionic->idev; 126 int copper_seen = 0; 127 128 ethtool_link_ksettings_zero_link_mode(ks, supported); 129 130 if (!idev->port_info) { 131 netdev_err(netdev, "port_info not initialized\n"); 132 return -EOPNOTSUPP; 133 } 134 135 /* The port_info data is found in a DMA space that the NIC keeps 136 * up-to-date, so there's no need to request the data from the 137 * NIC, we already have it in our memory space. 138 */ 139 140 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) { 141 /* Copper */ 142 case IONIC_XCVR_PID_QSFP_100G_CR4: 143 ethtool_link_ksettings_add_link_mode(ks, supported, 144 100000baseCR4_Full); 145 copper_seen++; 146 break; 147 case IONIC_XCVR_PID_QSFP_40GBASE_CR4: 148 ethtool_link_ksettings_add_link_mode(ks, supported, 149 40000baseCR4_Full); 150 copper_seen++; 151 break; 152 case IONIC_XCVR_PID_SFP_25GBASE_CR_S: 153 case IONIC_XCVR_PID_SFP_25GBASE_CR_L: 154 case IONIC_XCVR_PID_SFP_25GBASE_CR_N: 155 ethtool_link_ksettings_add_link_mode(ks, supported, 156 25000baseCR_Full); 157 copper_seen++; 158 break; 159 case IONIC_XCVR_PID_SFP_10GBASE_AOC: 160 case IONIC_XCVR_PID_SFP_10GBASE_CU: 161 ethtool_link_ksettings_add_link_mode(ks, supported, 162 10000baseCR_Full); 163 copper_seen++; 164 break; 165 166 /* Fibre */ 167 case IONIC_XCVR_PID_QSFP_100G_SR4: 168 case IONIC_XCVR_PID_QSFP_100G_AOC: 169 ethtool_link_ksettings_add_link_mode(ks, supported, 170 100000baseSR4_Full); 171 break; 172 case IONIC_XCVR_PID_QSFP_100G_CWDM4: 173 case IONIC_XCVR_PID_QSFP_100G_PSM4: 174 case IONIC_XCVR_PID_QSFP_100G_LR4: 175 ethtool_link_ksettings_add_link_mode(ks, supported, 176 100000baseLR4_ER4_Full); 177 break; 178 case IONIC_XCVR_PID_QSFP_100G_ER4: 179 ethtool_link_ksettings_add_link_mode(ks, supported, 180 100000baseLR4_ER4_Full); 181 break; 182 case IONIC_XCVR_PID_QSFP_40GBASE_SR4: 183 case IONIC_XCVR_PID_QSFP_40GBASE_AOC: 184 ethtool_link_ksettings_add_link_mode(ks, supported, 185 40000baseSR4_Full); 186 break; 187 case IONIC_XCVR_PID_QSFP_40GBASE_LR4: 188 ethtool_link_ksettings_add_link_mode(ks, supported, 189 40000baseLR4_Full); 190 break; 191 case IONIC_XCVR_PID_SFP_25GBASE_SR: 192 case IONIC_XCVR_PID_SFP_25GBASE_AOC: 193 case IONIC_XCVR_PID_SFP_25GBASE_ACC: 194 ethtool_link_ksettings_add_link_mode(ks, supported, 195 25000baseSR_Full); 196 break; 197 case IONIC_XCVR_PID_SFP_10GBASE_SR: 198 ethtool_link_ksettings_add_link_mode(ks, supported, 199 10000baseSR_Full); 200 break; 201 case IONIC_XCVR_PID_SFP_10GBASE_LR: 202 ethtool_link_ksettings_add_link_mode(ks, supported, 203 10000baseLR_Full); 204 break; 205 case IONIC_XCVR_PID_SFP_10GBASE_LRM: 206 ethtool_link_ksettings_add_link_mode(ks, supported, 207 10000baseLRM_Full); 208 break; 209 case IONIC_XCVR_PID_SFP_10GBASE_ER: 210 ethtool_link_ksettings_add_link_mode(ks, supported, 211 10000baseER_Full); 212 break; 213 case IONIC_XCVR_PID_SFP_10GBASE_T: 214 ethtool_link_ksettings_add_link_mode(ks, supported, 215 10000baseT_Full); 216 break; 217 case IONIC_XCVR_PID_SFP_1000BASE_T: 218 ethtool_link_ksettings_add_link_mode(ks, supported, 219 1000baseT_Full); 220 break; 221 case IONIC_XCVR_PID_UNKNOWN: 222 /* This means there's no module plugged in */ 223 break; 224 default: 225 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n", 226 idev->port_info->status.xcvr.pid, 227 idev->port_info->status.xcvr.pid); 228 break; 229 } 230 231 bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported, 232 __ETHTOOL_LINK_MODE_MASK_NBITS); 233 234 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 235 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 236 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC) 237 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER); 238 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS) 239 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 240 241 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 242 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 243 244 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER || 245 copper_seen) 246 ks->base.port = PORT_DA; 247 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER) 248 ks->base.port = PORT_FIBRE; 249 else 250 ks->base.port = PORT_NONE; 251 252 if (ks->base.port != PORT_NONE) { 253 ks->base.speed = le32_to_cpu(lif->info->status.link_speed); 254 255 if (le16_to_cpu(lif->info->status.link_status)) 256 ks->base.duplex = DUPLEX_FULL; 257 else 258 ks->base.duplex = DUPLEX_UNKNOWN; 259 260 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 261 262 if (idev->port_info->config.an_enable) { 263 ethtool_link_ksettings_add_link_mode(ks, advertising, 264 Autoneg); 265 ks->base.autoneg = AUTONEG_ENABLE; 266 } 267 } 268 269 return 0; 270 } 271 272 static int ionic_set_link_ksettings(struct net_device *netdev, 273 const struct ethtool_link_ksettings *ks) 274 { 275 struct ionic_lif *lif = netdev_priv(netdev); 276 struct ionic_dev *idev = &lif->ionic->idev; 277 struct ionic *ionic = lif->ionic; 278 int err = 0; 279 280 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 281 return -EBUSY; 282 283 /* set autoneg */ 284 if (ks->base.autoneg != idev->port_info->config.an_enable) { 285 mutex_lock(&ionic->dev_cmd_lock); 286 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg); 287 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 288 mutex_unlock(&ionic->dev_cmd_lock); 289 if (err) 290 return err; 291 } 292 293 /* set speed */ 294 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) { 295 mutex_lock(&ionic->dev_cmd_lock); 296 ionic_dev_cmd_port_speed(idev, ks->base.speed); 297 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 298 mutex_unlock(&ionic->dev_cmd_lock); 299 if (err) 300 return err; 301 } 302 303 return 0; 304 } 305 306 static void ionic_get_pauseparam(struct net_device *netdev, 307 struct ethtool_pauseparam *pause) 308 { 309 struct ionic_lif *lif = netdev_priv(netdev); 310 u8 pause_type; 311 312 pause->autoneg = 0; 313 314 pause_type = lif->ionic->idev.port_info->config.pause_type; 315 if (pause_type) { 316 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0; 317 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0; 318 } 319 } 320 321 static int ionic_set_pauseparam(struct net_device *netdev, 322 struct ethtool_pauseparam *pause) 323 { 324 struct ionic_lif *lif = netdev_priv(netdev); 325 struct ionic *ionic = lif->ionic; 326 u32 requested_pause; 327 int err; 328 329 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 330 return -EBUSY; 331 332 if (pause->autoneg) 333 return -EOPNOTSUPP; 334 335 /* change both at the same time */ 336 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK; 337 if (pause->rx_pause) 338 requested_pause |= IONIC_PAUSE_F_RX; 339 if (pause->tx_pause) 340 requested_pause |= IONIC_PAUSE_F_TX; 341 342 if (requested_pause == lif->ionic->idev.port_info->config.pause_type) 343 return 0; 344 345 mutex_lock(&ionic->dev_cmd_lock); 346 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause); 347 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 348 mutex_unlock(&ionic->dev_cmd_lock); 349 if (err) 350 return err; 351 352 return 0; 353 } 354 355 static int ionic_get_fecparam(struct net_device *netdev, 356 struct ethtool_fecparam *fec) 357 { 358 struct ionic_lif *lif = netdev_priv(netdev); 359 360 switch (lif->ionic->idev.port_info->config.fec_type) { 361 case IONIC_PORT_FEC_TYPE_NONE: 362 fec->active_fec = ETHTOOL_FEC_OFF; 363 break; 364 case IONIC_PORT_FEC_TYPE_RS: 365 fec->active_fec = ETHTOOL_FEC_RS; 366 break; 367 case IONIC_PORT_FEC_TYPE_FC: 368 fec->active_fec = ETHTOOL_FEC_BASER; 369 break; 370 } 371 372 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER; 373 374 return 0; 375 } 376 377 static int ionic_set_fecparam(struct net_device *netdev, 378 struct ethtool_fecparam *fec) 379 { 380 struct ionic_lif *lif = netdev_priv(netdev); 381 u8 fec_type; 382 int ret = 0; 383 384 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 385 return -EBUSY; 386 387 if (lif->ionic->idev.port_info->config.an_enable) { 388 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n"); 389 return -EINVAL; 390 } 391 392 switch (fec->fec) { 393 case ETHTOOL_FEC_NONE: 394 fec_type = IONIC_PORT_FEC_TYPE_NONE; 395 break; 396 case ETHTOOL_FEC_OFF: 397 fec_type = IONIC_PORT_FEC_TYPE_NONE; 398 break; 399 case ETHTOOL_FEC_RS: 400 fec_type = IONIC_PORT_FEC_TYPE_RS; 401 break; 402 case ETHTOOL_FEC_BASER: 403 fec_type = IONIC_PORT_FEC_TYPE_FC; 404 break; 405 case ETHTOOL_FEC_AUTO: 406 default: 407 netdev_err(netdev, "FEC request 0x%04x not supported\n", 408 fec->fec); 409 return -EINVAL; 410 } 411 412 if (fec_type != lif->ionic->idev.port_info->config.fec_type) { 413 mutex_lock(&lif->ionic->dev_cmd_lock); 414 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type); 415 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT); 416 mutex_unlock(&lif->ionic->dev_cmd_lock); 417 } 418 419 return ret; 420 } 421 422 static int ionic_get_coalesce(struct net_device *netdev, 423 struct ethtool_coalesce *coalesce) 424 { 425 struct ionic_lif *lif = netdev_priv(netdev); 426 427 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs; 428 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs; 429 430 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 431 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 432 else 433 coalesce->use_adaptive_tx_coalesce = 0; 434 435 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 436 437 return 0; 438 } 439 440 static int ionic_set_coalesce(struct net_device *netdev, 441 struct ethtool_coalesce *coalesce) 442 { 443 struct ionic_lif *lif = netdev_priv(netdev); 444 struct ionic_identity *ident; 445 u32 rx_coal, rx_dim; 446 u32 tx_coal, tx_dim; 447 unsigned int i; 448 449 ident = &lif->ionic->ident; 450 if (ident->dev.intr_coal_div == 0) { 451 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n", 452 ident->dev.intr_coal_div); 453 return -EIO; 454 } 455 456 /* Tx normally shares Rx interrupt, so only change Rx if not split */ 457 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) && 458 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs || 459 coalesce->use_adaptive_tx_coalesce)) { 460 netdev_warn(netdev, "only rx parameters can be changed\n"); 461 return -EINVAL; 462 } 463 464 /* Convert the usec request to a HW usable value. If they asked 465 * for non-zero and it resolved to zero, bump it up 466 */ 467 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs); 468 if (!rx_coal && coalesce->rx_coalesce_usecs) 469 rx_coal = 1; 470 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs); 471 if (!tx_coal && coalesce->tx_coalesce_usecs) 472 tx_coal = 1; 473 474 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX || 475 tx_coal > IONIC_INTR_CTRL_COAL_MAX) 476 return -ERANGE; 477 478 /* Save the new values */ 479 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs; 480 lif->rx_coalesce_hw = rx_coal; 481 482 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 483 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs; 484 else 485 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs; 486 lif->tx_coalesce_hw = tx_coal; 487 488 if (coalesce->use_adaptive_rx_coalesce) { 489 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 490 rx_dim = rx_coal; 491 } else { 492 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state); 493 rx_dim = 0; 494 } 495 496 if (coalesce->use_adaptive_tx_coalesce) { 497 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 498 tx_dim = tx_coal; 499 } else { 500 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state); 501 tx_dim = 0; 502 } 503 504 if (test_bit(IONIC_LIF_F_UP, lif->state)) { 505 for (i = 0; i < lif->nxqs; i++) { 506 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) { 507 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 508 lif->rxqcqs[i]->intr.index, 509 lif->rx_coalesce_hw); 510 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim; 511 } 512 513 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) { 514 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl, 515 lif->txqcqs[i]->intr.index, 516 lif->tx_coalesce_hw); 517 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim; 518 } 519 } 520 } 521 522 return 0; 523 } 524 525 static void ionic_get_ringparam(struct net_device *netdev, 526 struct ethtool_ringparam *ring) 527 { 528 struct ionic_lif *lif = netdev_priv(netdev); 529 530 ring->tx_max_pending = IONIC_MAX_TX_DESC; 531 ring->tx_pending = lif->ntxq_descs; 532 ring->rx_max_pending = IONIC_MAX_RX_DESC; 533 ring->rx_pending = lif->nrxq_descs; 534 } 535 536 static int ionic_set_ringparam(struct net_device *netdev, 537 struct ethtool_ringparam *ring) 538 { 539 struct ionic_lif *lif = netdev_priv(netdev); 540 struct ionic_queue_params qparam; 541 int err; 542 543 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 544 return -EBUSY; 545 546 ionic_init_queue_params(lif, &qparam); 547 548 if (ring->rx_mini_pending || ring->rx_jumbo_pending) { 549 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); 550 return -EINVAL; 551 } 552 553 if (!is_power_of_2(ring->tx_pending) || 554 !is_power_of_2(ring->rx_pending)) { 555 netdev_info(netdev, "Descriptor count must be a power of 2\n"); 556 return -EINVAL; 557 } 558 559 /* if nothing to do return success */ 560 if (ring->tx_pending == lif->ntxq_descs && 561 ring->rx_pending == lif->nrxq_descs) 562 return 0; 563 564 if (ring->tx_pending != lif->ntxq_descs) 565 netdev_info(netdev, "Changing Tx ring size from %d to %d\n", 566 lif->ntxq_descs, ring->tx_pending); 567 568 if (ring->rx_pending != lif->nrxq_descs) 569 netdev_info(netdev, "Changing Rx ring size from %d to %d\n", 570 lif->nrxq_descs, ring->rx_pending); 571 572 /* if we're not running, just set the values and return */ 573 if (!netif_running(lif->netdev)) { 574 lif->ntxq_descs = ring->tx_pending; 575 lif->nrxq_descs = ring->rx_pending; 576 return 0; 577 } 578 579 qparam.ntxq_descs = ring->tx_pending; 580 qparam.nrxq_descs = ring->rx_pending; 581 err = ionic_reconfigure_queues(lif, &qparam); 582 if (err) 583 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err); 584 585 return err; 586 } 587 588 static void ionic_get_channels(struct net_device *netdev, 589 struct ethtool_channels *ch) 590 { 591 struct ionic_lif *lif = netdev_priv(netdev); 592 593 /* report maximum channels */ 594 ch->max_combined = lif->ionic->ntxqs_per_lif; 595 ch->max_rx = lif->ionic->ntxqs_per_lif / 2; 596 ch->max_tx = lif->ionic->ntxqs_per_lif / 2; 597 598 /* report current channels */ 599 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) { 600 ch->rx_count = lif->nxqs; 601 ch->tx_count = lif->nxqs; 602 } else { 603 ch->combined_count = lif->nxqs; 604 } 605 } 606 607 static int ionic_set_channels(struct net_device *netdev, 608 struct ethtool_channels *ch) 609 { 610 struct ionic_lif *lif = netdev_priv(netdev); 611 struct ionic_queue_params qparam; 612 int max_cnt; 613 int err; 614 615 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 616 return -EBUSY; 617 618 ionic_init_queue_params(lif, &qparam); 619 620 if (ch->rx_count != ch->tx_count) { 621 netdev_info(netdev, "The rx and tx count must be equal\n"); 622 return -EINVAL; 623 } 624 625 if (ch->combined_count && ch->rx_count) { 626 netdev_info(netdev, "Use either combined or rx and tx, not both\n"); 627 return -EINVAL; 628 } 629 630 max_cnt = lif->ionic->ntxqs_per_lif; 631 if (ch->combined_count) { 632 if (ch->combined_count > max_cnt) 633 return -EINVAL; 634 635 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 636 netdev_info(lif->netdev, "Sharing queue interrupts\n"); 637 else if (ch->combined_count == lif->nxqs) 638 return 0; 639 640 if (lif->nxqs != ch->combined_count) 641 netdev_info(netdev, "Changing queue count from %d to %d\n", 642 lif->nxqs, ch->combined_count); 643 644 qparam.nxqs = ch->combined_count; 645 qparam.intr_split = 0; 646 } else { 647 max_cnt /= 2; 648 if (ch->rx_count > max_cnt) 649 return -EINVAL; 650 651 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) 652 netdev_info(lif->netdev, "Splitting queue interrupts\n"); 653 else if (ch->rx_count == lif->nxqs) 654 return 0; 655 656 if (lif->nxqs != ch->rx_count) 657 netdev_info(netdev, "Changing queue count from %d to %d\n", 658 lif->nxqs, ch->rx_count); 659 660 qparam.nxqs = ch->rx_count; 661 qparam.intr_split = 1; 662 } 663 664 /* if we're not running, just set the values and return */ 665 if (!netif_running(lif->netdev)) { 666 lif->nxqs = qparam.nxqs; 667 668 if (qparam.intr_split) { 669 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 670 } else { 671 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 672 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs; 673 lif->tx_coalesce_hw = lif->rx_coalesce_hw; 674 } 675 return 0; 676 } 677 678 err = ionic_reconfigure_queues(lif, &qparam); 679 if (err) 680 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err); 681 682 return err; 683 } 684 685 static u32 ionic_get_priv_flags(struct net_device *netdev) 686 { 687 struct ionic_lif *lif = netdev_priv(netdev); 688 u32 priv_flags = 0; 689 690 if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state)) 691 priv_flags |= IONIC_PRIV_F_SW_DBG_STATS; 692 693 return priv_flags; 694 } 695 696 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags) 697 { 698 struct ionic_lif *lif = netdev_priv(netdev); 699 700 clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 701 if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS) 702 set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state); 703 704 return 0; 705 } 706 707 static int ionic_get_rxnfc(struct net_device *netdev, 708 struct ethtool_rxnfc *info, u32 *rules) 709 { 710 struct ionic_lif *lif = netdev_priv(netdev); 711 int err = 0; 712 713 switch (info->cmd) { 714 case ETHTOOL_GRXRINGS: 715 info->data = lif->nxqs; 716 break; 717 default: 718 netdev_err(netdev, "Command parameter %d is not supported\n", 719 info->cmd); 720 err = -EOPNOTSUPP; 721 } 722 723 return err; 724 } 725 726 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev) 727 { 728 struct ionic_lif *lif = netdev_priv(netdev); 729 730 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 731 } 732 733 static u32 ionic_get_rxfh_key_size(struct net_device *netdev) 734 { 735 return IONIC_RSS_HASH_KEY_SIZE; 736 } 737 738 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 739 u8 *hfunc) 740 { 741 struct ionic_lif *lif = netdev_priv(netdev); 742 unsigned int i, tbl_sz; 743 744 if (indir) { 745 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz); 746 for (i = 0; i < tbl_sz; i++) 747 indir[i] = lif->rss_ind_tbl[i]; 748 } 749 750 if (key) 751 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE); 752 753 if (hfunc) 754 *hfunc = ETH_RSS_HASH_TOP; 755 756 return 0; 757 } 758 759 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, 760 const u8 *key, const u8 hfunc) 761 { 762 struct ionic_lif *lif = netdev_priv(netdev); 763 764 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 765 return -EOPNOTSUPP; 766 767 return ionic_lif_rss_config(lif, lif->rss_types, key, indir); 768 } 769 770 static int ionic_set_tunable(struct net_device *dev, 771 const struct ethtool_tunable *tuna, 772 const void *data) 773 { 774 struct ionic_lif *lif = netdev_priv(dev); 775 776 switch (tuna->id) { 777 case ETHTOOL_RX_COPYBREAK: 778 lif->rx_copybreak = *(u32 *)data; 779 break; 780 default: 781 return -EOPNOTSUPP; 782 } 783 784 return 0; 785 } 786 787 static int ionic_get_tunable(struct net_device *netdev, 788 const struct ethtool_tunable *tuna, void *data) 789 { 790 struct ionic_lif *lif = netdev_priv(netdev); 791 792 switch (tuna->id) { 793 case ETHTOOL_RX_COPYBREAK: 794 *(u32 *)data = lif->rx_copybreak; 795 break; 796 default: 797 return -EOPNOTSUPP; 798 } 799 800 return 0; 801 } 802 803 static int ionic_get_module_info(struct net_device *netdev, 804 struct ethtool_modinfo *modinfo) 805 806 { 807 struct ionic_lif *lif = netdev_priv(netdev); 808 struct ionic_dev *idev = &lif->ionic->idev; 809 struct ionic_xcvr_status *xcvr; 810 struct sfp_eeprom_base *sfp; 811 812 xcvr = &idev->port_info->status.xcvr; 813 sfp = (struct sfp_eeprom_base *) xcvr->sprom; 814 815 /* report the module data type and length */ 816 switch (sfp->phys_id) { 817 case SFF8024_ID_SFP: 818 modinfo->type = ETH_MODULE_SFF_8079; 819 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 820 break; 821 case SFF8024_ID_QSFP_8436_8636: 822 case SFF8024_ID_QSFP28_8636: 823 modinfo->type = ETH_MODULE_SFF_8436; 824 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 825 break; 826 default: 827 netdev_info(netdev, "unknown xcvr type 0x%02x\n", 828 xcvr->sprom[0]); 829 modinfo->type = 0; 830 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 831 break; 832 } 833 834 return 0; 835 } 836 837 static int ionic_get_module_eeprom(struct net_device *netdev, 838 struct ethtool_eeprom *ee, 839 u8 *data) 840 { 841 struct ionic_lif *lif = netdev_priv(netdev); 842 struct ionic_dev *idev = &lif->ionic->idev; 843 struct ionic_xcvr_status *xcvr; 844 char tbuf[sizeof(xcvr->sprom)]; 845 int count = 10; 846 u32 len; 847 848 /* The NIC keeps the module prom up-to-date in the DMA space 849 * so we can simply copy the module bytes into the data buffer. 850 */ 851 xcvr = &idev->port_info->status.xcvr; 852 len = min_t(u32, sizeof(xcvr->sprom), ee->len); 853 854 do { 855 memcpy(data, xcvr->sprom, len); 856 memcpy(tbuf, xcvr->sprom, len); 857 858 /* Let's make sure we got a consistent copy */ 859 if (!memcmp(data, tbuf, len)) 860 break; 861 862 } while (--count); 863 864 if (!count) 865 return -ETIMEDOUT; 866 867 return 0; 868 } 869 870 static int ionic_get_ts_info(struct net_device *netdev, 871 struct ethtool_ts_info *info) 872 { 873 struct ionic_lif *lif = netdev_priv(netdev); 874 struct ionic *ionic = lif->ionic; 875 __le64 mask; 876 877 if (!lif->phc || !lif->phc->ptp) 878 return ethtool_op_get_ts_info(netdev, info); 879 880 info->phc_index = ptp_clock_index(lif->phc->ptp); 881 882 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 883 SOF_TIMESTAMPING_RX_SOFTWARE | 884 SOF_TIMESTAMPING_SOFTWARE | 885 SOF_TIMESTAMPING_TX_HARDWARE | 886 SOF_TIMESTAMPING_RX_HARDWARE | 887 SOF_TIMESTAMPING_RAW_HARDWARE; 888 889 /* tx modes */ 890 891 info->tx_types = BIT(HWTSTAMP_TX_OFF) | 892 BIT(HWTSTAMP_TX_ON); 893 894 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC)); 895 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask) 896 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC); 897 898 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P)); 899 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask) 900 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P); 901 902 /* rx filters */ 903 904 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 905 BIT(HWTSTAMP_FILTER_ALL); 906 907 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL); 908 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 909 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL); 910 911 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC); 912 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 913 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC); 914 915 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ); 916 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 917 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ); 918 919 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL); 920 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 921 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT); 922 923 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC); 924 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 925 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC); 926 927 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ); 928 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 929 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 930 931 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL); 932 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 933 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 934 935 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC); 936 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 937 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC); 938 939 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ); 940 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 941 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 942 943 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL); 944 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 945 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT); 946 947 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC); 948 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 949 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC); 950 951 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ); 952 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 953 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ); 954 955 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL); 956 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask) 957 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 958 959 return 0; 960 } 961 962 static int ionic_nway_reset(struct net_device *netdev) 963 { 964 struct ionic_lif *lif = netdev_priv(netdev); 965 struct ionic *ionic = lif->ionic; 966 int err = 0; 967 968 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 969 return -EBUSY; 970 971 /* flap the link to force auto-negotiation */ 972 973 mutex_lock(&ionic->dev_cmd_lock); 974 975 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN); 976 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 977 978 if (!err) { 979 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 980 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 981 } 982 983 mutex_unlock(&ionic->dev_cmd_lock); 984 985 return err; 986 } 987 988 static const struct ethtool_ops ionic_ethtool_ops = { 989 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 990 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 991 ETHTOOL_COALESCE_USE_ADAPTIVE_TX, 992 .get_drvinfo = ionic_get_drvinfo, 993 .get_regs_len = ionic_get_regs_len, 994 .get_regs = ionic_get_regs, 995 .get_link = ethtool_op_get_link, 996 .get_link_ksettings = ionic_get_link_ksettings, 997 .set_link_ksettings = ionic_set_link_ksettings, 998 .get_coalesce = ionic_get_coalesce, 999 .set_coalesce = ionic_set_coalesce, 1000 .get_ringparam = ionic_get_ringparam, 1001 .set_ringparam = ionic_set_ringparam, 1002 .get_channels = ionic_get_channels, 1003 .set_channels = ionic_set_channels, 1004 .get_strings = ionic_get_strings, 1005 .get_ethtool_stats = ionic_get_stats, 1006 .get_sset_count = ionic_get_sset_count, 1007 .get_priv_flags = ionic_get_priv_flags, 1008 .set_priv_flags = ionic_set_priv_flags, 1009 .get_rxnfc = ionic_get_rxnfc, 1010 .get_rxfh_indir_size = ionic_get_rxfh_indir_size, 1011 .get_rxfh_key_size = ionic_get_rxfh_key_size, 1012 .get_rxfh = ionic_get_rxfh, 1013 .set_rxfh = ionic_set_rxfh, 1014 .get_tunable = ionic_get_tunable, 1015 .set_tunable = ionic_set_tunable, 1016 .get_module_info = ionic_get_module_info, 1017 .get_module_eeprom = ionic_get_module_eeprom, 1018 .get_pauseparam = ionic_get_pauseparam, 1019 .set_pauseparam = ionic_set_pauseparam, 1020 .get_fecparam = ionic_get_fecparam, 1021 .set_fecparam = ionic_set_fecparam, 1022 .get_ts_info = ionic_get_ts_info, 1023 .nway_reset = ionic_nway_reset, 1024 }; 1025 1026 void ionic_ethtool_set_ops(struct net_device *netdev) 1027 { 1028 netdev->ethtool_ops = &ionic_ethtool_ops; 1029 } 1030